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([2804:14c:485:4b61:71e9:644b:bd6f:e558]) by smtp.gmail.com with ESMTPSA id g63-20020a4a5b42000000b005760ec1708esm910913oob.38.2023.09.08.09.47.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Sep 2023 09:47:42 -0700 (PDT) From: Fabio Estevam To: shawnguo@kernel.org Cc: linux-imx@nxp.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Fabio Estevam Subject: [PATCH] arm64: imx8-ss-lsio: Add PWM interrupts Date: Fri, 8 Sep 2023 13:47:35 -0300 Message-Id: <20230908164735.666655-1-festevam@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230908_094746_236199_97B26511 X-CRM114-Status: UNSURE ( 9.82 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Fabio Estevam The PWM interrupt is mandatory per imx-pwm.yaml. Add them. This also fixes the followig schema warning: imx8qm-apalis-v1.1-ixora-v1.2.dtb: pwm@5d000000: 'oneOf' conditional failed, one must be fixed: 'interrupts' is a required property 'interrupts-extended' is a required property from schema $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml# Signed-off-by: Fabio Estevam --- arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi index b3987dd45372..49ad3413db94 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi @@ -30,6 +30,7 @@ lsio_pwm0: pwm@5d000000 { assigned-clocks = <&clk IMX_SC_R_PWM_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <2>; + interrupts = ; status = "disabled"; }; @@ -42,6 +43,7 @@ lsio_pwm1: pwm@5d010000 { assigned-clocks = <&clk IMX_SC_R_PWM_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <2>; + interrupts = ; status = "disabled"; }; @@ -54,6 +56,7 @@ lsio_pwm2: pwm@5d020000 { assigned-clocks = <&clk IMX_SC_R_PWM_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <2>; + interrupts = ; status = "disabled"; }; @@ -66,6 +69,7 @@ lsio_pwm3: pwm@5d030000 { assigned-clocks = <&clk IMX_SC_R_PWM_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; #pwm-cells = <2>; + interrupts = ; status = "disabled"; };