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Wed, 13 Sep 2023 12:04:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 13 Sep 2023 12:04:51 +0800 From: Macpaul Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Macpaul Lin , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= , , , , CC: Bear Wang , Pablo Sun , Macpaul Lin Subject: [PATCH v2 1/2] dt-bindings: arm64: dts: mediatek: add mt8390-evk board Date: Wed, 13 Sep 2023 12:04:48 +0800 Message-ID: <20230913040449.29560-1-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--4.797300-8.000000 X-TMASE-MatchedRID: iSQL5szRvdHq1YwE48CuWzujYXrbVGSb+Gz435tISEEVhrI1wflQjFRE vM+xXlqD6fGu170eFKuyRoa4j2Wmwl0ieHN50/kHGVyS87Wb4lyy4iyjvVWTotzOQo7mTgA+kpS 2cE3ZkFJ3I1qXcZvalI3p8NudO7SfHxPMjOKY7A/x0Der+6P8v8RB0bsfrpPInxMyeYT53RlhpP cp3TMWK+2s+KtXCAx7gm8QSCiqkQpWj+qkP0Qxr/6179No8WMQNvoFzIxcNi/vyKh2wp2o+Lpa2 pwQg/QX1rLo/RSaKNkc/j4aI5S1Lnr9GD0zfOvEAaqvv/mhgrEIcy9ODq9nmVZca9RSYo/b X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--4.797300-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 79149F659C9303CA7F43BCC1F7E2ED36479B43A947522AEAA44550B8A3F5B4922000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230912_210532_263080_DEC10E53 X-CRM114-Status: GOOD ( 10.74 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org 1. Add compatible for MT8390. 2. Add bindings for the MediaTek mt8390-evk board, also known as the "Genio 700-EVK". The MT8390 and MT8188 belong to the same SoC family, with only minor differences in their physical characteristics. They utilize unique efuse values for differentiation. The booting process and configurations are managed by boot loaders, firmware, and TF-A. Consequently, the part numbers and procurement channels vary. Signed-off-by: Macpaul Lin Reviewed-by: Krzysztof Kozlowski Acked-by: Conor Dooley --- Documentation/devicetree/bindings/arm/mediatek.yaml | 5 +++++ 1 file changed, 5 insertions(+) dependencies for v1: - This patch should be applied after the following patch set - mt8365's bindings - https://lore.kernel.org/linux-arm-kernel/20230912092444.31635-1-macpaul.lin@mediatek.com/T/ - mt8395's bindings: v6 - https://lore.kernel.org/lkml/20230911115717.26184-1-macpaul.lin@mediatek.com/T/ - mt8188's bindings - https://lore.kernel.org/lkml/a4e1a80ebd19896410f50b0297e05dce06fb47cc.camel@mediatek.com/T/ Changess for v2: - drop description for multiple boards - update dependencies with the following patch sets - mt8395's bindings: v7 - https://lore.kernel.org/linux-arm-kernel/20230913032057.3197-1-macpaul.lin@mediatek.com/T/ diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml index 0248bb458180..3968d5934fa2 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -252,6 +252,11 @@ properties: - enum: - mediatek,mt8365-evk - const: mediatek,mt8365 + - items: + - enum: + - mediatek,mt8390-evk + - const: mediatek,mt8390 + - const: mediatek,mt8188 - items: - enum: - mediatek,mt8395-evk From patchwork Wed Sep 13 04:04:49 2023 Content-Type: text/plain; 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Wed, 13 Sep 2023 12:04:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 13 Sep 2023 12:04:51 +0800 From: Macpaul Lin To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Macpaul Lin , =?utf-8?q?Bernhard_Rosenkr=C3=A4nze?= =?utf-8?q?r?= , , , , CC: Bear Wang , Pablo Sun , Macpaul Lin , Chris-QJ Chen Subject: [PATCH v2 2/2] arm64: dts: mediatek: add device-tree for Genio 700 EVK board Date: Wed, 13 Sep 2023 12:04:49 +0800 Message-ID: <20230913040449.29560-2-macpaul.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230913040449.29560-1-macpaul.lin@mediatek.com> References: <20230913040449.29560-1-macpaul.lin@mediatek.com> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--5.987700-8.000000 X-TMASE-MatchedRID: CmjHXhV21s2uhCBFl/b63ov73wEu0Nx7+eBf9ovw8I1mAuQLcdQ1EM1F WVtFP0e2gjbkBAXhAHgXgxnlx9eOX9B2IIHmvwfAo90M/hchIwbg8xL52+Q82+Cv/NhMM5kIdO+ /9tNlGWiVMlcqqHWd7Uzyp2gK85W+KeLGzKm/w9KdVNZaI2n6/yhRWQHuJ8meRi9INZ1ZpGGezt 9uZJJJrccU1yCFIzjv9nkzMtsPLI4GtTV246rrNLcPsR57JkIz+q1Y+/eEArba+IH8mvgPVBLnS bW64I8wsBn6hABENyRPl68/zJltcYnYeNMpd8GQJhFEQZiq2ZR1pBsqUXs9C4tPd6yYZB/Apc2x gJAY6LpjAliRE3rK/oboxOaZLvRZuTVIlct1SZoRz6L9ewc/XtvhKQZ2RM31VmzEbNY6Kvivp4P ZGaw5OQWuS9dr299ny4vkgroKcuYYKW/BzbR9PleollpgzyxAsf4f4CxxueRLBxm1Vv3RsHR74i YaH8tR4vM1YF6AJbbCCfuIMF6xLXnN0DN7HnFm6J+noUiD4Ikuayln9GRFRVugFRLg6YzhGHWEI Yjr125wBL5/AnRB4pRMZUCEHkRt X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--5.987700-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 6F602B5EC1376ECF6FCE3C60B0817BAA114C813C1CE8C75BD82CB757E5782BAD2000:8 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230912_210535_225804_EFB52DF2 X-CRM114-Status: GOOD ( 17.37 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Add basic device-tree for the Genio 700 EVK board. The Genio 700 EVK is based on MediaTek MT8390 SoC. MT8390 hardware register maps are identical to MT8188. The Genio 700 EVK has following features: - MT8390 SoC - MT6365 PMIC - MT6319 Buck IC - 12V DC Jack - 2x4GB LPDDR4X - 64GB eMMC 5.1 - 64Mb SPI NOR - M.2 Key A-E slot with PCIe Gen2 and USB 2.0 - 2x DSI LCM ports - 2x touch sensor ports - 2x MIPI-CSI, as camera daughter board slots - USB 2 micro USB connector - USB 3 with 1 to 2 hub: - M.2 Key B slot - Type-C connector, with DisplayPort over Type-C - HDMI 2.0 TX port with Type A HDMI connector - eDP port - Gigabit Ethernet with RJ45 connector - SD card slot - Earphone Jack - Analog Microphone - 2x Digital Microphone - 3x UART with serial-to-usb converters and micro USB connectors Signed-off-by: Chris-QJ Chen Signed-off-by: Pablo Sun Signed-off-by: Macpaul Lin --- arch/arm64/boot/dts/mediatek/Makefile | 1 + .../dts/mediatek/mt8390-genio-700-evk.dts | 880 ++++++++++++++++++ 2 files changed, 881 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts dependencies for v1: - This patch should be applied after the following patch set - mt8365-gneio-350-evk's dts change (v4) - https://lore.kernel.org/linux-arm-kernel/20230912092444.31635-1-macpaul.lin@mediatek.com/T/ - mt8395-genio-1200-evk's dts basic support (v6) - https://lore.kernel.org/lkml/20230911115717.26184-1-macpaul.lin@mediatek.com/T/ - mt8188 platform's basic support - https://lore.kernel.org/lkml/a4e1a80ebd19896410f50b0297e05dce06fb47cc.camel@mediatek.com/T/ changes for v2: - Fix gpio defines '0' to 'GPIO_ACTIVE_HIGH'. - Drop duplicate name: 'default' for I2C4. - Update dependencies - mt8365-gneio-350-evk's dts change (v5) - https://lore.kernel.org/lkml/20230913032226.4092-1-macpaul.lin@mediatek.com/ - mt8395-genio-1200-evk's dts basic support (v7) - https://lore.kernel.org/linux-arm-kernel/20230913032057.3197-1-macpaul.lin@mediatek.com/T/ - mt8188 platform's basic support (v4) - https://lore.kernel.org/lkml/a4e1a80ebd19896410f50b0297e05dce06fb47cc.camel@mediatek.com/T/ diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 22f362bbbdac..3262849c0f6b 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -54,5 +54,6 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-cherry-tomato-r3.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-genio-350-evk.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt8390-genio-700-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-genio-1200-evk.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts new file mode 100644 index 000000000000..ed6bbf0c15cc --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8390-genio-700-evk.dts @@ -0,0 +1,880 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 MediaTek Inc. + * Author: Chris Chen + * Pablo Sun + * Macpaul Lin + */ +/dts-v1/; + +#include "mt8188.dtsi" +#include "mt6359.dtsi" +#include +#include +#include +#include +#include +#include +#include + +/ { + model = "MediaTek Genio-700 EVK"; + compatible = "mediatek,mt8390-evk", "mediatek,mt8390", + "mediatek,mt8188"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:921600n8"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0x2 0x00000000>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* + * 12 MiB reserved for OP-TEE (BL32) + * +-----------------------+ 0x43e0_0000 + * | SHMEM 2MiB | + * +-----------------------+ 0x43c0_0000 + * | | TA_RAM 8MiB | + * + TZDRAM +--------------+ 0x4340_0000 + * | | TEE_RAM 2MiB | + * +-----------------------+ 0x4320_0000 + */ + optee_reserved: optee@43200000 { + no-map; + reg = <0 0x43200000 0 0x00c00000>; + }; + + scp_mem: memory@50000000 { + compatible = "shared-dma-pool"; + reg = <0 0x50000000 0 0x2900000>; + no-map; + }; + + /* 2 MiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_reserved: memory@54600000 { + no-map; + reg = <0 0x54600000 0x0 0x200000>; + }; + + apu_mem: memory@55000000 { + compatible = "shared-dma-pool"; + reg = <0 0x55000000 0 0x1400000>; /* 20 MB */ + }; + + vpu_mem: memory@57000000 { + compatible = "shared-dma-pool"; + reg = <0 0x57000000 0 0x1400000>; /* 20 MB */ + }; + }; + + common_fixed_5v: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "5v_en"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 10 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + edp_panel_fixed_3v3: regulator-1 { + compatible = "regulator-fixed"; + regulator-name = "edp_panel_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&pio 15 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&edp_panel_3v3_en_pins>; + }; + + gpio_fixed_3v3: regulator-2 { + compatible = "regulator-fixed"; + regulator-name = "gpio_3v3_en"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pio 9 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + sdio_fixed_1v8: regulator-3 { + compatible = "regulator-fixed"; + regulator-name = "sdio_io"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + enable-active-high; + regulator-always-on; + }; + + sdio_fixed_3v3: regulator-4 { + compatible = "regulator-fixed"; + regulator-name = "sdio_card"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pio 74 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-always-on; + }; + + touch0_fixed_3v3: regulator-5 { + compatible = "regulator-fixed"; + regulator-name = "touch_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pio 119 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb_hub_fixed_3v3: regulator-6 { + compatible = "regulator-fixed"; + regulator-name = "usb_hub_3v3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&pio 112 GPIO_ACTIVE_HIGH>; /* HUB_3V3_EN */ + startup-delay-us = <10000>; + enable-active-high; + }; + + usb_hub_reset_1v8: regulator-7 { + compatible = "regulator-fixed"; + regulator-name = "usb_hub_reset"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + gpio = <&pio 7 GPIO_ACTIVE_HIGH>; /* HUB_RESET */ + vin-supply = <&usb_hub_fixed_3v3>; + }; + + usb_p0_vbus: regulator-8 { + compatible = "regulator-fixed"; + regulator-name = "usb_p0_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 84 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb_p1_vbus: regulator-9 { + compatible = "regulator-fixed"; + regulator-name = "usb_p1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 87 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + usb_p2_vbus: regulator-10 { + compatible = "regulator-fixed"; + regulator-name = "usb_p2_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + }; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + clock-frequency = <400000>; + status = "okay"; + + touchscreen@5d { + compatible = "goodix,gt9271"; + reg = <0x5d>; + interrupt-parent = <&pio>; + interrupts = <6 IRQ_TYPE_EDGE_RISING>; + irq-gpios = <&pio 6 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + AVDD28-supply = <&touch0_fixed_3v3>; + VDDIO-supply = <&mt6359_vio18_ldo_reg>; + pinctrl-names = "default"; + pinctrl-0 = <&touch_pins>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_pins>; + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c4_pins>; + pinctrl-1 = <&rt1715_int_pins>; + clock-frequency = <1000000>; + status = "okay"; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_pins>; + clock-frequency = <400000>; + status = "okay"; +}; + +&i2c6 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c6_pins>; + clock-frequency = <400000>; + status = "okay"; +}; + +&mmc0 { + status = "okay"; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc0_default_pins>; + pinctrl-1 = <&mmc0_uhs_pins>; + bus-width = <8>; + max-frequency = <200000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + supports-cqe; + cap-mmc-hw-reset; + no-sdio; + no-sd; + hs400-ds-delay = <0x1481b>; + vmmc-supply = <&mt6359_vemc_1_ldo_reg>; + vqmmc-supply = <&mt6359_vufs_ldo_reg>; + non-removable; +}; + +&mmc1 { + status = "okay"; + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&mmc1_default_pins>; + pinctrl-1 = <&mmc1_uhs_pins>; + bus-width = <4>; + max-frequency = <200000000>; + cap-sd-highspeed; + sd-uhs-sdr50; + sd-uhs-sdr104; + no-mmc; + no-sdio; + cd-gpios = <&pio 2 GPIO_ACTIVE_LOW>; + vmmc-supply = <&mt6359_vpa_buck_reg>; + vqmmc-supply = <&mt6359_vsim1_ldo_reg>; +}; + +&mt6359_vbbck_ldo_reg { + regulator-always-on; +}; + +&mt6359_vcn18_ldo_reg { + regulator-always-on; +}; + +&mt6359_vcn33_2_bt_ldo_reg { + regulator-always-on; +}; + +&mt6359_vcore_buck_reg { + regulator-always-on; +}; + +&mt6359_vgpu11_buck_reg { + regulator-always-on; +}; + +&mt6359_vpa_buck_reg { + regulator-max-microvolt = <3100000>; +}; + +&mt6359_vpu_buck_reg { + regulator-always-on; +}; + +&mt6359_vrf12_ldo_reg { + regulator-always-on; +}; + +&mt6359_vsim1_ldo_reg { + regulator-enable-ramp-delay = <480>; +}; + +&mt6359_vufs_ldo_reg { + regulator-always-on; +}; + +&mt6359codec { + mediatek,mic-type-0 = <1>; /* ACC */ + mediatek,mic-type-1 = <3>; /* DCC */ +}; + +&pio { + audio_default_pins: audio-default-pins { + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + + dptx_pins: dptx-pins { + pins-cmd-dat { + pinmux = ; + bias-pull-up; + }; + }; + + edp_panel_3v3_en_pins: edp-panel-3v3-en-pins { + pins1 { + pinmux = ; + output-high; + }; + }; + + eth_default_pins: eth-default-pins { + pins-cc { + pinmux = , + , + , + ; + drive-strength = ; + }; + + pins-mdio { + pinmux = , + ; + drive-strength = ; + input-enable; + }; + + pins-power { + pinmux = , + ; + output-high; + }; + + pins-rxd { + pinmux = , + , + , + ; + drive-strength = ; + }; + + pins-txd { + pinmux = , + , + , + ; + drive-strength = ; + }; + }; + + eth_sleep_pins: eth-sleep-pins { + pins-cc { + pinmux = , + , + , + ; + }; + + pins-mdio { + pinmux = , + ; + input-disable; + bias-disable; + }; + + pins-rxd { + pinmux = , + , + , + ; + }; + + pins-txd { + pinmux = , + , + , + ; + }; + }; + + i2c0_pins: i2c0-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c1_pins: i2c1-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c2_pins: i2c2-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c3_pins: i2c3-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c4_pins: i2c4-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c5_pins: i2c5-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + i2c6_pins: i2c6-pins { + pins { + pinmux = , + ; + bias-pull-up = ; + drive-strength-microamp = <1000>; + }; + }; + + gpio_key_pins: gpio-key-pins { + pins { + pinmux = , + , + ; + }; + }; + + mmc0_default_pins: mmc0-default-pins { + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + pins-rst { + pinmux = ; + drive-strength = ; + bias-pull-up = ; + }; + }; + + mmc0_uhs_pins: mmc0-uhs-pins { + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + pins-ds { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-rst { + pinmux = ; + drive-strength = ; + bias-pull-up = ; + }; + }; + + mmc1_default_pins: mmc1-default-pins { + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + pins-insert { + pinmux = ; + bias-pull-up; + }; + }; + + mmc1_uhs_pins: mmc1-uhs-pins { + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + }; + + mmc2_default_pins: mmc2-default-pins { + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + + pins-pcm { + pinmux = ; + }; + }; + + mmc2_uhs_pins: mmc2-uhs-pins { + pins-clk { + pinmux = ; + drive-strength = ; + bias-pull-down = ; + }; + + pins-cmd-dat { + pinmux = , + , + , + , + ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + }; + + mmc2_eint_pins: mmc2-eint-pins { + pins-dat1 { + pinmux = ; + input-enable; + bias-pull-up = ; + }; + }; + + mmc2_dat1_pins: mmc2-dat1-pins { + pins-dat1 { + pinmux = ; + input-enable; + drive-strength = ; + bias-pull-up = ; + }; + }; + + panel_default_pins: panel-default-pins { + pins-dcdc { + pinmux = ; + output-low; + }; + + pins-en { + pinmux = ; + output-low; + }; + + pins-rst { + pinmux = ; + output-high; + }; + }; + + rt1715_int_pins: rt1715-int-pins { + pins_cmd0_dat { + pinmux = ; + bias-pull-up; + input-enable; + }; + }; + + spi0_pins: spi0-pins { + pins-spi { + pinmux = , + , + , + ; + bias-disable; + }; + }; + + spi1_pins: spi1-pins { + pins-spi { + pinmux = , + , + , + ; + bias-disable; + }; + }; + + spi2_pins: spi2-pins { + pins-spi { + pinmux = , + , + , + ; + bias-disable; + }; + }; + + touch_pins: touch-pins { + pins-irq { + pinmux = ; + input-enable; + bias-disable; + }; + + pins-reset { + pinmux = ; + output-high; + }; + }; + + uart0_pins: uart0-pins { + pins { + pinmux = , + ; + bias-pull-up; + }; + }; + + uart1_pins: uart1-pins { + pins { + pinmux = , + ; + bias-pull-up; + }; + }; + + uart2_pins: uart2-pins { + pins { + pinmux = , + ; + bias-pull-up; + }; + }; + + usb_default_pins: usb-default-pins { + pins-iddig { + pinmux = ; + input-enable; + bias-pull-up; + }; + + pins-valid { + pinmux = ; + input-enable; + }; + + pins-vbus { + pinmux = ; + output-high; + }; + + }; + + usb1_default_pins: usb1-default-pins { + pins-valid { + pinmux = ; + input-enable; + }; + + pins-usb-hub-3v3-en { + pinmux = ; + output-high; + }; + }; + + wifi_pwrseq_pins: wifi-pwrseq-pins { + pins-wifi-enable { + pinmux = ; + output-low; + }; + }; +}; + +&pmic { + interrupt-parent = <&pio>; + interrupts = <222 IRQ_TYPE_LEVEL_HIGH>; +}; + +&scp { + memory-region = <&scp_mem>; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&spi2 { + pinctrl-0 = <&spi2_pins>; + pinctrl-names = "default"; + mediatek,pad-select = <0>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; +}; + +&u3phy0 { + status = "okay"; +}; + +&u3phy1 { + status = "okay"; +}; + +&u3phy2 { + status = "okay"; +}; + +&xhci0 { + status = "okay"; + vusb33-supply = <&mt6359_vusb_ldo_reg>; +}; + +&xhci1 { + status = "okay"; + vusb33-supply = <&mt6359_vusb_ldo_reg>; + vbus-supply = <&usb_hub_reset_1v8>; +}; + +&xhci2 { + status = "okay"; + vusb33-supply = <&mt6359_vusb_ldo_reg>; +};