From patchwork Wed Sep 13 13:54:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13383185 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF333EDEC4D for ; Wed, 13 Sep 2023 13:56:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234305AbjIMN4U (ORCPT ); Wed, 13 Sep 2023 09:56:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39006 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236933AbjIMN4O (ORCPT ); Wed, 13 Sep 2023 09:56:14 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 544BE19B6 for ; Wed, 13 Sep 2023 06:56:10 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E7120C433CB; Wed, 13 Sep 2023 13:56:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1694613370; bh=9eSoQKn81k97ZS3dPFMO8j6znDqsfS9i9/EwB0IgH0M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HXIDbRgaTvRE9wOoUV1pRzrzmyXKk5c4VzDGUqW17nHjTjv3EmCm1IDZ0+E8Sjd8G S9LTCpOl8wkvxyeIVQJrl6aM0b/fALVuTbtBhVXVBm69apSCwbJcpfIyzu1DfUT313 2I44VdkZPk1/HXYdmWuQ7kP7Dvf8TqeHq5Ntk5yujhU4pJarqvxuNXG/eJxUW8LfC6 E3uSkuoi8YW3ljbluieEdqqDhAgaN/Io3px4U2XsoYAqYibKxKF5o+rAA+5haE754r zdhE7Rjj/J651MbD6eCKWfpuMwDzNW1oxA3C+ossSFgGuA4SXu/Q95Z9IG4p/mi052 ryQUDGc8nhidQ== From: Conor Dooley To: ulf.hansson@linaro.org Cc: conor@kernel.org, Conor Dooley , arnd@arndb.de, changhuang.liang@starfivetech.com, jiajie.ho@starfivetech.com, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, robh@kernel.org, walker.chen@starfivetech.com Subject: [GIT PULL 1/5] pmdomain: starfive: Explicitly include correct DT includes Date: Wed, 13 Sep 2023 14:54:24 +0100 Message-Id: <20230913-swooned-ecosphere-aff4a05c1556@spud> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> References: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1216; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=i5+EOM4kxuguOQSjSgCFjQq+qj0s7s7Br7dC6PPPcmY=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKmM+/ljbe0VzzMoZG1WemA2Z9vaAyvvPzZYVjppw9Xrv ur1zue3dJSyMIhxMMiKKbIk3u5rkVr/x2WHc89bmDmsTCBDGLg4BWAiyZIM/6Pe562TLPp+WELm vnCNyM/0uYXRZ64ZinVHscw4ut1t62GG/xGZe7Qubue2cdLKqW7/5lv8l/tQH9uO2VsOMBXNmK1 7mwUA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Rob Herring The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring Signed-off-by: Conor Dooley --- drivers/pmdomain/starfive/jh71xx-pmu.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pmdomain/starfive/jh71xx-pmu.c b/drivers/pmdomain/starfive/jh71xx-pmu.c index 7d5f50d71c0d..d3b78a619d40 100644 --- a/drivers/pmdomain/starfive/jh71xx-pmu.c +++ b/drivers/pmdomain/starfive/jh71xx-pmu.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include From patchwork Wed Sep 13 13:54:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13383186 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 359D4EDEC52 for ; Wed, 13 Sep 2023 13:56:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232734AbjIMN4V (ORCPT ); Wed, 13 Sep 2023 09:56:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239563AbjIMN4Q (ORCPT ); Wed, 13 Sep 2023 09:56:16 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C6C0519B1 for ; Wed, 13 Sep 2023 06:56:12 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6448AC433C7; Wed, 13 Sep 2023 13:56:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1694613372; bh=o4jDMBY/hW8fInCN3I+ux6T0Enwz8Oe9i7WgkTQcpOk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ndsj7tPzacC0Ar6PaF4k28acwyFWjDnI3ko/E/fWbfx+h/QwAibD4UXiPEw8iIdXr UOU99wLcXgEVHrIl7zeQZ1V6Dw6b7cHYTCjHVfKcenmM3gKYG04SdvAMCHLZEIkeRh psdDvTStuQ6+kcLwTJynXcufmncpXS2OMHnKrgfxEvb3H9Yz2VeWktdkhPBZYtH/sS sNkg2YnQJq9058UVtH8QYZixcyZCQMh87lOWsWuirZAK651bzKnLBv6Tz+2HkamIvV +hf++tbbi4n1BMBaYK49sxuunA4xs2PzBiA223s5SxTfdwQOCJcJhOBM0kNJEwpvb0 VbEZiLtrGzjtA== From: Conor Dooley To: ulf.hansson@linaro.org Cc: conor@kernel.org, Conor Dooley , arnd@arndb.de, changhuang.liang@starfivetech.com, jiajie.ho@starfivetech.com, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, robh@kernel.org, walker.chen@starfivetech.com Subject: [GIT PULL 2/5] dt-bindings: power: Add power-domain header for JH7110 Date: Wed, 13 Sep 2023 14:54:25 +0100 Message-Id: <20230913-grumbly-rewrite-34c85539f2ed@spud> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> References: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1054; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=UZA+qdMFmjRCS72vsUWIOMkmR/rc8R2MaitOCzwhKaI=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKmM+wUSfWNlL7slf9jvGTC5ReKH7Ykfn17OkbFfen3PM s7UNSkLO0pZGMQ4GGTFFFkSb/e1SK3/47LDuectzBxWJpAhDFycAjAR8z+MDL+FEm5m6c4qOFrM vWLbux72+t9/3fYJdR3Zt43r184yLUeG/1FKikGq//azc1h/mz7v1e9+3QaBKmHfJv3yc7eW2B8 5ywkA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Changhuang Liang Add power-domain header for JH7110 SoC, it can use to operate dphy power. Signed-off-by: Changhuang Liang Signed-off-by: Conor Dooley --- include/dt-bindings/power/starfive,jh7110-pmu.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/include/dt-bindings/power/starfive,jh7110-pmu.h b/include/dt-bindings/power/starfive,jh7110-pmu.h index 132bfe401fc8..341e2a0676ba 100644 --- a/include/dt-bindings/power/starfive,jh7110-pmu.h +++ b/include/dt-bindings/power/starfive,jh7110-pmu.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ /* - * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd. * Author: Walker Chen */ #ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__ @@ -14,4 +14,7 @@ #define JH7110_PD_ISP 5 #define JH7110_PD_VENC 6 +#define JH7110_PD_DPHY_TX 0 +#define JH7110_PD_DPHY_RX 1 + #endif From patchwork Wed Sep 13 13:54:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13383187 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 86FD9EDEC53 for ; Wed, 13 Sep 2023 13:56:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236933AbjIMN4V (ORCPT ); Wed, 13 Sep 2023 09:56:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39042 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241125AbjIMN4T (ORCPT ); Wed, 13 Sep 2023 09:56:19 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48B7519B1 for ; Wed, 13 Sep 2023 06:56:15 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D3854C433C9; Wed, 13 Sep 2023 13:56:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1694613374; bh=WyGoT/IpS4j5guw4pY2xjfZcTVdCNCPd7Kqn0VeALVg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GIJP4AIvy0hbT5V2SKk9Xef/Tet7mmZsFqwesBKgS0l/MJcvZRnrwSfaYQOg5sI5B VDszCrfPZYxDgVjH4Kli3Ra6USYi6QnTBzWeMrDxDruxZq2XSABptBehKv0irJ+VN6 egn88/8CYZrfyS4KHwd5sQXx1hLX7sxg8cpUGMu/rippOTS3zSO9IOFVEOtOqrkMQn vYwaS+3kggf0yyDlYZ4a/uTxc63xZfXrIMdqaVIyDSDrI/fNfzDrgRxZNqL46Wm8B2 VmzY/t4NirRGAhKKJV1ULWXhVyBgtAcuN1BJjsg12EH7aALHIGTs/wCxllbpzcGVxm uy0Kukji+LjlA== From: Conor Dooley To: ulf.hansson@linaro.org Cc: conor@kernel.org, Conor Dooley , arnd@arndb.de, changhuang.liang@starfivetech.com, jiajie.ho@starfivetech.com, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, robh@kernel.org, walker.chen@starfivetech.com Subject: [GIT PULL 3/5] pmdomain: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Date: Wed, 13 Sep 2023 14:54:26 +0100 Message-Id: <20230913-legibly-treachery-567cffcb5604@spud> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> References: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=920; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=ROTpWeJDGZli0o85OeBFiNqOQk1oLZRZwx1V2xQWjsQ=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKmM+wX8dq5l7svdNaMwJ6/jAdvtOas8BA7q+j4+cPNqI /Om+DiDjlIWBjEOBlkxRZbE230tUuv/uOxw7nkLM4eVCWQIAxenAEykZDnDL+Yd3r82bvJefniC NLvGiYRLn6qET0y3LZHdtmBHwNG25ZIMf3ivbNmzOuDpg03rQkS46vortgjZ9HY8bb+c3Cq6dLe WITMA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Changhuang Liang Using ARCH_FOO symbol is preferred than SOC_FOO. Reviewed-by: Conor Dooley Reviewed-by: Walker Chen Signed-off-by: Changhuang Liang Signed-off-by: Conor Dooley --- drivers/soc/starfive/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/soc/starfive/Kconfig b/drivers/soc/starfive/Kconfig index bdb96dc4c989..1e9b0c414fec 100644 --- a/drivers/soc/starfive/Kconfig +++ b/drivers/soc/starfive/Kconfig @@ -3,8 +3,8 @@ config JH71XX_PMU bool "Support PMU for StarFive JH71XX Soc" depends on PM - depends on SOC_STARFIVE || COMPILE_TEST - default SOC_STARFIVE + depends on ARCH_STARFIVE || COMPILE_TEST + default ARCH_STARFIVE select PM_GENERIC_DOMAINS help Say 'y' here to enable support power domain support. From patchwork Wed Sep 13 13:54:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13383188 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A20D8EDEC56 for ; Wed, 13 Sep 2023 13:56:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239245AbjIMN4W (ORCPT ); Wed, 13 Sep 2023 09:56:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39052 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237959AbjIMN4V (ORCPT ); Wed, 13 Sep 2023 09:56:21 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF1B419B1 for ; Wed, 13 Sep 2023 06:56:17 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4F66EC433CB; Wed, 13 Sep 2023 13:56:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1694613377; bh=cgBRTpOCoQ02lX8+ZHrREg0hGUDkddmlWjO3J9n11zg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=nHG/3/f/73gQRc6fTowhamRBshwoB0WUeFE5IiPWuHOXDLEnerVq7p1iqK+Uu/+O1 XBvmifvqFUhVmlaZxb8w4CtKbUjDvY9ypDQaOmJSbhj2VmYbzoECNOy1HDTRFsiAXI xqW+uoly/42bIRm3H2byj0yxi+NOhRJ5dz0x4+O+oRspC2XnentOIjvOXZ5g0oCaul ZtwgcfrLHnfnDf2q78zR88x2scLZYkd/bkwje+fe6fXCSo7+djotTO0a6Tjoqnu8bX JbJsoENflpQNYc67K8WQVaJ+tUizeP+aM/B+mW/5sPE557wSAHqyLGmWHyZN0NmkzJ b+yU3xMhtHwuw== From: Conor Dooley To: ulf.hansson@linaro.org Cc: conor@kernel.org, Conor Dooley , arnd@arndb.de, changhuang.liang@starfivetech.com, jiajie.ho@starfivetech.com, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, robh@kernel.org, walker.chen@starfivetech.com Subject: [GIT PULL 4/5] pmdomain: starfive: Extract JH7110 pmu private operations Date: Wed, 13 Sep 2023 14:54:27 +0100 Message-Id: <20230913-slideshow-luckiness-38ff17de84c6@spud> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> References: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5331; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=6vY7S9qkB6xWv0jxylFj8LgeyML+j8MwARcipZNCtvg=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKmM+wWEV/6XKul5Ilh67OkHiVn/3/6/XH7Dy5Oz+tap7 J8RNhwvOkpZGMQ4GGTFFFkSb/e1SK3/47LDuectzBxWJpAhDFycAjARz60M/5PmlQUI/eHqryvc 1vtt+tMofvdY2wtOu97XPItdN79aU5zhf55oW/1x9pffQ365rrjNskvp2JpbRzRNn71cvbqSa23 XFW4A X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Changhuang Liang Move JH7110 private operation into private data of compatible. Convenient to add AON PMU which would not have interrupts property. Signed-off-by: Changhuang Liang Reviewed-by: Walker Chen Signed-off-by: Conor Dooley --- drivers/pmdomain/starfive/jh71xx-pmu.c | 89 ++++++++++++++++++-------- 1 file changed, 62 insertions(+), 27 deletions(-) diff --git a/drivers/pmdomain/starfive/jh71xx-pmu.c b/drivers/pmdomain/starfive/jh71xx-pmu.c index d3b78a619d40..547cd3b9df11 100644 --- a/drivers/pmdomain/starfive/jh71xx-pmu.c +++ b/drivers/pmdomain/starfive/jh71xx-pmu.c @@ -50,9 +50,17 @@ struct jh71xx_domain_info { u8 bit; }; +struct jh71xx_pmu; +struct jh71xx_pmu_dev; + struct jh71xx_pmu_match_data { const struct jh71xx_domain_info *domain_info; int num_domains; + unsigned int pmu_status; + int (*pmu_parse_irq)(struct platform_device *pdev, + struct jh71xx_pmu *pmu); + int (*pmu_set_state)(struct jh71xx_pmu_dev *pmd, + u32 mask, bool on); }; struct jh71xx_pmu { @@ -78,12 +86,12 @@ static int jh71xx_pmu_get_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool *is_o if (!mask) return -EINVAL; - *is_on = readl(pmu->base + JH71XX_PMU_CURR_POWER_MODE) & mask; + *is_on = readl(pmu->base + pmu->match_data->pmu_status) & mask; return 0; } -static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) +static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) { struct jh71xx_pmu *pmu = pmd->pmu; unsigned long flags; @@ -91,22 +99,8 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) u32 mode; u32 encourage_lo; u32 encourage_hi; - bool is_on; int ret; - ret = jh71xx_pmu_get_state(pmd, mask, &is_on); - if (ret) { - dev_dbg(pmu->dev, "unable to get current state for %s\n", - pmd->genpd.name); - return ret; - } - - if (is_on == on) { - dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n", - pmd->genpd.name, on ? "en" : "dis"); - return 0; - } - spin_lock_irqsave(&pmu->lock, flags); /* @@ -165,6 +159,29 @@ static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) return 0; } +static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) +{ + struct jh71xx_pmu *pmu = pmd->pmu; + const struct jh71xx_pmu_match_data *match_data = pmu->match_data; + bool is_on; + int ret; + + ret = jh71xx_pmu_get_state(pmd, mask, &is_on); + if (ret) { + dev_dbg(pmu->dev, "unable to get current state for %s\n", + pmd->genpd.name); + return ret; + } + + if (is_on == on) { + dev_dbg(pmu->dev, "pm domain [%s] is already %sable status.\n", + pmd->genpd.name, on ? "en" : "dis"); + return 0; + } + + return match_data->pmu_set_state(pmd, mask, on); +} + static int jh71xx_pmu_on(struct generic_pm_domain *genpd) { struct jh71xx_pmu_dev *pmd = container_of(genpd, @@ -225,6 +242,25 @@ static irqreturn_t jh71xx_pmu_interrupt(int irq, void *data) return IRQ_HANDLED; } +static int jh7110_pmu_parse_irq(struct platform_device *pdev, struct jh71xx_pmu *pmu) +{ + struct device *dev = &pdev->dev; + int ret; + + pmu->irq = platform_get_irq(pdev, 0); + if (pmu->irq < 0) + return pmu->irq; + + ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt, + 0, pdev->name, pmu); + if (ret) + dev_err(dev, "failed to request irq\n"); + + jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true); + + return 0; +} + static int jh71xx_pmu_init_domain(struct jh71xx_pmu *pmu, int index) { struct jh71xx_pmu_dev *pmd; @@ -274,19 +310,18 @@ static int jh71xx_pmu_probe(struct platform_device *pdev) if (IS_ERR(pmu->base)) return PTR_ERR(pmu->base); - pmu->irq = platform_get_irq(pdev, 0); - if (pmu->irq < 0) - return pmu->irq; - - ret = devm_request_irq(dev, pmu->irq, jh71xx_pmu_interrupt, - 0, pdev->name, pmu); - if (ret) - dev_err(dev, "failed to request irq\n"); + spin_lock_init(&pmu->lock); match_data = of_device_get_match_data(dev); if (!match_data) return -EINVAL; + ret = match_data->pmu_parse_irq(pdev, pmu); + if (ret) { + dev_err(dev, "failed to parse irq\n"); + return ret; + } + pmu->genpd = devm_kcalloc(dev, match_data->num_domains, sizeof(struct generic_pm_domain *), GFP_KERNEL); @@ -306,9 +341,6 @@ static int jh71xx_pmu_probe(struct platform_device *pdev) } } - spin_lock_init(&pmu->lock); - jh71xx_pmu_int_enable(pmu, JH71XX_PMU_INT_ALL_MASK & ~JH71XX_PMU_INT_PCH_FAIL, true); - ret = of_genpd_add_provider_onecell(np, &pmu->genpd_data); if (ret) { dev_err(dev, "failed to register genpd driver: %d\n", ret); @@ -356,6 +388,9 @@ static const struct jh71xx_domain_info jh7110_power_domains[] = { static const struct jh71xx_pmu_match_data jh7110_pmu = { .num_domains = ARRAY_SIZE(jh7110_power_domains), .domain_info = jh7110_power_domains, + .pmu_status = JH71XX_PMU_CURR_POWER_MODE, + .pmu_parse_irq = jh7110_pmu_parse_irq, + .pmu_set_state = jh7110_pmu_set_state, }; static const struct of_device_id jh71xx_pmu_of_match[] = { From patchwork Wed Sep 13 13:54:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 13383189 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 21A58EDEC55 for ; Wed, 13 Sep 2023 13:56:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237959AbjIMN4Y (ORCPT ); Wed, 13 Sep 2023 09:56:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239563AbjIMN4Y (ORCPT ); Wed, 13 Sep 2023 09:56:24 -0400 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 29A1219BF for ; Wed, 13 Sep 2023 06:56:20 -0700 (PDT) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C03D6C433CA; Wed, 13 Sep 2023 13:56:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1694613379; bh=Q6WalZ8TpU7f6rAirYPjnlGFBA7Iavog/gfu/KD0rr4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I1ppQjTJo3S4b7S3L8DWA+RTwdkl4GgYwdRn2Wz7xSpS94DTcYJ0aueQoj25rWcnW RvxkdcF3S4m4fR542BA5h4YjMBec/nE0SkdYwORpEbWQZZqF2/FhDk3jeUWi9+ceh6 jLZFUGpHIdl+970u+3SDTM/47ZV9gWaItYHKnMMDkx+9i+681QvACFkVV+kJ4hAsZg VEodejJjhDMsm1vvWYLLYJfWbHy1wWGu/A4U2EwZpIoWap4qYDz/EV6chOINuS8iTL ZXNARkfn/WYZT/hMY6ZorRbcDKS7IyorXtM+CGel6pBCoqnaUcyhR6ED63Oy0eA7kH fSKwdh6YUIE1g== From: Conor Dooley To: ulf.hansson@linaro.org Cc: conor@kernel.org, Conor Dooley , arnd@arndb.de, changhuang.liang@starfivetech.com, jiajie.ho@starfivetech.com, linux-pm@vger.kernel.org, linux-riscv@lists.infradead.org, robh@kernel.org, walker.chen@starfivetech.com Subject: [GIT PULL 5/5] pmdomain: starfive: Add JH7110 AON PMU support Date: Wed, 13 Sep 2023 14:54:28 +0100 Message-Id: <20230913-dude-imprecise-fc32622bc947@spud> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> References: <20230913-bloomers-scorebook-fb45e0a2aa19@spud> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4052; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=5Q3tk4+W6UmElYB6O/7FZbKQ8pSZfsYJMQxdffVIkaw=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKmM+wW3FNppPxbr5vN92fxrQt807ne8/19t8l82e66pz +bCrOOGHaUsDGIcDLJiiiyJt/tapNb/cdnh3PMWZg4rE8gQBi5OAZhI3FVGhvOpse7Z846eTPN8 K1zNk1n764R3dNSNir33zQt+X/2cosjwv0LnqazhhosOOj3XXCte7Jg0WWWxw1/tsP2xcS8qNhj lcAAA X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Changhuang Liang Add AON PMU for StarFive JH7110 SoC. It can be used to turn on/off the dphy rx/tx power switch. Reviewed-by: Walker Chen Signed-off-by: Changhuang Liang Signed-off-by: Conor Dooley --- MAINTAINERS | 1 + drivers/pmdomain/starfive/jh71xx-pmu.c | 57 +++++++++++++++++++++++--- 2 files changed, 53 insertions(+), 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 4d9e7d42412f..f1c34484c9b2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20512,6 +20512,7 @@ F: drivers/usb/cdns3/cdns3-starfive.c STARFIVE JH71XX PMU CONTROLLER DRIVER M: Walker Chen +M: Changhuang Liang S: Supported F: Documentation/devicetree/bindings/power/starfive* F: drivers/pmdomain/starfive/jh71xx-pmu.c diff --git a/drivers/pmdomain/starfive/jh71xx-pmu.c b/drivers/pmdomain/starfive/jh71xx-pmu.c index 547cd3b9df11..2724bee7e85f 100644 --- a/drivers/pmdomain/starfive/jh71xx-pmu.c +++ b/drivers/pmdomain/starfive/jh71xx-pmu.c @@ -2,7 +2,7 @@ /* * StarFive JH71XX PMU (Power Management Unit) Controller Driver * - * Copyright (C) 2022 StarFive Technology Co., Ltd. + * Copyright (C) 2022-2023 StarFive Technology Co., Ltd. */ #include @@ -23,6 +23,9 @@ #define JH71XX_PMU_EVENT_STATUS 0x88 #define JH71XX_PMU_INT_STATUS 0x8C +/* aon pmu register offset */ +#define JH71XX_AON_PMU_SWITCH 0x00 + /* sw encourage cfg */ #define JH71XX_PMU_SW_ENCOURAGE_EN_LO 0x05 #define JH71XX_PMU_SW_ENCOURAGE_EN_HI 0x50 @@ -159,6 +162,26 @@ static int jh7110_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) return 0; } +static int jh7110_aon_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) +{ + struct jh71xx_pmu *pmu = pmd->pmu; + unsigned long flags; + u32 val; + + spin_lock_irqsave(&pmu->lock, flags); + val = readl(pmu->base + JH71XX_AON_PMU_SWITCH); + + if (on) + val |= mask; + else + val &= ~mask; + + writel(val, pmu->base + JH71XX_AON_PMU_SWITCH); + spin_unlock_irqrestore(&pmu->lock, flags); + + return 0; +} + static int jh71xx_pmu_set_state(struct jh71xx_pmu_dev *pmd, u32 mask, bool on) { struct jh71xx_pmu *pmu = pmd->pmu; @@ -316,10 +339,12 @@ static int jh71xx_pmu_probe(struct platform_device *pdev) if (!match_data) return -EINVAL; - ret = match_data->pmu_parse_irq(pdev, pmu); - if (ret) { - dev_err(dev, "failed to parse irq\n"); - return ret; + if (match_data->pmu_parse_irq) { + ret = match_data->pmu_parse_irq(pdev, pmu); + if (ret) { + dev_err(dev, "failed to parse irq\n"); + return ret; + } } pmu->genpd = devm_kcalloc(dev, match_data->num_domains, @@ -393,10 +418,31 @@ static const struct jh71xx_pmu_match_data jh7110_pmu = { .pmu_set_state = jh7110_pmu_set_state, }; +static const struct jh71xx_domain_info jh7110_aon_power_domains[] = { + [JH7110_PD_DPHY_TX] = { + .name = "DPHY-TX", + .bit = 30, + }, + [JH7110_PD_DPHY_RX] = { + .name = "DPHY-RX", + .bit = 31, + }, +}; + +static const struct jh71xx_pmu_match_data jh7110_aon_pmu = { + .num_domains = ARRAY_SIZE(jh7110_aon_power_domains), + .domain_info = jh7110_aon_power_domains, + .pmu_status = JH71XX_AON_PMU_SWITCH, + .pmu_set_state = jh7110_aon_pmu_set_state, +}; + static const struct of_device_id jh71xx_pmu_of_match[] = { { .compatible = "starfive,jh7110-pmu", .data = (void *)&jh7110_pmu, + }, { + .compatible = "starfive,jh7110-aon-syscon", + .data = (void *)&jh7110_aon_pmu, }, { /* sentinel */ } @@ -413,5 +459,6 @@ static struct platform_driver jh71xx_pmu_driver = { builtin_platform_driver(jh71xx_pmu_driver); MODULE_AUTHOR("Walker Chen "); +MODULE_AUTHOR("Changhuang Liang "); MODULE_DESCRIPTION("StarFive JH71XX PMU Driver"); MODULE_LICENSE("GPL");