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Wysocki" CC: Mika Westerberg , Hans de Goede , , Shyam Sundar S K , "open list:PCI SUBSYSTEM" , Mario Limonciello Subject: [PATCH v19 1/2] PCI: Move the `PCI_CLASS_SERIAL_USB_USB4` definition to common header Date: Thu, 14 Sep 2023 21:33:53 -0500 Message-ID: <20230915023354.939-2-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230915023354.939-1-mario.limonciello@amd.com> References: <20230915023354.939-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD5:EE_|CH0PR12MB8579:EE_ X-MS-Office365-Filtering-Correlation-Id: 2d03d2f4-de9b-4b1d-eac7-08dbb59e85ed X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 3DQn6KqwMax6fmPUl/7TxG2L8f6XOSoDICmYXMb0aa6o1llj2qSULfMg8qufDykfuMJoDJmA/40gRy7W1wfGOaB/di111hyzn9J9LBZW5Idmql6x9uDqwcEUJwtDKNFmCb25hRrJkPWhaR2D4bilFe99XXoXlrDGf4OgneysM6FyY8OXzLfVYarmHfSMhZA0fVea4QwLSnZRSQ5CRCJBQM9xys2iUbb7/BfXmoyOejHk30YEhdDTpKT9ErOf3SAPN0UUcu69zx8KqDu4niCE5/ALFOPJXNkVQ+go+8FCw/PcxxV/Wxm1DDI8FeYoqZyAbETXwhhOF+fE+7hFW++z7Vlf2HpKQT4eimd1sq19UPspUZY+8j6gAhzMFq4e+UvUleX+GE/opgQ1XRpaB2j98bIf0poOwM8kMx73cWm44FYT5XpIO67JY1PzKR4EG65aOkcEneIlVs7wyGoq2rAuApHjKV0GCsrrUKFzM1OW/vM1nSFOLY38cmc8PUykCXS9Tf0zPtMBLTKdXltbdQQ5MKDoI+bvCkqR3m/TSnNLClBfZ9qxRZS9eN+0f6PMEMXLfJWuNs7qH5fTG7A68NqQPR1zo/R8ma806lpuQpbS1Whx5QMQaFsI8q7XaDxEH8Pig8DeyMTGZ+rTu6sQyIOUuznVnpvdVjajtwCDUPfs9M9LBFShphUgdwx6YoIwqPjK26gXSPhh+0qXeIxWQGzvuyvBiCQXqz14WfKZ6THgwZGAy70ZNFuVAu2v1Fcv7TZ6n//vhB382b6AZa/PQl7hLF8y3aHoOy3a2kOkA/uQcLo= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(396003)(346002)(39860400002)(376002)(82310400011)(1800799009)(186009)(451199024)(40470700004)(36840700001)(46966006)(40460700003)(47076005)(44832011)(5660300002)(40480700001)(8676002)(8936002)(41300700001)(54906003)(4326008)(316002)(110136005)(70206006)(36860700001)(70586007)(426003)(336012)(6666004)(83380400001)(2906002)(7696005)(82740400003)(36756003)(81166007)(356005)(86362001)(1076003)(16526019)(26005)(2616005)(478600001)(81973001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2023 03:47:45.9010 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2d03d2f4-de9b-4b1d-eac7-08dbb59e85ed X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD5.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB8579 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org `PCI_CLASS_SERIAL_USB_USB4` may be used by code outside of thunderbolt. Move the declaration into the common pci_ids.h header. Cc: stable@vger.kernel.org Acked-by: Mika Westerberberg Signed-off-by: Mario Limonciello --- drivers/thunderbolt/nhi.h | 2 -- include/linux/pci_ids.h | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/thunderbolt/nhi.h b/drivers/thunderbolt/nhi.h index 0f029ce75882..675ddefe283c 100644 --- a/drivers/thunderbolt/nhi.h +++ b/drivers/thunderbolt/nhi.h @@ -91,6 +91,4 @@ extern const struct tb_nhi_ops icl_nhi_ops; #define PCI_DEVICE_ID_INTEL_RPL_NHI0 0xa73e #define PCI_DEVICE_ID_INTEL_RPL_NHI1 0xa76d -#define PCI_CLASS_SERIAL_USB_USB4 0x0c0340 - #endif diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 5fb3d4c393a9..29aeac53dc41 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -121,6 +121,7 @@ #define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310 #define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320 #define PCI_CLASS_SERIAL_USB_XHCI 0x0c0330 +#define PCI_CLASS_SERIAL_USB_USB4 0x0c0340 #define PCI_CLASS_SERIAL_USB_DEVICE 0x0c03fe #define PCI_CLASS_SERIAL_FIBER 0x0c04 #define PCI_CLASS_SERIAL_SMBUS 0x0c05 From patchwork Fri Sep 15 02:33:54 2023 Content-Type: text/plain; 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Wysocki" CC: Mika Westerberg , Hans de Goede , , Shyam Sundar S K , "open list:PCI SUBSYSTEM" , Mario Limonciello Subject: [PATCH v19 2/2] PCI: Add a quirk for AMD PCIe root ports w/ USB4 controllers Date: Thu, 14 Sep 2023 21:33:54 -0500 Message-ID: <20230915023354.939-3-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230915023354.939-1-mario.limonciello@amd.com> References: <20230915023354.939-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD8:EE_|SA3PR12MB8023:EE_ X-MS-Office365-Filtering-Correlation-Id: fb9185b4-7949-48f6-ba3d-08dbb59e8662 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: W4T2HDG3sKfgSzlfU591JmaKkFwNzgfepKeX4p0uHPIoZ2gxOutSH9i8AFmKz5SIVR28tbIt0La8txYdhlUIpQdp+QAeDql8KI8aziDDMHV3rb+gOxQs2loyRXzBbOVQlk+V1RaJ9cfu/MgBpJfW/zFhbL5IKcq9kCGVdeJrzxPm+Qc5LhZxmXhR9r66NcK6JojEknosLB6GtLf5jCjNymFigJ+JqSXVHRASk3LIkGfhZjCsiqMedIKr+P/31gMBEjHcHhqKfQ7CnsM447d+522iKFI+ePC1CFbvWZf9mhQDaYVGFwm5L79I/6yvGjU7lrM64ws2aGHu5FU2l9X/jG4tkF8j0efXoz/GYpCMlpDNKjJ+iP9jPSTE8/DoRlOENrEwHDr1alni0M4X6+59PZpWip37FPumWUIMM6BN7kxfzDi98yyfyVe7ZMEPPyC0IIbdJZggh2uM+vEe6RodZRU4lYYbayYd8pI0iGlSG2fD5LKHcvChFtc63VwvnaOp566EfTct+eNX1EDL2OhoB8rhKOkry8uuH5QBmKXdBvque7ap5Hxu82n8yJPambmZbhLaovAITSMAAFm5etw8xMi/kL5A2lTrxqVrFVyR9ZHiidlQ2qtD9O9grVmSl1++AdmwUfdOe0fDZmOlk93DLe0FIo2RHK2zQ8auwfAmr41wAABjF4EXtIEqZREL6Ytgr0/in8HUBa6ZyDLTctscBPMpE79Cmb9F8q/QRhyr2dYTGpwRArRWsddzapqsU1RugHf5RPnozQaWV3wUu+7wYA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(39860400002)(136003)(376002)(346002)(186009)(451199024)(82310400011)(1800799009)(36840700001)(46966006)(40470700004)(36756003)(86362001)(40460700003)(40480700001)(1076003)(478600001)(966005)(26005)(426003)(336012)(5660300002)(16526019)(70206006)(110136005)(70586007)(54906003)(316002)(44832011)(7696005)(8936002)(41300700001)(2616005)(8676002)(4326008)(2906002)(36860700001)(47076005)(81166007)(82740400003)(356005)(83380400001)(6666004)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Sep 2023 03:47:46.6822 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fb9185b4-7949-48f6-ba3d-08dbb59e8662 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8023 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Iain reports that USB devices can't be used to wake a Lenovo Z13 from suspend. This problem occurs because the PCIe root port has been put into D3hot and AMD's platform can't handle USB devices waking the platform from a hardware sleep state in this case. The platform is put into a hardware sleep state by the actions of the amd-pmc driver. Although the issue is initially reported on a single model it actually affects all Yellow Carp (Rembrandt) and Pink Sardine (Phoenix) SoCs. This problem only occurs on Linux specifically when attempting to wake the platform from a hardware sleep state. Comparing the behavior on Windows and Linux, Windows doesn't put the root ports into D3 at this time. Linux decides the target state to put the device into at suspend by this policy: 1. If platform_pci_power_manageable(): Use platform_pci_choose_state() 2. If the device is armed for wakeup: Select the deepest D-state that supports a PME. 3. Else: Use D3hot. Devices are considered power manageable by the platform when they have one or more objects described in the table in section 7.3 of the ACPI 6.5 specification [1]. In this case the root ports are not power manageable. If devices are not considered power manageable; specs are ambiguous as to what should happen. In this situation Windows 11 puts PCIe ports in D0 ostensibly due the policy from the "uPEP driver" which is a complimentary driver the Linux "amd-pmc" driver. Linux chooses to allow D3 for these root ports due to the policy introduced by commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend"). The Windows uPEP driver expresses the desired state that should be selected for suspend but Linux doesn't, so introduce a quirk for the problematic root ports. The quirk removes PME support for D3hot and D3cold at suspend time if the system will be using s2idle. When the port is configured for wakeup this will prevent these states from being selected in pci_target_state(). After the system is resumes the PME support is re-read from the PM capabilities register to allow opportunistic power savings at runtime by letting the root port go into D3hot or D3cold. Cc: stable@vger.kernel.org Link: https://learn.microsoft.com/en-us/windows-hardware/design/device-experiences/platform-design-for-modern-standby#low-power-core-silicon-cpu-soc-dram [1] Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend") Reported-by: Iain Lane Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121 Signed-off-by: Mario Limonciello --- drivers/pci/quirks.c | 61 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index eeec1d6f9023..ebc0afbc814e 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -6188,3 +6188,64 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x9a31, dpc_log_size); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5020, of_pci_make_dev_node); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_XILINX, 0x5021, of_pci_make_dev_node); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_REDHAT, 0x0005, of_pci_make_dev_node); + +/* + * When AMD PCIe root ports with AMD USB4 controllers attached to them are put + * into D3hot or D3cold downstream USB devices may fail to wakeup the system. + * This manifests as a missing wakeup interrupt. + * + * Prevent the associated root port from using PME to wake from D3hot or + * D3cold power states during s2idle. + * This will effectively put the root port into D0 power state over s2idle. + */ +static bool child_has_amd_usb4(struct pci_dev *pdev) +{ + struct pci_dev *child = NULL; + + while ((child = pci_get_class(PCI_CLASS_SERIAL_USB_USB4, child))) { + if (child->vendor != PCI_VENDOR_ID_AMD) + continue; + if (pcie_find_root_port(child) != pdev) + continue; + return true; + } + + return false; +} + +static void quirk_reenable_pme(struct pci_dev *dev) +{ + u16 pmc; + + if (!dev->pm_cap) + return; + + if (!child_has_amd_usb4(dev)) + return; + + pci_read_config_word(dev, dev->pm_cap + PCI_PM_PMC, &pmc); + pmc &= PCI_PM_CAP_PME_MASK; + dev->pme_support = pmc >> PCI_PM_CAP_PME_SHIFT; +} + +static void quirk_disable_pme_suspend(struct pci_dev *dev) +{ + int mask; + + if (pm_suspend_via_firmware()) + return; + + if (!child_has_amd_usb4(dev)) + return; + + mask = (PCI_PM_CAP_PME_D3hot|PCI_PM_CAP_PME_D3cold) >> PCI_PM_CAP_PME_SHIFT; + if (!(dev->pme_support & mask)) + return; + dev->pme_support &= ~mask; + dev_info_once(&dev->dev, "quirk: disabling PME from D3hot and D3cold at suspend\n"); +} + +DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_AMD, 0x14b9, quirk_disable_pme_suspend); +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, 0x14b9, quirk_reenable_pme); +DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_AMD, 0x14eb, quirk_disable_pme_suspend); +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, 0x14eb, quirk_reenable_pme);