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([71.212.131.115]) by smtp.gmail.com with ESMTPSA id q3-20020a170902788300b001b531e8a000sm5707763pll.157.2023.09.16.15.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Sep 2023 15:01:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, c@jia.je, gaosong@loongson.cn, yangxiaojuan@loongson.cn Subject: [PATCH 1/7] tcg: Add C_N2_I1 Date: Sat, 16 Sep 2023 15:01:45 -0700 Message-Id: <20230916220151.526140-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230916220151.526140-1-richard.henderson@linaro.org> References: <20230916220151.526140-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Constraint with two outputs, both in new registers. Signed-off-by: Richard Henderson Reviewed-by: Jiajie Chen --- tcg/tcg.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tcg/tcg.c b/tcg/tcg.c index 604fa9bf3e..fdbf79689a 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -644,6 +644,7 @@ static void tcg_out_movext3(TCGContext *s, const TCGMovExtend *i1, #define C_O1_I4(O1, I1, I2, I3, I4) C_PFX5(c_o1_i4_, O1, I1, I2, I3, I4), #define C_N1_I2(O1, I1, I2) C_PFX3(c_n1_i2_, O1, I1, I2), +#define C_N2_I1(O1, O2, I1) C_PFX3(c_n2_i1_, O1, O2, I1), #define C_O2_I1(O1, O2, I1) C_PFX3(c_o2_i1_, O1, O2, I1), #define C_O2_I2(O1, O2, I1, I2) C_PFX4(c_o2_i2_, O1, O2, I1, I2), @@ -666,6 +667,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode); #undef C_O1_I3 #undef C_O1_I4 #undef C_N1_I2 +#undef C_N2_I1 #undef C_O2_I1 #undef C_O2_I2 #undef C_O2_I3 @@ -685,6 +687,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode); #define C_O1_I4(O1, I1, I2, I3, I4) { .args_ct_str = { #O1, #I1, #I2, #I3, #I4 } }, #define C_N1_I2(O1, I1, I2) { .args_ct_str = { "&" #O1, #I1, #I2 } }, +#define C_N2_I1(O1, O2, I1) { .args_ct_str = { "&" #O1, "&" #O2, #I1 } }, #define C_O2_I1(O1, O2, I1) { .args_ct_str = { #O1, #O2, #I1 } }, #define C_O2_I2(O1, O2, I1, I2) { .args_ct_str = { #O1, #O2, #I1, #I2 } }, @@ -706,6 +709,7 @@ static const TCGTargetOpDef constraint_sets[] = { #undef C_O1_I3 #undef C_O1_I4 #undef C_N1_I2 +#undef C_N2_I1 #undef C_O2_I1 #undef C_O2_I2 #undef C_O2_I3 @@ -725,6 +729,7 @@ static const TCGTargetOpDef constraint_sets[] = { #define C_O1_I4(O1, I1, I2, I3, I4) C_PFX5(c_o1_i4_, O1, I1, I2, I3, I4) #define C_N1_I2(O1, I1, I2) C_PFX3(c_n1_i2_, O1, I1, I2) +#define C_N2_I1(O1, O2, I1) C_PFX3(c_n2_i1_, O1, O2, I1) #define C_O2_I1(O1, O2, I1) C_PFX3(c_o2_i1_, O1, O2, I1) #define C_O2_I2(O1, O2, I1, I2) C_PFX4(c_o2_i2_, O1, O2, I1, I2) From patchwork Sat Sep 16 22:01:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13388528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78F9EC2BA12 for ; Sat, 16 Sep 2023 22:02:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qhdMV-0006Hp-Sv; Sat, 16 Sep 2023 18:01:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qhdMU-0006GW-6e for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:01:58 -0400 Received: from mail-pl1-x62f.google.com ([2607:f8b0:4864:20::62f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qhdMS-00047F-FU for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:01:57 -0400 Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1c09673b006so25321065ad.1 for ; Sat, 16 Sep 2023 15:01:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1694901715; x=1695506515; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NkIKScugFstB2eLhoDZslzvtYewYtRAcc2oZTQwrpeE=; b=IDMTpl0nrpwoYnEIkhmrOFGIeNzkKLJu6Vpj078AE9rqp5Y45VUSZqYVrNLcyhi2Pn 0qSRV27gEMiEDxs6R5WJ7PdOmCOVt/QrIbzYWDTRatGbKRi9ROpEk5svbiFzckEldaWd z5fwdZVwrPM8vBnAgHur6vVDcD2vR8Wf07IlTkviKRuOLgz8uC/w3EEcyuhUVdPRMWKG o1nt4AWIZkSFEGUe2ufGAmu0RNEpVsFy1+qngYHtEYuQzj+0kOoflj5wBFQIXPiWxJLc FMm59zDG3fS3fPX3x4CPA6tK5uG8SwhfpDngNJJLrY8NzQ96iHUhqXtjV4EUPoBH/989 Xxpw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694901715; x=1695506515; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NkIKScugFstB2eLhoDZslzvtYewYtRAcc2oZTQwrpeE=; b=xLjTb47GAYFWmLZ40ffmBiA74f0YyhTuoXO6uxIFxF/T6KiT5hUUDFU7lI8PWP0P8H Nwz/T41agzCke7wniA3/RACqUoRC1RsCvA2z56CcdhkvlOHh8Fd0GVdiHot9oz0uEex0 BAO8bIjwNqkmwKpgxTkBBi1PlXaifZEHRMbhk6IGeGiXPYjuId68PxtIWOCdnMqtWvW4 qAEZjXfNrR/RgSrKPjwvP2nNvhDbhOoNe/JY6VM4FvaqSL9tE4U70pzWfljFxcPhAPLa drYIAxK866vdBlsZgO9jK7NnY9JyGn82rEq8qZm20xYVH7Trs6SM+qS1YhGVAB09VFeq FqWw== X-Gm-Message-State: AOJu0YxyUmORzqbvo5R+Xm5baFAFZmRHdiHQw9tKP5I2OPRYZATB3w3R ndYFRRuAMjJI6BoF/PE/gpvNgdZP6VeOGFlxts0= X-Google-Smtp-Source: AGHT+IFZD5/AdgSffsjV68HLax35Ios4mR0ENGE6zFBr8QFaWtAqj0gqBcrk8RhYJIrxJR6R5J91rA== X-Received: by 2002:a17:902:ce84:b0:1be:e873:38b0 with SMTP id f4-20020a170902ce8400b001bee87338b0mr5908894plg.59.1694901714857; Sat, 16 Sep 2023 15:01:54 -0700 (PDT) Received: from stoup.. ([71.212.131.115]) by smtp.gmail.com with ESMTPSA id q3-20020a170902788300b001b531e8a000sm5707763pll.157.2023.09.16.15.01.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Sep 2023 15:01:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, c@jia.je, gaosong@loongson.cn, yangxiaojuan@loongson.cn Subject: [PATCH 2/7] tcg/loongarch64: Use C_N2_I1 for INDEX_op_qemu_ld_a*_i128 Date: Sat, 16 Sep 2023 15:01:46 -0700 Message-Id: <20230916220151.526140-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230916220151.526140-1-richard.henderson@linaro.org> References: <20230916220151.526140-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62f; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Use new registers for the output, so that we never overlap the input address, which could happen for user-only. This avoids a "tmp = addr + 0" in that case. Signed-off-by: Richard Henderson Reviewed-by: Jiajie Chen --- tcg/loongarch64/tcg-target-con-set.h | 2 +- tcg/loongarch64/tcg-target.c.inc | 17 +++++++++++------ 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/tcg/loongarch64/tcg-target-con-set.h b/tcg/loongarch64/tcg-target-con-set.h index 77d62e38e7..cae6c2aad6 100644 --- a/tcg/loongarch64/tcg-target-con-set.h +++ b/tcg/loongarch64/tcg-target-con-set.h @@ -38,4 +38,4 @@ C_O1_I2(w, w, wM) C_O1_I2(w, w, wA) C_O1_I3(w, w, w, w) C_O1_I4(r, rZ, rJ, rZ, rZ) -C_O2_I1(r, r, r) +C_N2_I1(r, r, r) diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index b701df50db..40074c46b8 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -1105,13 +1105,18 @@ static void tcg_out_qemu_ldst_i128(TCGContext *s, TCGReg data_lo, TCGReg data_hi } } else { /* Otherwise use a pair of LD/ST. */ - tcg_out_opc_add_d(s, TCG_REG_TMP0, h.base, h.index); + TCGReg base = h.base; + if (h.index != TCG_REG_ZERO) { + base = TCG_REG_TMP0; + tcg_out_opc_add_d(s, base, h.base, h.index); + } if (is_ld) { - tcg_out_opc_ld_d(s, data_lo, TCG_REG_TMP0, 0); - tcg_out_opc_ld_d(s, data_hi, TCG_REG_TMP0, 8); + tcg_debug_assert(base != data_lo); + tcg_out_opc_ld_d(s, data_lo, base, 0); + tcg_out_opc_ld_d(s, data_hi, base, 8); } else { - tcg_out_opc_st_d(s, data_lo, TCG_REG_TMP0, 0); - tcg_out_opc_st_d(s, data_hi, TCG_REG_TMP0, 8); + tcg_out_opc_st_d(s, data_lo, base, 0); + tcg_out_opc_st_d(s, data_hi, base, 8); } } @@ -2049,7 +2054,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op) case INDEX_op_qemu_ld_a32_i128: case INDEX_op_qemu_ld_a64_i128: - return C_O2_I1(r, r, r); + return C_N2_I1(r, r, r); case INDEX_op_qemu_st_a32_i128: case INDEX_op_qemu_st_a64_i128: From patchwork Sat Sep 16 22:01:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13388533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DD18AC2BA12 for ; Sat, 16 Sep 2023 22:03:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qhdMW-0006Hs-FJ; Sat, 16 Sep 2023 18:02:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qhdMU-0006Gm-QB for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:01:58 -0400 Received: from mail-pl1-x635.google.com ([2607:f8b0:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qhdMT-00047I-4X for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:01:58 -0400 Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1c3f97f2239so29854755ad.0 for ; Sat, 16 Sep 2023 15:01:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1694901715; x=1695506515; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qK9dl2HMki8c/cc1ceaRkDQQeJ1Zz081BcJFrsyjAmw=; b=d/h9xQF5AR0NCZb6Kw5ekJZu7Nr0YkNg8lDdvOMMEhQlHp7O+x1V1XDyNOqJPwhBcB Fb9cEqR1Qsk6muS2+O5Hl9ZCR6OmmqsTU0l82gr386TOTVVpv9vL+sM0V18idtKt7b2V 1wMFQlhzz6adghWv0R4EudE1dVrkLEdj2aKan+wuIQ0KFDeGP7kO/jD0x8BsnW05IwQF 8hlnbm7JKUuL+VpsO+QiqhpiHSe+rP/iVxcycdD39rXX53Iy7i4N/5u5D8tKGPNEKeCm 4w8OE8XuG8T8pRq6myomwRO7apONAqILrlOR0GOFZiK53w8gMo4z0tEyXqueRD3l2fSD 4p3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694901715; x=1695506515; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qK9dl2HMki8c/cc1ceaRkDQQeJ1Zz081BcJFrsyjAmw=; b=SStZfpv61854CtFXRTcGSVI2zckaBcoEbZ8G2PU8IlYxguBYcXLmStF+BfeMAjBGpK VFizvOsHZDO05ZBmh0qWDPEjbAYKjkx2Ud2B1hqbdWq83RpTSV/aN39Yl+wj9tXYUZXZ ulDzNwq0bB/9eVK5WwAKnOEsI6lSZcNrdMfLMrjvhUsBTi/8JmOeTaeys2jurHUw4heR tmOr+z6C9Hliu7o42V12OWuR/+gEfuZAHW6b3AgXO9Z+knsntpvurfqGDnZHkvyl9Ig7 1DapTeszkXioZFQDjvJLg7iU5Ypyt5mLdKI1Hpz4UteW7a+m/1VhvYue6woZQWncE0la AdbQ== X-Gm-Message-State: AOJu0YzH3JiH4Ktr4YW+e5Q0/to4M1jntpvqeN9KmuerQc9A7BJ1zOtS UUTpH6H8ySgkTgpmVZqrwUIKpIKBoBz4N/p13T8= X-Google-Smtp-Source: AGHT+IFsWNggMULZV+TAaYHwJC3SPxgWVynPa+zxGcQgP55Wm5tc9WJLBD+b46gkIYWHA4Kw+Lt3EQ== X-Received: by 2002:a17:903:186:b0:1bd:aeb3:9504 with SMTP id z6-20020a170903018600b001bdaeb39504mr7095687plg.15.1694901715664; Sat, 16 Sep 2023 15:01:55 -0700 (PDT) Received: from stoup.. ([71.212.131.115]) by smtp.gmail.com with ESMTPSA id q3-20020a170902788300b001b531e8a000sm5707763pll.157.2023.09.16.15.01.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Sep 2023 15:01:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, c@jia.je, gaosong@loongson.cn, yangxiaojuan@loongson.cn Subject: [PATCH 3/7] util: Add cpuinfo for loongarch64 Date: Sat, 16 Sep 2023 15:01:47 -0700 Message-Id: <20230916220151.526140-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230916220151.526140-1-richard.henderson@linaro.org> References: <20230916220151.526140-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::635; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Jiajie Chen --- host/include/loongarch64/host/cpuinfo.h | 21 +++++++++++++++ util/cpuinfo-loongarch.c | 35 +++++++++++++++++++++++++ util/meson.build | 2 ++ 3 files changed, 58 insertions(+) create mode 100644 host/include/loongarch64/host/cpuinfo.h create mode 100644 util/cpuinfo-loongarch.c diff --git a/host/include/loongarch64/host/cpuinfo.h b/host/include/loongarch64/host/cpuinfo.h new file mode 100644 index 0000000000..fab664a10b --- /dev/null +++ b/host/include/loongarch64/host/cpuinfo.h @@ -0,0 +1,21 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Host specific cpu identification for LoongArch + */ + +#ifndef HOST_CPUINFO_H +#define HOST_CPUINFO_H + +#define CPUINFO_ALWAYS (1u << 0) /* so cpuinfo is nonzero */ +#define CPUINFO_LSX (1u << 1) + +/* Initialized with a constructor. */ +extern unsigned cpuinfo; + +/* + * We cannot rely on constructor ordering, so other constructors must + * use the function interface rather than the variable above. + */ +unsigned cpuinfo_init(void); + +#endif /* HOST_CPUINFO_H */ diff --git a/util/cpuinfo-loongarch.c b/util/cpuinfo-loongarch.c new file mode 100644 index 0000000000..08b6d7460c --- /dev/null +++ b/util/cpuinfo-loongarch.c @@ -0,0 +1,35 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Host specific cpu identification for LoongArch. + */ + +#include "qemu/osdep.h" +#include "host/cpuinfo.h" + +#ifdef CONFIG_GETAUXVAL +# include +#else +# include "elf.h" +#endif +#include + +unsigned cpuinfo; + +/* Called both as constructor and (possibly) via other constructors. */ +unsigned __attribute__((constructor)) cpuinfo_init(void) +{ + unsigned info = cpuinfo; + unsigned long hwcap; + + if (info) { + return info; + } + + hwcap = qemu_getauxval(AT_HWCAP); + + info = CPUINFO_ALWAYS; + info |= (hwcap & HWCAP_LOONGARCH_LSX ? CPUINFO_LSX : 0); + + cpuinfo = info; + return info; +} diff --git a/util/meson.build b/util/meson.build index c4827fd70a..b136f02aa0 100644 --- a/util/meson.build +++ b/util/meson.build @@ -112,6 +112,8 @@ if cpu == 'aarch64' util_ss.add(files('cpuinfo-aarch64.c')) elif cpu in ['x86', 'x86_64'] util_ss.add(files('cpuinfo-i386.c')) +elif cpu == 'loongarch64' + util_ss.add(files('cpuinfo-loongarch.c')) elif cpu in ['ppc', 'ppc64'] util_ss.add(files('cpuinfo-ppc.c')) endif From patchwork Sat Sep 16 22:01:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13388530 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 29FC5C46CA1 for ; Sat, 16 Sep 2023 22:02:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qhdMX-0006Ie-Jf; Sat, 16 Sep 2023 18:02:01 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qhdMV-0006HV-Jk for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:01:59 -0400 Received: from mail-oi1-x22c.google.com ([2607:f8b0:4864:20::22c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qhdMT-00047V-KY for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:01:59 -0400 Received: by mail-oi1-x22c.google.com with SMTP id 5614622812f47-3ab2436b57dso2150977b6e.0 for ; Sat, 16 Sep 2023 15:01:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1694901716; x=1695506516; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lqYg31kX0a+sV4HnqFcr75vBUreLp6z9YJ7du9LtFxI=; b=xhkSdvkjBYC0W+pc+h/buWRfuy6J7/F20U4invS1qvDhh4BDQPP5izbPmTQhOBXQB4 Kx25KHFAxKO+6TB2Wktm0Ad7vlYHGcZnYD9Qjkg73bFXPduHYp6BHCsoR+90nVlxFSHD HYtvHnzIsCvKGGOANGiCVWsnwmUiHedSfDEitxX5XI65KEACbCTZmBDLYq+LXSceOxnx BUItna5WKQ53t/qADtvT83KlYH/4XBOpi21MRSLGXzXr0Nw4YV5uZu+zHIXAk/kARs/I JASShDdkayHjPZJKWojBRFUo0F6hjSf2f4a8d+vkh79ey8BD7clQSxyPjOYVVIDy+J6u pZkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694901716; x=1695506516; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lqYg31kX0a+sV4HnqFcr75vBUreLp6z9YJ7du9LtFxI=; b=VxiwZhO7u13AgC0ZgPS6g9pBxaotDXOXHAD1n3d2IJ0NBLyD8zlUZ/IeZwJgQS/Yxj LRLEEoqyYDoUldx2gP1IIZSmF23+WkGhdYKSeT/O191r6ivrH2ZPqel6VNXyem+Dx+aB K5Fe9t7bAdhMWu1k26+zWYG5GskxlmlcKLQLQrHnR6EiFE43t39JvrfWRbyy/Iv8eRTP KNI4fkCVN3DRHaxF2V1WCFfHdSGx2Jqw26h/h0ims9XoO0LLHYQCWgvfbDsrCdiW+cYD UJXEz4GpnliosDsLdFk56+x8iEec0+L82hKOYBHGaaDvPUuuRM6kTCICUWZ8lGRdbfJz 6ffw== X-Gm-Message-State: AOJu0Yze51sJtcPqpHq07ADVZuSqQd6emow+x4ScRlIj5pVjpDbqdSNn 5ehhUdCCIJqldQ3YM1SR4dPJaTcj4YBco2UuDjM= X-Google-Smtp-Source: AGHT+IHUkTc3RV3jVaJnzPSvfORDSat9vVFfeaS9Z2ctcJ2wF5VsuPTYibnvAA/7WuMSoLmUivwrrA== X-Received: by 2002:aca:1909:0:b0:3a7:7bd3:7ab7 with SMTP id l9-20020aca1909000000b003a77bd37ab7mr6194206oii.51.1694901716426; Sat, 16 Sep 2023 15:01:56 -0700 (PDT) Received: from stoup.. ([71.212.131.115]) by smtp.gmail.com with ESMTPSA id q3-20020a170902788300b001b531e8a000sm5707763pll.157.2023.09.16.15.01.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Sep 2023 15:01:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, c@jia.je, gaosong@loongson.cn, yangxiaojuan@loongson.cn Subject: [PATCH 4/7] tcg/loongarch64: Use cpuinfo.h Date: Sat, 16 Sep 2023 15:01:48 -0700 Message-Id: <20230916220151.526140-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230916220151.526140-1-richard.henderson@linaro.org> References: <20230916220151.526140-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::22c; envelope-from=richard.henderson@linaro.org; helo=mail-oi1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: Richard Henderson Reviewed-by: Jiajie Chen --- tcg/loongarch64/tcg-target.h | 8 ++++---- tcg/loongarch64/tcg-target.c.inc | 8 +------- 2 files changed, 5 insertions(+), 11 deletions(-) diff --git a/tcg/loongarch64/tcg-target.h b/tcg/loongarch64/tcg-target.h index 03017672f6..1bea15b02e 100644 --- a/tcg/loongarch64/tcg-target.h +++ b/tcg/loongarch64/tcg-target.h @@ -29,6 +29,8 @@ #ifndef LOONGARCH_TCG_TARGET_H #define LOONGARCH_TCG_TARGET_H +#include "host/cpuinfo.h" + #define TCG_TARGET_INSN_UNIT_SIZE 4 #define TCG_TARGET_NB_REGS 64 @@ -85,8 +87,6 @@ typedef enum { TCG_VEC_TMP0 = TCG_REG_V23, } TCGReg; -extern bool use_lsx_instructions; - /* used for function call generation */ #define TCG_REG_CALL_STACK TCG_REG_SP #define TCG_TARGET_STACK_ALIGN 16 @@ -171,10 +171,10 @@ extern bool use_lsx_instructions; #define TCG_TARGET_HAS_muluh_i64 1 #define TCG_TARGET_HAS_mulsh_i64 1 -#define TCG_TARGET_HAS_qemu_ldst_i128 use_lsx_instructions +#define TCG_TARGET_HAS_qemu_ldst_i128 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v64 0 -#define TCG_TARGET_HAS_v128 use_lsx_instructions +#define TCG_TARGET_HAS_v128 (cpuinfo & CPUINFO_LSX) #define TCG_TARGET_HAS_v256 0 #define TCG_TARGET_HAS_not_vec 1 diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc index 40074c46b8..52f2c26ce1 100644 --- a/tcg/loongarch64/tcg-target.c.inc +++ b/tcg/loongarch64/tcg-target.c.inc @@ -32,8 +32,6 @@ #include "../tcg-ldst.c.inc" #include -bool use_lsx_instructions; - #ifdef CONFIG_DEBUG_TCG static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = { "zero", @@ -2316,10 +2314,6 @@ static void tcg_target_init(TCGContext *s) exit(EXIT_FAILURE); } - if (hwcap & HWCAP_LOONGARCH_LSX) { - use_lsx_instructions = 1; - } - tcg_target_available_regs[TCG_TYPE_I32] = ALL_GENERAL_REGS; tcg_target_available_regs[TCG_TYPE_I64] = ALL_GENERAL_REGS; @@ -2335,7 +2329,7 @@ static void tcg_target_init(TCGContext *s) tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S8); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_S9); - if (use_lsx_instructions) { + if (cpuinfo & CPUINFO_LSX) { tcg_target_available_regs[TCG_TYPE_V128] = ALL_VECTOR_REGS; tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V24); tcg_regset_reset_reg(tcg_target_call_clobber_regs, TCG_REG_V25); From patchwork Sat Sep 16 22:01:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13388527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CB345C2BA1B for ; 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([71.212.131.115]) by smtp.gmail.com with ESMTPSA id q3-20020a170902788300b001b531e8a000sm5707763pll.157.2023.09.16.15.01.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Sep 2023 15:01:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, c@jia.je, gaosong@loongson.cn, yangxiaojuan@loongson.cn Subject: [PATCH 5/7] host/include/loongarch64: Add atomic16 load and store Date: Sat, 16 Sep 2023 15:01:49 -0700 Message-Id: <20230916220151.526140-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230916220151.526140-1-richard.henderson@linaro.org> References: <20230916220151.526140-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::336; envelope-from=richard.henderson@linaro.org; helo=mail-ot1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org While loongarch64 does not have a 128-bit cmpxchg, it does have 128-bit atomic load and store via the vector unit. Signed-off-by: Richard Henderson --- .../include/loongarch64/host/atomic128-ldst.h | 52 +++++++++++++++++++ .../loongarch64/host/load-extract-al16-al8.h | 39 ++++++++++++++ .../loongarch64/host/store-insert-al16.h | 12 +++++ 3 files changed, 103 insertions(+) create mode 100644 host/include/loongarch64/host/atomic128-ldst.h create mode 100644 host/include/loongarch64/host/load-extract-al16-al8.h create mode 100644 host/include/loongarch64/host/store-insert-al16.h diff --git a/host/include/loongarch64/host/atomic128-ldst.h b/host/include/loongarch64/host/atomic128-ldst.h new file mode 100644 index 0000000000..9a4a8f8b9e --- /dev/null +++ b/host/include/loongarch64/host/atomic128-ldst.h @@ -0,0 +1,52 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Load/store for 128-bit atomic operations, LoongArch version. + * + * See docs/devel/atomics.rst for discussion about the guarantees each + * atomic primitive is meant to provide. + */ + +#ifndef LOONGARCH_ATOMIC128_LDST_H +#define LOONGARCH_ATOMIC128_LDST_H + +#include "host/cpuinfo.h" +#include "tcg/debug-assert.h" + +#define HAVE_ATOMIC128_RO likely(cpuinfo & CPUINFO_LSX) +#define HAVE_ATOMIC128_RW HAVE_ATOMIC128_RO + +/* + * As of gcc 13 and clang 16, there is no compiler support for LSX at all. + * Use inline assembly throughout. + */ + +static inline Int128 atomic16_read_ro(const Int128 *ptr) +{ + uint64_t l, h; + + tcg_debug_assert(HAVE_ATOMIC128_RO); + asm("vld $vr0, %2, 0\n\t" + "vpickve2gr.d %0, $vr0, 0\n\t" + "vpickve2gr.d %1, $vr0, 1" + : "=r"(l), "=r"(h) : "r"(ptr), "m"(*ptr) : "f0"); + + return int128_make128(l, h); +} + +static inline Int128 atomic16_read_rw(Int128 *ptr) +{ + return atomic16_read_ro(ptr); +} + +static inline void atomic16_set(Int128 *ptr, Int128 val) +{ + uint64_t l = int128_getlo(val), h = int128_gethi(val); + + tcg_debug_assert(HAVE_ATOMIC128_RW); + asm("vinsgr2vr.d $vr0, %1, 0\n\t" + "vinsgr2vr.d $vr0, %2, 1\n\t" + "vst $vr0, %3, 0" + : "=m"(*ptr) : "r"(l), "r"(h), "r"(ptr) : "f0"); +} + +#endif /* LOONGARCH_ATOMIC128_LDST_H */ diff --git a/host/include/loongarch64/host/load-extract-al16-al8.h b/host/include/loongarch64/host/load-extract-al16-al8.h new file mode 100644 index 0000000000..d1fb59d8af --- /dev/null +++ b/host/include/loongarch64/host/load-extract-al16-al8.h @@ -0,0 +1,39 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Atomic extract 64 from 128-bit, LoongArch version. + * + * Copyright (C) 2023 Linaro, Ltd. + */ + +#ifndef LOONGARCH_LOAD_EXTRACT_AL16_AL8_H +#define LOONGARCH_LOAD_EXTRACT_AL16_AL8_H + +#include "host/cpuinfo.h" +#include "tcg/debug-assert.h" + +/** + * load_atom_extract_al16_or_al8: + * @pv: host address + * @s: object size in bytes, @s <= 8. + * + * Load @s bytes from @pv, when pv % s != 0. If [p, p+s-1] does not + * cross an 16-byte boundary then the access must be 16-byte atomic, + * otherwise the access must be 8-byte atomic. + */ +static inline uint64_t load_atom_extract_al16_or_al8(void *pv, int s) +{ + uintptr_t pi = (uintptr_t)pv; + Int128 *ptr_align = (Int128 *)(pi & ~7); + int shr = (pi & 7) * 8; + uint64_t l, h; + + tcg_debug_assert(HAVE_ATOMIC128_RO); + asm("vld $vr0, %2, 0\n\t" + "vpickve2gr.d %0, $vr0, 0\n\t" + "vpickve2gr.d %1, $vr0, 1" + : "=r"(l), "=r"(h) : "r"(ptr_align), "m"(*ptr_align) : "f0"); + + return (l >> shr) | (h << (-shr & 63)); +} + +#endif /* LOONGARCH_LOAD_EXTRACT_AL16_AL8_H */ diff --git a/host/include/loongarch64/host/store-insert-al16.h b/host/include/loongarch64/host/store-insert-al16.h new file mode 100644 index 0000000000..919fd8d744 --- /dev/null +++ b/host/include/loongarch64/host/store-insert-al16.h @@ -0,0 +1,12 @@ +/* + * SPDX-License-Identifier: GPL-2.0-or-later + * Atomic store insert into 128-bit, LoongArch version. + */ + +#ifndef LOONGARCH_STORE_INSERT_AL16_H +#define LOONGARCH_STORE_INSERT_AL16_H + +void store_atom_insert_al16(Int128 *ps, Int128 val, Int128 msk) + QEMU_ERROR("unsupported atomic"); + +#endif /* LOONGARCH_STORE_INSERT_AL16_H */ From patchwork Sat Sep 16 22:01:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13388526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D977AC46CA1 for ; Sat, 16 Sep 2023 22:02:47 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qhdMZ-0006JN-KM; Sat, 16 Sep 2023 18:02:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qhdMW-0006IJ-T7 for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:02:00 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qhdMV-00047x-Dy for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:02:00 -0400 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-1bf7a6509deso25186255ad.3 for ; Sat, 16 Sep 2023 15:01:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1694901718; x=1695506518; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Jdzasvr+k+5oAv9xFjyZ26RftQbu3lpg5mgMZXI/UhQ=; b=UGkr14dwICRJwTKlGiWX8AETDqAIB3Asuw2k479+woMfYKTxPdD4udJqPPET/Y8duB C4seXoEgP34tkejlM6AhUGIzJy+yA73JHeY/Mw29+8ME5jbVzCKeyyq4ptmorOVikQNE Mt+eVHNYfSKR5zWxVjCnaQ9QnwWZN+km86lu7swOy8I0LFrx7DafU08NQ7tqbYCP0XuJ uDjlKkzHwmRnVerJCCeX12HRVfVYLk3CNQUPhcJrhfQddUgBx9td7HNUrStCat8GDFQw aPIN51UieEBJCTZWZyTIAJkgJhbCKC00YSg9O+CHWTOVdiMbZDJKu3SwQV7WCgehyatX 0C3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694901718; x=1695506518; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Jdzasvr+k+5oAv9xFjyZ26RftQbu3lpg5mgMZXI/UhQ=; b=KacdHQdMLLjSZPoDZSnNF+/73LG/mWUCobaaulV5OFXpd7EGQgiBD76l0GWo0z1QDq xcOq5Voy6ABljsbhYSAfppJhz0MNbK7gMlOANEUMQjentxbxLmAbgO5d4iCXcJyWxwvH 4qPjfjyq1UzoKLHZn+VPGH6VfIG2UvvSDxbcusC+b2653pD9iW8sFwrWEsLca0Ah/fyY vO2mLewDuZ4G78ZTWwlrNWJT+awreEDfMSMuT6YK8ulKNpfVgsOICYZNYZiXoycYKtjM 6vrued3ex+TlkkAovjOjq6nSgqsk/meF9E8qwGZcNPsNk+MnKQZyI8NIWTS8zX51nERX 6IfA== X-Gm-Message-State: AOJu0YzdH3YqA8JlES+4Wmkv+NucVx6JSdl2/qsHIV/pZ7SXlULHK4hd g6eyBStUK8tuPKGCWmFBoECsIfEIYQcHgPOXHkY= X-Google-Smtp-Source: AGHT+IGM+3t1KNf1TOeiX5qg2VNDM6ulLlPt9B6A18u8CNK25uubUtms4KGaKfLL9YLMDSmylwMPAg== X-Received: by 2002:a17:90a:6482:b0:26b:4ce1:9705 with SMTP id h2-20020a17090a648200b0026b4ce19705mr4412709pjj.38.1694901718183; Sat, 16 Sep 2023 15:01:58 -0700 (PDT) Received: from stoup.. ([71.212.131.115]) by smtp.gmail.com with ESMTPSA id q3-20020a170902788300b001b531e8a000sm5707763pll.157.2023.09.16.15.01.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Sep 2023 15:01:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, c@jia.je, gaosong@loongson.cn, yangxiaojuan@loongson.cn Subject: [PATCH 6/7] accel/tcg: Remove redundant case in store_atom_16 Date: Sat, 16 Sep 2023 15:01:50 -0700 Message-Id: <20230916220151.526140-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230916220151.526140-1-richard.henderson@linaro.org> References: <20230916220151.526140-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We handled the HAVE_ATOMIC128_RW case with atomic16_set at the top of the function; the only thing left for a host without that support is to fall through to cpu_loop_exit_atomic. Signed-off-by: Richard Henderson --- accel/tcg/ldst_atomicity.c.inc | 4 ---- 1 file changed, 4 deletions(-) diff --git a/accel/tcg/ldst_atomicity.c.inc b/accel/tcg/ldst_atomicity.c.inc index 1b793e6935..23d43f62a2 100644 --- a/accel/tcg/ldst_atomicity.c.inc +++ b/accel/tcg/ldst_atomicity.c.inc @@ -1103,10 +1103,6 @@ static void store_atom_16(CPUArchState *env, uintptr_t ra, } break; case MO_128: - if (HAVE_ATOMIC128_RW) { - atomic16_set(pv, val); - return; - } break; default: g_assert_not_reached(); From patchwork Sat Sep 16 22:01:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 13388531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F6DAC2BA1B for ; Sat, 16 Sep 2023 22:03:05 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qhdMc-0006Jp-7v; Sat, 16 Sep 2023 18:02:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qhdMX-0006Ig-Oa for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:02:01 -0400 Received: from mail-pl1-x62c.google.com ([2607:f8b0:4864:20::62c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qhdMW-000489-1a for qemu-devel@nongnu.org; Sat, 16 Sep 2023 18:02:01 -0400 Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-1c3cbfa40d6so30138165ad.1 for ; Sat, 16 Sep 2023 15:01:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1694901719; x=1695506519; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0eViiNfbcR2Apwmf5vG4n86TRv+yRmlz4znqJM2rMWs=; b=YZR2A/ugYMTD2f5V6X8pyCLDfiM2ZdjxdVCy9p5jAMxLj1gg0jd7ZYHF7hSECx1K9g vd5qcuVScxSE3NKBDvf/QtghsNkbgZbUZz5llUAU+UDd7Gmf62QDkFj/B+cQS/Dypcuh 65ij/cOkJHrhU+58MApRlNgU+BoQVT8s8NqjoyVPjH+lyfVnK5rfxttkwkEBFDPxX4cX Hhv6mSeBy1HP5qP5YworixXF/CTz46/HR8sEhpgqDvITCey6++vstHZx7oyE+GcsGcQy N4s4yM0OkabmHTg4u3FL4oOtkK9WEc9LJa8vyXBmtSBrIBqHOBLFB+XC3/NW9nUdA9dw FVfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1694901719; x=1695506519; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0eViiNfbcR2Apwmf5vG4n86TRv+yRmlz4znqJM2rMWs=; b=XyF8O7dzbS07gy741o8/LNiojUP8AAApxDyZFQvjlIiPaaizBaiXUeYspixdXryvM8 CMlElekOHZYWsRHJBQk5DfmSke+442ygmpEQ+fPb4K8b8ucxFcVDkQGAhEbxx5b3Tept FV5LoH4FZsYqDKcJg40UN7ir1aXIruWNczgLZ9lKvw+vx+lImtC7ZYLIULXYrroG/fdK OLHRwliMGLXkEKw1Yho5N3JC9OcCiqTKbF28FYbL/AW69s4GT8OxGjg8f+zhreSI36d2 lRO+bQptyJ+doJ1BKWZzdmSPugY7iaSoUGS2vIX5QQXVf44IXe3oT6PCMJZar3qvyNH/ FDEA== X-Gm-Message-State: AOJu0YyS4QrAKYXv+LHgx4fxCbFFzaqMuWI83CWLAzK8kpIN+JqKdh83 hH/wMs/bcPsuqdhxZI0FIs4fGv1Y1CHnEQYxKQE= X-Google-Smtp-Source: AGHT+IEYQ3RMXr7Ry5/U/xA9cG0LlBfw8K6/KKMKYKRgIYYK3YGKK9g84sCm/BXy0UP78Me8i1gDgA== X-Received: by 2002:a17:902:c949:b0:1c0:b17a:7576 with SMTP id i9-20020a170902c94900b001c0b17a7576mr7407282pla.42.1694901718917; Sat, 16 Sep 2023 15:01:58 -0700 (PDT) Received: from stoup.. ([71.212.131.115]) by smtp.gmail.com with ESMTPSA id q3-20020a170902788300b001b531e8a000sm5707763pll.157.2023.09.16.15.01.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Sep 2023 15:01:58 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: git@xen0n.name, c@jia.je, gaosong@loongson.cn, yangxiaojuan@loongson.cn Subject: [PATCH 7/7] accel/tcg: Fix condition for store_atom_insert_al16 Date: Sat, 16 Sep 2023 15:01:51 -0700 Message-Id: <20230916220151.526140-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230916220151.526140-1-richard.henderson@linaro.org> References: <20230916220151.526140-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::62c; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Store bytes under a mask is fundamentally a cmpxchg, not a straight store. Use HAVE_CMPXCHG128 instead of HAVE_ATOMIC128_RW. Signed-off-by: Richard Henderson --- accel/tcg/cputlb.c | 2 +- accel/tcg/ldst_atomicity.c.inc | 10 +++++----- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 3270f65c20..3b76626666 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -2849,7 +2849,7 @@ static uint64_t do_st16_leN(CPUArchState *env, MMULookupPageData *p, case MO_ATOM_WITHIN16_PAIR: /* Since size > 8, this is the half that must be atomic. */ - if (!HAVE_ATOMIC128_RW) { + if (!HAVE_CMPXCHG128) { cpu_loop_exit_atomic(env_cpu(env), ra); } return store_whole_le16(p->haddr, p->size, val_le); diff --git a/accel/tcg/ldst_atomicity.c.inc b/accel/tcg/ldst_atomicity.c.inc index 23d43f62a2..5c6e116cfe 100644 --- a/accel/tcg/ldst_atomicity.c.inc +++ b/accel/tcg/ldst_atomicity.c.inc @@ -825,7 +825,7 @@ static uint64_t store_whole_le16(void *pv, int size, Int128 val_le) int sh = o * 8; Int128 m, v; - qemu_build_assert(HAVE_ATOMIC128_RW); + qemu_build_assert(HAVE_CMPXCHG128); /* Like MAKE_64BIT_MASK(0, sz), but larger. */ if (sz <= 64) { @@ -887,7 +887,7 @@ static void store_atom_2(CPUArchState *env, uintptr_t ra, return; } } else if ((pi & 15) == 7) { - if (HAVE_ATOMIC128_RW) { + if (HAVE_CMPXCHG128) { Int128 v = int128_lshift(int128_make64(val), 56); Int128 m = int128_lshift(int128_make64(0xffff), 56); store_atom_insert_al16(pv - 7, v, m); @@ -956,7 +956,7 @@ static void store_atom_4(CPUArchState *env, uintptr_t ra, return; } } else { - if (HAVE_ATOMIC128_RW) { + if (HAVE_CMPXCHG128) { store_whole_le16(pv, 4, int128_make64(cpu_to_le32(val))); return; } @@ -1021,7 +1021,7 @@ static void store_atom_8(CPUArchState *env, uintptr_t ra, } break; case MO_64: - if (HAVE_ATOMIC128_RW) { + if (HAVE_CMPXCHG128) { store_whole_le16(pv, 8, int128_make64(cpu_to_le64(val))); return; } @@ -1076,7 +1076,7 @@ static void store_atom_16(CPUArchState *env, uintptr_t ra, } break; case -MO_64: - if (HAVE_ATOMIC128_RW) { + if (HAVE_CMPXCHG128) { uint64_t val_le; int s2 = pi & 15; int s1 = 16 - s2;