From patchwork Mon Sep 18 12:58:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7247BCD3442 for ; Tue, 19 Sep 2023 07:00:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B304410E352; Tue, 19 Sep 2023 06:59:55 +0000 (UTC) Received: from out-212.mta1.migadu.com (out-212.mta1.migadu.com [95.215.58.212]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F5D110E27E for ; Mon, 18 Sep 2023 12:59:25 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695041963; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=x5tMUp6nQxBrhWd3iRz7QzLsI7eW1vyNH67Y+6fzlTo=; b=gYe7jgbL7Cr9dz8DbT5/okuh7q3pms2Eo3BSzIZ2Rey1Ba7F9bbhvWWaSTsON3Z02V0e4D nIyn4q2GLesP4TXOEGCVGnMDGoCRlSs/9hNJvC9OIMTCcwoUxw9cyf8A7/ClzJ4mRmJvdU Jt0JKxFBn5i7x6JDVHJaVIiIOvBEfe5XlGhl94jtQ0RdRErjrK4tZZtSY70txGS/m+Lh1V +ZpQyPiozbkmethBmdE57SnRuB6VKNiDd2A3PbS8hPmSxVA6FLZwfWIWhf6ZQNDRwo98H6 Fq3Jie5Lj50HuP9SZn5n+gusozKeaVcsPPnBHgx/kBlXCcjqvCSqO+eHMu5AKA== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 1/9] drm/panel: nv3052c: Document known register names Date: Mon, 18 Sep 2023 22:58:45 +1000 Message-ID: <20230918125853.2249187-2-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Many of these registers have a known name in the public datasheet. Document them as comments for reference. Signed-off-by: John Watts Reviewed-by: Jessica Zhang --- .../gpu/drm/panel/panel-newvision-nv3052c.c | 261 +++++++++--------- 1 file changed, 132 insertions(+), 129 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c index 71e57de6d8b2..589431523ce7 100644 --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -42,9 +42,9 @@ struct nv3052c_reg { }; static const struct nv3052c_reg nv3052c_panel_regs[] = { - { 0xff, 0x30 }, - { 0xff, 0x52 }, - { 0xff, 0x01 }, + // EXTC Command set enable, select page 1 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x01 }, + // Mostly unknown registers { 0xe3, 0x00 }, { 0x40, 0x00 }, { 0x03, 0x40 }, @@ -62,15 +62,15 @@ static const struct nv3052c_reg nv3052c_panel_regs[] = { { 0x25, 0x06 }, { 0x26, 0x14 }, { 0x27, 0x14 }, - { 0x38, 0xcc }, - { 0x39, 0xd7 }, - { 0x3a, 0x4a }, + { 0x38, 0xcc }, // VCOM_ADJ1 + { 0x39, 0xd7 }, // VCOM_ADJ2 + { 0x3a, 0x4a }, // VCOM_ADJ3 { 0x28, 0x40 }, { 0x29, 0x01 }, { 0x2a, 0xdf }, { 0x49, 0x3c }, - { 0x91, 0x77 }, - { 0x92, 0x77 }, + { 0x91, 0x77 }, // EXTPW_CTRL2 + { 0x92, 0x77 }, // EXTPW_CTRL3 { 0xa0, 0x55 }, { 0xa1, 0x50 }, { 0xa4, 0x9c }, @@ -94,123 +94,126 @@ static const struct nv3052c_reg nv3052c_panel_regs[] = { { 0xb8, 0x26 }, { 0xf0, 0x00 }, { 0xf6, 0xc0 }, - { 0xff, 0x30 }, - { 0xff, 0x52 }, - { 0xff, 0x02 }, - { 0xb0, 0x0b }, - { 0xb1, 0x16 }, - { 0xb2, 0x17 }, - { 0xb3, 0x2c }, - { 0xb4, 0x32 }, - { 0xb5, 0x3b }, - { 0xb6, 0x29 }, - { 0xb7, 0x40 }, - { 0xb8, 0x0d }, - { 0xb9, 0x05 }, - { 0xba, 0x12 }, - { 0xbb, 0x10 }, - { 0xbc, 0x12 }, - { 0xbd, 0x15 }, - { 0xbe, 0x19 }, - { 0xbf, 0x0e }, - { 0xc0, 0x16 }, - { 0xc1, 0x0a }, - { 0xd0, 0x0c }, - { 0xd1, 0x17 }, - { 0xd2, 0x14 }, - { 0xd3, 0x2e }, - { 0xd4, 0x32 }, - { 0xd5, 0x3c }, - { 0xd6, 0x22 }, - { 0xd7, 0x3d }, - { 0xd8, 0x0d }, - { 0xd9, 0x07 }, - { 0xda, 0x13 }, - { 0xdb, 0x13 }, - { 0xdc, 0x11 }, - { 0xdd, 0x15 }, - { 0xde, 0x19 }, - { 0xdf, 0x10 }, - { 0xe0, 0x17 }, - { 0xe1, 0x0a }, - { 0xff, 0x30 }, - { 0xff, 0x52 }, - { 0xff, 0x03 }, - { 0x00, 0x2a }, - { 0x01, 0x2a }, - { 0x02, 0x2a }, - { 0x03, 0x2a }, - { 0x04, 0x61 }, - { 0x05, 0x80 }, - { 0x06, 0xc7 }, - { 0x07, 0x01 }, - { 0x08, 0x03 }, - { 0x09, 0x04 }, - { 0x70, 0x22 }, - { 0x71, 0x80 }, - { 0x30, 0x2a }, - { 0x31, 0x2a }, - { 0x32, 0x2a }, - { 0x33, 0x2a }, - { 0x34, 0x61 }, - { 0x35, 0xc5 }, - { 0x36, 0x80 }, - { 0x37, 0x23 }, - { 0x40, 0x03 }, - { 0x41, 0x04 }, - { 0x42, 0x05 }, - { 0x43, 0x06 }, - { 0x44, 0x11 }, - { 0x45, 0xe8 }, - { 0x46, 0xe9 }, - { 0x47, 0x11 }, - { 0x48, 0xea }, - { 0x49, 0xeb }, - { 0x50, 0x07 }, - { 0x51, 0x08 }, - { 0x52, 0x09 }, - { 0x53, 0x0a }, - { 0x54, 0x11 }, - { 0x55, 0xec }, - { 0x56, 0xed }, - { 0x57, 0x11 }, - { 0x58, 0xef }, - { 0x59, 0xf0 }, - { 0xb1, 0x01 }, - { 0xb4, 0x15 }, - { 0xb5, 0x16 }, - { 0xb6, 0x09 }, - { 0xb7, 0x0f }, - { 0xb8, 0x0d }, - { 0xb9, 0x0b }, - { 0xba, 0x00 }, - { 0xc7, 0x02 }, - { 0xca, 0x17 }, - { 0xcb, 0x18 }, - { 0xcc, 0x0a }, - { 0xcd, 0x10 }, - { 0xce, 0x0e }, - { 0xcf, 0x0c }, - { 0xd0, 0x00 }, - { 0x81, 0x00 }, - { 0x84, 0x15 }, - { 0x85, 0x16 }, - { 0x86, 0x10 }, - { 0x87, 0x0a }, - { 0x88, 0x0c }, - { 0x89, 0x0e }, - { 0x8a, 0x02 }, - { 0x97, 0x00 }, - { 0x9a, 0x17 }, - { 0x9b, 0x18 }, - { 0x9c, 0x0f }, - { 0x9d, 0x09 }, - { 0x9e, 0x0b }, - { 0x9f, 0x0d }, - { 0xa0, 0x01 }, - { 0xff, 0x30 }, - { 0xff, 0x52 }, - { 0xff, 0x02 }, + // EXTC Command set enable, select page 2 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x02 }, + // Set gray scale voltage to adjust gamma + { 0xb0, 0x0b }, // PGAMVR0 + { 0xb1, 0x16 }, // PGAMVR1 + { 0xb2, 0x17 }, // PGAMVR2 + { 0xb3, 0x2c }, // PGAMVR3 + { 0xb4, 0x32 }, // PGAMVR4 + { 0xb5, 0x3b }, // PGAMVR5 + { 0xb6, 0x29 }, // PGAMPR0 + { 0xb7, 0x40 }, // PGAMPR1 + { 0xb8, 0x0d }, // PGAMPK0 + { 0xb9, 0x05 }, // PGAMPK1 + { 0xba, 0x12 }, // PGAMPK2 + { 0xbb, 0x10 }, // PGAMPK3 + { 0xbc, 0x12 }, // PGAMPK4 + { 0xbd, 0x15 }, // PGAMPK5 + { 0xbe, 0x19 }, // PGAMPK6 + { 0xbf, 0x0e }, // PGAMPK7 + { 0xc0, 0x16 }, // PGAMPK8 + { 0xc1, 0x0a }, // PGAMPK9 + // Set gray scale voltage to adjust gamma + { 0xd0, 0x0c }, // NGAMVR0 + { 0xd1, 0x17 }, // NGAMVR0 + { 0xd2, 0x14 }, // NGAMVR1 + { 0xd3, 0x2e }, // NGAMVR2 + { 0xd4, 0x32 }, // NGAMVR3 + { 0xd5, 0x3c }, // NGAMVR4 + { 0xd6, 0x22 }, // NGAMPR0 + { 0xd7, 0x3d }, // NGAMPR1 + { 0xd8, 0x0d }, // NGAMPK0 + { 0xd9, 0x07 }, // NGAMPK1 + { 0xda, 0x13 }, // NGAMPK2 + { 0xdb, 0x13 }, // NGAMPK3 + { 0xdc, 0x11 }, // NGAMPK4 + { 0xdd, 0x15 }, // NGAMPK5 + { 0xde, 0x19 }, // NGAMPK6 + { 0xdf, 0x10 }, // NGAMPK7 + { 0xe0, 0x17 }, // NGAMPK8 + { 0xe1, 0x0a }, // NGAMPK9 + // EXTC Command set enable, select page 3 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x03 }, + // Set various timing settings + { 0x00, 0x2a }, // GIP_VST_1 + { 0x01, 0x2a }, // GIP_VST_2 + { 0x02, 0x2a }, // GIP_VST_3 + { 0x03, 0x2a }, // GIP_VST_4 + { 0x04, 0x61 }, // GIP_VST_5 + { 0x05, 0x80 }, // GIP_VST_6 + { 0x06, 0xc7 }, // GIP_VST_7 + { 0x07, 0x01 }, // GIP_VST_8 + { 0x08, 0x03 }, // GIP_VST_9 + { 0x09, 0x04 }, // GIP_VST_10 + { 0x70, 0x22 }, // GIP_ECLK1 + { 0x71, 0x80 }, // GIP_ECLK2 + { 0x30, 0x2a }, // GIP_CLK_1 + { 0x31, 0x2a }, // GIP_CLK_2 + { 0x32, 0x2a }, // GIP_CLK_3 + { 0x33, 0x2a }, // GIP_CLK_4 + { 0x34, 0x61 }, // GIP_CLK_5 + { 0x35, 0xc5 }, // GIP_CLK_6 + { 0x36, 0x80 }, // GIP_CLK_7 + { 0x37, 0x23 }, // GIP_CLK_8 + { 0x40, 0x03 }, // GIP_CLKA_1 + { 0x41, 0x04 }, // GIP_CLKA_2 + { 0x42, 0x05 }, // GIP_CLKA_3 + { 0x43, 0x06 }, // GIP_CLKA_4 + { 0x44, 0x11 }, // GIP_CLKA_5 + { 0x45, 0xe8 }, // GIP_CLKA_6 + { 0x46, 0xe9 }, // GIP_CLKA_7 + { 0x47, 0x11 }, // GIP_CLKA_8 + { 0x48, 0xea }, // GIP_CLKA_9 + { 0x49, 0xeb }, // GIP_CLKA_10 + { 0x50, 0x07 }, // GIP_CLKB_1 + { 0x51, 0x08 }, // GIP_CLKB_2 + { 0x52, 0x09 }, // GIP_CLKB_3 + { 0x53, 0x0a }, // GIP_CLKB_4 + { 0x54, 0x11 }, // GIP_CLKB_5 + { 0x55, 0xec }, // GIP_CLKB_6 + { 0x56, 0xed }, // GIP_CLKB_7 + { 0x57, 0x11 }, // GIP_CLKB_8 + { 0x58, 0xef }, // GIP_CLKB_9 + { 0x59, 0xf0 }, // GIP_CLKB_10 + // Map internal GOA signals to GOA output pad + { 0xb1, 0x01 }, // PANELD2U2 + { 0xb4, 0x15 }, // PANELD2U5 + { 0xb5, 0x16 }, // PANELD2U6 + { 0xb6, 0x09 }, // PANELD2U7 + { 0xb7, 0x0f }, // PANELD2U8 + { 0xb8, 0x0d }, // PANELD2U9 + { 0xb9, 0x0b }, // PANELD2U10 + { 0xba, 0x00 }, // PANELD2U11 + { 0xc7, 0x02 }, // PANELD2U24 + { 0xca, 0x17 }, // PANELD2U27 + { 0xcb, 0x18 }, // PANELD2U28 + { 0xcc, 0x0a }, // PANELD2U29 + { 0xcd, 0x10 }, // PANELD2U30 + { 0xce, 0x0e }, // PANELD2U31 + { 0xcf, 0x0c }, // PANELD2U32 + { 0xd0, 0x00 }, // PANELD2U33 + // Map internal GOA signals to GOA output pad + { 0x81, 0x00 }, // PANELU2D2 + { 0x84, 0x15 }, // PANELU2D5 + { 0x85, 0x16 }, // PANELU2D6 + { 0x86, 0x10 }, // PANELU2D7 + { 0x87, 0x0a }, // PANELU2D8 + { 0x88, 0x0c }, // PANELU2D9 + { 0x89, 0x0e }, // PANELU2D10 + { 0x8a, 0x02 }, // PANELU2D11 + { 0x97, 0x00 }, // PANELU2D24 + { 0x9a, 0x17 }, // PANELU2D27 + { 0x9b, 0x18 }, // PANELU2D28 + { 0x9c, 0x0f }, // PANELU2D29 + { 0x9d, 0x09 }, // PANELU2D30 + { 0x9e, 0x0b }, // PANELU2D31 + { 0x9f, 0x0d }, // PANELU2D32 + { 0xa0, 0x01 }, // PANELU2D33 + // EXTC Command set enable, select page 2 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x02 }, + // Unknown registers { 0x01, 0x01 }, { 0x02, 0xda }, { 0x03, 0xba }, @@ -227,10 +230,10 @@ static const struct nv3052c_reg nv3052c_panel_regs[] = { { 0x0e, 0x48 }, { 0x0f, 0x38 }, { 0x10, 0x2b }, - { 0xff, 0x30 }, - { 0xff, 0x52 }, - { 0xff, 0x00 }, - { 0x36, 0x0a }, + // EXTC Command set enable, select page 0 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x00 }, + // Display Access Control + { 0x36, 0x0a }, // bgr = 1, ss = 1, gs = 0 }; static inline struct nv3052c *to_nv3052c(struct drm_panel *panel) From patchwork Mon Sep 18 12:58:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390889 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2CE90CD3445 for ; Tue, 19 Sep 2023 07:00:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 96E5A10E376; Tue, 19 Sep 2023 07:00:21 +0000 (UTC) Received: from out-223.mta1.migadu.com (out-223.mta1.migadu.com [IPv6:2001:41d0:203:375::df]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDE2710E272 for ; Mon, 18 Sep 2023 12:59:33 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695041971; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=N/ff6X+NOYVbrocTBpgld9JVVmEwtIn+hGTJSAUql5A=; b=xU2gCXcZ99qnp0V/FuJlF/n2AtySlh1HubS9pviOcSE8wWBmHhTjI7q5ZQH4wpC6NWFox/ YBqov8jgDzayqQ3+W92TB9gvkbJ1b/iq5CijPFKTkeDrJl/k1c65EXNBdDio+DLRv0a8B9 6/rG8zAmXU7qnBWrM8IBnF9ZISOxWAkt1LThoJKku5ii/+PY2RzpmlNx4avcOyLjNEPyp5 TnNUKglG+nq3LHA5T5Ostb8Iz+Qy38WriI7rIWAPqiAI5+iW/QpyC6j0QAthk7Vt2HVHNt YxXh62g8QVEIj5QEp9D5+2Z9QTEyr/LcoOqS0dxbkxAZTXUWuhugNTgcwGyeog== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 2/9] drm/panel: nv3052c: Add SPI device IDs Date: Mon, 18 Sep 2023 22:58:46 +1000 Message-ID: <20230918125853.2249187-3-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" SPI drivers needs their own list of compatible device IDs in order for automatic module loading to work. Add those for this driver. Signed-off-by: John Watts Reviewed-by: Jessica Zhang --- drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c index 589431523ce7..90dea21f9856 100644 --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -465,6 +465,12 @@ static const struct nv3052c_panel_info ltk035c5444t_panel_info = { .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, }; +static const struct spi_device_id nv3052c_ids[] = { + { "ltk035c5444t", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(spi, nv3052c_ids); + static const struct of_device_id nv3052c_of_match[] = { { .compatible = "leadtek,ltk035c5444t", .data = <k035c5444t_panel_info }, { /* sentinel */ } @@ -476,6 +482,7 @@ static struct spi_driver nv3052c_driver = { .name = "nv3052c", .of_match_table = nv3052c_of_match, }, + .id_table = nv3052c_ids, .probe = nv3052c_probe, .remove = nv3052c_remove, }; From patchwork Mon Sep 18 12:58:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4272DCD3445 for ; Tue, 19 Sep 2023 07:00:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DACDE10E364; Tue, 19 Sep 2023 06:59:57 +0000 (UTC) Received: from out-225.mta0.migadu.com (out-225.mta0.migadu.com [91.218.175.225]) by gabe.freedesktop.org (Postfix) with ESMTPS id C612610E272 for ; Mon, 18 Sep 2023 12:59:42 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695041980; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QEybRG/z/QiYL8x5ls+wYPU1myIjvupP8IAsRIKh5xg=; b=FEW+MOpwp9cGHz48fZOCAK7zxLfyFA4CUAFrB6PZomcNlEIGsGhUu9YN+yjVZsm6WpQWNR DPyIrvPVPIkHZ81tGtQ/L+knTLJ0LPoF3thlOez1lfZ4zx3z+WQ4PcwvprhmkX53U9r4cG 6vdfCR8dAmEptpSNt3V8vFaaFd+cZ5a1V4F6+kbDS0g902b/8m4+nbiuqCDroZnmo0v5CC tfdFZMV3a9qM49QY0+4lEVVLCdfPdtpB/51bKPdu41g9mUNL1HsxBfMsh+XxcNE4/jKYhv yf4uBAXssBeKi2GcMBz7NmP8jEwSMPLU4ZX6qa8aOI+KkH5YTrkjAZXuPSlAuw== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 3/9] drm/panel: nv3052c: Sleep for 150ms after reset Date: Mon, 18 Sep 2023 22:58:47 +1000 Message-ID: <20230918125853.2249187-4-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The current code waits after resets for 5 to 20 milliseconds. This is appropriate when resetting a sleeping panel, but an awake panel requires at least 120ms of waiting. Sleep for 150ms so the panel always completes it reset properly. Signed-off-by: John Watts --- drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c index 90dea21f9856..2526b123b1f5 100644 --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -258,7 +258,7 @@ static int nv3052c_prepare(struct drm_panel *panel) gpiod_set_value_cansleep(priv->reset_gpio, 1); usleep_range(10, 1000); gpiod_set_value_cansleep(priv->reset_gpio, 0); - usleep_range(5000, 20000); + msleep(150); for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) { err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd, From patchwork Mon Sep 18 12:58:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390885 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F2814CD3447 for ; Tue, 19 Sep 2023 07:00:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B696610E36C; Tue, 19 Sep 2023 06:59:59 +0000 (UTC) Received: from out-229.mta1.migadu.com (out-229.mta1.migadu.com [IPv6:2001:41d0:203:375::e5]) by gabe.freedesktop.org (Postfix) with ESMTPS id CA4F610E271 for ; Mon, 18 Sep 2023 12:59:49 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695041988; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ZJIBmn1MRAFelLIOs/v4ao97mYf3xkRoyjgfFYfZY14=; b=Eis19EUqt8F5IEwvw8k8WICesKIk8mVKQTgQ2JtVlQ/Nd4QR4TvsAVTHDbc7M7b42hC7p0 HS5d2/tBiclp2l0szNn3Okmly9q+c3ItDNH4jvU5omvCbV7IKjoubgcAtTLWHMJs1TA31C +WlvwkLUU08ypgbbDuXItBJsRZrGhswphsJlKkfbY5BoaoDtSPqEqUO9w+6X2mUgCAdoWG rVh6KTD3HCE1JP+1fNIXeyjTQ92DDOp2Sofq66TDpgiEkUdyPlGZBE47KfCFmhLfZb60Zy 9bXFmY14ySAJWn4Rh91RL4BCJtw7WYIKn8egenwedBwEaekOLajEmgrVA7on9w== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 4/9] drm/panel: nv3052c: Wait before entering sleep mode Date: Mon, 18 Sep 2023 22:58:48 +1000 Message-ID: <20230918125853.2249187-5-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The panel needs us to wait 120ms between exiting and entering sleep. Guarantee that by always waiting 150ms before entering sleep mode. Signed-off-by: John Watts --- drivers/gpu/drm/panel/panel-newvision-nv3052c.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c index 2526b123b1f5..307335d0f1fc 100644 --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -289,6 +289,9 @@ static int nv3052c_unprepare(struct drm_panel *panel) struct mipi_dbi *dbi = &priv->dbi; int err; + /* Wait 150ms in case we just exited sleep mode */ + msleep(150); + err = mipi_dbi_command(dbi, MIPI_DCS_ENTER_SLEEP_MODE); if (err) dev_err(priv->dev, "Unable to enter sleep mode: %d\n", err); From patchwork Mon Sep 18 12:58:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390888 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B67F6CD3442 for ; Tue, 19 Sep 2023 07:00:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 05AB810E371; Tue, 19 Sep 2023 07:00:21 +0000 (UTC) Received: from out-226.mta1.migadu.com (out-226.mta1.migadu.com [95.215.58.226]) by gabe.freedesktop.org (Postfix) with ESMTPS id A7ECA10E276 for ; Mon, 18 Sep 2023 12:59:57 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695041995; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+7Cu5zsIXzEyX7qBnjvxJyKtykP7Ho/OOvNX/Tdar6g=; b=L9Rr4IxOeDB6UuRUMyJiI3VRDOJGlLIKG6aTPh0dCE0yar6RGntR3YL0VzVp8ymfVkj52x t+9EeNUfSFi1SM+ZWTPjGRiAo0AQQ7m3aekJNWPH6BtZdwIJaDkdCqfg3jmhmNQTOiLQlH PCAWb4wXx9PoXGHO9hzqjk8RveUBlGaad2SW5vkf4t3RX5cfjXYq0Xjtjh5tt5nozUhfKg udBwANsXVOd7tLf5TJqg7Vc6B4IfubRB+yjtuUX7bNPXyBW2OYFtfzMMAx/Uu6v6/zZe9W R2nR0nE9h8SV4RLqajiPuFpWXg7OUEVj/bpE6XVN/cEewx5hLhhI7AdyG2i4Ug== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 5/9] drm/panel: nv3052c: Allow specifying registers per panel Date: Mon, 18 Sep 2023 22:58:49 +1000 Message-ID: <20230918125853.2249187-6-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Panel initialization registers are per-display and not tied to the controller itself. Different panels will specify their own registers. Attach the sequences to the panel info struct so future panels can specify their own sequences. Signed-off-by: John Watts Reviewed-by: Jessica Zhang --- .../gpu/drm/panel/panel-newvision-nv3052c.c | 24 ++++++++++++------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c index 307335d0f1fc..2b24c684a8ac 100644 --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -20,11 +20,18 @@ #include #include +struct nv3052c_reg { + u8 cmd; + u8 val; +}; + struct nv3052c_panel_info { const struct drm_display_mode *display_modes; unsigned int num_modes; u16 width_mm, height_mm; u32 bus_format, bus_flags; + const struct nv3052c_reg *panel_regs; + int panel_regs_len; }; struct nv3052c { @@ -36,12 +43,7 @@ struct nv3052c { struct gpio_desc *reset_gpio; }; -struct nv3052c_reg { - u8 cmd; - u8 val; -}; - -static const struct nv3052c_reg nv3052c_panel_regs[] = { +static const struct nv3052c_reg ltk035c5444t_panel_regs[] = { // EXTC Command set enable, select page 1 { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x01 }, // Mostly unknown registers @@ -244,6 +246,8 @@ static inline struct nv3052c *to_nv3052c(struct drm_panel *panel) static int nv3052c_prepare(struct drm_panel *panel) { struct nv3052c *priv = to_nv3052c(panel); + const struct nv3052c_reg *panel_regs = priv->panel_info->panel_regs; + int panel_regs_len = priv->panel_info->panel_regs_len; struct mipi_dbi *dbi = &priv->dbi; unsigned int i; int err; @@ -260,9 +264,9 @@ static int nv3052c_prepare(struct drm_panel *panel) gpiod_set_value_cansleep(priv->reset_gpio, 0); msleep(150); - for (i = 0; i < ARRAY_SIZE(nv3052c_panel_regs); i++) { - err = mipi_dbi_command(dbi, nv3052c_panel_regs[i].cmd, - nv3052c_panel_regs[i].val); + for (i = 0; i < panel_regs_len; i++) { + err = mipi_dbi_command(dbi, panel_regs[i].cmd, + panel_regs[i].val); if (err) { dev_err(priv->dev, "Unable to set register: %d\n", err); @@ -466,6 +470,8 @@ static const struct nv3052c_panel_info ltk035c5444t_panel_info = { .height_mm = 64, .bus_format = MEDIA_BUS_FMT_RGB888_1X24, .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .panel_regs = ltk035c5444t_panel_regs, + .panel_regs_len = ARRAY_SIZE(ltk035c5444t_panel_regs), }; static const struct spi_device_id nv3052c_ids[] = { From patchwork Mon Sep 18 12:58:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD42DCD3445 for ; Tue, 19 Sep 2023 06:59:51 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 071B210E254; Tue, 19 Sep 2023 06:59:39 +0000 (UTC) Received: from out-217.mta1.migadu.com (out-217.mta1.migadu.com [95.215.58.217]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5AFE110E272 for ; Mon, 18 Sep 2023 13:00:06 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695042004; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JqJ4Uh0YCFmNctbEV5iR3ijHWbHOXdE7ReBsCbeAoI4=; b=sHar9JgJ5KHdYHOsdhD0L9pP5/3qUqCHRTS9NJSXxxo9do+q1xN5l7Jp/TPjusB78PiC/F 13i0IGaeqtNBuZ/vlGqwSseh0v6PkKWKfockdQADnKeSB2C3sBdVPKawLgC31Uyy2EE5OW d/fi8u1FoQNmthRu0ZoE8pouMl5WYAI1nXGhLMMCyYUpc+BuGUKzBIb46BCLW6D9hwhoau /zEAJYSg6nwAr7KhUDlbWSJD7B/I5voeZxPy6XdbWR5+i8VqfAmW40TTv5gMsb83a7Ivsy PTOjDozxoxTE3YR6IvTfYvK8q3mo3eIfBMMIlthN4T/U2czQz2hjGHEC8z2r2A== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 6/9] drm/panel: nv3052c: Add Fascontek FS035VG158 LCD display Date: Mon, 18 Sep 2023 22:58:50 +1000 Message-ID: <20230918125853.2249187-7-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This display is extremely similar to the LTK035C5444T, but still has some minor variations in panel initialization. Signed-off-by: John Watts --- .../gpu/drm/panel/panel-newvision-nv3052c.c | 223 ++++++++++++++++++ 1 file changed, 223 insertions(+) diff --git a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c index 2b24c684a8ac..a42c38d93f52 100644 --- a/drivers/gpu/drm/panel/panel-newvision-nv3052c.c +++ b/drivers/gpu/drm/panel/panel-newvision-nv3052c.c @@ -238,6 +238,201 @@ static const struct nv3052c_reg ltk035c5444t_panel_regs[] = { { 0x36, 0x0a }, // bgr = 1, ss = 1, gs = 0 }; +static const struct nv3052c_reg fs035vg158_panel_regs[] = { + // EXTC Command set enable, select page 1 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x01 }, + // Mostly unknown registers + { 0xe3, 0x00 }, + { 0x40, 0x00 }, + { 0x03, 0x40 }, + { 0x04, 0x00 }, + { 0x05, 0x03 }, + { 0x08, 0x00 }, + { 0x09, 0x07 }, + { 0x0a, 0x01 }, + { 0x0b, 0x32 }, + { 0x0c, 0x32 }, + { 0x0d, 0x0b }, + { 0x0e, 0x00 }, + { 0x23, 0x20 }, // RGB interface control: DE MODE PCLK-N + { 0x24, 0x0c }, + { 0x25, 0x06 }, + { 0x26, 0x14 }, + { 0x27, 0x14 }, + { 0x38, 0x9c }, //VCOM_ADJ1, different to ltk035c5444t + { 0x39, 0xa7 }, //VCOM_ADJ2, different to ltk035c5444t + { 0x3a, 0x50 }, //VCOM_ADJ3, different to ltk035c5444t + { 0x28, 0x40 }, + { 0x29, 0x01 }, + { 0x2a, 0xdf }, + { 0x49, 0x3c }, + { 0x91, 0x57 }, //EXTPW_CTRL2, different to ltk035c5444t + { 0x92, 0x57 }, //EXTPW_CTRL3, different to ltk035c5444t + { 0xa0, 0x55 }, + { 0xa1, 0x50 }, + { 0xa4, 0x9c }, + { 0xa7, 0x02 }, + { 0xa8, 0x01 }, + { 0xa9, 0x01 }, + { 0xaa, 0xfc }, + { 0xab, 0x28 }, + { 0xac, 0x06 }, + { 0xad, 0x06 }, + { 0xae, 0x06 }, + { 0xaf, 0x03 }, + { 0xb0, 0x08 }, + { 0xb1, 0x26 }, + { 0xb2, 0x28 }, + { 0xb3, 0x28 }, + { 0xb4, 0x03 }, // Unknown, different to ltk035c5444 + { 0xb5, 0x08 }, + { 0xb6, 0x26 }, + { 0xb7, 0x08 }, + { 0xb8, 0x26 }, + { 0xf0, 0x00 }, + { 0xf6, 0xc0 }, + // EXTC Command set enable, select page 0 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x02 }, + // Set gray scale voltage to adjust gamma + { 0xb0, 0x0b }, // PGAMVR0 + { 0xb1, 0x16 }, // PGAMVR1 + { 0xb2, 0x17 }, // PGAMVR2 + { 0xb3, 0x2c }, // PGAMVR3 + { 0xb4, 0x32 }, // PGAMVR4 + { 0xb5, 0x3b }, // PGAMVR5 + { 0xb6, 0x29 }, // PGAMPR0 + { 0xb7, 0x40 }, // PGAMPR1 + { 0xb8, 0x0d }, // PGAMPK0 + { 0xb9, 0x05 }, // PGAMPK1 + { 0xba, 0x12 }, // PGAMPK2 + { 0xbb, 0x10 }, // PGAMPK3 + { 0xbc, 0x12 }, // PGAMPK4 + { 0xbd, 0x15 }, // PGAMPK5 + { 0xbe, 0x19 }, // PGAMPK6 + { 0xbf, 0x0e }, // PGAMPK7 + { 0xc0, 0x16 }, // PGAMPK8 + { 0xc1, 0x0a }, // PGAMPK9 + // Set gray scale voltage to adjust gamma + { 0xd0, 0x0c }, // NGAMVR0 + { 0xd1, 0x17 }, // NGAMVR0 + { 0xd2, 0x14 }, // NGAMVR1 + { 0xd3, 0x2e }, // NGAMVR2 + { 0xd4, 0x32 }, // NGAMVR3 + { 0xd5, 0x3c }, // NGAMVR4 + { 0xd6, 0x22 }, // NGAMPR0 + { 0xd7, 0x3d }, // NGAMPR1 + { 0xd8, 0x0d }, // NGAMPK0 + { 0xd9, 0x07 }, // NGAMPK1 + { 0xda, 0x13 }, // NGAMPK2 + { 0xdb, 0x13 }, // NGAMPK3 + { 0xdc, 0x11 }, // NGAMPK4 + { 0xdd, 0x15 }, // NGAMPK5 + { 0xde, 0x19 }, // NGAMPK6 + { 0xdf, 0x10 }, // NGAMPK7 + { 0xe0, 0x17 }, // NGAMPK8 + { 0xe1, 0x0a }, // NGAMPK9 + // EXTC Command set enable, select page 3 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x03 }, + // Set various timing settings + { 0x00, 0x2a }, // GIP_VST_1 + { 0x01, 0x2a }, // GIP_VST_2 + { 0x02, 0x2a }, // GIP_VST_3 + { 0x03, 0x2a }, // GIP_VST_4 + { 0x04, 0x61 }, // GIP_VST_5 + { 0x05, 0x80 }, // GIP_VST_6 + { 0x06, 0xc7 }, // GIP_VST_7 + { 0x07, 0x01 }, // GIP_VST_8 + { 0x08, 0x03 }, // GIP_VST_9 + { 0x09, 0x04 }, // GIP_VST_10 + { 0x70, 0x22 }, // GIP_ECLK1 + { 0x71, 0x80 }, // GIP_ECLK2 + { 0x30, 0x2a }, // GIP_CLK_1 + { 0x31, 0x2a }, // GIP_CLK_2 + { 0x32, 0x2a }, // GIP_CLK_3 + { 0x33, 0x2a }, // GIP_CLK_4 + { 0x34, 0x61 }, // GIP_CLK_5 + { 0x35, 0xc5 }, // GIP_CLK_6 + { 0x36, 0x80 }, // GIP_CLK_7 + { 0x37, 0x23 }, // GIP_CLK_8 + { 0x40, 0x03 }, // GIP_CLKA_1 + { 0x41, 0x04 }, // GIP_CLKA_2 + { 0x42, 0x05 }, // GIP_CLKA_3 + { 0x43, 0x06 }, // GIP_CLKA_4 + { 0x44, 0x11 }, // GIP_CLKA_5 + { 0x45, 0xe8 }, // GIP_CLKA_6 + { 0x46, 0xe9 }, // GIP_CLKA_7 + { 0x47, 0x11 }, // GIP_CLKA_8 + { 0x48, 0xea }, // GIP_CLKA_9 + { 0x49, 0xeb }, // GIP_CLKA_10 + { 0x50, 0x07 }, // GIP_CLKB_1 + { 0x51, 0x08 }, // GIP_CLKB_2 + { 0x52, 0x09 }, // GIP_CLKB_3 + { 0x53, 0x0a }, // GIP_CLKB_4 + { 0x54, 0x11 }, // GIP_CLKB_5 + { 0x55, 0xec }, // GIP_CLKB_6 + { 0x56, 0xed }, // GIP_CLKB_7 + { 0x57, 0x11 }, // GIP_CLKB_8 + { 0x58, 0xef }, // GIP_CLKB_9 + { 0x59, 0xf0 }, // GIP_CLKB_10 + // Map internal GOA signals to GOA output pad + { 0xb1, 0x01 }, // PANELD2U2 + { 0xb4, 0x15 }, // PANELD2U5 + { 0xb5, 0x16 }, // PANELD2U6 + { 0xb6, 0x09 }, // PANELD2U7 + { 0xb7, 0x0f }, // PANELD2U8 + { 0xb8, 0x0d }, // PANELD2U9 + { 0xb9, 0x0b }, // PANELD2U10 + { 0xba, 0x00 }, // PANELD2U11 + { 0xc7, 0x02 }, // PANELD2U24 + { 0xca, 0x17 }, // PANELD2U27 + { 0xcb, 0x18 }, // PANELD2U28 + { 0xcc, 0x0a }, // PANELD2U29 + { 0xcd, 0x10 }, // PANELD2U30 + { 0xce, 0x0e }, // PANELD2U31 + { 0xcf, 0x0c }, // PANELD2U32 + { 0xd0, 0x00 }, // PANELD2U33 + // Map internal GOA signals to GOA output pad + { 0x81, 0x00 }, // PANELU2D2 + { 0x84, 0x15 }, // PANELU2D5 + { 0x85, 0x16 }, // PANELU2D6 + { 0x86, 0x10 }, // PANELU2D7 + { 0x87, 0x0a }, // PANELU2D8 + { 0x88, 0x0c }, // PANELU2D9 + { 0x89, 0x0e }, // PANELU2D10 + { 0x8a, 0x02 }, // PANELU2D11 + { 0x97, 0x00 }, // PANELU2D24 + { 0x9a, 0x17 }, // PANELU2D27 + { 0x9b, 0x18 }, // PANELU2D28 + { 0x9c, 0x0f }, // PANELU2D29 + { 0x9d, 0x09 }, // PANELU2D30 + { 0x9e, 0x0b }, // PANELU2D31 + { 0x9f, 0x0d }, // PANELU2D32 + { 0xa0, 0x01 }, // PANELU2D33 + // EXTC Command set enable, select page 2 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x02 }, + // Unknown registers + { 0x01, 0x01 }, + { 0x02, 0xda }, + { 0x03, 0xba }, + { 0x04, 0xa8 }, + { 0x05, 0x9a }, + { 0x06, 0x70 }, + { 0x07, 0xff }, + { 0x08, 0x91 }, + { 0x09, 0x90 }, + { 0x0a, 0xff }, + { 0x0b, 0x8f }, + { 0x0c, 0x60 }, + { 0x0d, 0x58 }, + { 0x0e, 0x48 }, + { 0x0f, 0x38 }, + { 0x10, 0x2b }, + // EXTC Command set enable, select page 0 + { 0xff, 0x30 }, { 0xff, 0x52 }, { 0xff, 0x00 }, + // Display Access Control + { 0x36, 0x0a }, // bgr = 1, ss = 1, gs = 0 +}; + static inline struct nv3052c *to_nv3052c(struct drm_panel *panel) { return container_of(panel, struct nv3052c, panel); @@ -463,6 +658,21 @@ static const struct drm_display_mode ltk035c5444t_modes[] = { }, }; +static const struct drm_display_mode fs035vg158_modes[] = { + { /* 60 Hz */ + .clock = 21000, + .hdisplay = 640, + .hsync_start = 640 + 34, + .hsync_end = 640 + 34 + 4, + .htotal = 640 + 34 + 4 + 20, + .vdisplay = 480, + .vsync_start = 480 + 12, + .vsync_end = 480 + 12 + 4, + .vtotal = 480 + 12 + 4 + 6, + .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, + }, +}; + static const struct nv3052c_panel_info ltk035c5444t_panel_info = { .display_modes = ltk035c5444t_modes, .num_modes = ARRAY_SIZE(ltk035c5444t_modes), @@ -474,14 +684,27 @@ static const struct nv3052c_panel_info ltk035c5444t_panel_info = { .panel_regs_len = ARRAY_SIZE(ltk035c5444t_panel_regs), }; +static const struct nv3052c_panel_info fs035vg158_panel_info = { + .display_modes = fs035vg158_modes, + .num_modes = ARRAY_SIZE(fs035vg158_modes), + .width_mm = 70, + .height_mm = 53, + .bus_format = MEDIA_BUS_FMT_RGB888_1X24, + .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, + .panel_regs = fs035vg158_panel_regs, + .panel_regs_len = ARRAY_SIZE(fs035vg158_panel_regs), +}; + static const struct spi_device_id nv3052c_ids[] = { { "ltk035c5444t", }, + { "fs035vg158", }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(spi, nv3052c_ids); static const struct of_device_id nv3052c_of_match[] = { { .compatible = "leadtek,ltk035c5444t", .data = <k035c5444t_panel_info }, + { .compatible = "fascontek,fs035vg158", .data = &fs035vg158_panel_info }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, nv3052c_of_match); From patchwork Mon Sep 18 12:58:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390890 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8316ACD3442 for ; Tue, 19 Sep 2023 07:00:38 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C876810E379; Tue, 19 Sep 2023 07:00:21 +0000 (UTC) Received: from out-221.mta1.migadu.com (out-221.mta1.migadu.com [95.215.58.221]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3E96210E276 for ; Mon, 18 Sep 2023 13:00:14 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695042012; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=SeWaoEJqAF8ZYVajGx7WfucGGz9hM5xHxg939rbNK9c=; b=PHK4m9K32Yp3nyzxO6Cg6RphTVBzWi6rWgpf5Wecs5F6H/ZqdcLf9/gPoeLTh1qRs1P+OJ aVMcdEaW87kqG8Zu0wfvYHQcc5N5g032dKjrJwzaTHAOOsl7j0+fRCdQIVDZc3MJbLNXC5 v6jMObQ/y1gX59jq/o2SWqFx2bXNOB5HesHY7ExF8zDjR9Wi38+G8X+KwMk2rqF3+n6DNG io2+oTHbXXP7QUCGaVoaePl186/xZkDdN/+wIOjeqjJWQUaDG8ogACg2gK+CfekkI9O5Sf MeJ5AHsmvEqzKUGULqME2NDLtEqut1UlvTIys7rnKnwC1XrPLbf0kZUeA2rzAg== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 7/9] dt-bindings: display: panel: Clean up leadtek, ltk035c5444t properties Date: Mon, 18 Sep 2023 22:58:51 +1000 Message-ID: <20230918125853.2249187-8-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Remove common properties listed in common yaml files. Add required properties needed to describe the panel. Signed-off-by: John Watts --- .../bindings/display/panel/leadtek,ltk035c5444t.yaml | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml b/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml index ebdca5f5a001..7a55961e1a3d 100644 --- a/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml +++ b/Documentation/devicetree/bindings/display/panel/leadtek,ltk035c5444t.yaml @@ -18,16 +18,12 @@ properties: compatible: const: leadtek,ltk035c5444t - backlight: true - port: true - power-supply: true - reg: true - reset-gpios: true - spi-3wire: true required: - compatible + - reg + - port - power-supply - reset-gpios From patchwork Mon Sep 18 12:58:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4BB4CD3445 for ; Tue, 19 Sep 2023 07:00:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9811310E368; Tue, 19 Sep 2023 06:59:59 +0000 (UTC) Received: from out-226.mta1.migadu.com (out-226.mta1.migadu.com [95.215.58.226]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2861710E276 for ; Mon, 18 Sep 2023 13:00:22 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695042020; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+rPvYllRDLXYdpCaKzuXJQW3gGJQ00N8iG6ai2sg4/4=; b=ZmSg3GBBCkEs7rof7B5MUOJ0BSXWhDB//CYhBVB171ABr4QKQ5bwGu/itk5Q8Ccs7v/674 EetMEHidRZmCQcfxjhT9LTVPZAq+LJKnwdFsZ7l/zpbNQzFyhA5xF2oL5w7uiQCSr84rWF lgnqEupoTUjG8bfXxlq+Ep0PzKApQQquok0WbYxyH0bTV8kHHlfi1EgyZOs+p9a55aFF9z jsUEru39mof9hLB5OzoacE6hitbDopYBuDHn5DuZOFfHTD4DfgaYE2UUYXKZxWEob9gx67 G10M9T9Ttk/A3clE0MPbYvffn+iwpdVgbXwPjcLg4UmZW3kb/jS9u0nlk6jxzQ== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 8/9] dt-bindings: vendor-prefixes: Add fascontek Date: Mon, 18 Sep 2023 22:58:52 +1000 Message-ID: <20230918125853.2249187-9-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Krzysztof Kozlowski , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Fascontek manufactures LCD panels such as the FS035VG158. Signed-off-by: John Watts Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 573578db9509..69befb76b6ce 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -468,6 +468,8 @@ patternProperties: description: Fairphone B.V. "^faraday,.*": description: Faraday Technology Corporation + "^fascontek,.*": + description: Fascontek "^fastrax,.*": description: Fastrax Oy "^fcs,.*": From patchwork Mon Sep 18 12:58:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Watts X-Patchwork-Id: 13390894 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFEEECD3442 for ; Tue, 19 Sep 2023 07:01:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 19A4D10E38A; Tue, 19 Sep 2023 07:01:11 +0000 (UTC) Received: from out-214.mta1.migadu.com (out-214.mta1.migadu.com [95.215.58.214]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6155B10E27E for ; Mon, 18 Sep 2023 13:00:30 +0000 (UTC) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=jookia.org; s=key1; t=1695042028; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R5G1aT+AHi7jek6Uf/y5TeohqhmCW5n4KHyN+Nw2tzQ=; b=bun50opM5dimzLsCGjkw0y6gEd/JNoD69i4kGYHbMosSzIWcI6JEbEe3YOPdIkVMtmlYMc eHk5W2A6fZmjDuawkH3jAU2G1rjte6655tRV/3p/gvxH7aMLbwULpSUc55a04VxZ69jdGT EgQjHwChB8NVupEWTmUQH52l8To57xkrOsawTvyWNxCpyRLJDvydVoiEvIylak4iT32pEC OktAc0d2GpWkM67mx8BO4YJxMmjRucC41ecehCnulaDNxK7DHeKu99aoqbAuvcCPFkuIkT iLV9vaq+5JWP/nYqeMFUy8wIqO5gVitcquNkVyfdnWkDzgUPwunWYIqZ2LQsLQ== From: John Watts To: dri-devel@lists.freedesktop.org Subject: [RFC PATCH v2 9/9] dt-bindings: display: panel: add Fascontek FS035VG158 panel Date: Mon, 18 Sep 2023 22:58:53 +1000 Message-ID: <20230918125853.2249187-10-contact@jookia.org> In-Reply-To: <20230918125853.2249187-1-contact@jookia.org> References: <20230918125853.2249187-1-contact@jookia.org> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT X-Mailman-Approved-At: Tue, 19 Sep 2023 06:59:32 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong , Conor Dooley , Krzysztof Kozlowski , devicetree@vger.kernel.org, Sam Ravnborg , Chris Morgan , linux-kernel@vger.kernel.org, Shawn Guo , Jagan Teki , John Watts , Rob Herring , Jessica Zhang , Paul Cercueil , Christophe Branchereau Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" This is a small 3.5" 640x480 IPS LCD panel. Signed-off-by: John Watts --- .../display/panel/fascontek,fs035vg158.yaml | 56 +++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/fascontek,fs035vg158.yaml diff --git a/Documentation/devicetree/bindings/display/panel/fascontek,fs035vg158.yaml b/Documentation/devicetree/bindings/display/panel/fascontek,fs035vg158.yaml new file mode 100644 index 000000000000..d13c4bd26de4 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/fascontek,fs035vg158.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/fascontek,fs035vg158.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Fascontek FS035VG158 3.5" (640x480 pixels) 24-bit IPS LCD panel + +maintainers: + - John Watts + +allOf: + - $ref: panel-common.yaml# + - $ref: /schemas/spi/spi-peripheral-props.yaml# + +properties: + compatible: + const: fascontek,fs035vg158 + + spi-3wire: true + +required: + - compatible + - reg + - port + - power-supply + - reset-gpios + +unevaluatedProperties: false + +examples: + - | + #include + + spi { + #address-cells = <1>; + #size-cells = <0>; + panel@0 { + compatible = "fascontek,fs035vg158"; + reg = <0>; + + spi-3wire; + spi-max-frequency = <3125000>; + + reset-gpios = <&gpe 2 GPIO_ACTIVE_LOW>; + + backlight = <&backlight>; + power-supply = <&vcc>; + + port { + panel_input: endpoint { + remote-endpoint = <&panel_output>; + }; + }; + }; + };