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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id h64sm17146941pfc.142.2019.02.11.17.51.22 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Feb 2019 17:51:23 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Subject: [PATCH 1/2] dt-bindings: imx6q-pcie: Add "pcie_aux" clock for imx8mq Date: Mon, 11 Feb 2019 17:51:07 -0800 Message-Id: <20190212015108.16952-2-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190212015108.16952-1-andrew.smirnov@gmail.com> References: <20190212015108.16952-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190211_175124_763499_37170802 X-CRM114-Status: GOOD ( 10.20 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , Rob Herring , Richard Zhu , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Andrey Smirnov , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , linux-imx@nxp.com, Bjorn Helgaas , Leonard Crestez , Chris Healy , Lucas Stach Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add a binding for an extra clock required on i.MX8MQ. Signed-off-by: Andrey Smirnov Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: Rob Herring Cc: devicetree@vger.kernel.org Reviewed-by: Lucas Stach Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index 920ca93870a8..933d98328e07 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -55,6 +55,10 @@ Additional required properties for imx7d-pcie and imx8mq-pcie: - "apps" - "turnoff" +Additional required properties for imx8mq-pcie: +- clock-names: Must include the following additional entries: + - "pcie_aux" + Example: pcie@01000000 { From patchwork Tue Feb 12 01:51:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10807191 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 9C9A513B4 for ; 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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id h64sm17146941pfc.142.2019.02.11.17.51.24 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Feb 2019 17:51:25 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Subject: [PATCH 2/2] PCI: imx6: Add code to request/control "pcie_aux" clock for i.MX8MQ Date: Mon, 11 Feb 2019 17:51:08 -0800 Message-Id: <20190212015108.16952-3-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190212015108.16952-1-andrew.smirnov@gmail.com> References: <20190212015108.16952-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190211_175126_562196_00823B79 X-CRM114-Status: GOOD ( 13.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "A.s. Dong" , Rob Herring , Richard Zhu , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Andrey Smirnov , linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Fabio Estevam , linux-imx@nxp.com, Bjorn Helgaas , Leonard Crestez , Chris Healy , Lucas Stach Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP PCIe IP block has additional clock, "pcie_aux", that needs to be controlled by the driver. Add code to support that. Signed-off-by: Andrey Smirnov Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: Rob Herring Cc: devicetree@vger.kernel.org Reviewed-by: Lucas Stach --- drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 7cdf8f9ab244..1a7031782846 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -65,6 +65,7 @@ struct imx6_pcie { struct clk *pcie_phy; struct clk *pcie_inbound_axi; struct clk *pcie; + struct clk *pcie_aux; struct regmap *iomuxc_gpr; u32 controller_id; struct reset_control *pciephy_reset; @@ -421,6 +422,12 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie) case IMX7D: break; case IMX8MQ: + ret = clk_prepare_enable(imx6_pcie->pcie_aux); + if (ret) { + dev_err(dev, "unable to enable pcie_aux clock\n"); + break; + } + offset = imx6_pcie_grp_offset(imx6_pcie); /* * Set the over ride low and enabled @@ -904,6 +911,9 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie) IMX7D_GPR12_PCIE_PHY_REFCLK_SEL, IMX7D_GPR12_PCIE_PHY_REFCLK_SEL); break; + case IMX8MQ: + clk_disable_unprepare(imx6_pcie->pcie_aux); + break; default: break; } @@ -1049,6 +1059,12 @@ static int imx6_pcie_probe(struct platform_device *pdev) dev_err(dev, "Failed to get PCIE APPS reset control\n"); return PTR_ERR(imx6_pcie->apps_reset); } + + imx6_pcie->pcie_aux = devm_clk_get(dev, "pcie_aux"); + if (IS_ERR(imx6_pcie->pcie_aux)) { + dev_err(dev, "pcie_aux clock source missing or invalid\n"); + return PTR_ERR(imx6_pcie->pcie_aux); + } break; default: break;