From patchwork Fri Sep 22 06:28:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 13394991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71431E7D0D0 for ; Fri, 22 Sep 2023 06:28:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229862AbjIVG2u convert rfc822-to-8bit (ORCPT ); Fri, 22 Sep 2023 02:28:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44468 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229809AbjIVG2t (ORCPT ); Fri, 22 Sep 2023 02:28:49 -0400 Received: from fd01.gateway.ufhost.com (fd01.gateway.ufhost.com [61.152.239.71]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBD6C102; Thu, 21 Sep 2023 23:28:43 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by fd01.gateway.ufhost.com (Postfix) with ESMTP id 26FF324E2B9; Fri, 22 Sep 2023 14:28:37 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 22 Sep 2023 14:28:37 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 22 Sep 2023 14:28:36 +0800 From: William Qiu To: , , , CC: Emil Renner Berthing , Rob Herring , Jaehoon Chung , Ulf Hansson , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , "Palmer Dabbelt" , Albert Ou , William Qiu Subject: [PATCH v3 1/3] dt-bindings: mmc: Remove properties from required Date: Fri, 22 Sep 2023 14:28:32 +0800 Message-ID: <20230922062834.39212-2-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922062834.39212-1-william.qiu@starfivetech.com> References: <20230922062834.39212-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Due to the change of tuning implementation, it's no longer necessary to use the "starfive,sysreg" property in dts, so remove it from required. Signed-off-by: William Qiu Acked-by: Conor Dooley Reviewed-by: Emil Renner Berthing --- Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml | 2 -- 1 file changed, 2 deletions(-) diff --git a/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml b/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml index 51e1b04e799f..553a75195c2e 100644 --- a/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml @@ -55,7 +55,6 @@ required: - clocks - clock-names - interrupts - - starfive,sysreg unevaluatedProperties: false @@ -73,5 +72,4 @@ examples: fifo-depth = <32>; fifo-watermark-aligned; data-addr = <0>; - starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>; }; From patchwork Fri Sep 22 06:28:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 13394992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4291EE7D0CD for ; Fri, 22 Sep 2023 06:29:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230469AbjIVG3H convert rfc822-to-8bit (ORCPT ); Fri, 22 Sep 2023 02:29:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41474 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230480AbjIVG3D (ORCPT ); Fri, 22 Sep 2023 02:29:03 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6732CCC1; Thu, 21 Sep 2023 23:28:53 -0700 (PDT) Received: from EXMBX166.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX166", Issuer "EXMBX166" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 1A69524E28E; Fri, 22 Sep 2023 14:28:38 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX166.cuchost.com (172.16.6.76) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 22 Sep 2023 14:28:38 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 22 Sep 2023 14:28:36 +0800 From: William Qiu To: , , , CC: Emil Renner Berthing , Rob Herring , Jaehoon Chung , Ulf Hansson , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , "Palmer Dabbelt" , Albert Ou , William Qiu Subject: [PATCH v3 2/3] mmc: starfive: Change tuning implementation Date: Fri, 22 Sep 2023 14:28:33 +0800 Message-ID: <20230922062834.39212-3-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922062834.39212-1-william.qiu@starfivetech.com> References: <20230922062834.39212-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Before, we used syscon to achieve tuning, but the actual measurement showed little effect, so the tuning implementation was modified here, and it was realized by reading and writing the UHS_REG_EXT register. Signed-off-by: William Qiu Reviewed-by: Emil Renner Berthing --- drivers/mmc/host/dw_mmc-starfive.c | 137 +++++++++-------------------- 1 file changed, 40 insertions(+), 97 deletions(-) diff --git a/drivers/mmc/host/dw_mmc-starfive.c b/drivers/mmc/host/dw_mmc-starfive.c index fd05a648a8bb..b4d81ef0f3af 100644 --- a/drivers/mmc/host/dw_mmc-starfive.c +++ b/drivers/mmc/host/dw_mmc-starfive.c @@ -5,6 +5,7 @@ * Copyright (c) 2022 StarFive Technology Co., Ltd. */ +#include #include #include #include @@ -20,13 +21,7 @@ #define ALL_INT_CLR 0x1ffff #define MAX_DELAY_CHAIN 32 -struct starfive_priv { - struct device *dev; - struct regmap *reg_syscon; - u32 syscon_offset; - u32 syscon_shift; - u32 syscon_mask; -}; +#define STARFIVE_SMPL_PHASE GENMASK(20, 16) static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios) { @@ -44,117 +39,65 @@ static void dw_mci_starfive_set_ios(struct dw_mci *host, struct mmc_ios *ios) } } +static void dw_mci_starfive_set_sample_phase(struct dw_mci *host, u32 smpl_phase) +{ + /* change driver phase and sample phase */ + u32 reg_value = mci_readl(host, UHS_REG_EXT); + + /* In UHS_REG_EXT, only 5 bits valid in DRV_PHASE and SMPL_PHASE */ + reg_value &= ~STARFIVE_SMPL_PHASE; + reg_value |= FIELD_PREP(STARFIVE_SMPL_PHASE, smpl_phase); + mci_writel(host, UHS_REG_EXT, reg_value); + + /* We should delay 1ms wait for timing setting finished. */ + mdelay(1); +} + static int dw_mci_starfive_execute_tuning(struct dw_mci_slot *slot, u32 opcode) { static const int grade = MAX_DELAY_CHAIN; struct dw_mci *host = slot->host; - struct starfive_priv *priv = host->priv; - int rise_point = -1, fall_point = -1; - int err, prev_err = 0; - int i; - bool found = 0; - u32 regval; - - /* - * Use grade as the max delay chain, and use the rise_point and - * fall_point to ensure the best sampling point of a data input - * signals. - */ - for (i = 0; i < grade; i++) { - regval = i << priv->syscon_shift; - err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, - priv->syscon_mask, regval); - if (err) - return err; + int smpl_phase, smpl_raise = -1, smpl_fall = -1; + int ret; + + for (smpl_phase = 0; smpl_phase < grade; smpl_phase++) { + dw_mci_starfive_set_sample_phase(host, smpl_phase); mci_writel(host, RINTSTS, ALL_INT_CLR); - err = mmc_send_tuning(slot->mmc, opcode, NULL); - if (!err) - found = 1; + ret = mmc_send_tuning(slot->mmc, opcode, NULL); - if (i > 0) { - if (err && !prev_err) - fall_point = i - 1; - if (!err && prev_err) - rise_point = i; + if (!ret && smpl_raise < 0) { + smpl_raise = smpl_phase; + } else if (ret && smpl_raise >= 0) { + smpl_fall = smpl_phase - 1; + break; } - - if (rise_point != -1 && fall_point != -1) - goto tuning_out; - - prev_err = err; - err = 0; } -tuning_out: - if (found) { - if (rise_point == -1) - rise_point = 0; - if (fall_point == -1) - fall_point = grade - 1; - if (fall_point < rise_point) { - if ((rise_point + fall_point) > - (grade - 1)) - i = fall_point / 2; - else - i = (rise_point + grade - 1) / 2; - } else { - i = (rise_point + fall_point) / 2; - } - - regval = i << priv->syscon_shift; - err = regmap_update_bits(priv->reg_syscon, priv->syscon_offset, - priv->syscon_mask, regval); - if (err) - return err; - mci_writel(host, RINTSTS, ALL_INT_CLR); + if (smpl_phase >= grade) + smpl_fall = grade - 1; - dev_info(host->dev, "Found valid delay chain! use it [delay=%d]\n", i); - } else { + if (smpl_raise < 0) { + smpl_phase = 0; dev_err(host->dev, "No valid delay chain! use default\n"); - err = -EINVAL; + ret = -EINVAL; + goto out; } - mci_writel(host, RINTSTS, ALL_INT_CLR); - return err; -} - -static int dw_mci_starfive_parse_dt(struct dw_mci *host) -{ - struct of_phandle_args args; - struct starfive_priv *priv; - int ret; - - priv = devm_kzalloc(host->dev, sizeof(*priv), GFP_KERNEL); - if (!priv) - return -ENOMEM; + smpl_phase = (smpl_raise + smpl_fall) / 2; + dev_dbg(host->dev, "Found valid delay chain! use it [delay=%d]\n", smpl_phase); + ret = 0; - ret = of_parse_phandle_with_fixed_args(host->dev->of_node, - "starfive,sysreg", 3, 0, &args); - if (ret) { - dev_err(host->dev, "Failed to parse starfive,sysreg\n"); - return -EINVAL; - } - - priv->reg_syscon = syscon_node_to_regmap(args.np); - of_node_put(args.np); - if (IS_ERR(priv->reg_syscon)) - return PTR_ERR(priv->reg_syscon); - - priv->syscon_offset = args.args[0]; - priv->syscon_shift = args.args[1]; - priv->syscon_mask = args.args[2]; - - host->priv = priv; - - return 0; +out: + dw_mci_starfive_set_sample_phase(host, smpl_phase); + mci_writel(host, RINTSTS, ALL_INT_CLR); + return ret; } static const struct dw_mci_drv_data starfive_data = { .common_caps = MMC_CAP_CMD23, .set_ios = dw_mci_starfive_set_ios, - .parse_dt = dw_mci_starfive_parse_dt, .execute_tuning = dw_mci_starfive_execute_tuning, }; From patchwork Fri Sep 22 06:28:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Qiu X-Patchwork-Id: 13394990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2570BE7D0CF for ; Fri, 22 Sep 2023 06:28:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229758AbjIVG2s convert rfc822-to-8bit (ORCPT ); Fri, 22 Sep 2023 02:28:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44460 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229605AbjIVG2r (ORCPT ); Fri, 22 Sep 2023 02:28:47 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49761CE; Thu, 21 Sep 2023 23:28:41 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id BDC8324E289; Fri, 22 Sep 2023 14:28:38 +0800 (CST) Received: from EXMBX168.cuchost.com (172.16.6.78) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 22 Sep 2023 14:28:39 +0800 Received: from williamqiu-virtual-machine.starfivetech.com (171.223.208.138) by EXMBX168.cuchost.com (172.16.6.78) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Fri, 22 Sep 2023 14:28:37 +0800 From: William Qiu To: , , , CC: Emil Renner Berthing , Rob Herring , Jaehoon Chung , Ulf Hansson , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , "Palmer Dabbelt" , Albert Ou , William Qiu Subject: [PATCH v3 3/3] riscv: dts: starfive: add assigned-clock* to limit frquency Date: Fri, 22 Sep 2023 14:28:34 +0800 Message-ID: <20230922062834.39212-4-william.qiu@starfivetech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230922062834.39212-1-william.qiu@starfivetech.com> References: <20230922062834.39212-1-william.qiu@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [171.223.208.138] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX168.cuchost.com (172.16.6.78) X-YovoleRuleAgent: yovoleflag Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency. Signed-off-by: William Qiu Reviewed-by: Emil Renner Berthing --- .../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index d79f94432b27..d1f2ec308bca 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -205,6 +205,8 @@ &i2c6 { &mmc0 { max-frequency = <100000000>; + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>; + assigned-clock-rates = <50000000>; bus-width = <8>; cap-mmc-highspeed; mmc-ddr-1_8v; @@ -221,6 +223,8 @@ &mmc0 { &mmc1 { max-frequency = <100000000>; + assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>; + assigned-clock-rates = <50000000>; bus-width = <4>; no-sdio; no-mmc;