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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , CC: Ido Schimmel , Petr Machata , "Vadim Pasternak" , Subject: [PATCH net-next 1/3] mlxsw: reg: Limit MTBR register payload to a single data record Date: Fri, 22 Sep 2023 19:18:36 +0200 Message-ID: <58bff93e616a002c7f72c687916964286591604c.1695396848.git.petrm@nvidia.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail202.nvidia.com (10.129.68.7) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E7:EE_|CYYPR12MB9015:EE_ X-MS-Office365-Filtering-Correlation-Id: e27b0e97-d774-4678-19c8-08dbbb90072f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zCy3bxvchMhYKrMQtcPkU2u+pGIb1RM1WzneCvOEm5QSv7X7ByWElzSoUi29llz/Nd/Ng/yaNWGvSli5bX0KbK/QmsIRIZwhXvH9fQVsWEx6SlHEnJjYkovQvGpeC59FUA7U/ZxckMvP7kzg6puqer+mNiKShPkW7TMgs9136GNb9Z0ABRRKOAf4wUEqg8SPDkGAuKfBVZQVVWkllZ2vCGYCuS26CD/I6bCBs4FfRsviMMd3YvKpf9ma5kSXqjAt8kn/Qhqbtq/3lYLfxKVJdITfIvP4hYfq8+LuJIl/PVPQgPx6CCXgVIpfWgVhMnapyAackUVKQH9GpqZCcWeBdVfOuEid21XzrNZZxVvlOJH1zJ8DSfwRDX18BBp8U/zzTwg/GUM85KzSUrIop+vdmx84nbcmsm6w07uPFbq+pdFlrnDI0dEfgDYSGwaQvStpUShpOqmvdSF8JRZL+tY++iyqjm2SjF4lvmEXKqRS3bgQXS3CFOBQcLKkWOS85/w3LXnd1I0vGKFBbCn0DSxxzX7PluuFeSR+cL76/Np+H0+RGQ/mQpO9auBvkyu5n8WkmVgUYXTlJJJnDRunSjz+VxPoBS3TNLY0KSA7A0pqEJDzcd+ADpgzTxN1lqFzOfUChqyU7wXnRec/ip6OJPi6s0dUsF2BmvX2jIGihzmPB8JdgSRxZQMNAjpWPBsPAklfXOeSCN/EFnK9jZwPjSwWQHI8JuAkDcD5CYKIeNfL511QIREK6F81Uu3NURLfwSL3nbbqXb/rkKu4gbsbQ7tYrA== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(136003)(39860400002)(396003)(376002)(346002)(230921699003)(82310400011)(1800799009)(451199024)(186009)(46966006)(36840700001)(40470700004)(16526019)(107886003)(83380400001)(70206006)(70586007)(316002)(7696005)(6666004)(36756003)(26005)(7636003)(336012)(356005)(2616005)(426003)(478600001)(47076005)(40460700003)(110136005)(2906002)(5660300002)(82740400003)(40480700001)(54906003)(8676002)(8936002)(4326008)(86362001)(41300700001)(36860700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2023 17:19:07.1706 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e27b0e97-d774-4678-19c8-08dbbb90072f X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E7.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB9015 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Vadim Pasternak The MTBR register is used to read temperatures from multiple sensors in one transaction, but the driver only reads from a single sensor in each transaction. Rrestrict the payload size of the MTBR register to prevent the transmission of redundant data to the firmware. Signed-off-by: Vadim Pasternak Reviewed-by: Ido Schimmel Signed-off-by: Petr Machata --- drivers/net/ethernet/mellanox/mlxsw/core_env.c | 2 +- drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c | 2 +- drivers/net/ethernet/mellanox/mlxsw/reg.h | 6 +++--- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c index d637c0348fa1..7286f0deb5f9 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c @@ -775,7 +775,7 @@ static int mlxsw_env_module_has_temp_sensor(struct mlxsw_core *mlxsw_core, int err; mlxsw_reg_mtbr_pack(mtbr_pl, slot_index, - MLXSW_REG_MTBR_BASE_MODULE_INDEX + module, 1); + MLXSW_REG_MTBR_BASE_MODULE_INDEX + module); err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mtbr), mtbr_pl); if (err) return err; diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c index 0fd290d776ff..9c12e1feb643 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c @@ -293,7 +293,7 @@ static ssize_t mlxsw_hwmon_module_temp_fault_show(struct device *dev, module = mlxsw_hwmon_attr->type_index - mlxsw_hwmon_dev->sensor_count; mlxsw_reg_mtbr_pack(mtbr_pl, mlxsw_hwmon_dev->slot_index, - MLXSW_REG_MTBR_BASE_MODULE_INDEX + module, 1); + MLXSW_REG_MTBR_BASE_MODULE_INDEX + module); err = mlxsw_reg_query(mlxsw_hwmon->core, MLXSW_REG(mtbr), mtbr_pl); if (err) { dev_err(dev, "Failed to query module temperature sensor\n"); diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index ae556ddd7624..9970921ceef3 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -9551,7 +9551,7 @@ MLXSW_ITEM_BIT_ARRAY(reg, mtwe, sensor_warning, 0x0, 0x10, 1); #define MLXSW_REG_MTBR_ID 0x900F #define MLXSW_REG_MTBR_BASE_LEN 0x10 /* base length, without records */ #define MLXSW_REG_MTBR_REC_LEN 0x04 /* record length */ -#define MLXSW_REG_MTBR_REC_MAX_COUNT 47 /* firmware limitation */ +#define MLXSW_REG_MTBR_REC_MAX_COUNT 1 #define MLXSW_REG_MTBR_LEN (MLXSW_REG_MTBR_BASE_LEN + \ MLXSW_REG_MTBR_REC_LEN * \ MLXSW_REG_MTBR_REC_MAX_COUNT) @@ -9597,12 +9597,12 @@ MLXSW_ITEM32_INDEXED(reg, mtbr, rec_temp, MLXSW_REG_MTBR_BASE_LEN, 0, 16, MLXSW_REG_MTBR_REC_LEN, 0x00, false); static inline void mlxsw_reg_mtbr_pack(char *payload, u8 slot_index, - u16 base_sensor_index, u8 num_rec) + u16 base_sensor_index) { MLXSW_REG_ZERO(mtbr, payload); mlxsw_reg_mtbr_slot_index_set(payload, slot_index); mlxsw_reg_mtbr_base_sensor_index_set(payload, base_sensor_index); - mlxsw_reg_mtbr_num_rec_set(payload, num_rec); + mlxsw_reg_mtbr_num_rec_set(payload, 1); } /* Error codes from temperatute reading */ From patchwork Fri Sep 22 17:18:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Petr Machata X-Patchwork-Id: 13396064 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B90E42C0C for ; Fri, 22 Sep 2023 17:19:14 +0000 (UTC) Received: from NAM10-MW2-obe.outbound.protection.outlook.com (mail-mw2nam10on2083.outbound.protection.outlook.com [40.107.94.83]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 98B701A3 for ; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , CC: Ido Schimmel , Petr Machata , "Vadim Pasternak" , Subject: [PATCH net-next 2/3] mlxsw: core: Extend allowed list of external cooling devices for thermal zone binding Date: Fri, 22 Sep 2023 19:18:37 +0200 Message-ID: <8fd3ef09c37675d6bdf487a1ce95ab9efbe5b22d.1695396848.git.petrm@nvidia.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail202.nvidia.com (10.129.68.7) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E8:EE_|DS0PR12MB7511:EE_ X-MS-Office365-Filtering-Correlation-Id: 6f57cd90-60f4-4cca-8ca7-08dbbb900955 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sDshQXMqm4PaIlvjyxHisKjvDaa1IZAKOxVb68+Za0f9obJj7jMLNjaxQ8foNPQCFoqLhRRPv2YDck3C5FrRaJMBiTMSCPcVQq78ZfeyxSEPNMgkZafNmai33kM+4RW8pCcl2bZ5HsIfK69iuF72xkqKTbng/95T39kSj0QMEVexrE4zPvZRmsqXHhfu5gRNAoPV3y7X0HZLYUO6eFTb4cX8cCDv14F+ARtTfc7aYi2UDjmZ89LWhDRfWbEftyGhLfFWtrWQRJfAkZFiD2XHxaCFyLsWG36i1N+WAf7I739GrFgetzYcTjSjY3+SV/uZKIruT83LSqabRpIomoz4qI1AvTUGPWqyxJXZ6/Z431WO1b8PTn7V6QQ+UURFZ9jOhg5pKI7Ytv7oA/D4SnJxAK1cdo/kLLfb5e8sp9VgTNsXH68nxml7WK2OkEGJZvdIxeixMsg9Uoin69OfyKdvYQeub2si8v5BT5ZaaiCDOcy7WVBtm41nUWxAEvKrZVzVwFgBqtxCJOTtsgrkscDLz1JgdWy/PUy0ApuMu7DBeo7j7WCBYX2cUx8+vUa3kMZoePuLCR1LNJzkmWXvsL4PsmQ+d3rSnFXBq0TOQ2uyVgvfeohB9Yli3I0DhhZKLJN/+9btjeOej2c20yQQAcpqWusqwvo5ld6Tj2iY0NZ3McfWBH4FfuTU4lQwepp2qx4iIAhwNFZEatRlGAxltdFx+g79q9Te+i2Fv6QO+2Bpi6kofSeJYRvfCWqhRVYuaE27iwYk1c/P3kYb5UJVxNl3wg== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(376002)(396003)(346002)(136003)(39860400002)(451199024)(230921699003)(82310400011)(1800799009)(186009)(46966006)(40470700004)(36840700001)(8936002)(8676002)(4326008)(110136005)(5660300002)(41300700001)(40460700003)(316002)(36860700001)(26005)(16526019)(336012)(7696005)(40480700001)(54906003)(70206006)(70586007)(82740400003)(356005)(7636003)(6666004)(2616005)(107886003)(86362001)(426003)(47076005)(36756003)(478600001)(2906002);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2023 17:19:10.7624 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f57cd90-60f4-4cca-8ca7-08dbbb900955 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E8.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7511 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Vadim Pasternak Extend the list of allowed external cooling devices for thermal zone binding to include devices of type "emc2305". The motivation is to provide support for the system SN2201, which is equipped with the Spectrum-1 ASIC. The system's airflow control is managed by the EMC2305 RPM-based PWM Fan Speed Controller as the cooling device. Signed-off-by: Vadim Pasternak Reviewed-by: Ido Schimmel Signed-off-by: Petr Machata --- drivers/net/ethernet/mellanox/mlxsw/core_thermal.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c index 70d7fff24fa2..f709e44c76a8 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core_thermal.c @@ -31,6 +31,7 @@ /* External cooling devices, allowed for binding to mlxsw thermal zones. */ static char * const mlxsw_thermal_external_allowed_cdev[] = { "mlxreg_fan", + "emc2305", }; struct mlxsw_cooling_states { From patchwork Fri Sep 22 17:18:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Petr Machata X-Patchwork-Id: 13396065 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B39FE41E4F for ; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , CC: Ido Schimmel , Petr Machata , "Vadim Pasternak" , Subject: [PATCH net-next 3/3] mlxsw: i2c: Utilize standard macros for dividing buffer into chunks Date: Fri, 22 Sep 2023 19:18:38 +0200 Message-ID: <2a8f7484a7e5974279f2fd64eb4ad8a40da89c61.1695396848.git.petrm@nvidia.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.126.231.35] X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail202.nvidia.com (10.129.68.7) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000971E7:EE_|CY8PR12MB7490:EE_ X-MS-Office365-Filtering-Correlation-Id: 7a1f5f33-4d0b-472a-1491-08dbbb900b16 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: VTreyiUZWIf0TR+6+RsSTG1H0QTfj0o3QQXFF7CD0cPK2/JJVV4bXVYz/Ws+kaZk7jQhS4yHi/bvG6vUFm92/qQbJZgAt19zmI6L2DNT3HJaJWg8v8YBb2Y/3F62Wfi595hIOEXpVLrYF1n6eJ6Z/Z3OKYbaSoDa3mC3Hm5aoZZmf0hHl131wn1v8xbFPJX01LSQlUWoCAP0HR1vH+hPFoZ4riss8Noc0qFdNc4v5bNEMfqPTjou0AE42v9va/nkyhFPigulcZ4uliNdVXMqWhJjsQxNNz0oK8bUXzG9zxOEZkLKQJ/pIX7Y8YuG41mBddlywtLhNMOFruHl8CeHcCC5Yy2FBiBgqygNaKpxC4xfXLcxu/1JbkFYAi4u3RcLQoR4iFK4stSXGXGpQOcS+582YzyUq3BvRONZ6awN1qBJthYHBe5uGtF44ljXrzvTOtHpy8KdvHqAR6C5YXJ+ZWSxwy9SFGQE2lrU2/rQYrUtfMs1HO1qblrlfwMWVNmueyfjrYKpq+AA7Eri7X6VuVtyfIHEfNYluPGYAAlz3aymuw6ieDkZt/uPof4a1mtH4lAObQwztLBa00qyG3d3ZFGevlJhD/PP9IuQiPn+WxZJS5FuJxADBdqnKeEGm2RsG2w4JoBm+fsYB45NprdxzyuxugJsNLBnZbcMBHVbPQk5quHlIHZOgcj4yKbo7s5RMzZg4C9FiJDgE4HnyaNQNQF/ZrbcaAlOTgDjFaFKET2+Hfr300OJyvN05if9BCNyek+1jJm2XwWSfwfvOx5LbA== X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(376002)(396003)(136003)(346002)(39860400002)(1800799009)(230921699003)(186009)(82310400011)(451199024)(40470700004)(46966006)(36840700001)(70586007)(41300700001)(40480700001)(86362001)(5660300002)(8676002)(40460700003)(2906002)(4326008)(8936002)(6666004)(82740400003)(7696005)(426003)(16526019)(7636003)(478600001)(356005)(336012)(47076005)(36756003)(36860700001)(26005)(54906003)(110136005)(70206006)(316002)(2616005)(107886003)(83380400001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Sep 2023 17:19:13.7332 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7a1f5f33-4d0b-472a-1491-08dbbb900b16 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000971E7.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7490 X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO, RCVD_IN_DNSWL_BLOCKED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_NONE, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org From: Vadim Pasternak Use standard macro DIV_ROUND_UP() to determine the number of chunks required for a given buffer. Signed-off-by: Vadim Pasternak Reviewed-by: Ido Schimmel Signed-off-by: Petr Machata --- drivers/net/ethernet/mellanox/mlxsw/i2c.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/i2c.c b/drivers/net/ethernet/mellanox/mlxsw/i2c.c index d23f293e285c..1e150ce1c73a 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/i2c.c +++ b/drivers/net/ethernet/mellanox/mlxsw/i2c.c @@ -424,9 +424,7 @@ mlxsw_i2c_cmd(struct device *dev, u16 opcode, u32 in_mod, size_t in_mbox_size, if (in_mbox) { reg_size = mlxsw_i2c_get_reg_size(in_mbox); - num = reg_size / mlxsw_i2c->block_size; - if (reg_size % mlxsw_i2c->block_size) - num++; + num = DIV_ROUND_UP(reg_size, mlxsw_i2c->block_size); if (mutex_lock_interruptible(&mlxsw_i2c->cmd.lock) < 0) { dev_err(&client->dev, "Could not acquire lock");