From patchwork Wed Sep 27 13:17:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 13400781 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5CD63E7F14E for ; Wed, 27 Sep 2023 13:18:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3C10610E50E; Wed, 27 Sep 2023 13:18:00 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2D89E10E51C; Wed, 27 Sep 2023 13:17:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695820678; x=1727356678; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=4AwzCmdIVsBShkNTVJTgG/O9iQ0HAbqAsMHzTJRLx5U=; b=Og2zkGZib4tNc2xfCWywY4Fi+u1kQJsqikbWTQDyj6u7iFkt/5T0UKpG 6YCc2dVQb8tkgHyjge1xAFxoGKOcqvp1JYsoJe6TDsCjXKProZGiXQYZc NTIcfdJ2DWUrEGMxE/JjeTfVjGjk7EU1qq9uZxzC7S4qnOup0eQUi2c7s 01x4XIZ3k+IKdT7DNM5zlU98X/dIF+KB4gPOfhFweBMQ4wZZRL4h3bkdk Rs0vlJvdSUCwn3sXR6Ieo/DzXDsEWNloKWeCNc+D7k74MBsIw7axfOGsJ scqwOkNwU8/doKJp4js8x660JCrQrcGBfTi02xwvvCaBb9zgz75SRCYav Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="381724021" X-IronPort-AV: E=Sophos;i="6.03,181,1694761200"; d="scan'208";a="381724021" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2023 06:17:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="1080158425" X-IronPort-AV: E=Sophos;i="6.03,181,1694761200"; d="scan'208";a="1080158425" Received: from nirmoyda-desk.igk.intel.com ([10.102.138.190]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2023 06:17:55 -0700 From: Nirmoy Das To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Sep 2023 15:17:46 +0200 Message-ID: <20230927131748.3895-1-nirmoy.das@intel.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Organization: Intel Deutschland GmbH, Registered Address: Am Campeon 10, 85579 Neubiberg, Germany, Commercial Register: Amtsgericht Muenchen HRB 186928 Subject: [Intel-gfx] [PATCH v5 1/3] drm/i915: Introduce intel_gt_mcr_lock_reset() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: matthew.d.roper@intel.com, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement intel_gt_mcr_lock_reset() to provide a mechanism for resetting the steer semaphore when absolutely necessary. Signed-off-by: Nirmoy Das --- drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 29 ++++++++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 1 + 2 files changed, 30 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c index bf4a933de03a..d98e0d2fc2ee 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c @@ -419,6 +419,35 @@ void intel_gt_mcr_unlock(struct intel_gt *gt, unsigned long flags) intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); } +/** + * intel_gt_mcr_lock_reset - Reset MCR steering lock + * @gt: GT structure + * + * Performs a steer semaphore reset operation. On MTL and beyond, a hardware + * lock will also be taken to serialize access not only for the driver, + * but also for external hardware and firmware agents. + * However, there may be situations where the driver must reset the semaphore + * but only when it is absolutely certain that no other agent should own the + * lock at that given time. + * + * Context: Takes gt->mcr_lock. uncore->lock should *not* be held when this + * function is called, although it may be acquired after this + * function call. + */ +void intel_gt_mcr_lock_reset(struct intel_gt *gt) +{ + unsigned long __flags; + + lockdep_assert_not_held(>->uncore->lock); + + spin_lock_irqsave(>->mcr_lock, __flags); + + if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) + intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); + + spin_unlock_irqrestore(>->mcr_lock, __flags); +} + /** * intel_gt_mcr_read - read a specific instance of an MCR register * @gt: GT structure diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.h b/drivers/gpu/drm/i915/gt/intel_gt_mcr.h index 41684495b7da..485c7711f2e8 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.h @@ -11,6 +11,7 @@ void intel_gt_mcr_init(struct intel_gt *gt); void intel_gt_mcr_lock(struct intel_gt *gt, unsigned long *flags); void intel_gt_mcr_unlock(struct intel_gt *gt, unsigned long flags); +void intel_gt_mcr_lock_reset(struct intel_gt *gt); u32 intel_gt_mcr_read(struct intel_gt *gt, i915_mcr_reg_t reg, From patchwork Wed Sep 27 13:17:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 13400782 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF6E2E7F14F for ; Wed, 27 Sep 2023 13:18:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id ED61710E50F; Wed, 27 Sep 2023 13:18:01 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E4E610E50E; Wed, 27 Sep 2023 13:17:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695820679; x=1727356679; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8ra80P7oWmTUPjqC/3mLGmMZU/e79GfDVl9TiAnXX0I=; b=B6EDjWRv//4Mx/Xzq9AN+zxamy4VrfAa3Yn9KyKLTtIszkXs99yi7WUb BbyRPFSuP9qSfP5AiGGn00wsKRpCAUJtl4PnzkpD1pvIZosneM+0LMt1p TTp4uZMU59HW9hzKLWBdC4DwfUZB+N3QHaQ3YRmbBNRryi215uUwVJcJr JwzPGY9T6SQPuZ26xCySnDUI9eIbHHxMXIjGooVnxC3g6lHXATjlsUkpS d3KLpNGbcPb0MMDmiGwJx0g4XoJr4ILmca2BOO8wiXSUr2UCY5drlhOmP auXPbJCv0wcQCpzCHpNFXyTcUCdpJZ1mBfou8UktBWuFGFsb0z/XA5cce g==; X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="381724032" X-IronPort-AV: E=Sophos;i="6.03,181,1694761200"; d="scan'208";a="381724032" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2023 06:17:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="1080158429" X-IronPort-AV: E=Sophos;i="6.03,181,1694761200"; d="scan'208";a="1080158429" Received: from nirmoyda-desk.igk.intel.com ([10.102.138.190]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Sep 2023 06:17:57 -0700 From: Nirmoy Das To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Sep 2023 15:17:47 +0200 Message-ID: <20230927131748.3895-2-nirmoy.das@intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230927131748.3895-1-nirmoy.das@intel.com> References: <20230927131748.3895-1-nirmoy.das@intel.com> MIME-Version: 1.0 Organization: Intel Deutschland GmbH, Registered Address: Am Campeon 10, 85579 Neubiberg, Germany, Commercial Register: Amtsgericht Muenchen HRB 186928 Subject: [Intel-gfx] [PATCH v5 2/3] drm/i915: Reset steer semaphore for media GT on resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: matthew.d.roper@intel.com, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" During resume, the steer semaphore on GT1 was observed to be held. The hardware team has confirmed the safety of clearing the steer semaphore during driver load/resume, as no lock acquisitions can occur in this process by other agents. v2: reset on resume not in intel_gt_init(). Signed-off-by: Nirmoy Das --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c index 5a942af0a14e..b19062e30b9b 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c @@ -13,6 +13,7 @@ #include "intel_engine_pm.h" #include "intel_gt.h" #include "intel_gt_clock_utils.h" +#include "intel_gt_mcr.h" #include "intel_gt_pm.h" #include "intel_gt_print.h" #include "intel_gt_requests.h" @@ -228,6 +229,17 @@ int intel_gt_resume(struct intel_gt *gt) GT_TRACE(gt, "\n"); + /* + * Reset the steer semaphore on GT1, as we have observed it + * remaining held after a suspend operation. Confirmation + * from the hardware team ensures the safety of resetting + * the steer semaphore during driver load/resume, as there + * are no lock acquisitions during this process by other + * agents. + */ + if (MEDIA_VER(gt->i915) >= 13 && gt->type == GT_MEDIA) + intel_gt_mcr_lock_reset(gt); + /* * After resume, we may need to poke into the pinned kernel * contexts to paper over any damage caused by the sudden suspend. From patchwork Wed Sep 27 13:17:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 13400783 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4B54E7F14F for ; Wed, 27 Sep 2023 13:18:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B8FEE10E511; Wed, 27 Sep 2023 13:18:04 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id 49EC410E50F; Wed, 27 Sep 2023 13:18:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; 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27 Sep 2023 06:17:59 -0700 From: Nirmoy Das To: intel-gfx@lists.freedesktop.org Date: Wed, 27 Sep 2023 15:17:48 +0200 Message-ID: <20230927131748.3895-3-nirmoy.das@intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230927131748.3895-1-nirmoy.das@intel.com> References: <20230927131748.3895-1-nirmoy.das@intel.com> MIME-Version: 1.0 Organization: Intel Deutschland GmbH, Registered Address: Am Campeon 10, 85579 Neubiberg, Germany, Commercial Register: Amtsgericht Muenchen HRB 186928 Subject: [Intel-gfx] [PATCH v5 3/3] drm/i915/mtl: Skip MCR ops for ring fault register X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrzej Hajda , matthew.d.roper@intel.com, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On MTL GEN12_RING_FAULT_REG is not replicated so don't do mcr based operation for this register. v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt). v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt) improve comment. v4: improve the comment further(Andi) Signed-off-by: Nirmoy Das Reviewed-by: Matt Roper Reviewed-by: Andi Shyti Reviewed-by: Andrzej Hajda --- drivers/gpu/drm/i915/gt/intel_gt.c | 13 ++++++++++++- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++++++++++- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 93062c35e072..dff8bba1f5d4 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -262,10 +262,21 @@ intel_gt_clear_error_registers(struct intel_gt *gt, I915_MASTER_ERROR_INTERRUPT); } - if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) { + /* + * For the media GT, this ring fault register is not replicated, + * so don't do multicast/replicated register read/write operation on it. + */ + if (MEDIA_VER(i915) >= 13 && gt->type == GT_MEDIA) { + intel_uncore_rmw(uncore, XELPMP_RING_FAULT_REG, + RING_FAULT_VALID, 0); + intel_uncore_posting_read(uncore, + XELPMP_RING_FAULT_REG); + + } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) { intel_gt_mcr_multicast_rmw(gt, XEHP_RING_FAULT_REG, RING_FAULT_VALID, 0); intel_gt_mcr_read_any(gt, XEHP_RING_FAULT_REG); + } else if (GRAPHICS_VER(i915) >= 12) { intel_uncore_rmw(uncore, GEN12_RING_FAULT_REG, RING_FAULT_VALID, 0); intel_uncore_posting_read(uncore, GEN12_RING_FAULT_REG); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index cca4bac8f8b0..eecd0a87a647 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -1084,6 +1084,7 @@ #define GEN12_RING_FAULT_REG _MMIO(0xcec4) #define XEHP_RING_FAULT_REG MCR_REG(0xcec4) +#define XELPMP_RING_FAULT_REG _MMIO(0xcec4) #define GEN8_RING_FAULT_ENGINE_ID(x) (((x) >> 12) & 0x7) #define RING_FAULT_GTTSEL_MASK (1 << 11) #define RING_FAULT_SRCID(x) (((x) >> 3) & 0xff) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index f4ebcfb70289..b4e31e59c799 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -1234,7 +1234,16 @@ static void engine_record_registers(struct intel_engine_coredump *ee) if (GRAPHICS_VER(i915) >= 6) { ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL); - if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) + /* + * For the media GT, this ring fault register is not replicated, + * so don't do multicast/replicated register read/write + * operation on it. + */ + if (MEDIA_VER(i915) >= 13 && engine->gt->type == GT_MEDIA) + ee->fault_reg = intel_uncore_read(engine->uncore, + XELPMP_RING_FAULT_REG); + + else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) ee->fault_reg = intel_gt_mcr_read_any(engine->gt, XEHP_RING_FAULT_REG); else if (GRAPHICS_VER(i915) >= 12)