From patchwork Wed Sep 27 17:00:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13401431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6AE6BE82CAE for ; Wed, 27 Sep 2023 17:00:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YPiPdZOE3Z3UlPrasq/OnRDqajsStKj1qg56cR+U8nk=; b=zaB7vao8EAmy0p DQrLR5zxaT2GHMU4Wf2q/MIjXfOLb3qqOHauZi/3LM5Im5sfAKwgM1RRUzY8MJX6Wh2IwV5zIVCiv 6k/KYkXK07Snh3TCupg/Zmk+G+kxdMoZ3o7IqTYdlK1PcE/h8GuZl/dikpYJnAMwvrvNDwVOv2/4E TeT3PdmGN3B/dc1puV51tNyfMebLEmqHNOdMI2k5XXLNReRiDnw8wNGlTLu0MHpjtLp8m1EVoQd7V EdbXWEQrVJgP/xA1vg+/VNuACBPnMpFQK6fVcH/LOoYzgdG7tOh6wc9lEGg9bO0Is3UhutGfycEbD w4wRVsmaJgyE6sGujTWA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qlXtq-001TCW-1x; Wed, 27 Sep 2023 17:00:34 +0000 Received: from mail-vs1-xe2a.google.com ([2607:f8b0:4864:20::e2a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qlXtn-001TBn-2o for linux-riscv@lists.infradead.org; Wed, 27 Sep 2023 17:00:33 +0000 Received: by mail-vs1-xe2a.google.com with SMTP id ada2fe7eead31-4527d436ddfso5436697137.1 for ; Wed, 27 Sep 2023 10:00:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1695834029; x=1696438829; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+DmNFRxVXj8V3ocvjWMiRzGtl0URBCJyLqRyOWHwpdo=; b=fdx7y7VWKlCJk9lM7FHIVMuALEarOvjWXvQcmKVcwsQRapdlZlXPDeolRn0tBcRsHo B9E8JHMs+Yr1W3UNuc9fDeoXVSj1g/oZCtF8KH4UeqDOjQjc65ygwbstsU+scty4335l 0fbZ8O+2G/1vQJLDxKRVOxtdN27Yd1A9xrjVN5gEzDuGI3EEz1VRcNPVL8Ic4KdTL/n3 pGR8btWwql5FUr5/jkV5hon8vK4QJhD4KIU/NuuN8Sv0fQcjQT84up/nma+cznrBcsDL CdoXkmj4uKAuQlJechHhZmwBtfq0mRnh2x9ZmqPvS8P6AXZZCJQ3OtfjoByylJV/RmgN zfRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1695834029; x=1696438829; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+DmNFRxVXj8V3ocvjWMiRzGtl0URBCJyLqRyOWHwpdo=; b=M9pQVggSoHNWHUP2JQjbMklvUq8vr3eaMESx7Es9pFp70K/0rSXptjzw52zPk4TY71 +LbV+okkLSDd7DFq1u4AHEkODebINC3LZSkHSNZ9AUzD/YwC3DG97JK7Sw3pVfJ539jS 3aIF6hSeMljFHVFAKPHLoWgZJku7QlBsCc6bnO7B7O0jhF4xD4PhqBVGZ2MQURrSS+T7 /4yi0XKqqzcE0+LY6Lh3A++hkaNvSsrKaGR+vOZMaTmyr1zrYPdISzMgpcoEvpYm0MQT gRQIdHV6Nt8SbJ3oDujK5niZxla/O5uQkQxUomUuTDeUmFMvCiup7zlwYf+eulZL39/c XJkQ== X-Gm-Message-State: AOJu0YzTLAQZY9KlLzdlJdgjj9AAjMmuus6b6yMW8N6r0LUo4eKtCGnm 7MbENawhCnd0F+XOzdHHpPtRzkFtlgAvhxoDwPI= X-Google-Smtp-Source: AGHT+IGBgFPJjICylrMDS7JPEnRZuaEEh3Sec+u6/LbCPif/YPGepNKpytUBblydLbUQWx1xQGW8Jw== X-Received: by 2002:a67:f98f:0:b0:452:81c4:3b56 with SMTP id b15-20020a67f98f000000b0045281c43b56mr2534411vsq.18.1695834028193; Wed, 27 Sep 2023 10:00:28 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.190.42]) by smtp.gmail.com with ESMTPSA id u7-20020a637907000000b00584b293d157sm3279396pgc.80.2023.09.27.10.00.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Sep 2023 10:00:27 -0700 (PDT) From: Sunil V L To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 -next 1/4] RISC-V: ACPI: Enhance acpi_os_ioremap with MMIO remapping Date: Wed, 27 Sep 2023 22:30:12 +0530 Message-Id: <20230927170015.295232-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230927170015.295232-1-sunilvl@ventanamicro.com> References: <20230927170015.295232-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230927_100031_911926_4FA01614 X-CRM114-Status: GOOD ( 20.13 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , Albert Ou , Alexandre Ghiti , "Rafael J . Wysocki" , Daniel Lezcano , Atish Kumar Patra , Andy Shevchenko , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Andrew Jones , Ard Biesheuvel , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Enhance the acpi_os_ioremap() to support opregions in MMIO space. Also, have strict checks using EFI memory map to allow remapping the RAM similar to arm64. Signed-off-by: Sunil V L Reviewed-by: Andrew Jones Acked-by: Conor Dooley Reviewed-by: Alexandre Ghiti --- arch/riscv/Kconfig | 1 + arch/riscv/kernel/acpi.c | 87 +++++++++++++++++++++++++++++++++++++++- 2 files changed, 86 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index d607ab0f7c6d..ac039cf8af7a 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -39,6 +39,7 @@ config RISCV select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_UBSAN_SANITIZE_ALL select ARCH_HAS_VDSO_DATA + select ARCH_KEEP_MEMBLOCK select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT select ARCH_STACKWALK diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c index 56cb2c986c48..e619edc8b0cc 100644 --- a/arch/riscv/kernel/acpi.c +++ b/arch/riscv/kernel/acpi.c @@ -14,9 +14,10 @@ */ #include +#include #include +#include #include -#include int acpi_noirq = 1; /* skip ACPI IRQ initialization */ int acpi_disabled = 1; @@ -217,7 +218,89 @@ void __init __acpi_unmap_table(void __iomem *map, unsigned long size) void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) { - return (void __iomem *)memremap(phys, size, MEMREMAP_WB); + efi_memory_desc_t *md, *region = NULL; + pgprot_t prot; + + if (WARN_ON_ONCE(!efi_enabled(EFI_MEMMAP))) + return NULL; + + for_each_efi_memory_desc(md) { + u64 end = md->phys_addr + (md->num_pages << EFI_PAGE_SHIFT); + + if (phys < md->phys_addr || phys >= end) + continue; + + if (phys + size > end) { + pr_warn(FW_BUG "requested region covers multiple EFI memory regions\n"); + return NULL; + } + region = md; + break; + } + + /* + * It is fine for AML to remap regions that are not represented in the + * EFI memory map at all, as it only describes normal memory, and MMIO + * regions that require a virtual mapping to make them accessible to + * the EFI runtime services. + */ + prot = PAGE_KERNEL_IO; + if (region) { + switch (region->type) { + case EFI_LOADER_CODE: + case EFI_LOADER_DATA: + case EFI_BOOT_SERVICES_CODE: + case EFI_BOOT_SERVICES_DATA: + case EFI_CONVENTIONAL_MEMORY: + case EFI_PERSISTENT_MEMORY: + if (memblock_is_map_memory(phys) || + !memblock_is_region_memory(phys, size)) { + pr_warn(FW_BUG "requested region covers kernel memory\n"); + return NULL; + } + + /* + * Mapping kernel memory is permitted if the region in + * question is covered by a single memblock with the + * NOMAP attribute set: this enables the use of ACPI + * table overrides passed via initramfs. + * This particular use case only requires read access. + */ + fallthrough; + + case EFI_RUNTIME_SERVICES_CODE: + /* + * This would be unusual, but not problematic per se, + * as long as we take care not to create a writable + * mapping for executable code. + */ + prot = PAGE_KERNEL_RO; + break; + + case EFI_ACPI_RECLAIM_MEMORY: + /* + * ACPI reclaim memory is used to pass firmware tables + * and other data that is intended for consumption by + * the OS only, which may decide it wants to reclaim + * that memory and use it for something else. We never + * do that, but we usually add it to the linear map + * anyway, in which case we should use the existing + * mapping. + */ + if (memblock_is_map_memory(phys)) + return (void __iomem *)__va(phys); + fallthrough; + + default: + if (region->attribute & EFI_MEMORY_WB) + prot = PAGE_KERNEL; + else if ((region->attribute & EFI_MEMORY_WC) || + (region->attribute & EFI_MEMORY_WT)) + prot = pgprot_writecombine(PAGE_KERNEL); + } + } + + return ioremap_prot(phys, size, pgprot_val(prot)); } #ifdef CONFIG_PCI From patchwork Wed Sep 27 17:00:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13401432 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4257EE82CB3 for ; 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Wed, 27 Sep 2023 10:00:33 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.190.42]) by smtp.gmail.com with ESMTPSA id u7-20020a637907000000b00584b293d157sm3279396pgc.80.2023.09.27.10.00.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Sep 2023 10:00:32 -0700 (PDT) From: Sunil V L To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 -next 2/4] RISC-V: ACPI: RHCT: Add function to get CBO block sizes Date: Wed, 27 Sep 2023 22:30:13 +0530 Message-Id: <20230927170015.295232-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230927170015.295232-1-sunilvl@ventanamicro.com> References: <20230927170015.295232-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230927_100037_485812_F3522764 X-CRM114-Status: GOOD ( 17.10 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , Albert Ou , Alexandre Ghiti , "Rafael J . Wysocki" , Daniel Lezcano , Atish Kumar Patra , Andy Shevchenko , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Andrew Jones , Ard Biesheuvel , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Cache Block Operation (CBO) related block size in ACPI is provided by RHCT. Add support to read the CMO node in RHCT to get this information. Signed-off-by: Sunil V L --- arch/riscv/include/asm/acpi.h | 9 +++++ drivers/acpi/riscv/rhct.c | 72 ++++++++++++++++++++++++++++++++++- 2 files changed, 80 insertions(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h index d5604d2073bc..0c4e8b35103e 100644 --- a/arch/riscv/include/asm/acpi.h +++ b/arch/riscv/include/asm/acpi.h @@ -66,6 +66,8 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const char **isa); static inline int acpi_numa_get_nid(unsigned int cpu) { return NUMA_NO_NODE; } +int acpi_get_cbo_block_size(struct acpi_table_header *table, unsigned int cpu, u32 *cbom_size, + u32 *cboz_size, u32 *cbop_size); #else static inline void acpi_init_rintc_map(void) { } static inline struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu) @@ -79,6 +81,13 @@ static inline int acpi_get_riscv_isa(struct acpi_table_header *table, return -EINVAL; } +static inline int acpi_get_cbo_block_size(struct acpi_table_header *table, + unsigned int cpu, u32 *cbom_size, + u32 *cboz_size, u32 *cbop_size) +{ + return -EINVAL; +} + #endif /* CONFIG_ACPI */ #endif /*_ASM_ACPI_H*/ diff --git a/drivers/acpi/riscv/rhct.c b/drivers/acpi/riscv/rhct.c index b280b3e9c7d9..9042949277f8 100644 --- a/drivers/acpi/riscv/rhct.c +++ b/drivers/acpi/riscv/rhct.c @@ -8,6 +8,7 @@ #define pr_fmt(fmt) "ACPI: RHCT: " fmt #include +#include static struct acpi_table_header *acpi_get_rhct(void) { @@ -56,7 +57,6 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const } end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length); - for (node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset); node < end; node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length)) { @@ -81,3 +81,73 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, unsigned int cpu, const return -1; } + +/* + * During early boot, the caller should call acpi_get_table() and pass its pointer to + * these functions(and free up later). At run time, since this table can be used + * multiple times, pass NULL so that the table remains in memory + */ +int acpi_get_cbo_block_size(struct acpi_table_header *table, unsigned int cpu, + u32 *cbom_size, u32 *cboz_size, u32 *cbop_size) +{ + struct acpi_rhct_node_header *node, *ref_node, *end; + u32 size_hdr = sizeof(struct acpi_rhct_node_header); + u32 size_hartinfo = sizeof(struct acpi_rhct_hart_info); + struct acpi_rhct_hart_info *hart_info; + struct acpi_rhct_cmo_node *cmo_node; + struct acpi_table_rhct *rhct; + u32 *hart_info_node_offset; + u32 acpi_cpu_id = get_acpi_id_for_cpu(cpu); + + BUG_ON(acpi_disabled); + + if (table) { + rhct = (struct acpi_table_rhct *)table; + } else { + rhct = (struct acpi_table_rhct *)acpi_get_rhct(); + if (!rhct) + return -ENOENT; + } + + end = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->header.length); + for (node = ACPI_ADD_PTR(struct acpi_rhct_node_header, rhct, rhct->node_offset); + node < end; + node = ACPI_ADD_PTR(struct acpi_rhct_node_header, node, node->length)) { + if (node->type == ACPI_RHCT_NODE_TYPE_HART_INFO) { + hart_info = ACPI_ADD_PTR(struct acpi_rhct_hart_info, node, size_hdr); + hart_info_node_offset = ACPI_ADD_PTR(u32, hart_info, size_hartinfo); + if (acpi_cpu_id != hart_info->uid) + continue; + + for (int i = 0; i < hart_info->num_offsets; i++) { + ref_node = ACPI_ADD_PTR(struct acpi_rhct_node_header, + rhct, hart_info_node_offset[i]); + if (ref_node->type == ACPI_RHCT_NODE_TYPE_CMO) { + cmo_node = ACPI_ADD_PTR(struct acpi_rhct_cmo_node, + ref_node, size_hdr); + if (cbom_size && cmo_node->cbom_size <= 30) + *cbom_size = BIT(cmo_node->cbom_size); + + if (cboz_size && cmo_node->cboz_size <= 30) + *cboz_size = BIT(cmo_node->cboz_size); + + if (cbop_size && cmo_node->cbop_size <= 30) + *cbop_size = BIT(cmo_node->cbop_size); + + return 0; + } + } + } + } + + if (cbom_size) + *cbom_size = 0; + + if (cboz_size) + *cboz_size = 0; + + if (cbop_size) + *cbop_size = 0; + + return -ENOENT; +} From patchwork Wed Sep 27 17:00:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13401434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1051DE82CAE for ; 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Wysocki" , Daniel Lezcano , Atish Kumar Patra , Andy Shevchenko , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Andrew Jones , Ard Biesheuvel , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Using new interface to get the CBO block size information in RHCT, initialize the variables on ACPI platforms. Signed-off-by: Sunil V L Reviewed-by: Conor Dooley --- arch/riscv/mm/cacheflush.c | 37 +++++++++++++++++++++++++++++++------ 1 file changed, 31 insertions(+), 6 deletions(-) diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c index f1387272a551..8e59644e473c 100644 --- a/arch/riscv/mm/cacheflush.c +++ b/arch/riscv/mm/cacheflush.c @@ -3,7 +3,9 @@ * Copyright (C) 2017 SiFive */ +#include #include +#include #include #ifdef CONFIG_SMP @@ -124,15 +126,38 @@ void __init riscv_init_cbo_blocksizes(void) unsigned long cbom_hartid, cboz_hartid; u32 cbom_block_size = 0, cboz_block_size = 0; struct device_node *node; + struct acpi_table_header *rhct; + acpi_status status; + unsigned int cpu; + + if (!acpi_disabled) { + status = acpi_get_table(ACPI_SIG_RHCT, 0, &rhct); + if (ACPI_FAILURE(status)) + return; + } - for_each_of_cpu_node(node) { - /* set block-size for cbom and/or cboz extension if available */ - cbo_get_block_size(node, "riscv,cbom-block-size", - &cbom_block_size, &cbom_hartid); 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Wed, 27 Sep 2023 10:00:43 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.190.42]) by smtp.gmail.com with ESMTPSA id u7-20020a637907000000b00584b293d157sm3279396pgc.80.2023.09.27.10.00.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Sep 2023 10:00:42 -0700 (PDT) From: Sunil V L To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 -next 4/4] clocksource/timer-riscv: ACPI: Add timer_cannot_wakeup_cpu Date: Wed, 27 Sep 2023 22:30:15 +0530 Message-Id: <20230927170015.295232-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230927170015.295232-1-sunilvl@ventanamicro.com> References: <20230927170015.295232-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230927_100045_846081_035208DB X-CRM114-Status: UNSURE ( 9.73 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anup Patel , Albert Ou , Alexandre Ghiti , "Rafael J . Wysocki" , Daniel Lezcano , Atish Kumar Patra , Andy Shevchenko , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner , Andrew Jones , Ard Biesheuvel , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The timer capability to wakeup the cpu irrespective of its idle state is provided by the flag in RHCT. Update the timer code to set this flag. Signed-off-by: Sunil V L Reviewed-by: Samuel Holland Reviewed-by: Conor Dooley Reviewed-by: Andrew Jones --- drivers/clocksource/timer-riscv.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 9c8f3e2decc2..06f5bad3c3e0 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -225,6 +225,10 @@ TIMER_OF_DECLARE(riscv_timer, "riscv", riscv_timer_init_dt); #ifdef CONFIG_ACPI static int __init riscv_timer_acpi_init(struct acpi_table_header *table) { + struct acpi_table_rhct *rhct = (struct acpi_table_rhct *)table; + + riscv_timer_cannot_wake_cpu = rhct->flags & ACPI_RHCT_TIMER_CANNOT_WAKEUP_CPU; + return riscv_timer_init_common(); }