From patchwork Thu Sep 28 13:00:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 13402982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2E0D8E732CA for ; Thu, 28 Sep 2023 13:00:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7A87B10E18A; Thu, 28 Sep 2023 13:00:27 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id AB22D10E18A; Thu, 28 Sep 2023 13:00:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; 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28 Sep 2023 06:00:23 -0700 From: Nirmoy Das To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 15:00:12 +0200 Message-ID: <20230928130015.6758-1-nirmoy.das@intel.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 Organization: Intel Deutschland GmbH, Registered Address: Am Campeon 10, 85579 Neubiberg, Germany, Commercial Register: Amtsgericht Muenchen HRB 186928 Subject: [Intel-gfx] [PATCH v7 1/4] drm/i915: Introduce intel_gt_mcr_lock_sanitize() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: matthew.d.roper@intel.com, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Implement intel_gt_mcr_lock_sanitize() to provide a mechanism for cleaning the steer semaphore when absolutely necessary. v2: remove unnecessary lock(Andi, Matt) improve the kernel doc(Matt) s/intel_gt_mcr_lock_clear/intel_gt_mcr_lock_sanitize Signed-off-by: Nirmoy Das Reviewed-by: Andi Shyti Reviewed-by: Matt Roper Reviewed-by: Andrzej Hajda --- drivers/gpu/drm/i915/gt/intel_gt_mcr.c | 22 ++++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_gt_mcr.h | 1 + 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c index bf4a933de03a..326c2ed1d99b 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.c @@ -419,6 +419,28 @@ void intel_gt_mcr_unlock(struct intel_gt *gt, unsigned long flags) intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); } +/** + * intel_gt_mcr_lock_sanitize - Sanitize MCR steering lock + * @gt: GT structure + * + * This will be used to sanitize the initial status of the hardware lock + * during driver load and resume since there won't be any concurrent access + * from other agents at those times, but it's possible that boot firmware + * may have left the lock in a bad state. + * + */ +void intel_gt_mcr_lock_sanitize(struct intel_gt *gt) +{ + /* + * This gets called at load/resume time, so we shouldn't be + * racing with other driver threads grabbing the mcr lock. + */ + lockdep_assert_not_held(>->mcr_lock); + + if (GRAPHICS_VER_FULL(gt->i915) >= IP_VER(12, 70)) + intel_uncore_write_fw(gt->uncore, MTL_STEER_SEMAPHORE, 0x1); +} + /** * intel_gt_mcr_read - read a specific instance of an MCR register * @gt: GT structure diff --git a/drivers/gpu/drm/i915/gt/intel_gt_mcr.h b/drivers/gpu/drm/i915/gt/intel_gt_mcr.h index 41684495b7da..01ac565a56a4 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_mcr.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_mcr.h @@ -11,6 +11,7 @@ void intel_gt_mcr_init(struct intel_gt *gt); void intel_gt_mcr_lock(struct intel_gt *gt, unsigned long *flags); void intel_gt_mcr_unlock(struct intel_gt *gt, unsigned long flags); +void intel_gt_mcr_lock_sanitize(struct intel_gt *gt); u32 intel_gt_mcr_read(struct intel_gt *gt, i915_mcr_reg_t reg, From patchwork Thu Sep 28 13:00:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 13402983 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF8E1E732CA for ; Thu, 28 Sep 2023 13:00:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CBD8D10E641; Thu, 28 Sep 2023 13:00:30 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5E59410E18A; Thu, 28 Sep 2023 13:00:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695906026; x=1727442026; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nHwNiMu5Fc7CG6ZQdftjQu4SuYpnxtML6Q/gKnQj8oA=; b=SC5KHVEa0ZTGxSkG+r+ENoYOVrBuulJw0EoezWwBwAEV34sS6x3lJ4xN gMUnAHMyL6CSegmrDqmTjCQiC5Q/JqwY6q7VXtaT1/VQfDbTAbjWZS9Mo Be7q/7a6Wzc4l9AX4dASPjbS/E8FACMToKROKMpE3+9Mvvyg3KhlZc53i Y7a0UwWHNWVpEPCjt0aS3oM06T6JmsbkUKNkvFQnmaUOA7TvSsWyotUVH uDs5GTWA30XXGn4cIVrI9tu+qqhE5ClVTjHEKGN5zky5vZRiMcPxUiPIS dY3MaVUcnxeSbb86/j5oA+1gJIXyJWDOSoulCaKW83DqTVcgF70YkitNK Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="380925489" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="380925489" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 06:00:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="865247781" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="865247781" Received: from nirmoyda-desk.igk.intel.com ([10.102.138.190]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 06:00:24 -0700 From: Nirmoy Das To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 15:00:13 +0200 Message-ID: <20230928130015.6758-2-nirmoy.das@intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230928130015.6758-1-nirmoy.das@intel.com> References: <20230928130015.6758-1-nirmoy.das@intel.com> MIME-Version: 1.0 Organization: Intel Deutschland GmbH, Registered Address: Am Campeon 10, 85579 Neubiberg, Germany, Commercial Register: Amtsgericht Muenchen HRB 186928 Subject: [Intel-gfx] [PATCH v7 2/4] drm/i915: Introduce the intel_gt_resume_early() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: matthew.d.roper@intel.com, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move early resume functions of gt to a proper file. Signed-off-by: Nirmoy Das Reviewed-by: Andi Shyti Reviewed-by: Andrzej Hajda --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 6 ++++++ drivers/gpu/drm/i915/gt/intel_gt_pm.h | 1 + drivers/gpu/drm/i915/i915_driver.c | 6 ++---- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c index 5a942af0a14e..dab73980c9f1 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c @@ -216,6 +216,12 @@ void intel_gt_pm_fini(struct intel_gt *gt) intel_rc6_fini(>->rc6); } +void intel_gt_resume_early(struct intel_gt *gt) +{ + intel_uncore_resume_early(gt->uncore); + intel_gt_check_and_clear_faults(gt); +} + int intel_gt_resume(struct intel_gt *gt) { struct intel_engine_cs *engine; diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h index 6c9a46452364..b1eeb5b33918 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h @@ -78,6 +78,7 @@ void intel_gt_pm_fini(struct intel_gt *gt); void intel_gt_suspend_prepare(struct intel_gt *gt); void intel_gt_suspend_late(struct intel_gt *gt); int intel_gt_resume(struct intel_gt *gt); +void intel_gt_resume_early(struct intel_gt *gt); void intel_gt_runtime_suspend(struct intel_gt *gt); int intel_gt_runtime_resume(struct intel_gt *gt); diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index d50347e5773a..78501a83ba10 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -1327,10 +1327,8 @@ static int i915_drm_resume_early(struct drm_device *dev) drm_err(&dev_priv->drm, "Resume prepare failed: %d, continuing anyway\n", ret); - for_each_gt(gt, dev_priv, i) { - intel_uncore_resume_early(gt->uncore); - intel_gt_check_and_clear_faults(gt); - } + for_each_gt(gt, dev_priv, i) + intel_gt_resume_early(gt); intel_display_power_resume_early(dev_priv); From patchwork Thu Sep 28 13:00:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 13402984 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EA1C9E732CC for ; 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a="380925498" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="380925498" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 06:00:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="865247789" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="865247789" Received: from nirmoyda-desk.igk.intel.com ([10.102.138.190]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 06:00:26 -0700 From: Nirmoy Das To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 15:00:14 +0200 Message-ID: <20230928130015.6758-3-nirmoy.das@intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230928130015.6758-1-nirmoy.das@intel.com> References: <20230928130015.6758-1-nirmoy.das@intel.com> MIME-Version: 1.0 Organization: Intel Deutschland GmbH, Registered Address: Am Campeon 10, 85579 Neubiberg, Germany, Commercial Register: Amtsgericht Muenchen HRB 186928 Subject: [Intel-gfx] [PATCH v7 3/4] drm/i915: Clean steer semaphore on resume X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: matthew.d.roper@intel.com, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" During resume, the steer semaphore on GT1 was observed to be held. The hardware team has confirmed the safety of clearing steer semaphores for all GTs during driver load/resume, as no lock acquisitions can occur in this process by other agents. v2: reset on resume not in intel_gt_init(). v3: do the reset on intel_gt_resume_early() v4: do general sanitization for all GTs(Matt) Signed-off-by: Nirmoy Das Reviewed-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c index dab73980c9f1..3461f3e74277 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c @@ -13,6 +13,7 @@ #include "intel_engine_pm.h" #include "intel_gt.h" #include "intel_gt_clock_utils.h" +#include "intel_gt_mcr.h" #include "intel_gt_pm.h" #include "intel_gt_print.h" #include "intel_gt_requests.h" @@ -218,6 +219,15 @@ void intel_gt_pm_fini(struct intel_gt *gt) void intel_gt_resume_early(struct intel_gt *gt) { + /* + * Sanitize steer semaphores during driver resume. This is necessary + * to address observed cases of steer semaphores being + * held after a suspend operation. Confirmation from the hardware team + * assures the safety of this operation, as no lock acquisitions + * by other agents occur during driver load/resume process. + */ + intel_gt_mcr_lock_sanitize(gt); + intel_uncore_resume_early(gt->uncore); intel_gt_check_and_clear_faults(gt); } From patchwork Thu Sep 28 13:00:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nirmoy Das X-Patchwork-Id: 13402985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 14E9EE732C8 for ; Thu, 28 Sep 2023 13:00:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6642910E645; Thu, 28 Sep 2023 13:00:31 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by gabe.freedesktop.org (Postfix) with ESMTPS id A859410E641; Thu, 28 Sep 2023 13:00:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695906029; x=1727442029; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yVYOjD16lPxS35jtyj3M+NlpDlByKS0O7iJodZZ3QME=; b=D58QlLxnZR1eSzv7XXQWv+oDk+GllzoM60f13IQxIk0elcw//dU/3R6I K6pbJtzKKq8QROoW7ZTKVMYozLeL3qRUL1oG6UkKnVQFRQUn8T9mDSBUc aXkICh/bNi45Lq/SjTj71cZIR4SG7wsK+2kmKnH/GK3uSYrD9IqU2Ugfl UHPhPQ70/O0yuUJrKY9xi9dldQ8h+Jp2DVaANC8UUCcAxCw4i5LwimnOI cvGncK5YJ4p0ai8hYsaJ4bjjcm//njoZzKg01bNTi2j4YG+ZyyR9Md/PI lZLRAnQSSCl90/Z8QEHKCflsRovMK+uMWT0f1cTlBEbQhf3RbdHzzqKQm g==; X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="380925510" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="380925510" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 06:00:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10846"; a="865247807" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="865247807" Received: from nirmoyda-desk.igk.intel.com ([10.102.138.190]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 06:00:27 -0700 From: Nirmoy Das To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 15:00:15 +0200 Message-ID: <20230928130015.6758-4-nirmoy.das@intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230928130015.6758-1-nirmoy.das@intel.com> References: <20230928130015.6758-1-nirmoy.das@intel.com> MIME-Version: 1.0 Organization: Intel Deutschland GmbH, Registered Address: Am Campeon 10, 85579 Neubiberg, Germany, Commercial Register: Amtsgericht Muenchen HRB 186928 Subject: [Intel-gfx] [PATCH v7 4/4] drm/i915/mtl: Skip MCR ops for ring fault register X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrzej Hajda , matthew.d.roper@intel.com, dri-devel@lists.freedesktop.org, Nirmoy Das Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" On MTL GEN12_RING_FAULT_REG is not replicated so don't do mcr based operation for this register. v2: use MEDIA_VER() instead of GRAPHICS_VER()(Matt). v3: s/"MEDIA_VER(i915) == 13"/"MEDIA_VER(i915) >= 13"(Matt) improve comment. v4: improve the comment further(Andi) Signed-off-by: Nirmoy Das Reviewed-by: Matt Roper Reviewed-by: Andi Shyti Reviewed-by: Andrzej Hajda --- drivers/gpu/drm/i915/gt/intel_gt.c | 13 ++++++++++++- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 + drivers/gpu/drm/i915/i915_gpu_error.c | 11 ++++++++++- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 93062c35e072..dff8bba1f5d4 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -262,10 +262,21 @@ intel_gt_clear_error_registers(struct intel_gt *gt, I915_MASTER_ERROR_INTERRUPT); } - if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) { + /* + * For the media GT, this ring fault register is not replicated, + * so don't do multicast/replicated register read/write operation on it. + */ + if (MEDIA_VER(i915) >= 13 && gt->type == GT_MEDIA) { + intel_uncore_rmw(uncore, XELPMP_RING_FAULT_REG, + RING_FAULT_VALID, 0); + intel_uncore_posting_read(uncore, + XELPMP_RING_FAULT_REG); + + } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) { intel_gt_mcr_multicast_rmw(gt, XEHP_RING_FAULT_REG, RING_FAULT_VALID, 0); intel_gt_mcr_read_any(gt, XEHP_RING_FAULT_REG); + } else if (GRAPHICS_VER(i915) >= 12) { intel_uncore_rmw(uncore, GEN12_RING_FAULT_REG, RING_FAULT_VALID, 0); intel_uncore_posting_read(uncore, GEN12_RING_FAULT_REG); diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index cca4bac8f8b0..eecd0a87a647 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -1084,6 +1084,7 @@ #define GEN12_RING_FAULT_REG _MMIO(0xcec4) #define XEHP_RING_FAULT_REG MCR_REG(0xcec4) +#define XELPMP_RING_FAULT_REG _MMIO(0xcec4) #define GEN8_RING_FAULT_ENGINE_ID(x) (((x) >> 12) & 0x7) #define RING_FAULT_GTTSEL_MASK (1 << 11) #define RING_FAULT_SRCID(x) (((x) >> 3) & 0xff) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index f4ebcfb70289..b4e31e59c799 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -1234,7 +1234,16 @@ static void engine_record_registers(struct intel_engine_coredump *ee) if (GRAPHICS_VER(i915) >= 6) { ee->rc_psmi = ENGINE_READ(engine, RING_PSMI_CTL); - if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) + /* + * For the media GT, this ring fault register is not replicated, + * so don't do multicast/replicated register read/write + * operation on it. + */ + if (MEDIA_VER(i915) >= 13 && engine->gt->type == GT_MEDIA) + ee->fault_reg = intel_uncore_read(engine->uncore, + XELPMP_RING_FAULT_REG); + + else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) ee->fault_reg = intel_gt_mcr_read_any(engine->gt, XEHP_RING_FAULT_REG); else if (GRAPHICS_VER(i915) >= 12)