From patchwork Thu Sep 28 18:08:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403427 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0D8CE732FD for ; Thu, 28 Sep 2023 18:09:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DB32910E6A3; Thu, 28 Sep 2023 18:09:12 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0E14710E6A3 for ; Thu, 28 Sep 2023 18:09:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924551; x=1727460551; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=a8CJF7+9kodHPFYtKad+qE0Cf3dj9nd8ebnqVLRSvsI=; b=WXCAyspowIDy+Aq5F3epbrxmPEBNN5+jGiazwlOvsPmvIDkFublTYg+h VcCkij2uZKA18cccRl0gHgy92Pf2O8ygr/shiTQbBpiEyqn1kaswZCwwZ CmuTl6FlhZUTvKp3D9dggxvwZ0/fw25RwokVlyr4Ii8e/exF9X6muXap0 J4eS5X/bcjuSFhvE7UgVBxaJU3afrPfYtZYXIRJrM94H6kdcMKwM4TFh6 vM84o5H09OmnwfGEzw724W0KGyw1BnfnVgpoI4INXrEoMtrk3cuwuqc7x S9f8fJ4O1pmTTH9QHD+9UUwnUpmyNmG2igFJFOqN3MJpggvKpo49y7wcw g==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="362377533" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="362377533" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="726329177" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="726329177" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:08 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:45 +0300 Message-Id: <863993fa404a80eff254f339f037f9866a533124.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 01/15] drm/i915: stop including i915_utils.h from intel_runtime_pm.h X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Remove an unnecessary include. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/intel_runtime_pm.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.h b/drivers/gpu/drm/i915/intel_runtime_pm.h index f79cda7a2503..be43614c73fd 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.h +++ b/drivers/gpu/drm/i915/intel_runtime_pm.h @@ -11,8 +11,6 @@ #include "intel_wakeref.h" -#include "i915_utils.h" - struct device; struct drm_i915_private; struct drm_printer; From patchwork Thu Sep 28 18:08:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43879CE7B06 for ; Thu, 28 Sep 2023 18:09:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A73C410E6A7; Thu, 28 Sep 2023 18:09:16 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id CB80D10E6A6 for ; Thu, 28 Sep 2023 18:09:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924553; x=1727460553; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oeuhAazVj8sHDsFiJ+7yYXP6Qe7ACvYZK5wjI/0c4Xg=; b=bdcgaUW++7u1H8k2Qk/abC/8JTadPhBsxoszekqKT/bzDlom5CfCsbJG gmauPgZwzjE97p0Q/T8r/kK3ApljjUA6G/P0oKAxkNwjkD8/nK6D8Rktt vCHK6gffwxCxMXy388ynJXvKDI33U6FPRagdWzA8DqUsDkcBuShfIzADh enX8ansyNb7OLwLNT5FmShgKLm77ZZjAX/hBA19R/t//Z/+sd3umA3DN1 YOE1e1SJWc/+1gE+WRph1LuahktXoIC9hi7awRDB4JIxuT3SYoRQkwFUf knKk/jwK4ocTPSiz01ePvDv78zJvNb8eLMSGRbMwIauC2R3wUr/8Y0Gw9 g==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="362377541" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="362377541" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="726329187" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="726329187" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:12 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:46 +0300 Message-Id: <406b3f78371d1f2d703b0908ad613bf3fe723a2b.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 02/15] drm/i915/mocs: use to_gt() instead of direct &i915->gt X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Have to give up the const on i915 pointer, but it's not big of a deal considering non-const i915 gets passed all over the place. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gt/intel_mocs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c b/drivers/gpu/drm/i915/gt/intel_mocs.c index 07269ff3be13..353f93baaca0 100644 --- a/drivers/gpu/drm/i915/gt/intel_mocs.c +++ b/drivers/gpu/drm/i915/gt/intel_mocs.c @@ -487,7 +487,7 @@ static bool has_mocs(const struct drm_i915_private *i915) return !IS_DGFX(i915); } -static unsigned int get_mocs_settings(const struct drm_i915_private *i915, +static unsigned int get_mocs_settings(struct drm_i915_private *i915, struct drm_i915_mocs_table *table) { unsigned int flags; @@ -495,7 +495,7 @@ static unsigned int get_mocs_settings(const struct drm_i915_private *i915, memset(table, 0, sizeof(struct drm_i915_mocs_table)); table->unused_entries_index = I915_MOCS_PTE; - if (IS_GFX_GT_IP_RANGE(&i915->gt0, IP_VER(12, 70), IP_VER(12, 71))) { + if (IS_GFX_GT_IP_RANGE(to_gt(i915), IP_VER(12, 70), IP_VER(12, 71))) { table->size = ARRAY_SIZE(mtl_mocs_table); table->table = mtl_mocs_table; table->n_entries = MTL_NUM_MOCS_ENTRIES; From patchwork Thu Sep 28 18:08:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403431 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 528F8CE7AFC for ; Thu, 28 Sep 2023 18:09:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C1B7610E6AA; Thu, 28 Sep 2023 18:09:30 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1B86C10E6AC for ; Thu, 28 Sep 2023 18:09:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924569; x=1727460569; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BohJjcvjD9Q5pBHZ/MWh4TlMiXkuqMvtN9BJAl15eMw=; b=db9kygfKFIrlR0WBNB5+Jt5tc1RBuw/Ge8ruKSIoIH0BqTM/xU0/mjWW Q1VN/nrtajwfKjkiG3xv2yUiSRhNf5r6X7Mqt3DRC8Dekp4clnMfEX6rM v6gzt3NGQscJSjqPa0gVe8MkXtnCqIRs2s+xkBvMghfDxL6WtWeY9SJlB WBcN2CxeXNtkAXwaKG6iQEaS62PpiaoYznWVhQL4YFU1uvIwe4gGJlJrM AxT9SNGufdNePFkXFqYWxTQFkqU+fQCbtlLCuO/kBHFU8kNfLl4KVm68C J0CocxkPuKqiFMc4veipqJDp7ai7zUVpui34pLuVoy1/fkfw2z1UjVmFb w==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="384949709" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="384949709" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:17 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="873357030" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="873357030" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:16 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:47 +0300 Message-Id: <041985878569233606f54a5a59e145afcc631250.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 03/15] drm/i915: allocate i915->gt0 dynamically X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Convert i915->gt0 to a pointer, and allocate it dynamically. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gt/intel_gt.c | 8 +++++++- drivers/gpu/drm/i915/i915_drv.h | 8 ++++---- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 93062c35e072..a3d68ff4b191 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -62,7 +62,13 @@ void intel_gt_common_init_early(struct intel_gt *gt) /* Preliminary initialization of Tile 0 */ int intel_root_gt_init_early(struct drm_i915_private *i915) { - struct intel_gt *gt = to_gt(i915); + struct intel_gt *gt; + + gt = drmm_kzalloc(&i915->drm, sizeof(*gt), GFP_KERNEL); + if (!gt) + return -ENOMEM; + + i915->gt0 = gt; gt->i915 = i915; gt->uncore = &i915->uncore; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 511eba3bbdba..a1cb16afa46d 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -318,10 +318,10 @@ struct drm_i915_private { struct i915_hwmon *hwmon; /* Abstract the submission mechanism (legacy ringbuffer or execlists) away */ - struct intel_gt gt0; + struct intel_gt *gt0; /* - * i915->gt[0] == &i915->gt0 + * i915->gt[0] == i915->gt0 */ struct intel_gt *gt[I915_MAX_GT]; @@ -382,9 +382,9 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) return pci_get_drvdata(pdev); } -static inline struct intel_gt *to_gt(struct drm_i915_private *i915) +static inline struct intel_gt *to_gt(const struct drm_i915_private *i915) { - return &i915->gt0; + return i915->gt0; } /* Simple iterator over all initialised engines */ From patchwork Thu Sep 28 18:08:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403429 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20BD0E732FD for ; Thu, 28 Sep 2023 18:09:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 572B410E6A9; Thu, 28 Sep 2023 18:09:24 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7703A10E6A6 for ; Thu, 28 Sep 2023 18:09:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924561; x=1727460561; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=msAhIIuqVVDStwls8atUU1cp95E1POInlRf+6ObJwbQ=; b=ESh8fY2sXGgGrbsq1sjQ6sS60FSK5oYY5UF7aWoZ+cIBsxRTvw+AvtH4 C+AMdLjvPO/g1yKFVOpst1XRLGFDqhuTq8Qu/9mo36ax/7XrvNcQtFnyM sdiQvBB48L56Sfk7OGDbHjZFmtnW6WjEGrXXUhHn3dCJyQATGT2hraQSO pY1YBDr+rvP2qZ999h80XDbiS2nJ9TU52YHXyJLQpcCJOitLq1DJhUCII ijH99iAMgd8rA5b27j3pE1z97mLVKElcLToKIHMqvBS467B6XryrT1eOC J8bmtqb40u1aCjMnWfbHHY+/jNQdpGJ7DfJ7O8j8CYiooJtbSQyufzPuZ w==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="362377550" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="362377550" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="726329207" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="726329207" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:19 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:48 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 04/15] drm/i915/gt: remove i915->gt0 in favour of i915->gt[0] X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Since gt0 == i915->gt[0], just drop the former. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gt/intel_gt.c | 4 +--- drivers/gpu/drm/i915/i915_drv.h | 8 +------- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 1 - 3 files changed, 2 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index a3d68ff4b191..bb6c3f68f7d2 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -68,7 +68,7 @@ int intel_root_gt_init_early(struct drm_i915_private *i915) if (!gt) return -ENOMEM; - i915->gt0 = gt; + i915->gt[0] = gt; gt->i915 = i915; gt->uncore = &i915->uncore; @@ -917,8 +917,6 @@ int intel_gt_probe_all(struct drm_i915_private *i915) if (ret) return ret; - i915->gt[0] = gt; - if (!HAS_EXTRA_GT_LIST(i915)) return 0; diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a1cb16afa46d..d04a9c32c44f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -317,12 +317,6 @@ struct drm_i915_private { struct i915_hwmon *hwmon; - /* Abstract the submission mechanism (legacy ringbuffer or execlists) away */ - struct intel_gt *gt0; - - /* - * i915->gt[0] == i915->gt0 - */ struct intel_gt *gt[I915_MAX_GT]; struct kobject *sysfs_gt; @@ -384,7 +378,7 @@ static inline struct drm_i915_private *pdev_to_i915(struct pci_dev *pdev) static inline struct intel_gt *to_gt(const struct drm_i915_private *i915) { - return i915->gt0; + return i915->gt[0]; } /* Simple iterator over all initialised engines */ diff --git a/drivers/gpu/drm/i915/selftests/mock_gem_device.c b/drivers/gpu/drm/i915/selftests/mock_gem_device.c index 7de6477803f8..af349fd9abc2 100644 --- a/drivers/gpu/drm/i915/selftests/mock_gem_device.c +++ b/drivers/gpu/drm/i915/selftests/mock_gem_device.c @@ -114,7 +114,6 @@ static struct dev_pm_domain pm_domain = { static void mock_gt_probe(struct drm_i915_private *i915) { - i915->gt[0] = to_gt(i915); i915->gt[0]->name = "Mock GT"; } From patchwork Thu Sep 28 18:08:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403430 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D804CE7B06 for ; Thu, 28 Sep 2023 18:09:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DC57410E6A6; Thu, 28 Sep 2023 18:09:26 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id B5AE010E6AA for ; Thu, 28 Sep 2023 18:09:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924564; x=1727460564; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dhFM97YNeGstLbvO0u7Q3H8IAKcIh3k5EyyderI7EF0=; b=XJC+HUZeJfH53TMjiSpDY8MS52dC2CZjEutWIvEdHLD92BQdTRolLVkz kcNOF2icFmoS6tuCKjwV2x5qvf93pK5b0+VHdvoK0V47b0PT9pobwoibH Dzvhc7VzfR877W6yRhMyKqFn/lIKUVQT4JVig9TY/I6ijh01bHpVglO40 xdHVmMv+nyFoPktcSi0iZQbW/QA02FtnP1L3DV3kAfILt0lEGCkOkS5No Z1gSSgX6oL6qmJtTFmXPEi63xQFJYqxcX9MasWiYIPJgbZ+Aqyp+NBd2j NfaYRVeP4p+BN5NmVRg8QaL9N45YzJ1Yf75g/VSlEVxkik5n6S+qfjJ6u Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="362377560" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="362377560" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:24 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="726329276" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="726329276" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:23 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:49 +0300 Message-Id: <6ffd12c726ddc10d9da8e5ef7f796752f8e05685.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 05/15] drm/i915: make some error capture functions static X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Not needed outside of i915_gpu_error.c. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_gpu_error.c | 8 ++++---- drivers/gpu/drm/i915/i915_gpu_error.h | 5 ----- 2 files changed, 4 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index f4ebcfb70289..767687821f7a 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -520,7 +520,7 @@ __find_vma(struct i915_vma_coredump *vma, const char *name) return NULL; } -struct i915_vma_coredump * +static struct i915_vma_coredump * intel_gpu_error_find_batch(const struct intel_engine_coredump *ee) { return __find_vma(ee->vma, "batch"); @@ -609,9 +609,9 @@ void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...) va_end(args); } -void intel_gpu_error_print_vma(struct drm_i915_error_state_buf *m, - const struct intel_engine_cs *engine, - const struct i915_vma_coredump *vma) +static void intel_gpu_error_print_vma(struct drm_i915_error_state_buf *m, + const struct intel_engine_cs *engine, + const struct i915_vma_coredump *vma) { char out[ASCII85_BUFSZ]; struct page *page; diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index 9f5971f5e980..c982b162b7ff 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -275,11 +275,6 @@ static inline void intel_klog_error_capture(struct intel_gt *gt, __printf(2, 3) void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...); -void intel_gpu_error_print_vma(struct drm_i915_error_state_buf *m, - const struct intel_engine_cs *engine, - const struct i915_vma_coredump *vma); -struct i915_vma_coredump * -intel_gpu_error_find_batch(const struct intel_engine_coredump *ee); struct i915_gpu_coredump *i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags); From patchwork Thu Sep 28 18:08:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403434 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99834E732FD for ; Thu, 28 Sep 2023 18:09:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1160410E6AF; Thu, 28 Sep 2023 18:09:39 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTPS id A648310E6A8 for ; Thu, 28 Sep 2023 18:09:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924570; x=1727460570; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pFWH7S5kIvGwh8aMKp2xe46H9kyIo+r7jbIqFKM/fY0=; b=Cye48J3GbTo2VcphHUTbBGcmiwR+oneBKuaf5HKuVXIMRIW6w8mtvQpJ 3NAIYCskZInYaHbKn5lZR5TOEzlczxEEKYEPKfBp7/YeDqdAIRhkGDOEi nOeERIBlZqpW2LTlAGYh87i21BkB8aIpyEEPlm92Q8k27HPWdjfuArO9e cI6AAsUO2lhfvGc7h21abOT8JalOnKYvKK4CdQiAJP5HJChef6nKFAcAR 1EnIhQCYQsg9MFcyCBgvP3iTzF6BXJyYfxGBckvR6JqUgV1eJ5pIuK8w3 ystLk3kyfw3G2ayzo74yy5XxSSxFewCGFkqRn47ZXLyZdzUy6Ph/4f+jC g==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="384949737" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="384949737" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="873357070" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="873357070" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:26 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:50 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 06/15] drm/i915: move gpu error debugfs to i915_gpu_error.c X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hide gpu error specifics in i915_gpu_error.c. This is also cleaner wrt conditional compilation, as i915_gpu_error.c is only built with DRM_I915_CAPTURE_ERROR=y. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_debugfs.c | 108 +------------------------ drivers/gpu/drm/i915/i915_gpu_error.c | 111 +++++++++++++++++++++++++- drivers/gpu/drm/i915/i915_gpu_error.h | 8 +- 3 files changed, 119 insertions(+), 108 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index e9b79c2c37d8..beffac46a5e2 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -49,6 +49,7 @@ #include "i915_debugfs.h" #include "i915_debugfs_params.h" #include "i915_driver.h" +#include "i915_gpu_error.h" #include "i915_irq.h" #include "i915_reg.h" #include "i915_scheduler.h" @@ -297,107 +298,6 @@ static int i915_gem_object_info(struct seq_file *m, void *data) return 0; } -#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) -static ssize_t gpu_state_read(struct file *file, char __user *ubuf, - size_t count, loff_t *pos) -{ - struct i915_gpu_coredump *error; - ssize_t ret; - void *buf; - - error = file->private_data; - if (!error) - return 0; - - /* Bounce buffer required because of kernfs __user API convenience. */ - buf = kmalloc(count, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - ret = i915_gpu_coredump_copy_to_buffer(error, buf, *pos, count); - if (ret <= 0) - goto out; - - if (!copy_to_user(ubuf, buf, ret)) - *pos += ret; - else - ret = -EFAULT; - -out: - kfree(buf); - return ret; -} - -static int gpu_state_release(struct inode *inode, struct file *file) -{ - i915_gpu_coredump_put(file->private_data); - return 0; -} - -static int i915_gpu_info_open(struct inode *inode, struct file *file) -{ - struct drm_i915_private *i915 = inode->i_private; - struct i915_gpu_coredump *gpu; - intel_wakeref_t wakeref; - - gpu = NULL; - with_intel_runtime_pm(&i915->runtime_pm, wakeref) - gpu = i915_gpu_coredump(to_gt(i915), ALL_ENGINES, CORE_DUMP_FLAG_NONE); - - if (IS_ERR(gpu)) - return PTR_ERR(gpu); - - file->private_data = gpu; - return 0; -} - -static const struct file_operations i915_gpu_info_fops = { - .owner = THIS_MODULE, - .open = i915_gpu_info_open, - .read = gpu_state_read, - .llseek = default_llseek, - .release = gpu_state_release, -}; - -static ssize_t -i915_error_state_write(struct file *filp, - const char __user *ubuf, - size_t cnt, - loff_t *ppos) -{ - struct i915_gpu_coredump *error = filp->private_data; - - if (!error) - return 0; - - drm_dbg(&error->i915->drm, "Resetting error state\n"); - i915_reset_error_state(error->i915); - - return cnt; -} - -static int i915_error_state_open(struct inode *inode, struct file *file) -{ - struct i915_gpu_coredump *error; - - error = i915_first_error_state(inode->i_private); - if (IS_ERR(error)) - return PTR_ERR(error); - - file->private_data = error; - return 0; -} - -static const struct file_operations i915_error_state_fops = { - .owner = THIS_MODULE, - .open = i915_error_state_open, - .read = gpu_state_read, - .write = i915_error_state_write, - .llseek = default_llseek, - .release = gpu_state_release, -}; -#endif - static int i915_frequency_info(struct seq_file *m, void *unused) { struct drm_i915_private *i915 = node_to_i915(m->private); @@ -837,10 +737,6 @@ static const struct i915_debugfs_files { {"i915_perf_noa_delay", &i915_perf_noa_delay_fops}, {"i915_wedged", &i915_wedged_fops}, {"i915_gem_drop_caches", &i915_drop_caches_fops}, -#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) - {"i915_error_state", &i915_error_state_fops}, - {"i915_gpu_info", &i915_gpu_info_fops}, -#endif }; void i915_debugfs_register(struct drm_i915_private *dev_priv) @@ -863,4 +759,6 @@ void i915_debugfs_register(struct drm_i915_private *dev_priv) drm_debugfs_create_files(i915_debugfs_list, ARRAY_SIZE(i915_debugfs_list), minor->debugfs_root, minor); + + i915_gpu_error_debugfs_register(dev_priv); } diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 767687821f7a..71dacd6e5360 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -2128,7 +2128,7 @@ __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 du return error; } -struct i915_gpu_coredump * +static struct i915_gpu_coredump * i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags) { static DEFINE_MUTEX(capture_mutex); @@ -2366,3 +2366,112 @@ void intel_klog_error_capture(struct intel_gt *gt, drm_info(&i915->drm, "[Capture/%d.%d] Dumped %zd bytes\n", l_count, line++, pos_err); } #endif + +static ssize_t gpu_state_read(struct file *file, char __user *ubuf, + size_t count, loff_t *pos) +{ + struct i915_gpu_coredump *error; + ssize_t ret; + void *buf; + + error = file->private_data; + if (!error) + return 0; + + /* Bounce buffer required because of kernfs __user API convenience. */ + buf = kmalloc(count, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + ret = i915_gpu_coredump_copy_to_buffer(error, buf, *pos, count); + if (ret <= 0) + goto out; + + if (!copy_to_user(ubuf, buf, ret)) + *pos += ret; + else + ret = -EFAULT; + +out: + kfree(buf); + return ret; +} + +static int gpu_state_release(struct inode *inode, struct file *file) +{ + i915_gpu_coredump_put(file->private_data); + return 0; +} + +static int i915_gpu_info_open(struct inode *inode, struct file *file) +{ + struct drm_i915_private *i915 = inode->i_private; + struct i915_gpu_coredump *gpu; + intel_wakeref_t wakeref; + + gpu = NULL; + with_intel_runtime_pm(&i915->runtime_pm, wakeref) + gpu = i915_gpu_coredump(to_gt(i915), ALL_ENGINES, CORE_DUMP_FLAG_NONE); + + if (IS_ERR(gpu)) + return PTR_ERR(gpu); + + file->private_data = gpu; + return 0; +} + +static const struct file_operations i915_gpu_info_fops = { + .owner = THIS_MODULE, + .open = i915_gpu_info_open, + .read = gpu_state_read, + .llseek = default_llseek, + .release = gpu_state_release, +}; + +static ssize_t +i915_error_state_write(struct file *filp, + const char __user *ubuf, + size_t cnt, + loff_t *ppos) +{ + struct i915_gpu_coredump *error = filp->private_data; + + if (!error) + return 0; + + drm_dbg(&error->i915->drm, "Resetting error state\n"); + i915_reset_error_state(error->i915); + + return cnt; +} + +static int i915_error_state_open(struct inode *inode, struct file *file) +{ + struct i915_gpu_coredump *error; + + error = i915_first_error_state(inode->i_private); + if (IS_ERR(error)) + return PTR_ERR(error); + + file->private_data = error; + return 0; +} + +static const struct file_operations i915_error_state_fops = { + .owner = THIS_MODULE, + .open = i915_error_state_open, + .read = gpu_state_read, + .write = i915_error_state_write, + .llseek = default_llseek, + .release = gpu_state_release, +}; + +void i915_gpu_error_debugfs_register(struct drm_i915_private *i915) +{ + struct drm_minor *minor = i915->drm.primary; + + debugfs_create_file("i915_error_state", 0644, minor->debugfs_root, i915, + &i915_error_state_fops); + debugfs_create_file("i915_gpu_info", 0644, minor->debugfs_root, i915, + &i915_gpu_info_fops); +} diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index c982b162b7ff..a6f2a7518cf0 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -276,8 +276,6 @@ static inline void intel_klog_error_capture(struct intel_gt *gt, __printf(2, 3) void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...); -struct i915_gpu_coredump *i915_gpu_coredump(struct intel_gt *gt, - intel_engine_mask_t engine_mask, u32 dump_flags); void i915_capture_error_state(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags); @@ -329,6 +327,8 @@ struct i915_gpu_coredump *i915_first_error_state(struct drm_i915_private *i915); void i915_reset_error_state(struct drm_i915_private *i915); void i915_disable_error_state(struct drm_i915_private *i915, int err); +void i915_gpu_error_debugfs_register(struct drm_i915_private *i915); + #else __printf(2, 3) @@ -411,6 +411,10 @@ static inline void i915_disable_error_state(struct drm_i915_private *i915, { } +static inline void i915_gpu_error_debugfs_register(struct drm_i915_private *i915) +{ +} + #endif /* IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) */ #endif /* _I915_GPU_ERROR_H_ */ From patchwork Thu Sep 28 18:08:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403435 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 343F2CE7AFC for ; Thu, 28 Sep 2023 18:09:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AB58D10E6AB; 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28 Sep 2023 11:09:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="873357086" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="873357086" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:30 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:51 +0300 Message-Id: <117f3b9f939bd5254cfb49bfcc5742f96eb587ae.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 07/15] drm/i915: move gpu error sysfs to i915_gpu_error.c X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Hide gpu error specifics in i915_gpu_error.c. This is also cleaner wrt conditional compilation, as i915_gpu_error.c is only built with DRM_I915_CAPTURE_ERROR=y. With this, we can also make i915_first_error_state() static. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_gpu_error.c | 75 ++++++++++++++++++++++++- drivers/gpu/drm/i915/i915_gpu_error.h | 17 +++--- drivers/gpu/drm/i915/i915_sysfs.c | 79 +-------------------------- 3 files changed, 86 insertions(+), 85 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 71dacd6e5360..17699b20694c 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -57,6 +57,7 @@ #include "i915_memcpy.h" #include "i915_reg.h" #include "i915_scatterlist.h" +#include "i915_sysfs.h" #include "i915_utils.h" #define ALLOW_FAIL (__GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | __GFP_NOWARN) @@ -2199,7 +2200,7 @@ void i915_capture_error_state(struct intel_gt *gt, i915_gpu_coredump_put(error); } -struct i915_gpu_coredump * +static struct i915_gpu_coredump * i915_first_error_state(struct drm_i915_private *i915) { struct i915_gpu_coredump *error; @@ -2475,3 +2476,75 @@ void i915_gpu_error_debugfs_register(struct drm_i915_private *i915) debugfs_create_file("i915_gpu_info", 0644, minor->debugfs_root, i915, &i915_gpu_info_fops); } + +static ssize_t error_state_read(struct file *filp, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + + struct device *kdev = kobj_to_dev(kobj); + struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); + struct i915_gpu_coredump *gpu; + ssize_t ret = 0; + + /* + * FIXME: Concurrent clients triggering resets and reading + clearing + * dumps can cause inconsistent sysfs reads when a user calls in with a + * non-zero offset to complete a prior partial read but the + * gpu_coredump has been cleared or replaced. + */ + + gpu = i915_first_error_state(i915); + if (IS_ERR(gpu)) { + ret = PTR_ERR(gpu); + } else if (gpu) { + ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count); + i915_gpu_coredump_put(gpu); + } else { + const char *str = "No error state collected\n"; + size_t len = strlen(str); + + if (off < len) { + ret = min_t(size_t, count, len - off); + memcpy(buf, str + off, ret); + } + } + + return ret; +} + +static ssize_t error_state_write(struct file *file, struct kobject *kobj, + struct bin_attribute *attr, char *buf, + loff_t off, size_t count) +{ + struct device *kdev = kobj_to_dev(kobj); + struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); + + drm_dbg(&dev_priv->drm, "Resetting error state\n"); + i915_reset_error_state(dev_priv); + + return count; +} + +static const struct bin_attribute error_state_attr = { + .attr.name = "error", + .attr.mode = S_IRUSR | S_IWUSR, + .size = 0, + .read = error_state_read, + .write = error_state_write, +}; + +void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915) +{ + struct device *kdev = i915->drm.primary->kdev; + + if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr)) + drm_err(&i915->drm, "error_state sysfs setup failed\n"); +} + +void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915) +{ + struct device *kdev = i915->drm.primary->kdev; + + sysfs_remove_bin_file(&kdev->kobj, &error_state_attr); +} diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index a6f2a7518cf0..68c964d6720a 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -323,11 +323,12 @@ static inline void i915_gpu_coredump_put(struct i915_gpu_coredump *gpu) kref_put(&gpu->ref, __i915_gpu_coredump_free); } -struct i915_gpu_coredump *i915_first_error_state(struct drm_i915_private *i915); void i915_reset_error_state(struct drm_i915_private *i915); void i915_disable_error_state(struct drm_i915_private *i915, int err); void i915_gpu_error_debugfs_register(struct drm_i915_private *i915); +void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915); +void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915); #else @@ -396,12 +397,6 @@ static inline void i915_gpu_coredump_put(struct i915_gpu_coredump *gpu) { } -static inline struct i915_gpu_coredump * -i915_first_error_state(struct drm_i915_private *i915) -{ - return ERR_PTR(-ENODEV); -} - static inline void i915_reset_error_state(struct drm_i915_private *i915) { } @@ -415,6 +410,14 @@ static inline void i915_gpu_error_debugfs_register(struct drm_i915_private *i915 { } +static inline void i915_gpu_error_sysfs_setup(struct drm_i915_private *i915) +{ +} + +static inline void i915_gpu_error_sysfs_teardown(struct drm_i915_private *i915) +{ +} + #endif /* IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) */ #endif /* _I915_GPU_ERROR_H_ */ diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index e88bb4f04305..613decd47760 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -155,81 +155,6 @@ static const struct bin_attribute dpf_attrs_1 = { .private = (void *)1 }; -#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) - -static ssize_t error_state_read(struct file *filp, struct kobject *kobj, - struct bin_attribute *attr, char *buf, - loff_t off, size_t count) -{ - - struct device *kdev = kobj_to_dev(kobj); - struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); - struct i915_gpu_coredump *gpu; - ssize_t ret = 0; - - /* - * FIXME: Concurrent clients triggering resets and reading + clearing - * dumps can cause inconsistent sysfs reads when a user calls in with a - * non-zero offset to complete a prior partial read but the - * gpu_coredump has been cleared or replaced. - */ - - gpu = i915_first_error_state(i915); - if (IS_ERR(gpu)) { - ret = PTR_ERR(gpu); - } else if (gpu) { - ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count); - i915_gpu_coredump_put(gpu); - } else { - const char *str = "No error state collected\n"; - size_t len = strlen(str); - - if (off < len) { - ret = min_t(size_t, count, len - off); - memcpy(buf, str + off, ret); - } - } - - return ret; -} - -static ssize_t error_state_write(struct file *file, struct kobject *kobj, - struct bin_attribute *attr, char *buf, - loff_t off, size_t count) -{ - struct device *kdev = kobj_to_dev(kobj); - struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev); - - drm_dbg(&dev_priv->drm, "Resetting error state\n"); - i915_reset_error_state(dev_priv); - - return count; -} - -static const struct bin_attribute error_state_attr = { - .attr.name = "error", - .attr.mode = S_IRUSR | S_IWUSR, - .size = 0, - .read = error_state_read, - .write = error_state_write, -}; - -static void i915_setup_error_capture(struct device *kdev) -{ - if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr)) - drm_err(&kdev_minor_to_i915(kdev)->drm, - "error_state sysfs setup failed\n"); -} - -static void i915_teardown_error_capture(struct device *kdev) -{ - sysfs_remove_bin_file(&kdev->kobj, &error_state_attr); -} -#else -static void i915_setup_error_capture(struct device *kdev) {} -static void i915_teardown_error_capture(struct device *kdev) {} -#endif - void i915_setup_sysfs(struct drm_i915_private *dev_priv) { struct device *kdev = dev_priv->drm.primary->kdev; @@ -255,7 +180,7 @@ void i915_setup_sysfs(struct drm_i915_private *dev_priv) drm_warn(&dev_priv->drm, "failed to register GT sysfs directory\n"); - i915_setup_error_capture(kdev); + i915_gpu_error_sysfs_setup(dev_priv); intel_engines_add_sysfs(dev_priv); } @@ -264,7 +189,7 @@ void i915_teardown_sysfs(struct drm_i915_private *dev_priv) { struct device *kdev = dev_priv->drm.primary->kdev; - i915_teardown_error_capture(kdev); + i915_gpu_error_sysfs_teardown(dev_priv); device_remove_bin_file(kdev, &dpf_attrs_1); device_remove_bin_file(kdev, &dpf_attrs); From patchwork Thu Sep 28 18:08:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403433 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59605CE7B19 for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="384949768" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="384949768" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="873357099" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="873357099" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by orsmga004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:33 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:52 +0300 Message-Id: <7953952019a6362acbf8b20372d398b86fbf3a0e.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 08/15] drm/i915: convert i915_coredump_get/put() to proper functions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Also make i915_gpu_coredump_get() static, as it's not used outside of i915_gpu_error.h. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_gpu_error.c | 14 +++++++++++++- drivers/gpu/drm/i915/i915_gpu_error.h | 14 +------------- 2 files changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 17699b20694c..9b1bb5aeec11 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -1060,7 +1060,7 @@ static void cleanup_gt(struct intel_gt_coredump *gt) kfree(gt); } -void __i915_gpu_coredump_free(struct kref *error_ref) +static void i915_gpu_coredump_free(struct kref *error_ref) { struct i915_gpu_coredump *error = container_of(error_ref, typeof(*error), ref); @@ -1080,6 +1080,18 @@ void __i915_gpu_coredump_free(struct kref *error_ref) kfree(error); } +static struct i915_gpu_coredump *i915_gpu_coredump_get(struct i915_gpu_coredump *gpu) +{ + kref_get(&gpu->ref); + return gpu; +} + +void i915_gpu_coredump_put(struct i915_gpu_coredump *gpu) +{ + if (gpu) + kref_put(&gpu->ref, i915_gpu_coredump_free); +} + static struct i915_vma_coredump * i915_vma_coredump_create(const struct intel_gt *gt, const struct i915_vma_resource *vma_res, diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index 68c964d6720a..f6f8d284a07d 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -305,23 +305,11 @@ void i915_vma_capture_finish(struct intel_gt_coredump *gt, void i915_error_state_store(struct i915_gpu_coredump *error); -static inline struct i915_gpu_coredump * -i915_gpu_coredump_get(struct i915_gpu_coredump *gpu) -{ - kref_get(&gpu->ref); - return gpu; -} - ssize_t i915_gpu_coredump_copy_to_buffer(struct i915_gpu_coredump *error, char *buf, loff_t offset, size_t count); -void __i915_gpu_coredump_free(struct kref *kref); -static inline void i915_gpu_coredump_put(struct i915_gpu_coredump *gpu) -{ - if (gpu) - kref_put(&gpu->ref, __i915_gpu_coredump_free); -} +void i915_gpu_coredump_put(struct i915_gpu_coredump *gpu); void i915_reset_error_state(struct drm_i915_private *i915); void i915_disable_error_state(struct drm_i915_private *i915, int err); From patchwork Thu Sep 28 18:08:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403442 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6A89FCE7AFC for ; Thu, 28 Sep 2023 18:10:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C0DB110E6A6; Thu, 28 Sep 2023 18:10:14 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id ECCC710E6AC for ; Thu, 28 Sep 2023 18:09:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924595; x=1727460595; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=++9ShbMwECvmiQzQZ+R8c5lfVBxcdOlLvqqIj+hRU2E=; b=ggy0BDvoYJ38OtBKzzuS3AGCTniucBngX0RvXnLwtniZLZSoEFNu7hbe v6V+LCZThYz/lKiESwQ1k+XEaXRshDqvs00OygM3Mya+/Cvzo4BRQ2NDA rD8j8vHRunuCgXeE/qGTfrImCAg2txPdNS6FfTWDuE3hFRdpROcG9REb6 FbjadRU76eu7If4MTZVt5FVIBAoEQ8UrsuVdlwIZHVGiB3jvzYlA19KFp EN1R4DBhmTQYemW1jXXWSYUzVRZKR1uMFS+Tx7sEWl9NlGXVXpIhnzxwU K2rblaW0AsHbGG6MLCqWKPGxPR4dBSiOgyI4UgsGuQethJEfhoDfj5VZd w==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="448627800" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="448627800" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:41 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="865366527" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="865366527" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:37 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:53 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 09/15] drm/i915: do more in i915_gpu_coredump_alloc() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Reduce gpu error interface further by doing more in i915_gpu_coredump_alloc(). Signed-off-by: Jani Nikula --- .../drm/i915/gt/intel_execlists_submission.c | 16 +------- drivers/gpu/drm/i915/i915_gpu_error.c | 38 +++++++++++++++++-- drivers/gpu/drm/i915/i915_gpu_error.h | 20 +--------- 3 files changed, 37 insertions(+), 37 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c index e8f42ec6b1b4..7c7e8c3a12e0 100644 --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c @@ -2261,26 +2261,12 @@ static struct execlists_capture *capture_regs(struct intel_engine_cs *engine) if (!cap) return NULL; - cap->error = i915_gpu_coredump_alloc(engine->i915, gfp); + cap->error = i915_gpu_coredump_alloc(engine, gfp); if (!cap->error) goto err_cap; - cap->error->gt = intel_gt_coredump_alloc(engine->gt, gfp, CORE_DUMP_FLAG_NONE); - if (!cap->error->gt) - goto err_gpu; - - cap->error->gt->engine = intel_engine_coredump_alloc(engine, gfp, CORE_DUMP_FLAG_NONE); - if (!cap->error->gt->engine) - goto err_gt; - - cap->error->gt->engine->hung = true; - return cap; -err_gt: - kfree(cap->error->gt); -err_gpu: - kfree(cap->error); err_cap: kfree(cap); return NULL; diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 9b1bb5aeec11..e4185f30f07c 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -63,6 +63,9 @@ #define ALLOW_FAIL (__GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | __GFP_NOWARN) #define ATOMIC_MAYFAIL (GFP_ATOMIC | __GFP_NOWARN) +struct intel_gt_coredump * +intel_gt_coredump_alloc(struct intel_gt *gt, gfp_t gfp, u32 dump_flags); + static void __sg_set_buf(struct scatterlist *sg, void *addr, unsigned int len, loff_t it) { @@ -2005,8 +2008,8 @@ static void capture_gen(struct i915_gpu_coredump *error) error->driver_caps = i915->caps; } -struct i915_gpu_coredump * -i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp) +static struct i915_gpu_coredump * +__i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp) { struct i915_gpu_coredump *error; @@ -2030,6 +2033,35 @@ i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp) return error; } +struct i915_gpu_coredump * +i915_gpu_coredump_alloc(struct intel_engine_cs *engine, gfp_t gfp) +{ + struct i915_gpu_coredump *error; + + error = __i915_gpu_coredump_alloc(engine->i915, gfp); + if (!error) + return NULL; + + error->gt = intel_gt_coredump_alloc(engine->gt, gfp, CORE_DUMP_FLAG_NONE); + if (!error->gt) + goto err_gpu; + + error->gt->engine = intel_engine_coredump_alloc(engine, gfp, CORE_DUMP_FLAG_NONE); + if (!error->gt->engine) + goto err_gt; + + error->gt->engine->hung = true; + + return error; + +err_gt: + kfree(error->gt); +err_gpu: + kfree(error); + + return NULL; +} + #define DAY_AS_SECONDS(x) (24 * 60 * 60 * (x)) struct intel_gt_coredump * @@ -2102,7 +2134,7 @@ __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 du if (IS_ERR(error)) return error; - error = i915_gpu_coredump_alloc(i915, ALLOW_FAIL); + error = __i915_gpu_coredump_alloc(i915, ALLOW_FAIL); if (!error) return ERR_PTR(-ENOMEM); diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index f6f8d284a07d..0439dde95344 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -280,13 +280,7 @@ void i915_capture_error_state(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump_flags); struct i915_gpu_coredump * -i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp); - -struct intel_gt_coredump * -intel_gt_coredump_alloc(struct intel_gt *gt, gfp_t gfp, u32 dump_flags); - -struct intel_engine_coredump * -intel_engine_coredump_alloc(struct intel_engine_cs *engine, gfp_t gfp, u32 dump_flags); +i915_gpu_coredump_alloc(struct intel_engine_cs *engine, gfp_t gfp); struct intel_engine_capture_vma * intel_engine_coredump_add_request(struct intel_engine_coredump *ee, @@ -337,18 +331,6 @@ i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp) return NULL; } -static inline struct intel_gt_coredump * -intel_gt_coredump_alloc(struct intel_gt *gt, gfp_t gfp, u32 dump_flags) -{ - return NULL; -} - -static inline struct intel_engine_coredump * -intel_engine_coredump_alloc(struct intel_engine_cs *engine, gfp_t gfp, u32 dump_flags) -{ - return NULL; -} - static inline struct intel_engine_capture_vma * intel_engine_coredump_add_request(struct intel_engine_coredump *ee, struct i915_request *rq, From patchwork Thu Sep 28 18:08:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403437 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9BC0CE7AFC for ; Thu, 28 Sep 2023 18:09:57 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 715CE10E6AE; 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28 Sep 2023 11:09:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="865366538" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="865366538" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:41 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:54 +0300 Message-Id: <398fe9e2f4be6fa2da685bba95f5081f5da08587.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 10/15] drm/i915: move execlist capture to i915_gpu_error.c X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Localize error capture details within i915_gpu_error.c so we can reduce the interfaces. FIXME: I don't know what the function should be called. Signed-off-by: Jani Nikula --- .../drm/i915/gt/intel_execlists_submission.c | 22 +------- drivers/gpu/drm/i915/i915_gpu_error.c | 36 ++++++++++--- drivers/gpu/drm/i915/i915_gpu_error.h | 51 ++----------------- 3 files changed, 36 insertions(+), 73 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c index 7c7e8c3a12e0..aea2fd75f227 100644 --- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c @@ -2222,31 +2222,13 @@ struct execlists_capture { static void execlists_capture_work(struct work_struct *work) { struct execlists_capture *cap = container_of(work, typeof(*cap), work); - const gfp_t gfp = __GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | - __GFP_NOWARN; - struct intel_engine_cs *engine = cap->rq->engine; - struct intel_gt_coredump *gt = cap->error->gt; - struct intel_engine_capture_vma *vma; - - /* Compress all the objects attached to the request, slow! */ - vma = intel_engine_coredump_add_request(gt->engine, cap->rq, gfp); - if (vma) { - struct i915_vma_compress *compress = - i915_vma_capture_prepare(gt); - - intel_engine_coredump_add_vma(gt->engine, vma, compress); - i915_vma_capture_finish(gt, compress); - } - gt->simulated = gt->engine->simulated; - cap->error->simulated = gt->simulated; + i915_gpu_error_execlist_capture(cap->error, cap->rq); - /* Publish the error state, and announce it to the world */ - i915_error_state_store(cap->error); i915_gpu_coredump_put(cap->error); /* Return this request and all that depend upon it for signaling */ - execlists_unhold(engine, cap->rq); + execlists_unhold(cap->rq->engine, cap->rq); i915_request_put(cap->rq); kfree(cap); diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index e4185f30f07c..837542c94b00 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -1584,7 +1584,7 @@ engine_coredump_add_context(struct intel_engine_coredump *ee, return vma; } -struct intel_engine_capture_vma * +static struct intel_engine_capture_vma * intel_engine_coredump_add_request(struct intel_engine_coredump *ee, struct i915_request *rq, gfp_t gfp) @@ -1610,7 +1610,7 @@ intel_engine_coredump_add_request(struct intel_engine_coredump *ee, return vma; } -void +static void intel_engine_coredump_add_vma(struct intel_engine_coredump *ee, struct intel_engine_capture_vma *capture, struct i915_vma_compress *compress) @@ -2096,7 +2096,7 @@ intel_gt_coredump_alloc(struct intel_gt *gt, gfp_t gfp, u32 dump_flags) return gc; } -struct i915_vma_compress * +static struct i915_vma_compress * i915_vma_capture_prepare(struct intel_gt_coredump *gt) { struct i915_vma_compress *compress; @@ -2113,8 +2113,8 @@ i915_vma_capture_prepare(struct intel_gt_coredump *gt) return compress; } -void i915_vma_capture_finish(struct intel_gt_coredump *gt, - struct i915_vma_compress *compress) +static void i915_vma_capture_finish(struct intel_gt_coredump *gt, + struct i915_vma_compress *compress) { if (!compress) return; @@ -2189,7 +2189,7 @@ i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 dump return dump; } -void i915_error_state_store(struct i915_gpu_coredump *error) +static void i915_error_state_store(struct i915_gpu_coredump *error) { struct drm_i915_private *i915; static bool warned; @@ -2244,6 +2244,30 @@ void i915_capture_error_state(struct intel_gt *gt, i915_gpu_coredump_put(error); } +void i915_gpu_error_execlist_capture(struct i915_gpu_coredump *error, + struct i915_request *rq) +{ + struct intel_gt_coredump *gt = error->gt; + struct intel_engine_capture_vma *vma; + const gfp_t gfp = __GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | __GFP_NOWARN; + + /* Compress all the objects attached to the request, slow! */ + vma = intel_engine_coredump_add_request(gt->engine, rq, gfp); + if (vma) { + struct i915_vma_compress *compress = + i915_vma_capture_prepare(gt); + + intel_engine_coredump_add_vma(gt->engine, vma, compress); + i915_vma_capture_finish(gt, compress); + } + + gt->simulated = gt->engine->simulated; + error->simulated = gt->simulated; + + /* Publish the error state, and announce it to the world */ + i915_error_state_store(error); +} + static struct i915_gpu_coredump * i915_first_error_state(struct drm_i915_private *i915) { diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index 0439dde95344..c2c15e29e266 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -27,8 +27,6 @@ #include "i915_scheduler.h" struct drm_i915_private; -struct i915_vma_compress; -struct intel_engine_capture_vma; struct intel_overlay_error_state; struct i915_vma_coredump { @@ -282,22 +280,8 @@ void i915_capture_error_state(struct intel_gt *gt, struct i915_gpu_coredump * i915_gpu_coredump_alloc(struct intel_engine_cs *engine, gfp_t gfp); -struct intel_engine_capture_vma * -intel_engine_coredump_add_request(struct intel_engine_coredump *ee, - struct i915_request *rq, - gfp_t gfp); - -void intel_engine_coredump_add_vma(struct intel_engine_coredump *ee, - struct intel_engine_capture_vma *capture, - struct i915_vma_compress *compress); - -struct i915_vma_compress * -i915_vma_capture_prepare(struct intel_gt_coredump *gt); - -void i915_vma_capture_finish(struct intel_gt_coredump *gt, - struct i915_vma_compress *compress); - -void i915_error_state_store(struct i915_gpu_coredump *error); +void i915_gpu_error_execlist_capture(struct i915_gpu_coredump *error, + struct i915_request *rq); ssize_t i915_gpu_coredump_copy_to_buffer(struct i915_gpu_coredump *error, @@ -331,35 +315,8 @@ i915_gpu_coredump_alloc(struct drm_i915_private *i915, gfp_t gfp) return NULL; } -static inline struct intel_engine_capture_vma * -intel_engine_coredump_add_request(struct intel_engine_coredump *ee, - struct i915_request *rq, - gfp_t gfp) -{ - return NULL; -} - -static inline void -intel_engine_coredump_add_vma(struct intel_engine_coredump *ee, - struct intel_engine_capture_vma *capture, - struct i915_vma_compress *compress) -{ -} - -static inline struct i915_vma_compress * -i915_vma_capture_prepare(struct intel_gt_coredump *gt) -{ - return NULL; -} - -static inline void -i915_vma_capture_finish(struct intel_gt_coredump *gt, - struct i915_vma_compress *compress) -{ -} - -static inline void -i915_error_state_store(struct i915_gpu_coredump *error) +static inline void i915_gpu_error_execlist_capture(struct i915_gpu_coredump *error, + struct i915_request *rq) { } From patchwork Thu Sep 28 18:08:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403439 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5A18ECE7AFC for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="448627830" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="448627830" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="865366577" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="865366577" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:44 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:55 +0300 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 11/15] drm/i915/guc: don't look at gpu error guts in guc capture X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" The new interfaces aren't pretty, but it clarifies the separation between intel_guc_capture.c and i915_gpu_error.c. The former should not modify stuff internal to the latter. Signed-off-by: Jani Nikula --- .../gpu/drm/i915/gt/uc/intel_guc_capture.c | 63 ++++++++----------- .../gpu/drm/i915/gt/uc/intel_guc_capture.h | 20 ++++-- drivers/gpu/drm/i915/i915_gpu_error.c | 24 +++++-- 3 files changed, 57 insertions(+), 50 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c index 331cec07c125..cdbe7b5c997f 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.c @@ -1415,7 +1415,8 @@ guc_capture_reg_to_str(const struct intel_guc *guc, u32 owner, u32 type, } while (0) int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf, - const struct intel_engine_coredump *ee) + struct __guc_capture_parsed_output *node, + struct intel_guc *guc) { const char *grptype[GUC_STATE_CAPTURE_GROUP_TYPE_MAX] = { "full-capture", @@ -1426,31 +1427,14 @@ int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf, "Engine-Class", "Engine-Instance" }; - struct intel_guc_state_capture *cap; - struct __guc_capture_parsed_output *node; struct intel_engine_cs *eng; struct guc_mmio_reg *regs; - struct intel_guc *guc; const char *str; int numregs, i, j; u32 is_ext; - if (!ebuf || !ee) + if (!ebuf) return -EINVAL; - cap = ee->guc_capture; - if (!cap || !ee->engine) - return -ENODEV; - - guc = &ee->engine->gt->uc.guc; - - i915_error_printf(ebuf, "global --- GuC Error Capture on %s command stream:\n", - ee->engine->name); - - node = ee->guc_capture_node; - if (!node) { - i915_error_printf(ebuf, " No matching ee-node\n"); - return 0; - } i915_error_printf(ebuf, "Coverage: %s\n", grptype[node->is_partial]); @@ -1502,7 +1486,8 @@ int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf, #endif //CONFIG_DRM_I915_CAPTURE_ERROR -static void guc_capture_find_ecode(struct intel_engine_coredump *ee) +static void guc_capture_find_ecode(struct __guc_capture_parsed_output *guc_capture_node, + u32 *ipehr, u32 *instdone) { struct gcap_reg_list_info *reginfo; struct guc_mmio_reg *regs; @@ -1510,27 +1495,26 @@ static void guc_capture_find_ecode(struct intel_engine_coredump *ee) i915_reg_t reg_instdone = RING_INSTDONE(0); int i; - if (!ee->guc_capture_node) + if (!guc_capture_node) return; - reginfo = ee->guc_capture_node->reginfo + GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE; + reginfo = guc_capture_node->reginfo + GUC_CAPTURE_LIST_TYPE_ENGINE_INSTANCE; regs = reginfo->regs; for (i = 0; i < reginfo->num_regs; i++) { if (regs[i].offset == reg_ipehr.reg) - ee->ipehr = regs[i].value; + *ipehr = regs[i].value; else if (regs[i].offset == reg_instdone.reg) - ee->instdone.instdone = regs[i].value; + *instdone = regs[i].value; } } -void intel_guc_capture_free_node(struct intel_engine_coredump *ee) +void intel_guc_capture_free_node(struct intel_guc_state_capture *guc_capture, + struct __guc_capture_parsed_output *guc_capture_node) { - if (!ee || !ee->guc_capture_node) + if (!guc_capture_node) return; - guc_capture_add_node_to_cachelist(ee->guc_capture, ee->guc_capture_node); - ee->guc_capture = NULL; - ee->guc_capture_node = NULL; + guc_capture_add_node_to_cachelist(guc_capture, guc_capture_node); } bool intel_guc_capture_is_matching_engine(struct intel_gt *gt, @@ -1564,20 +1548,23 @@ bool intel_guc_capture_is_matching_engine(struct intel_gt *gt, } void intel_guc_capture_get_matching_node(struct intel_gt *gt, - struct intel_engine_coredump *ee, - struct intel_context *ce) + struct intel_context *ce, + unsigned int guc_id, + struct intel_guc_state_capture **guc_capture, + struct __guc_capture_parsed_output **guc_capture_node, + u32 *ipehr, u32 *instdone) { struct __guc_capture_parsed_output *n, *ntmp; struct intel_guc *guc; - if (!gt || !ee || !ce) + if (!gt || !ce) return; guc = >->uc.guc; if (!guc->capture) return; - GEM_BUG_ON(ee->guc_capture_node); + GEM_BUG_ON(*guc_capture_node); /* * Look for a matching GuC reported error capture node from @@ -1585,14 +1572,14 @@ void intel_guc_capture_get_matching_node(struct intel_gt *gt, * identification. */ list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) { - if (n->eng_inst == GUC_ID_TO_ENGINE_INSTANCE(ee->engine->guc_id) && - n->eng_class == GUC_ID_TO_ENGINE_CLASS(ee->engine->guc_id) && + if (n->eng_inst == GUC_ID_TO_ENGINE_INSTANCE(guc_id) && + n->eng_class == GUC_ID_TO_ENGINE_CLASS(guc_id) && n->guc_id == ce->guc_id.id && (n->lrca & CTX_GTT_ADDRESS_MASK) == (ce->lrc.lrca & CTX_GTT_ADDRESS_MASK)) { list_del(&n->link); - ee->guc_capture_node = n; - ee->guc_capture = guc->capture; - guc_capture_find_ecode(ee); + *guc_capture_node = n; + *guc_capture = guc->capture; + guc_capture_find_ecode(n, ipehr, instdone); return; } } diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h index 302256d45431..b5862a2672f3 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_capture.h @@ -8,19 +8,27 @@ #include +struct __guc_capture_parsed_output; struct drm_i915_error_state_buf; struct guc_gt_system_info; +struct intel_context; struct intel_engine_coredump; struct intel_engine_cs; -struct intel_context; struct intel_gt; struct intel_guc; +struct intel_guc_state_capture; -void intel_guc_capture_free_node(struct intel_engine_coredump *ee); -int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *m, - const struct intel_engine_coredump *ee); -void intel_guc_capture_get_matching_node(struct intel_gt *gt, struct intel_engine_coredump *ee, - struct intel_context *ce); +void intel_guc_capture_free_node(struct intel_guc_state_capture *guc_capture, + struct __guc_capture_parsed_output *guc_capture_node); +int intel_guc_capture_print_engine_node(struct drm_i915_error_state_buf *ebuf, + struct __guc_capture_parsed_output *node, + struct intel_guc *guc); +void intel_guc_capture_get_matching_node(struct intel_gt *gt, + struct intel_context *ce, + unsigned int guc_id, + struct intel_guc_state_capture **guc_capture, + struct __guc_capture_parsed_output **guc_capture_node, + u32 *ipehr, u32 *instdone); bool intel_guc_capture_is_matching_engine(struct intel_gt *gt, struct intel_context *ce, struct intel_engine_cs *engine); void intel_guc_capture_process(struct intel_guc *guc); diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 837542c94b00..e73b53b384a5 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -815,11 +815,16 @@ static void err_print_gt_engines(struct drm_i915_error_state_buf *m, const struct i915_vma_coredump *vma; if (gt->uc && gt->uc->guc.is_guc_capture) { - if (ee->guc_capture_node) - intel_guc_capture_print_engine_node(m, ee); - else + if (ee->guc_capture && ee->guc_capture_node && ee->engine) { + i915_error_printf(m, "global --- GuC Error Capture on %s command stream:\n", + ee->engine->name); + + intel_guc_capture_print_engine_node(m, ee->guc_capture_node, + &ee->engine->gt->uc.guc); + } else { err_printf(m, " Missing GuC capture node for %s\n", ee->engine->name); + } } else { error_print_engine(m, ee); } @@ -1053,7 +1058,8 @@ static void cleanup_gt(struct intel_gt_coredump *gt) gt->engine = ee->next; i915_vma_coredump_free(ee->vma); - intel_guc_capture_free_node(ee); + intel_guc_capture_free_node(ee->guc_capture, + ee->guc_capture_node); kfree(ee); } @@ -1669,7 +1675,12 @@ capture_engine(struct intel_engine_cs *engine, intel_engine_coredump_add_vma(ee, capture, compress); if (dump_flags & CORE_DUMP_FLAG_IS_GUC_CAPTURE) - intel_guc_capture_get_matching_node(engine->gt, ee, ce); + intel_guc_capture_get_matching_node(engine->gt, ce, + ee->engine->guc_id, + &ee->guc_capture, + &ee->guc_capture_node, + &ee->ipehr, + &ee->instdone.instdone); } else { kfree(ee); ee = NULL; @@ -1702,7 +1713,8 @@ gt_record_engines(struct intel_gt_coredump *gt, gt->simulated |= ee->simulated; if (ee->simulated) { if (dump_flags & CORE_DUMP_FLAG_IS_GUC_CAPTURE) - intel_guc_capture_free_node(ee); + intel_guc_capture_free_node(ee->guc_capture, + ee->guc_capture_node); kfree(ee); continue; } From patchwork Thu Sep 28 18:08:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403436 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 66A42CE7AFC for ; Thu, 28 Sep 2023 18:09:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DD40810E6A5; Thu, 28 Sep 2023 18:09:52 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8AE8910E6A5 for ; Thu, 28 Sep 2023 18:09:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924590; x=1727460590; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UulP+EGmkZvlECewIquLXNL1VvJfhxWYpjA88m/zc8E=; b=A64gIizkXYh0L+Tqo6WLrDlJ5fG8pFSMrkAgI403dU4KjDiIC2NzVOjd KzFb9fyRXNkreXY2ZbAeOuG3goQGJIiylM5Q7WgY8avr9G3VRO2xqLr/T SPkUcU6IGOxaxPGVTHRRNmIEQGMnZlTcspVpn//3el55qCuQ1S+lYfjek C3P1O/9IrIsHyLz3njsFYovD42H8NXO4dFYIRnDtN4YlelxCh/qO0btPD ak458qGxGBoVycQp2mmMIX2oIU5j1ZbWTO8BjVxPQYwd4smAtafmK+oGg tZEFPjbhgNoXHSUbKFwquy1kzo4ljFW3Q7zLlYFTpf6P/fKRoV6DXV1CU A==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="379407278" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="379407278" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:49 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="1080659537" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="1080659537" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:48 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:56 +0300 Message-Id: <10b9cc28ad1798dd1b56129235f2a494ac38e706.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 12/15] drm/i915: hide gpu error structures inside i915_gpu_error.c X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" With the interfaces cleaned up, we can move the error structs inside i915_gpu_error.c, and drop a number of includes from the header. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_gpu_error.c | 201 +++++++++++++++++++++++ drivers/gpu/drm/i915/i915_gpu_error.h | 222 +------------------------- 2 files changed, 205 insertions(+), 218 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index e73b53b384a5..136c494b67e8 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -63,6 +63,207 @@ #define ALLOW_FAIL (__GFP_KSWAPD_RECLAIM | __GFP_RETRY_MAYFAIL | __GFP_NOWARN) #define ATOMIC_MAYFAIL (GFP_ATOMIC | __GFP_NOWARN) +struct i915_vma_coredump { + struct i915_vma_coredump *next; + + char name[20]; + + u64 gtt_offset; + u64 gtt_size; + u32 gtt_page_sizes; + + int unused; + struct list_head page_list; +}; + +struct i915_request_coredump { + unsigned long flags; + pid_t pid; + u32 context; + u32 seqno; + u32 head; + u32 tail; + struct i915_sched_attr sched_attr; +}; + +struct __guc_capture_parsed_output; + +struct intel_engine_coredump { + const struct intel_engine_cs *engine; + + bool hung; + bool simulated; + u32 reset_count; + + /* position of active request inside the ring */ + u32 rq_head, rq_post, rq_tail; + + /* Register state */ + u32 ccid; + u32 start; + u32 tail; + u32 head; + u32 ctl; + u32 mode; + u32 hws; + u32 ipeir; + u32 ipehr; + u32 esr; + u32 bbstate; + u32 instpm; + u32 instps; + u64 bbaddr; + u64 acthd; + u32 fault_reg; + u64 faddr; + u32 rc_psmi; /* sleep state */ + u32 nopid; + u32 excc; + u32 cmd_cctl; + u32 cscmdop; + u32 ctx_sr_ctl; + u32 dma_faddr_hi; + u32 dma_faddr_lo; + struct intel_instdone instdone; + + /* GuC matched capture-lists info */ + struct intel_guc_state_capture *guc_capture; + struct __guc_capture_parsed_output *guc_capture_node; + + struct i915_gem_context_coredump { + char comm[TASK_COMM_LEN]; + + u64 total_runtime; + u64 avg_runtime; + + pid_t pid; + int active; + int guilty; + struct i915_sched_attr sched_attr; + u32 hwsp_seqno; + } context; + + struct i915_vma_coredump *vma; + + struct i915_request_coredump execlist[EXECLIST_MAX_PORTS]; + unsigned int num_ports; + + struct { + u32 gfx_mode; + union { + u64 pdp[4]; + u32 pp_dir_base; + }; + } vm_info; + + struct intel_engine_coredump *next; +}; + +struct intel_ctb_coredump { + u32 raw_head, head; + u32 raw_tail, tail; + u32 raw_status; + u32 desc_offset; + u32 cmds_offset; + u32 size; +}; + +struct intel_gt_coredump { + const struct intel_gt *_gt; + bool awake; + bool simulated; + + struct intel_gt_info info; + + /* Generic register state */ + u32 eir; + u32 pgtbl_er; + u32 ier; + u32 gtier[6], ngtier; + u32 forcewake; + u32 error; /* gen6+ */ + u32 err_int; /* gen7 */ + u32 fault_data0; /* gen8, gen9 */ + u32 fault_data1; /* gen8, gen9 */ + u32 done_reg; + u32 gac_eco; + u32 gam_ecochk; + u32 gab_ctl; + u32 gfx_mode; + u32 gtt_cache; + u32 aux_err; /* gen12 */ + u32 gam_done; /* gen12 */ + u32 clock_frequency; + u32 clock_period_ns; + + /* Display related */ + u32 derrmr; + u32 sfc_done[I915_MAX_SFC]; /* gen12 */ + + u32 nfence; + u64 fence[I915_MAX_NUM_FENCES]; + + struct intel_engine_coredump *engine; + + struct intel_uc_coredump { + struct intel_uc_fw guc_fw; + struct intel_uc_fw huc_fw; + struct guc_info { + struct intel_ctb_coredump ctb[2]; + struct i915_vma_coredump *vma_ctb; + struct i915_vma_coredump *vma_log; + u32 timestamp; + u16 last_fence; + bool is_guc_capture; + } guc; + } *uc; + + struct intel_gt_coredump *next; +}; + +struct i915_gpu_coredump { + struct kref ref; + ktime_t time; + ktime_t boottime; + ktime_t uptime; + unsigned long capture; + + struct drm_i915_private *i915; + + struct intel_gt_coredump *gt; + + char error_msg[128]; + bool simulated; + bool wakelock; + bool suspended; + int iommu; + u32 reset_count; + u32 suspend_count; + + struct intel_device_info device_info; + struct intel_runtime_info runtime_info; + struct intel_display_device_info display_device_info; + struct intel_display_runtime_info display_runtime_info; + struct intel_driver_caps driver_caps; + struct i915_params params; + + struct intel_overlay_error_state *overlay; + + struct scatterlist *sgl, *fit; +}; + +struct drm_i915_error_state_buf { + struct drm_i915_private *i915; + struct scatterlist *sgl, *cur, *end; + + char *buf; + size_t bytes; + size_t size; + loff_t iter; + + int err; +}; + struct intel_gt_coredump * intel_gt_coredump_alloc(struct intel_gt *gt, gfp_t gfp, u32 dump_flags); diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h index c2c15e29e266..5a2d0f506385 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.h +++ b/drivers/gpu/drm/i915/i915_gpu_error.h @@ -8,215 +8,13 @@ #define _I915_GPU_ERROR_H_ #include -#include -#include -#include +#include -#include - -#include "display/intel_display_device.h" -#include "gt/intel_engine.h" -#include "gt/intel_gt_types.h" -#include "gt/uc/intel_uc_fw.h" - -#include "intel_device_info.h" - -#include "i915_gem.h" -#include "i915_gem_gtt.h" -#include "i915_params.h" -#include "i915_scheduler.h" +#include "gt/intel_engine_types.h" +struct drm_i915_error_state_buf; struct drm_i915_private; -struct intel_overlay_error_state; - -struct i915_vma_coredump { - struct i915_vma_coredump *next; - - char name[20]; - - u64 gtt_offset; - u64 gtt_size; - u32 gtt_page_sizes; - - int unused; - struct list_head page_list; -}; - -struct i915_request_coredump { - unsigned long flags; - pid_t pid; - u32 context; - u32 seqno; - u32 head; - u32 tail; - struct i915_sched_attr sched_attr; -}; - -struct __guc_capture_parsed_output; - -struct intel_engine_coredump { - const struct intel_engine_cs *engine; - - bool hung; - bool simulated; - u32 reset_count; - - /* position of active request inside the ring */ - u32 rq_head, rq_post, rq_tail; - - /* Register state */ - u32 ccid; - u32 start; - u32 tail; - u32 head; - u32 ctl; - u32 mode; - u32 hws; - u32 ipeir; - u32 ipehr; - u32 esr; - u32 bbstate; - u32 instpm; - u32 instps; - u64 bbaddr; - u64 acthd; - u32 fault_reg; - u64 faddr; - u32 rc_psmi; /* sleep state */ - u32 nopid; - u32 excc; - u32 cmd_cctl; - u32 cscmdop; - u32 ctx_sr_ctl; - u32 dma_faddr_hi; - u32 dma_faddr_lo; - struct intel_instdone instdone; - - /* GuC matched capture-lists info */ - struct intel_guc_state_capture *guc_capture; - struct __guc_capture_parsed_output *guc_capture_node; - - struct i915_gem_context_coredump { - char comm[TASK_COMM_LEN]; - - u64 total_runtime; - u64 avg_runtime; - - pid_t pid; - int active; - int guilty; - struct i915_sched_attr sched_attr; - u32 hwsp_seqno; - } context; - - struct i915_vma_coredump *vma; - - struct i915_request_coredump execlist[EXECLIST_MAX_PORTS]; - unsigned int num_ports; - - struct { - u32 gfx_mode; - union { - u64 pdp[4]; - u32 pp_dir_base; - }; - } vm_info; - - struct intel_engine_coredump *next; -}; - -struct intel_ctb_coredump { - u32 raw_head, head; - u32 raw_tail, tail; - u32 raw_status; - u32 desc_offset; - u32 cmds_offset; - u32 size; -}; - -struct intel_gt_coredump { - const struct intel_gt *_gt; - bool awake; - bool simulated; - - struct intel_gt_info info; - - /* Generic register state */ - u32 eir; - u32 pgtbl_er; - u32 ier; - u32 gtier[6], ngtier; - u32 forcewake; - u32 error; /* gen6+ */ - u32 err_int; /* gen7 */ - u32 fault_data0; /* gen8, gen9 */ - u32 fault_data1; /* gen8, gen9 */ - u32 done_reg; - u32 gac_eco; - u32 gam_ecochk; - u32 gab_ctl; - u32 gfx_mode; - u32 gtt_cache; - u32 aux_err; /* gen12 */ - u32 gam_done; /* gen12 */ - u32 clock_frequency; - u32 clock_period_ns; - - /* Display related */ - u32 derrmr; - u32 sfc_done[I915_MAX_SFC]; /* gen12 */ - - u32 nfence; - u64 fence[I915_MAX_NUM_FENCES]; - - struct intel_engine_coredump *engine; - - struct intel_uc_coredump { - struct intel_uc_fw guc_fw; - struct intel_uc_fw huc_fw; - struct guc_info { - struct intel_ctb_coredump ctb[2]; - struct i915_vma_coredump *vma_ctb; - struct i915_vma_coredump *vma_log; - u32 timestamp; - u16 last_fence; - bool is_guc_capture; - } guc; - } *uc; - - struct intel_gt_coredump *next; -}; - -struct i915_gpu_coredump { - struct kref ref; - ktime_t time; - ktime_t boottime; - ktime_t uptime; - unsigned long capture; - - struct drm_i915_private *i915; - - struct intel_gt_coredump *gt; - - char error_msg[128]; - bool simulated; - bool wakelock; - bool suspended; - int iommu; - u32 reset_count; - u32 suspend_count; - - struct intel_device_info device_info; - struct intel_runtime_info runtime_info; - struct intel_display_device_info display_device_info; - struct intel_display_runtime_info display_runtime_info; - struct intel_driver_caps driver_caps; - struct i915_params params; - - struct intel_overlay_error_state *overlay; - - struct scatterlist *sgl, *fit; -}; +struct i915_gpu_coredump; struct i915_gpu_error { /* For reset and error_state handling. */ @@ -233,18 +31,6 @@ struct i915_gpu_error { atomic_t reset_engine_count[I915_NUM_ENGINES]; }; -struct drm_i915_error_state_buf { - struct drm_i915_private *i915; - struct scatterlist *sgl, *cur, *end; - - char *buf; - size_t bytes; - size_t size; - loff_t iter; - - int err; -}; - static inline u32 i915_reset_count(struct i915_gpu_error *error) { return atomic_read(&error->reset_count); From patchwork Thu Sep 28 18:08:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403440 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93903E732FD for ; Thu, 28 Sep 2023 18:10:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EC1FE10E6A9; Thu, 28 Sep 2023 18:10:06 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id A54F410E6B0 for ; Thu, 28 Sep 2023 18:10:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924604; x=1727460604; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HvUOJJt/5H0XbraAIS8PwPhrzfQed1oHMQ3e8pawIWQ=; b=Rcn3QBNSecYvPNEmwONlnIzwciu/r5RDwMRL2vZjNFNNmWBUlOJ+NC5r sM+LAFs7lr9TT/M95SajfhJE+X4+UqObmjvfKnm0cDHPr1nXuOoaAtBsX 97Ng3vz7u27lHnu2mYPN0CjtyHRYfQ7kKjUqOGx7pb5aUE3a2KWb4tw5b Vtgscw9eFNTWpnubkN2l0wNvZuz49PNxluDluA+EpQjZhv9C9HF/jUAyH 1k9fLxLSBX04dJ6zvZt0XcSG8zeQV3f7c/e3atmWWw780aovedyGHcxak slsiN7WxYyWPZl6eK0ud2gtDrsViB/ZsLNIeDJnDZlpgB7D4NT1yDsWtV w==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="448627882" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="448627882" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:53 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="865366672" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="865366672" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:52 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:57 +0300 Message-Id: <21523402971f9ec8d5b22c947cf1b321a80055cd.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 13/15] drm/i915: stop including gt/intel_engine.h and gt/intel_gt_types.h from i915_drv.h X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" i915_drv.h no longer needs the headers, and they are not included indirectly either. Removing them reveals a ton of places that implicitly depend on the includes. Make them explicit. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_display_reset.c | 1 + drivers/gpu/drm/i915/display/intel_display_rps.c | 1 + drivers/gpu/drm/i915/display/intel_fbdev.c | 1 + drivers/gpu/drm/i915/display/intel_plane_initial.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 1 + drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 3 ++- drivers/gpu/drm/i915/gt/intel_gt_requests.c | 1 + drivers/gpu/drm/i915/gt/intel_rps.c | 1 + drivers/gpu/drm/i915/gt/intel_sseu.c | 1 + drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c | 2 +- drivers/gpu/drm/i915/gt/intel_wopcm.c | 3 ++- drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c | 5 +++-- drivers/gpu/drm/i915/gvt/execlist.c | 3 ++- drivers/gpu/drm/i915/gvt/gvt.h | 1 + drivers/gpu/drm/i915/i915_drv.h | 2 -- drivers/gpu/drm/i915/i915_getparam.c | 1 + drivers/gpu/drm/i915/i915_mm.c | 4 ++-- drivers/gpu/drm/i915/i915_pci.c | 3 ++- drivers/gpu/drm/i915/i915_query.c | 6 ++++-- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1 + drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c | 1 + drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 1 + drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 3 ++- drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c | 2 +- 25 files changed, 35 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c index 17178d5d7788..107f0d398df6 100644 --- a/drivers/gpu/drm/i915/display/intel_display_reset.c +++ b/drivers/gpu/drm/i915/display/intel_display_reset.c @@ -5,6 +5,7 @@ #include +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "intel_clock_gating.h" #include "intel_display_driver.h" diff --git a/drivers/gpu/drm/i915/display/intel_display_rps.c b/drivers/gpu/drm/i915/display/intel_display_rps.c index 918d0327169a..92b19adf0939 100644 --- a/drivers/gpu/drm/i915/display/intel_display_rps.c +++ b/drivers/gpu/drm/i915/display/intel_display_rps.c @@ -6,6 +6,7 @@ #include #include +#include "gt/intel_gt_types.h" #include "gt/intel_rps.h" #include "i915_drv.h" #include "intel_display_rps.h" diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c index 31d0d695d567..b246ff2afc7a 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c @@ -45,6 +45,7 @@ #include "gem/i915_gem_lmem.h" #include "gem/i915_gem_mman.h" +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "intel_display_types.h" diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c b/drivers/gpu/drm/i915/display/intel_plane_initial.c index 451a642e106e..83a355cb4218 100644 --- a/drivers/gpu/drm/i915/display/intel_plane_initial.c +++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c @@ -4,6 +4,7 @@ */ #include "gem/i915_gem_region.h" +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "intel_atomic_plane.h" #include "intel_display.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c index a049ca0b7980..5ca651623d83 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c @@ -7,6 +7,7 @@ #include #include +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "i915_gem.h" #include "i915_gem_ioctls.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c index 1d3ebdf4069b..69bff60e44ee 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c @@ -39,6 +39,7 @@ #include #include +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "i915_gem_ioctls.h" #include "i915_gem_object.h" diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c index 40371b8a9bbb..8c036baaea3c 100644 --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c @@ -7,11 +7,12 @@ #include "display/intel_display.h" #include "i915_drv.h" +#include "i915_pvinfo.h" #include "i915_reg.h" #include "i915_scatterlist.h" -#include "i915_pvinfo.h" #include "i915_vgpu.h" #include "intel_gt_regs.h" +#include "intel_gt_types.h" #include "intel_mchbar_regs.h" /** diff --git a/drivers/gpu/drm/i915/gt/intel_gt_requests.c b/drivers/gpu/drm/i915/gt/intel_gt_requests.c index d1a382dfaa1d..c681a7a04315 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_requests.c +++ b/drivers/gpu/drm/i915/gt/intel_gt_requests.c @@ -7,6 +7,7 @@ #include "i915_drv.h" /* for_each_engine() */ #include "i915_request.h" +#include "intel_engine.h" #include "intel_engine_heartbeat.h" #include "intel_execlists_submission.h" #include "intel_gt.h" diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 4feef874e6d6..b53118495cb6 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -13,6 +13,7 @@ #include "i915_irq.h" #include "i915_reg.h" #include "intel_breadcrumbs.h" +#include "intel_engine.h" #include "intel_gt.h" #include "intel_gt_clock_utils.h" #include "intel_gt_irq.h" diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c index f602895f6d0d..13a2749cfb45 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.c +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c @@ -9,6 +9,7 @@ #include "i915_perf_types.h" #include "intel_engine_regs.h" #include "intel_gt_regs.h" +#include "intel_gt_types.h" #include "intel_sseu.h" void intel_sseu_set_info(struct sseu_dev_info *sseu, u8 max_slices, diff --git a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c index c2ee5e1826b5..8b54bad0f5ae 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c +++ b/drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c @@ -1,5 +1,4 @@ // SPDX-License-Identifier: MIT - /* * Copyright © 2020 Intel Corporation */ @@ -10,6 +9,7 @@ #include "i915_drv.h" #include "intel_gt_debugfs.h" #include "intel_gt_regs.h" +#include "intel_gt_types.h" #include "intel_sseu_debugfs.h" static void cherryview_sseu_device_status(struct intel_gt *gt, diff --git a/drivers/gpu/drm/i915/gt/intel_wopcm.c b/drivers/gpu/drm/i915/gt/intel_wopcm.c index 7ebbcc191c2d..fcad35df0671 100644 --- a/drivers/gpu/drm/i915/gt/intel_wopcm.c +++ b/drivers/gpu/drm/i915/gt/intel_wopcm.c @@ -3,8 +3,9 @@ * Copyright © 2017-2019 Intel Corporation */ -#include "intel_wopcm.h" #include "i915_drv.h" +#include "intel_gt_types.h" +#include "intel_wopcm.h" /** * DOC: WOPCM Layout diff --git a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c index 0d3b22a74365..cf0ef467542d 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.c @@ -5,13 +5,14 @@ #include +#include "gt/intel_engine.h" #include "gt/intel_gt.h" #include "gt/intel_gt_print.h" +#include "i915_drv.h" +#include "i915_reg.h" #include "intel_gsc_fw.h" #include "intel_gsc_proxy.h" #include "intel_gsc_uc.h" -#include "i915_drv.h" -#include "i915_reg.h" static void gsc_work(struct work_struct *work) { diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c index 274c6ef42400..ad392c4f4e2a 100644 --- a/drivers/gpu/drm/i915/gvt/execlist.c +++ b/drivers/gpu/drm/i915/gvt/execlist.c @@ -32,8 +32,9 @@ * */ -#include "i915_drv.h" +#include "gt/intel_engine.h" #include "gvt.h" +#include "i915_drv.h" #define _EL_OFFSET_STATUS 0x234 #define _EL_OFFSET_STATUS_BUF 0x370 diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h index 53a0a42a50db..489f868736e0 100644 --- a/drivers/gpu/drm/i915/gvt/gvt.h +++ b/drivers/gpu/drm/i915/gvt/gvt.h @@ -39,6 +39,7 @@ #include +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "intel_gvt.h" diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index d04a9c32c44f..cd4d55f5f8de 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -43,8 +43,6 @@ #include "gem/i915_gem_shrinker.h" #include "gem/i915_gem_stolen.h" -#include "gt/intel_engine.h" -#include "gt/intel_gt_types.h" #include "gt/intel_region_lmem.h" #include "gt/intel_workarounds.h" #include "gt/uc/intel_uc.h" diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c index 5c3fec63cb4c..a1944382377a 100644 --- a/drivers/gpu/drm/i915/i915_getparam.c +++ b/drivers/gpu/drm/i915/i915_getparam.c @@ -4,6 +4,7 @@ #include "gem/i915_gem_mman.h" #include "gt/intel_engine_user.h" +#include "gt/intel_gt_types.h" #include "pxp/intel_pxp.h" diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c index 7998bc74ab49..e2f4ec1c29c7 100644 --- a/drivers/gpu/drm/i915/i915_mm.c +++ b/drivers/gpu/drm/i915/i915_mm.c @@ -22,9 +22,9 @@ * */ -#include +#include #include - +#include #include "i915_drv.h" #include "i915_mm.h" diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index df7c261410f7..4dc638e8b887 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -28,9 +28,10 @@ #include "display/intel_display.h" #include "display/intel_display_driver.h" +#include "gem/i915_gem_object_types.h" #include "gt/intel_gt_regs.h" +#include "gt/intel_gt_types.h" #include "gt/intel_sa_media.h" -#include "gem/i915_gem_object_types.h" #include "i915_driver.h" #include "i915_drv.h" diff --git a/drivers/gpu/drm/i915/i915_query.c b/drivers/gpu/drm/i915/i915_query.c index 00871ef99792..84ebfe94456a 100644 --- a/drivers/gpu/drm/i915/i915_query.c +++ b/drivers/gpu/drm/i915/i915_query.c @@ -6,11 +6,13 @@ #include +#include + +#include "gt/intel_engine_user.h" +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "i915_perf.h" #include "i915_query.h" -#include "gt/intel_engine_user.h" -#include static int copy_query_item(void *query_hdr, size_t query_sz, u32 total_length, diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index b3c036a54529..0e3d9a9ec4d4 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -16,6 +16,7 @@ #include "display/skl_watermark_regs.h" #include "display/vlv_dsi_pll_regs.h" #include "gt/intel_gt_regs.h" +#include "gt/intel_gt_types.h" #include "gvt/gvt.h" #include "i915_drv.h" diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c index e07c5b380789..c8e5b22eccff 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_debugfs.c @@ -9,6 +9,7 @@ #include #include "gt/intel_gt_debugfs.h" +#include "gt/intel_gt_types.h" #include "i915_drv.h" diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c index 6dfd24918953..7acdecc758c0 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_pm.c @@ -3,6 +3,7 @@ * Copyright(c) 2020 Intel Corporation. */ +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "intel_pxp.h" diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c b/drivers/gpu/drm/i915/pxp/intel_pxp_session.c index 0a3e66b0265e..eccb5fbe2557 100644 --- a/drivers/gpu/drm/i915/pxp/intel_pxp_session.c +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_session.c @@ -3,15 +3,16 @@ * Copyright(c) 2020, Intel Corporation. All rights reserved. */ +#include "gt/intel_gt_types.h" #include "i915_drv.h" #include "intel_pxp.h" #include "intel_pxp_cmd.h" #include "intel_pxp_gsccs.h" +#include "intel_pxp_regs.h" #include "intel_pxp_session.h" #include "intel_pxp_tee.h" #include "intel_pxp_types.h" -#include "intel_pxp_regs.h" #define ARB_SESSION I915_PROTECTED_CONTENT_DEFAULT_SESSION /* shorter define */ diff --git a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c index 2990dd4d4a0d..be9086da29fc 100644 --- a/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c +++ b/drivers/gpu/drm/i915/selftests/intel_scheduler_helpers.c @@ -3,7 +3,7 @@ * Copyright © 2021 Intel Corporation */ -//#include "gt/intel_engine_user.h" +#include "gt/intel_engine.h" #include "gt/intel_gt.h" #include "i915_drv.h" #include "i915_selftest.h" From patchwork Thu Sep 28 18:08:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403438 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44EBCE732FD for ; Thu, 28 Sep 2023 18:10:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BAD3F10E6A3; Thu, 28 Sep 2023 18:09:59 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 69CB810E6AC for ; Thu, 28 Sep 2023 18:09:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924597; x=1727460597; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Hnqr5uWu5F9WBjZPB4meu8W4GTBxyv5v400/N+PnywA=; b=gloSzPKgVAMo9KJtD1xNNzA2gUlheeywQPoiJZcLyNjfqm9/scKkgcKy sByGuhV7NySYuhe2da/g0G2k4MILQxuYhcIYZ7X9Kav8r3IpOF5KcqRxr UK6Z2CmAB6A179pkfvfPkqxG6CueojeBDWN27YUSdMenGgacnsynmOR6n o1TgnGZ065v/V5fAkXwuOLmnVbxAPGp8dCCM60QLTdgxq+PRun8hmOEIg VFV1WnyUGvYgFQX0YFQUK02pHkOKTZzrCFdtWYUH4DejoUKozX0efGQD1 RMPTRjMk71bGTHKS9M4jD8lqQ2oJDVyincM/tmrjemaaMo3optV48J8kP w==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="379407286" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="379407286" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:57 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="1080659546" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="1080659546" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:56 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:58 +0300 Message-Id: <679db22381c8aa9c8c533779044ad6f6d89a45d4.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 14/15] drm/i915: stop including gt/uc/intel_uc.h from i915_drv.h X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Turns out it's not needed, except implicitly in a handful of places. Make them explicit. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_lmem.c | 5 +++-- drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c | 1 + drivers/gpu/drm/i915/gt/gen7_renderclear.c | 1 + drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/i915_sysfs.c | 2 ++ drivers/gpu/drm/i915/i915_utils.h | 1 + drivers/gpu/drm/i915/i915_vgpu.c | 2 ++ drivers/gpu/drm/i915/intel_region_ttm.c | 2 ++ 8 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c index 3198b64ad7db..a12047897650 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_lmem.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_lmem.c @@ -5,10 +5,11 @@ #include -#include "intel_memory_region.h" -#include "gem/i915_gem_region.h" #include "gem/i915_gem_lmem.h" +#include "gem/i915_gem_object.h" +#include "gem/i915_gem_region.h" #include "i915_drv.h" +#include "intel_memory_region.h" void __iomem * i915_gem_object_lmem_io_map(struct drm_i915_gem_object *obj, diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c index ad649523d5e0..b9f02de8c1bb 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c @@ -10,6 +10,7 @@ #include "intel_memory_region.h" #include "intel_region_ttm.h" +#include "gem/i915_gem_object.h" #include "gem/i915_gem_region.h" #include "gem/i915_gem_ttm.h" #include "gem/i915_gem_ttm_move.h" diff --git a/drivers/gpu/drm/i915/gt/gen7_renderclear.c b/drivers/gpu/drm/i915/gt/gen7_renderclear.c index d38b914d1206..0724ce39744a 100644 --- a/drivers/gpu/drm/i915/gt/gen7_renderclear.c +++ b/drivers/gpu/drm/i915/gt/gen7_renderclear.c @@ -5,6 +5,7 @@ #include "gen7_renderclear.h" #include "i915_drv.h" +#include "i915_vma.h" #include "intel_gpu_commands.h" #include "intel_gt_regs.h" diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index cd4d55f5f8de..fb7139514e18 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -45,7 +45,6 @@ #include "gt/intel_region_lmem.h" #include "gt/intel_workarounds.h" -#include "gt/uc/intel_uc.h" #include "soc/intel_pch.h" diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c index 613decd47760..6226ce924562 100644 --- a/drivers/gpu/drm/i915/i915_sysfs.c +++ b/drivers/gpu/drm/i915/i915_sysfs.c @@ -30,6 +30,8 @@ #include #include +#include + #include "gt/intel_gt_regs.h" #include "gt/intel_rc6.h" #include "gt/intel_rps.h" diff --git a/drivers/gpu/drm/i915/i915_utils.h b/drivers/gpu/drm/i915/i915_utils.h index c61066498bf2..039b0a849c81 100644 --- a/drivers/gpu/drm/i915/i915_utils.h +++ b/drivers/gpu/drm/i915/i915_utils.h @@ -26,6 +26,7 @@ #define __I915_UTILS_H #include +#include #include #include #include diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c index c97323973f9b..91f07b778eda 100644 --- a/drivers/gpu/drm/i915/i915_vgpu.c +++ b/drivers/gpu/drm/i915/i915_vgpu.c @@ -21,7 +21,9 @@ * SOFTWARE. */ +#include "gt/intel_gtt.h" #include "i915_drv.h" +#include "i915_gem_gtt.h" #include "i915_pvinfo.h" #include "i915_vgpu.h" diff --git a/drivers/gpu/drm/i915/intel_region_ttm.c b/drivers/gpu/drm/i915/intel_region_ttm.c index bf6097e7433d..d1fbd476a435 100644 --- a/drivers/gpu/drm/i915/intel_region_ttm.c +++ b/drivers/gpu/drm/i915/intel_region_ttm.c @@ -11,8 +11,10 @@ #include "intel_region_ttm.h" +#include "gem/i915_gem_object.h" #include "gem/i915_gem_region.h" #include "gem/i915_gem_ttm.h" /* For the funcs/ops export only */ + /** * DOC: TTM support structure * From patchwork Thu Sep 28 18:08:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jani Nikula X-Patchwork-Id: 13403441 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9CE27E732FD for ; Thu, 28 Sep 2023 18:10:11 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 0737310E6B1; Thu, 28 Sep 2023 18:10:11 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0D78810E6B0 for ; Thu, 28 Sep 2023 18:10:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1695924601; x=1727460601; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9gRRe28ruR/O41vlF7YYTtnuV6WKI5KzWSsp6GO2bkU=; b=nyYT6JlgPUN7jcTJMbt2m6YP1VnWkmA/ofcRtRHGX7lBgg/eCiunrus5 EUWribMuQmyEBlMTMCApFTNPihQZh/xhr8TLijKuCoGDsLgY1ZvTVw7Ki TcMmcyls3NVu2pd3ZJBJeudtLgyj2IvYI0uInLcIeVDoZZQv9oCfD31ww obSeSmOzll8GbyU908mGlHcXO2kaBB/D5C1iP1vuX/iMhvlXS/VGv3jNO rNKDzxDes6y04JRQR067cKBJu3+NaLXxf8McVDeTVZrn7wur6qyhprPtf J7vLMrzntt5+1Po8s/5IohR11UL3Jr9x5ch1Clf5b0C0BNQOd+cGFWHVC w==; X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="379407291" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="379407291" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:10:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10847"; a="1080659554" X-IronPort-AV: E=Sophos;i="6.03,184,1694761200"; d="scan'208";a="1080659554" Received: from danielba-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.53.20]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Sep 2023 11:09:59 -0700 From: Jani Nikula To: intel-gfx@lists.freedesktop.org Date: Thu, 28 Sep 2023 21:08:59 +0300 Message-Id: <0b866dc6fbb45fcee8a88fa4972822416e72cef2.1695924021.git.jani.nikula@intel.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Subject: [Intel-gfx] [PATCH 15/15] drm/i915: stop including gt/intel_workarounds.h from i915_drv.h X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jani.nikula@intel.com Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Not needed, and not included implicitly either. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index fb7139514e18..76b2019dc44e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -44,7 +44,6 @@ #include "gem/i915_gem_stolen.h" #include "gt/intel_region_lmem.h" -#include "gt/intel_workarounds.h" #include "soc/intel_pch.h"