From patchwork Fri Sep 29 08:42:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveenkumar I X-Patchwork-Id: 13403841 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4B7AEBE; Fri, 29 Sep 2023 08:43:20 +0000 (UTC) Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A7C092; Fri, 29 Sep 2023 01:43:17 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38T5qxsS016493; Fri, 29 Sep 2023 08:42:44 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=/2WaqLCZEMih8oMDFvFi+4OgpctQVeAmUcRntbvmJJs=; b=DDwy+fEABnZ+lrVA6+YdttCUEtMcjpPYi1cKj/31f2Ra4o1Z+qZMUWhlm5vEIN0vfaBU VCkpcS0v1gYEvVLfMxk7upwouVjAKfnZLn0+uWMXBnFgESz3F7kRqDUSrBbaYpjE2UQ0 rYk+GoIVaEzq6h6MPKguKwi3ikdP2nnuH88IZtC4ViFoxpAkJ7sXmybvRlnHuGkDHkf/ gpRFpZ3BsRz4oqe/Va66rI5sUdj3qPCCWcl3RnBvWivrXkwbzZ/8Nh7L7JfNgaNOHr7e EaN8aRec2pc4yw1/Xf9Lj8BhzKZeT10SdElXCGWdrfBN7E4xPb4KS7okQlf2VMeeBSzR zw== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tdqmv8d8u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:42:43 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38T8ggeQ032742 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:42:42 GMT Received: from hu-ipkumar-blr.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 29 Sep 2023 01:42:33 -0700 From: Praveenkumar I To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH 1/8] dt-bindings: phy: qcom,uniphy-usb: Document qcom,uniphy-usb phy Date: Fri, 29 Sep 2023 14:12:02 +0530 Message-ID: <20230929084209.3033093-2-quic_ipkumar@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> References: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: p-pCxQSYsWdBXDBznGtYfr5qXXYi0UQU X-Proofpoint-ORIG-GUID: p-pCxQSYsWdBXDBznGtYfr5qXXYi0UQU X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_07,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=970 spamscore=0 bulkscore=0 mlxscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 impostorscore=0 clxscore=1015 adultscore=0 phishscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290074 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Document the Qualcomm USB3 22ull UNIPHY present in IPQ5332. Signed-off-by: Praveenkumar I --- .../bindings/phy/qcom,ipq5332-usb-uniphy.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-uniphy.yaml diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-uniphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-uniphy.yaml new file mode 100644 index 000000000000..90434cee9cdd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-uniphy.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/qcom,ipq5332-usb-uniphy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm USB Super-Speed UNIPHY + +maintainers: + - Praveenkumar I + - Varadarajan Narayanan + +description: + USB Super-Speed UNIPHY found in Qualcomm IPQ5332, IPQ5018 SoCs. + +properties: + compatible: + items: + - const: qcom,ipq5332-usb-ssphy + + reg: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: ahb + - const: cfg_ahb + - const: pipe + + resets: + maxItems: 1 + + vdd-supply: + description: + Phandle to 5V regulator supply to PHY digital circuit. + + qcom,phy-usb-mux-sel: + description: PHY Mux Selection for USB + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle of TCSR syscon + - description: offset of PHY Mux selection register + + "#clock-cells": + const: 0 + + clock-output-names: + maxItems: 1 + + "#phy-cells": + const: 0 + +additionalProperties: false + +examples: + - | + #include + usb-phy@4b0000 { + compatible = "qcom,ipq5332-usb-uniphy"; + reg = <0x4b0000 0x800>; + + clocks = <&gcc GCC_PCIE3X1_PHY_AHB_CLK>, + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB0_PIPE_CLK>; + clock-names = "ahb", + "cfg_ahb", + "pipe"; + + resets = <&gcc GCC_USB0_PHY_BCR>; + + #clock-cells = <0>; + clock-output-names = "usb0_pipe_clk_src"; + + #phy-cells = <0>; + + qcom,phy-usb-mux-sel = <&tcsr 0x10540>; + + vdd-supply = <®ulator_fixed_5p0>; + }; From patchwork Fri Sep 29 08:42:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveenkumar I X-Patchwork-Id: 13403842 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 61E1EFBE3; Fri, 29 Sep 2023 08:43:23 +0000 (UTC) Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18A301BC; 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Fri, 29 Sep 2023 08:42:53 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38T8gqqK000365 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:42:52 GMT Received: from hu-ipkumar-blr.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 29 Sep 2023 01:42:42 -0700 From: Praveenkumar I To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH 2/8] phy: qcom: Introduce Super-Speed USB UNIPHY driver Date: Fri, 29 Sep 2023 14:12:03 +0530 Message-ID: <20230929084209.3033093-3-quic_ipkumar@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> References: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 7iNBC6nHgc8JR8P3PpO2fJIq7stRogav X-Proofpoint-GUID: 7iNBC6nHgc8JR8P3PpO2fJIq7stRogav X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_07,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 mlxlogscore=736 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 bulkscore=0 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290074 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Adds Qualcomm 22ull Super-Speed USB UNIPHY driver support which is present in Qualcomm IPQ5332 SoC. This PHY is interfaced with SNPS DWC3 USB and SNPS DWC PCIe. Either one of the interface can use the it and selection is done via mux present in TCSR register. This driver selects the PHY for DWC3 USB and handles the reset, clocks and regulator. Signed-off-by: Praveenkumar I --- drivers/phy/qualcomm/Kconfig | 11 + drivers/phy/qualcomm/Makefile | 1 + drivers/phy/qualcomm/phy-qcom-uniphy-usb.c | 322 +++++++++++++++++++++ 3 files changed, 334 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-uniphy-usb.c diff --git a/drivers/phy/qualcomm/Kconfig b/drivers/phy/qualcomm/Kconfig index d891058b7c39..7257c8455c53 100644 --- a/drivers/phy/qualcomm/Kconfig +++ b/drivers/phy/qualcomm/Kconfig @@ -154,6 +154,17 @@ config PHY_QCOM_M31_USB management. This driver is required even for peripheral only or host only mode configurations. +config PHY_QCOM_UNIPHY_USB + tristate "Qualcomm USB Super-Speed UNIPHY driver" + depends on USB && (ARCH_QCOM || COMPILE_TEST) + select GENERIC_PHY + help + Enable this to support the Qualcomm USB Super-Speed UNIPHY transceiver + with DWC3 USB core. It handles PHY initialization, clock + management required after resetting the hardware and power + management. This driver is required even for peripheral only or + host only mode configurations. + config PHY_QCOM_USB_HS tristate "Qualcomm USB HS PHY module" depends on USB_ULPI_BUS diff --git a/drivers/phy/qualcomm/Makefile b/drivers/phy/qualcomm/Makefile index ffd609ac6233..c3e0112a7a70 100644 --- a/drivers/phy/qualcomm/Makefile +++ b/drivers/phy/qualcomm/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_PHY_QCOM_QMP_USB_LEGACY) += phy-qcom-qmp-usb-legacy.o obj-$(CONFIG_PHY_QCOM_QUSB2) += phy-qcom-qusb2.o obj-$(CONFIG_PHY_QCOM_SNPS_EUSB2) += phy-qcom-snps-eusb2.o obj-$(CONFIG_PHY_QCOM_EUSB2_REPEATER) += phy-qcom-eusb2-repeater.o +obj-$(CONFIG_PHY_QCOM_UNIPHY_USB) += phy-qcom-uniphy-usb.o obj-$(CONFIG_PHY_QCOM_USB_HS) += phy-qcom-usb-hs.o obj-$(CONFIG_PHY_QCOM_USB_HSIC) += phy-qcom-usb-hsic.o obj-$(CONFIG_PHY_QCOM_USB_HS_28NM) += phy-qcom-usb-hs-28nm.o diff --git a/drivers/phy/qualcomm/phy-qcom-uniphy-usb.c b/drivers/phy/qualcomm/phy-qcom-uniphy-usb.c new file mode 100644 index 000000000000..fdfc9c225995 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-uniphy-usb.c @@ -0,0 +1,322 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define PCIE_USB_COMBO_PHY_CFG_MISC1 0x214 +#define PCIE_USB_COMBO_PHY_CFG_RX_AFE_2 0x7C4 +#define PCIE_USB_COMBO_PHY_CFG_RX_DLF_DEMUX_2 0x7E8 + +/* TCSR_USB_MUX_SEL regiter bits */ +#define TCSR_USB_MUX_SEL BIT(0) + +struct phy_init_tbl { + unsigned int offset; + unsigned int val; +}; + +#define PHY_INIT_CFG(o, v) \ + { \ + .offset = o, \ + .val = v, \ + } + +static const struct phy_init_tbl ipq5332_usb_uniphy_init_tbl[] = { + PHY_INIT_CFG(PCIE_USB_COMBO_PHY_CFG_RX_AFE_2, 0x1076), + PHY_INIT_CFG(PCIE_USB_COMBO_PHY_CFG_RX_DLF_DEMUX_2, 0x3142), + PHY_INIT_CFG(PCIE_USB_COMBO_PHY_CFG_MISC1, 0x3), +}; + +struct uniphy_cfg { + const struct phy_init_tbl *init_seq; + int num_init_seq; +}; + +struct uniphy_usb { + struct device *dev; + const struct uniphy_cfg *cfg; + struct phy *phy; + void __iomem *base; + struct clk_bulk_data *clks; + unsigned int num_clks; + struct reset_control *reset; + struct regulator *vreg; + struct clk_fixed_rate pipe_clk_fixed; + struct regmap *tcsr; + unsigned int usb_mux_offset; +}; + +static const struct uniphy_cfg ipq5332_usb_uniphy_cfg = { + .init_seq = ipq5332_usb_uniphy_init_tbl, + .num_init_seq = ARRAY_SIZE(ipq5332_usb_uniphy_init_tbl), +}; + +static int uniphy_usb_mux_enable(struct uniphy_usb *uniphy, bool enable) +{ + struct device *dev = uniphy->dev; + unsigned int val; + int ret; + + if (!uniphy->tcsr) + return -EINVAL; + + ret = regmap_read(uniphy->tcsr, uniphy->usb_mux_offset, &val); + if (ret) { + dev_err(dev, "Mux read failed: %d\n", ret); + return ret; + } + + val = enable ? (val | TCSR_USB_MUX_SEL) : (val & ~TCSR_USB_MUX_SEL); + ret = regmap_write(uniphy->tcsr, uniphy->usb_mux_offset, val); + if (ret) { + dev_err(dev, "Mux write failed: %d\n", ret); + return ret; + } + + return 0; +} + +static int uniphy_usb_init(struct phy *phy) +{ + struct uniphy_usb *uniphy = phy_get_drvdata(phy); + const struct uniphy_cfg *cfg = uniphy->cfg; + const struct phy_init_tbl *tbl = cfg->init_seq; + void __iomem *base = uniphy->base; + struct device *dev = uniphy->dev; + int i, ret; + + ret = regulator_enable(uniphy->vreg); + if (ret) { + dev_err(dev, "failed to enable regulator, %d\n", ret); + return ret; + } + + /* Perform phy reset */ + reset_control_assert(uniphy->reset); + usleep_range(1, 5); + reset_control_deassert(uniphy->reset); + + ret = uniphy_usb_mux_enable(uniphy, true); + if (ret < 0) + goto err_assert_reset; + + ret = clk_bulk_prepare_enable(uniphy->num_clks, uniphy->clks); + if (ret) { + dev_err(dev, "failed to enable clocks: %d\n", ret); + goto err_assert_reset; + } + + /* phy autoload delay */ + usleep_range(35, 40); + + for (i = 0; i < cfg->num_init_seq; i++) + writel(tbl[i].val, base + tbl[i].offset); + + return 0; + +err_assert_reset: + /* Assert phy reset */ + reset_control_assert(uniphy->reset); + + return ret; +} + +static int uniphy_usb_shutdown(struct phy *phy) +{ + struct uniphy_usb *uniphy = phy_get_drvdata(phy); + + clk_bulk_disable_unprepare(uniphy->num_clks, uniphy->clks); + + uniphy_usb_mux_enable(uniphy, false); + + /* Assert phy reset */ + reset_control_assert(uniphy->reset); + + regulator_disable(uniphy->vreg); + + return 0; +} + +static const struct phy_ops uniphy_usb_ops = { + .power_on = uniphy_usb_init, + .power_off = uniphy_usb_shutdown, + .owner = THIS_MODULE, +}; + +static int qcom_uniphy_usb_mux_init(struct uniphy_usb *uniphy) +{ + struct device *dev = uniphy->dev; + int ret; + + uniphy->tcsr = syscon_regmap_lookup_by_phandle_args(dev->of_node, "qcom,phy-usb-mux-sel", + 1, &uniphy->usb_mux_offset); + if (IS_ERR(uniphy->tcsr)) { + ret = PTR_ERR(uniphy->tcsr); + uniphy->tcsr = NULL; + return ret; + } + + return 0; +} + +static int qcom_uniphy_usb_clk_init(struct uniphy_usb *uniphy) +{ + struct device *dev = uniphy->dev; + int ret; + + ret = devm_clk_bulk_get_all(dev, &uniphy->clks); + if (ret < 0) + return ret; + + uniphy->num_clks = ret; + + return 0; +} + +static void phy_clk_release_provider(void *res) +{ + of_clk_del_provider(res); +} + +/* + * Register a fixed rate pipe clock. + * + * The _pipe_clksrc generated by PHY goes to the GCC that gate + * controls it. The _pipe_clk coming out of the GCC is requested + * by the PHY driver for its operations. + * We register the _pipe_clksrc here. The gcc driver takes care + * of assigning this _pipe_clksrc as parent to _pipe_clk. + * Below picture shows this relationship. + * + * +---------------+ + * | PHY block |<<---------------------------------------+ + * | | | + * | +-------+ | +-----+ | + * I/P---^-->| PLL |---^--->pipe_clksrc--->| GCC |--->pipe_clk---+ + * clk | +-------+ | +-----+ + * +---------------+ + */ +static int phy_pipe_clk_register(struct uniphy_usb *uniphy, struct device_node *np) +{ + struct clk_fixed_rate *fixed = &uniphy->pipe_clk_fixed; + struct device *dev = uniphy->dev; + struct clk_init_data init = { }; + int ret; + + ret = of_property_read_string(np, "clock-output-names", &init.name); + if (ret) { + dev_err(dev, "%pOFn: No clock-output-names\n", np); + return ret; + } + + init.ops = &clk_fixed_rate_ops; + + fixed->fixed_rate = 250000000; + fixed->hw.init = &init; + + ret = devm_clk_hw_register(dev, &fixed->hw); + if (ret) + return ret; + + ret = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &fixed->hw); + if (ret) + return ret; + + return devm_add_action_or_reset(dev, phy_clk_release_provider, np); +} + +static int qcom_uniphy_usb_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct phy_provider *phy_provider; + struct uniphy_usb *uniphy; + struct device_node *np; + int ret; + + uniphy = devm_kzalloc(dev, sizeof(*uniphy), GFP_KERNEL); + if (!uniphy) + return -ENOMEM; + + uniphy->dev = dev; + + uniphy->cfg = of_device_get_match_data(dev); + if (!uniphy->cfg) + return -EINVAL; + + uniphy->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(uniphy->base)) + return PTR_ERR(uniphy->base); + + ret = qcom_uniphy_usb_clk_init(uniphy); + if (ret) + return dev_err_probe(dev, ret, "failed to get clock\n"); + + ret = qcom_uniphy_usb_mux_init(uniphy); + if (ret) + return dev_err_probe(dev, ret, "failed to get USB mux\n"); + + uniphy->reset = devm_reset_control_get_exclusive_by_index(dev, 0); + if (IS_ERR(uniphy->reset)) + return dev_err_probe(dev, PTR_ERR(uniphy->reset), "failed to get reset\n"); + + uniphy->vreg = devm_regulator_get_exclusive(dev, "vdd"); + if (IS_ERR(uniphy->vreg)) + return dev_err_probe(dev, PTR_ERR(uniphy->phy), "failed to get vreg\n"); + + np = of_node_get(dev->of_node); + ret = phy_pipe_clk_register(uniphy, np); + if (ret) { + dev_err_probe(dev, ret, "failed to register pipe clk\n"); + goto err; + } + + uniphy->phy = devm_phy_create(dev, NULL, &uniphy_usb_ops); + if (IS_ERR(uniphy->phy)) { + ret = PTR_ERR(uniphy->phy); + dev_err_probe(dev, ret, "failed to create PHY\n"); + goto err; + } + + phy_set_drvdata(uniphy->phy, uniphy); + + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + ret = PTR_ERR_OR_ZERO(phy_provider); + +err: + of_node_put(np); + return ret; +} + +static const struct of_device_id qcom_uniphy_usb_of_match[] = { + { .compatible = "qcom,ipq5332-usb-uniphy", .data = &ipq5332_usb_uniphy_cfg}, + { }, +}; +MODULE_DEVICE_TABLE(of, qcom_uniphy_usb_of_match); + +static struct platform_driver qcom_uniphy_usb_driver = { + .probe = qcom_uniphy_usb_probe, + .driver = { + .of_match_table = qcom_uniphy_usb_of_match, + .name = "qcom,uniphy-usb", + } +}; +module_platform_driver(qcom_uniphy_usb_driver); + +MODULE_DESCRIPTION("Qualcomm Super-Speed USB UNIPHY driver"); +MODULE_LICENSE("GPL"); From patchwork Fri Sep 29 08:42:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveenkumar I X-Patchwork-Id: 13403843 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6DA111700; Fri, 29 Sep 2023 08:43:28 +0000 (UTC) Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8907CE3; Fri, 29 Sep 2023 01:43:27 -0700 (PDT) Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38T7Urv3027510; Fri, 29 Sep 2023 08:43:03 GMT DKIM-Signature: v=1; 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Signed-off-by: Praveenkumar I --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 25 ++++++++++++++++++++++++- 1 file changed, 24 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index d3fef2f80a81..b08ffd8c094e 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -158,6 +158,29 @@ usbphy0: phy@7b000 { status = "disabled"; }; + usbphy1: phy@4b0000 { + compatible = "qcom,ipq5332-usb-uniphy"; + reg = <0x4b0000 0x800>; + + clocks = <&gcc GCC_PCIE3X1_PHY_AHB_CLK>, + <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB0_PIPE_CLK>; + clock-names = "ahb", + "cfg_ahb", + "pipe"; + + resets = <&gcc GCC_USB0_PHY_BCR>; + + #clock-cells = <0>; + clock-output-names = "usb0_pipe_clk_src"; + + qcom,phy-usb-mux-sel = <&tcsr 0x10540>; + + #phy-cells = <0>; + + status = "disabled"; + }; + qfprom: efuse@a4000 { compatible = "qcom,ipq5332-qfprom", "qcom,qfprom"; reg = <0x000a4000 0x721>; @@ -200,7 +223,7 @@ gcc: clock-controller@1800000 { <&sleep_clk>, <0>, <0>, - <0>; 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Fri, 29 Sep 2023 01:43:02 -0700 From: Praveenkumar I To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH 4/8] dt-bindings: usb: dwc3: Add clocks on Qualcomm IPQ5332 Date: Fri, 29 Sep 2023 14:12:05 +0530 Message-ID: <20230929084209.3033093-5-quic_ipkumar@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> References: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 8tH2XLhxZZGsd95aT5c88-YoBwfrUzlG X-Proofpoint-GUID: 8tH2XLhxZZGsd95aT5c88-YoBwfrUzlG X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_07,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 malwarescore=0 mlxlogscore=742 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 priorityscore=1501 mlxscore=0 bulkscore=0 clxscore=1015 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290074 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add aux and lfps clocks in Qualcomm IPQ5332. These clocks are required for USB Super-Speed support. Signed-off-by: Praveenkumar I Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 20 ++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 67591057f234..18af2887b984 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -149,6 +149,25 @@ allOf: - const: sleep - const: mock_utmi + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq5332-dwc3 + then: + properties: + clocks: + maxItems: 6 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: aux + - const: lfps + - if: properties: compatible: @@ -238,7 +257,6 @@ allOf: compatible: contains: enum: - - qcom,ipq5332-dwc3 - qcom,msm8994-dwc3 - qcom,qcs404-dwc3 then: From patchwork Fri Sep 29 08:42:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveenkumar I X-Patchwork-Id: 13403845 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 72EECF9FB; Fri, 29 Sep 2023 08:43:42 +0000 (UTC) Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A38CDAC; Fri, 29 Sep 2023 01:43:40 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38T8XZcJ013854; Fri, 29 Sep 2023 08:43:22 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=uujz29C6vSVzpUjiXOlH1X3Fxf3wd0vz8+uZH71+ICc=; b=HzMku9gnkrQYxvP1QqIUIYPZbOiarhpCQA0WllTr9kVbbr9NKAtmYjanikTr0p+db/mq 0JOMEt4b6n/tzI2IGDZmMgMCUHiWfaQat8v2k13lFsQS2v42+6br/Tdswa+WNA68IdXt 63BRqzeMU+OUPjrmPNUIxFgU6ANtmNuBMAEFSVNaDS4KqtDPmlGRQBwq4luHOQeIW63I zNqnK9a+LRgac70rG44KyB0AD7shOLbBmgrSS77prvRgXJarhuZ7RXVY2tib9pTiapTK kxeFZQdf+ukbj8lIpQJGZDgbaXNfF8MiqWMd2w+Do1H19wTGPOKtOc2yUmapCkqz8U0m UQ== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tcvg9bj94-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:22 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38T8hL7U027901 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:21 GMT Received: from hu-ipkumar-blr.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 29 Sep 2023 01:43:11 -0700 From: Praveenkumar I To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH 5/8] arm64: dts: qcom: ipq5332: Add clocks for USB Super-Speed Date: Fri, 29 Sep 2023 14:12:06 +0530 Message-ID: <20230929084209.3033093-6-quic_ipkumar@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> References: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: UpTaHn4PtcuuLwYrLKfIxIceL9FCa9NP X-Proofpoint-GUID: UpTaHn4PtcuuLwYrLKfIxIceL9FCa9NP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_07,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 adultscore=0 bulkscore=0 suspectscore=0 mlxscore=0 mlxlogscore=550 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290074 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add aux and lfps clocks in USB node for Super-Speed support. Signed-off-by: Praveenkumar I --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index b08ffd8c094e..1813b9fa4bb5 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -336,11 +336,16 @@ usb: usb@8af8800 { clocks = <&gcc GCC_USB0_MASTER_CLK>, <&gcc GCC_SNOC_USB_CLK>, <&gcc GCC_USB0_SLEEP_CLK>, - <&gcc GCC_USB0_MOCK_UTMI_CLK>; + <&gcc GCC_USB0_MOCK_UTMI_CLK>, + <&gcc GCC_USB0_AUX_CLK>, + <&gcc GCC_USB0_LFPS_CLK>; + clock-names = "core", "iface", "sleep", - "mock_utmi"; + "mock_utmi", + "aux", + "lfps"; resets = <&gcc GCC_USB_BCR>; From patchwork Fri Sep 29 08:42:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveenkumar I X-Patchwork-Id: 13403846 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3E379F9F3; Fri, 29 Sep 2023 08:43:54 +0000 (UTC) Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5E8D8CE8; Fri, 29 Sep 2023 01:43:51 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38T7rQop001201; Fri, 29 Sep 2023 08:43:32 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=HusXIEVAr7kVQVL5wbvM38WphrwhI8AOSMhhv/PasUI=; b=J4uYqfrUREfoWpFbk9C2bFggRmPAcKgIXL3kMvjgxLcHKpIoGK1pBpHFX50AqDI7qfih EGlncJTwTDMWwfcfnIUqUIj1PSbRfKvW1mr+Bc+gAG29BlIq9mYjq1okSgU0JG5vpWrx Z8TXGEKKIsppuQhrjA9JxI+nZxsn5bJVFST1Dv80i5tyIISniBSonAWjOllTa7nmXDVH iwte1P7MU1BKNwQsMCpS1bpS8tPmlOya3tQTdykudKFuLTAcUVP270PNtCkJv56uHP86 KDy0uWq9BkdjxUYeTkQak3sdnHDA0CDz7H0c7VXgb3OBF+Y0jDWntTj/XxEC+sATTb3f WA== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3td24uaw1r-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:32 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38T8hVdQ027987 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:31 GMT Received: from hu-ipkumar-blr.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 29 Sep 2023 01:43:21 -0700 From: Praveenkumar I To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH 6/8] arm64: dts: qcom: ipq5332: Add Super-Speed UNIPHY in USB node Date: Fri, 29 Sep 2023 14:12:07 +0530 Message-ID: <20230929084209.3033093-7-quic_ipkumar@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> References: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eX1_OL9dx0rVcDQxRkNa4-JyfQ0snj8_ X-Proofpoint-ORIG-GUID: eX1_OL9dx0rVcDQxRkNa4-JyfQ0snj8_ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_07,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 malwarescore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 spamscore=0 priorityscore=1501 mlxscore=0 mlxlogscore=697 adultscore=0 bulkscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290074 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add UNIPHY node in USB to support Super-speed. As the SS PHY has pipe clock, removed "qcom,select-utmi-as-pipe-clk" flag. Signed-off-by: Praveenkumar I --- arch/arm64/boot/dts/qcom/ipq5332.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi index 1813b9fa4bb5..8fe4e45bfc18 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi @@ -349,8 +349,6 @@ usb: usb@8af8800 { resets = <&gcc GCC_USB_BCR>; - qcom,select-utmi-as-pipe-clk; - #address-cells = <1>; #size-cells = <1>; ranges; @@ -363,8 +361,8 @@ usb_dwc: usb@8a00000 { clocks = <&gcc GCC_USB0_MOCK_UTMI_CLK>; clock-names = "ref"; interrupts = ; - phy-names = "usb2-phy"; - phys = <&usbphy0>; + phy-names = "usb2-phy", "usb3-phy"; + phys = <&usbphy0>, <&usbphy1>; tx-fifo-resize; snps,is-utmi-l1-suspend; snps,hird-threshold = /bits/ 8 <0x0>; From patchwork Fri Sep 29 08:42:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveenkumar I X-Patchwork-Id: 13403847 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B7E778BF9; Fri, 29 Sep 2023 08:44:05 +0000 (UTC) Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A7899CD3; Fri, 29 Sep 2023 01:44:01 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38T8PAws030684; Fri, 29 Sep 2023 08:43:42 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=7Pd/Hq24s2rAKGYnnu/pX4uTXEwHJlayuzX7DkkoXXo=; b=EvDTa4EHa5T0xDzWRu//2ASHtlQj/ceMaGceRrl7fgh2D0PaJANTkESUWAtk13dV6Je5 iV9w4sHLmvZzGsM06wjVThUGn6uhJSaheRMZpN4u5OsHmdZJAJIt87qL05p+hWw2SzjT wZDsu/kkjtgTvvw1PUhYlVQMMWdeXlMZisa0eIqKVlqknP68UKZApwj/nFNGd+VPGiKW YOzfQjkjgL10KIOTZIHE4YZD9IalwDAfd/XKklPoe+xx3i+21sH90oXDyWX/AYtVf5NY ua482YSXaZHjniOM6V09HQaBjwUIQWvrr+20vfT+VII2hKYG+BGtbje4/kYwApoPPxnb mw== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tcvg9bj9s-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:41 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38T8heiX003446 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:40 GMT Received: from hu-ipkumar-blr.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 29 Sep 2023 01:43:31 -0700 From: Praveenkumar I To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH 7/8] arm64: dts: qcom: ipq5332: Enable USB Super-Speed PHY Date: Fri, 29 Sep 2023 14:12:08 +0530 Message-ID: <20230929084209.3033093-8-quic_ipkumar@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> References: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 5A1BGYCP5YInhkUIiPSUDmjw_bXWRe90 X-Proofpoint-GUID: 5A1BGYCP5YInhkUIiPSUDmjw_bXWRe90 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_07,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 adultscore=0 bulkscore=0 suspectscore=0 mlxscore=0 mlxlogscore=285 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290074 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Enable USB Super-Speed PHY support. Signed-off-by: Praveenkumar I --- arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts index c224ffc65b08..45e4142f028c 100644 --- a/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp468.dts @@ -102,3 +102,9 @@ &usbphy0 { status = "okay"; }; + +&usbphy1 { + vdd-supply = <®ulator_fixed_5p0>; + + status = "okay"; +}; From patchwork Fri Sep 29 08:42:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Praveenkumar I X-Patchwork-Id: 13403848 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0923511712; Fri, 29 Sep 2023 08:44:10 +0000 (UTC) Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18C90170D; Fri, 29 Sep 2023 01:44:09 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38T8NZrX028301; Fri, 29 Sep 2023 08:43:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=BZXIAXF1GcsWzT88JgZL9KOqUY3nkaOKwAT8v03JQEE=; b=Lz0+TTrAKaAzLMMtZmiPAZ320CD4+VcRzqjnbEAuBcrrZUT4qJadZ7CFf5gXMzb9+1Cs 2yHxY0sXCnfwZQZUVn1EC/WHRU52o16Z7zcUPmirh6yA3bCGZk4hickbge/4ZF3ww1hy SdaaSp1w8L/qcCzTvjt3Pv0FSi7GGKuNJMgfJhv8WweJgfuK7YqkazqxESwD//D6vMDN kUsD5aVdJNxZm/t4yyH7l0FDLpdGmpCqAm7Y/F72IlC+XWp9kJyDgkHhZgRZcDoUJvoH 5YkpLmAvqwLm8/BVnOVzjW5M7/5F7D9B+fjI1OSSrN3UbJfqtxYaFfVyGg5QS9FUCdE3 VQ== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tcvg9bjaa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:51 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38T8hoiO022760 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 29 Sep 2023 08:43:50 GMT Received: from hu-ipkumar-blr.qualcomm.com (10.80.80.8) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.30; Fri, 29 Sep 2023 01:43:40 -0700 From: Praveenkumar I To: , , , , , , , , , , , , , , , , , , , , , , , , , CC: , , Subject: [PATCH 8/8] arm64: defconfig: Enable qcom USB UNIPHY driver Date: Fri, 29 Sep 2023 14:12:09 +0530 Message-ID: <20230929084209.3033093-9-quic_ipkumar@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> References: <20230929084209.3033093-1-quic_ipkumar@quicinc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: GTdaUXR8mrpY3IfGTg2dweKkPatieDU5 X-Proofpoint-GUID: GTdaUXR8mrpY3IfGTg2dweKkPatieDU5 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-09-29_07,2023-09-28_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 adultscore=0 bulkscore=0 suspectscore=0 mlxscore=0 mlxlogscore=319 spamscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2309180000 definitions=main-2309290074 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Enable USB UNIPHY driver present in Qualcomm IPQ5332. Signed-off-by: Praveenkumar I Reviewed-by: Krzysztof Kozlowski --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 758bb96bd184..155a862e907d 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1424,6 +1424,7 @@ CONFIG_PHY_QCOM_PCIE2=m CONFIG_PHY_QCOM_QMP=m CONFIG_PHY_QCOM_QUSB2=m CONFIG_PHY_QCOM_SNPS_EUSB2=m +CONFIG_PHY_QCOM_UNIPHY_USB=m CONFIG_PHY_QCOM_USB_HS=m CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2=m CONFIG_PHY_QCOM_USB_HS_28NM=m