From patchwork Fri Sep 29 15:41:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 13404544 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9443EE728C1 for ; Fri, 29 Sep 2023 15:43:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FNPjBvnm1JQdtaPNS5WGzM2jQuxkgtBO3KQcBbiF+3o=; b=sHW2n+9QqVSE5/ NTrJ31jsX26zmkPrc27ZdJ0fzhJtn01mlmbNGkyJbN7KD+z5nqsynNK2mrcdZjWLqcoNVWUvERwuy GomwTppXxVE3b505e0TWzJP5QCIkQ5CkJP+YlNzg/M40lH0TcgIsaE9c5r9WxDzrCXjJ2DbNAd4Sw /5N22Pe8mthmGhbk9zAg2DNDWaLhSgUyFTgJIuujD45ZNhdi7OjmkbyaHi+vifR7dqXg/dkIikGMJ KzdUqH6VdU1zC2SmEj9k9JktGhjtS8AHwtnfCUWjLkJvFDTepx436rav652K/PmSrkh2X4NoOa6n2 SxCpzgcoh+RjuQtnY8cA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdo-008DXW-0d; Fri, 29 Sep 2023 15:42:56 +0000 Received: from mx1.hosting.skole.hr ([161.53.165.185] helo=mx.skole.hr) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdk-008DUs-2H for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2023 15:42:54 +0000 Received: from mx1.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id 0A9F482388; Fri, 29 Sep 2023 17:42:47 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Date: Fri, 29 Sep 2023 17:41:57 +0200 Subject: [PATCH RESEND v5 1/8] gpio: pxa: disable pinctrl calls for MMP_GPIO MIME-Version: 1.0 Message-Id: <20230929-pxa1908-lkml-v5-1-5aa5a1109c5f@skole.hr> References: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> In-Reply-To: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> To: Robert Jarzmik , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , =?utf-8?q?Duje_Mihanovi?= =?utf-8?q?=C4=87?= Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hardening@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, afaerber@suse.de, balejk@matfyz.cz X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=717; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=yNr4Eqx9Bi0YeNPlA8O02XTVqPtmRaJFN4LA8s4bBdA=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlFvByWVc9E8OD4qhhAbUIxeBnSccOKCeOL4dds BFOjRd1vQSJAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZRbwcgAKCRCaEZ6wQi2W 4Xt+D/0TkYMy0YcQtgCw1tS6bwfNQts/LWwksqUegyHiR+8ItFU8dUPsHHhVUyUETy+QZnZ9yFe fdDylRoUvEPfTKXyX1aba+iNDXCNtiRslTIq10o3WgqjhYn7xiZap6MNQw2/npQLRrEv83R2vGN BCWApSlXUs3+XcCxU2IJeM1zh6wtZtpwHi+ibfA3DK6e5BW1npgmhlZ+agh8eIwWg8oN/LB6l+x H0rBmWO1tykmEqLGz1DoWulk60a94q6PbDUzYVrC1cSjiCLMfIG3lp6cc/Y/Z3TyF/rhLxipy3O Q34V5ttDxgT4JRmG4Xw7fQODVW1A9nGsT1KIXRSR17ElB+DtvgA3ySHXSMTrgK+Wgpu9XgraUn2 9LfmdNeBPeLfiQqkZLbyEagThieqKEhH/o6yDal+VKtFXOXGUPmQPadERGaW27Z0Ecd8mvwW9a4 TF/sWvOK3xwfzmVehdYNbpnmxUUsSHWYaCfWmhsxW3s4bBB1ZDTdFba11tBR2Uq89fX3XMc3M3g bUbLNE8hrGfkQqklQJokC5iqgpM37srWx3bM49TvzinFl0qr7ljxxwxqkbeUJa5mGSXNSWcuVXs 53Qpht9sYMVXc+0oNC06dEs+XGnqgq85xBEGmo2m8AvoiwF5pAh8+Z59UrvM0P4CgWAjZp7CQbt oTYCARrGmyFRdVQ== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230929_084252_908971_AF88DAC8 X-CRM114-Status: UNSURE ( 7.69 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Similarly to PXA3xx and MMP2, pinctrl-single isn't capable of setting pin direction on MMP either. Fixes: a770d946371e ("gpio: pxa: add pin control gpio direction and request") Signed-off-by: Duje Mihanović Reviewed-by: Andy Shevchenko --- drivers/gpio/gpio-pxa.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpio/gpio-pxa.c b/drivers/gpio/gpio-pxa.c index a1630ed4b741..d92650aecb06 100644 --- a/drivers/gpio/gpio-pxa.c +++ b/drivers/gpio/gpio-pxa.c @@ -238,6 +238,7 @@ static bool pxa_gpio_has_pinctrl(void) switch (gpio_type) { case PXA3XX_GPIO: case MMP2_GPIO: + case MMP_GPIO: return false; default: From patchwork Fri Sep 29 15:41:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 13404546 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BCA15E728C0 for ; Fri, 29 Sep 2023 15:43:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=useodjmJFwUID75HJekymuaWtjTuNt0YyrA5Rq+maQs=; b=AiMYpFq0OZ4JRs Ov9xwsRXvJy0PGuGEgMNxz1+WBJu48juw6lCv9KNRrHMc3MRQuMT8/NZmJlW1Pe+efK4SHA4EMoMJ KFCptALXB2ef0jaNfd7ntHFeZQARkwI+iijC4ledaB2YERETpYbbUsa/P763g4O4hkGIHw3f1mxjR rRYshHtHeo2JcFkCa+oGdILt26Z7WzdcpF9HQBWddTPVNIYVqz2LBlB+l+GO7CsUAfVzQzvfgIF+t zulbL8318f+6pHO9o9EBpE/sEmV/hZcHwCb0Unp0xwhvTFgVXd7Hm/LUl6cf5UAhqD380/y+fCmdN 8DaBCYMY+80uc0BEgZJQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdx-008Ddo-2k; Fri, 29 Sep 2023 15:43:05 +0000 Received: from mx2.hosting.skole.hr ([161.53.165.186] helo=mx.skole.hr) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdk-008DUo-1v for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2023 15:42:57 +0000 Received: from mx2.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id C67B683948; Fri, 29 Sep 2023 17:42:48 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Date: Fri, 29 Sep 2023 17:41:58 +0200 Subject: [PATCH RESEND v5 2/8] clk: mmp: Switch to use struct u32_fract instead of custom one MIME-Version: 1.0 Message-Id: <20230929-pxa1908-lkml-v5-2-5aa5a1109c5f@skole.hr> References: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> In-Reply-To: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> To: Robert Jarzmik , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , =?utf-8?q?Duje_Mihanovi?= =?utf-8?q?=C4=87?= Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hardening@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, afaerber@suse.de, balejk@matfyz.cz, Andy Shevchenko X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=12358; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=OZqzjGq8w/ph1jAP2fPcRKviHRNEwZ1SpqZyE3ETUdM=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlFvByOXOscauWFB+c9PjZR/SFWPwK5baInir8T E9b5QX9IJiJAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZRbwcgAKCRCaEZ6wQi2W 4RvZD/95yodIbsij0hbSFSB5ek7eVzh/OpasLbNd4uGrquj2LjnlvFycAb7b/BNz740NfjXKOfV 6d7KLQ/1fzv0OVTdegi1MiPt7/nR2fwcnF8so254Jys+hRx/DVZ9dDh9tsQh6LLYjWsbI8bRIK5 H/HEPr2RVzbfLm7j909nUDSJMp+u3PXNGzPSb74wXQjQCxawDsLAoDBZ4QLoXyKY4APvySiLvow fQXMCJSIr9D7euDalhvxDuaSsy8AE7KFSJZ7pyL/Knx//umYack69YRz0xhBrPn/qs7Iv8JTHHE dUmEBq3USeh33San0cH+11gErq536CfhS4fwC3trfX6J+361nUAcbILGH7AqrV672WJICFWorH2 Sc3P7Qv+dPeqrVxPTzpT78HiZOSEELrPTenSRT3ceYTH0QBExSbrZB/vSwJRaYnhDkCjZU2X3Hs bPcpKSZJxbe2gnbnHb2mdptdDCQJUbvgdWkXU5n8EfSegLp8UaSQcWqq6pf+F9ikT1npUq2rPtq 1HRRDfwxYWSqQIrzjD4uLspA/x+RajP18zNifhaNkIaj2pcGeuKWO7QeQOXw18mLUmKttZj7T++ YNx8B559shnXfHVTUZ+bMn35Z2ZaDchmfCH1ZpcTGcnGIRdEdtUYNdRAsEjYVbisOR4pBBrHwWX J6S3x/SvuabkKQw== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230929_084252_980708_C8F03943 X-CRM114-Status: GOOD ( 20.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Andy Shevchenko The struct mmp_clk_factor_tbl repeats the generic struct u32_fract. Kill the custom one and use the generic one instead. Signed-off-by: Andy Shevchenko Tested-by: Duje Mihanović Signed-off-by: Duje Mihanović Reviewed-by: Linus Walleij --- drivers/clk/mmp/clk-frac.c | 57 ++++++++++++++++++++-------------------- drivers/clk/mmp/clk-mmp2.c | 6 ++--- drivers/clk/mmp/clk-of-mmp2.c | 26 +++++++++--------- drivers/clk/mmp/clk-of-pxa168.c | 4 +-- drivers/clk/mmp/clk-of-pxa1928.c | 6 ++--- drivers/clk/mmp/clk-of-pxa910.c | 4 +-- drivers/clk/mmp/clk-pxa168.c | 4 +-- drivers/clk/mmp/clk-pxa910.c | 4 +-- drivers/clk/mmp/clk.h | 10 +++---- 9 files changed, 58 insertions(+), 63 deletions(-) diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c index 1b90867b60c4..6556f6ada2e8 100644 --- a/drivers/clk/mmp/clk-frac.c +++ b/drivers/clk/mmp/clk-frac.c @@ -26,14 +26,15 @@ static long clk_factor_round_rate(struct clk_hw *hw, unsigned long drate, { struct mmp_clk_factor *factor = to_clk_factor(hw); u64 rate = 0, prev_rate; + struct u32_fract *d; int i; for (i = 0; i < factor->ftbl_cnt; i++) { - prev_rate = rate; - rate = *prate; - rate *= factor->ftbl[i].den; - do_div(rate, factor->ftbl[i].num * factor->masks->factor); + d = &factor->ftbl[i]; + prev_rate = rate; + rate = (u64)(*prate) * d->denominator; + do_div(rate, d->numerator * factor->masks->factor); if (rate > drate) break; } @@ -52,23 +53,22 @@ static unsigned long clk_factor_recalc_rate(struct clk_hw *hw, { struct mmp_clk_factor *factor = to_clk_factor(hw); struct mmp_clk_factor_masks *masks = factor->masks; - unsigned int val, num, den; + struct u32_fract d; + unsigned int val; u64 rate; val = readl_relaxed(factor->base); /* calculate numerator */ - num = (val >> masks->num_shift) & masks->num_mask; + d.numerator = (val >> masks->num_shift) & masks->num_mask; /* calculate denominator */ - den = (val >> masks->den_shift) & masks->den_mask; - - if (!den) + d.denominator = (val >> masks->den_shift) & masks->den_mask; + if (!d.denominator) return 0; - rate = parent_rate; - rate *= den; - do_div(rate, num * factor->masks->factor); + rate = (u64)parent_rate * d.denominator; + do_div(rate, d.numerator * factor->masks->factor); return rate; } @@ -82,18 +82,18 @@ static int clk_factor_set_rate(struct clk_hw *hw, unsigned long drate, int i; unsigned long val; unsigned long flags = 0; + struct u32_fract *d; u64 rate = 0; for (i = 0; i < factor->ftbl_cnt; i++) { - rate = prate; - rate *= factor->ftbl[i].den; - do_div(rate, factor->ftbl[i].num * factor->masks->factor); + d = &factor->ftbl[i]; + rate = (u64)prate * d->denominator; + do_div(rate, d->numerator * factor->masks->factor); if (rate > drate) break; } - if (i > 0) - i--; + d = i ? &factor->ftbl[i - 1] : &factor->ftbl[0]; if (factor->lock) spin_lock_irqsave(factor->lock, flags); @@ -101,10 +101,10 @@ static int clk_factor_set_rate(struct clk_hw *hw, unsigned long drate, val = readl_relaxed(factor->base); val &= ~(masks->num_mask << masks->num_shift); - val |= (factor->ftbl[i].num & masks->num_mask) << masks->num_shift; + val |= (d->numerator & masks->num_mask) << masks->num_shift; val &= ~(masks->den_mask << masks->den_shift); - val |= (factor->ftbl[i].den & masks->den_mask) << masks->den_shift; + val |= (d->denominator & masks->den_mask) << masks->den_shift; writel_relaxed(val, factor->base); @@ -118,7 +118,8 @@ static int clk_factor_init(struct clk_hw *hw) { struct mmp_clk_factor *factor = to_clk_factor(hw); struct mmp_clk_factor_masks *masks = factor->masks; - u32 val, num, den; + struct u32_fract d; + u32 val; int i; unsigned long flags = 0; @@ -128,23 +129,22 @@ static int clk_factor_init(struct clk_hw *hw) val = readl(factor->base); /* calculate numerator */ - num = (val >> masks->num_shift) & masks->num_mask; + d.numerator = (val >> masks->num_shift) & masks->num_mask; /* calculate denominator */ - den = (val >> masks->den_shift) & masks->den_mask; + d.denominator = (val >> masks->den_shift) & masks->den_mask; for (i = 0; i < factor->ftbl_cnt; i++) - if (den == factor->ftbl[i].den && num == factor->ftbl[i].num) + if (d.denominator == factor->ftbl[i].denominator && + d.numerator == factor->ftbl[i].numerator) break; if (i >= factor->ftbl_cnt) { val &= ~(masks->num_mask << masks->num_shift); - val |= (factor->ftbl[0].num & masks->num_mask) << - masks->num_shift; + val |= (factor->ftbl[0].numerator & masks->num_mask) << masks->num_shift; val &= ~(masks->den_mask << masks->den_shift); - val |= (factor->ftbl[0].den & masks->den_mask) << - masks->den_shift; + val |= (factor->ftbl[0].denominator & masks->den_mask) << masks->den_shift; } if (!(val & masks->enable_mask) || i >= factor->ftbl_cnt) { @@ -168,8 +168,7 @@ static const struct clk_ops clk_factor_ops = { struct clk *mmp_clk_register_factor(const char *name, const char *parent_name, unsigned long flags, void __iomem *base, struct mmp_clk_factor_masks *masks, - struct mmp_clk_factor_tbl *ftbl, - unsigned int ftbl_cnt, spinlock_t *lock) + struct u32_fract *ftbl, unsigned int ftbl_cnt, spinlock_t *lock) { struct mmp_clk_factor *factor; struct clk_init_data init; diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c index aabacfa10158..ab7dde7e7a44 100644 --- a/drivers/clk/mmp/clk-mmp2.c +++ b/drivers/clk/mmp/clk-mmp2.c @@ -59,9 +59,9 @@ static struct mmp_clk_factor_masks uart_factor_masks = { .den_shift = 0, }; -static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 8125, .den = 1536}, /*14.745MHZ */ - {.num = 3521, .den = 689}, /*19.23MHZ */ +static struct u32_fract uart_factor_tbl[] = { + { .numerator = 8125, .denominator = 1536 }, /* 14.745MHZ */ + { .numerator = 3521, .denominator = 689 }, /* 19.23MHZ */ }; static const char *uart_parent[] = {"uart_pll", "vctcxo"}; diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c index bcf60f43aa13..d771b3e5fb2d 100644 --- a/drivers/clk/mmp/clk-of-mmp2.c +++ b/drivers/clk/mmp/clk-of-mmp2.c @@ -141,9 +141,9 @@ static struct mmp_clk_factor_masks uart_factor_masks = { .den_shift = 0, }; -static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 8125, .den = 1536}, /*14.745MHZ */ - {.num = 3521, .den = 689}, /*19.23MHZ */ +static struct u32_fract uart_factor_tbl[] = { + { .numerator = 8125, .denominator = 1536 }, /* 14.745MHZ */ + { .numerator = 3521, .denominator = 689 }, /* 19.23MHZ */ }; static struct mmp_clk_factor_masks i2s_factor_masks = { @@ -155,16 +155,16 @@ static struct mmp_clk_factor_masks i2s_factor_masks = { .enable_mask = 0xd0000000, }; -static struct mmp_clk_factor_tbl i2s_factor_tbl[] = { - {.num = 24868, .den = 511}, /* 2.0480 MHz */ - {.num = 28003, .den = 793}, /* 2.8224 MHz */ - {.num = 24941, .den = 1025}, /* 4.0960 MHz */ - {.num = 28003, .den = 1586}, /* 5.6448 MHz */ - {.num = 31158, .den = 2561}, /* 8.1920 MHz */ - {.num = 16288, .den = 1845}, /* 11.2896 MHz */ - {.num = 20772, .den = 2561}, /* 12.2880 MHz */ - {.num = 8144, .den = 1845}, /* 22.5792 MHz */ - {.num = 10386, .den = 2561}, /* 24.5760 MHz */ +static struct u32_fract i2s_factor_tbl[] = { + { .numerator = 24868, .denominator = 511 }, /* 2.0480 MHz */ + { .numerator = 28003, .denominator = 793 }, /* 2.8224 MHz */ + { .numerator = 24941, .denominator = 1025 }, /* 4.0960 MHz */ + { .numerator = 28003, .denominator = 1586 }, /* 5.6448 MHz */ + { .numerator = 31158, .denominator = 2561 }, /* 8.1920 MHz */ + { .numerator = 16288, .denominator = 1845 }, /* 11.2896 MHz */ + { .numerator = 20772, .denominator = 2561 }, /* 12.2880 MHz */ + { .numerator = 8144, .denominator = 1845 }, /* 22.5792 MHz */ + { .numerator = 10386, .denominator = 2561 }, /* 24.5760 MHz */ }; static DEFINE_SPINLOCK(acgr_lock); diff --git a/drivers/clk/mmp/clk-of-pxa168.c b/drivers/clk/mmp/clk-of-pxa168.c index 130d1a723879..17cb5c622c31 100644 --- a/drivers/clk/mmp/clk-of-pxa168.c +++ b/drivers/clk/mmp/clk-of-pxa168.c @@ -104,8 +104,8 @@ static struct mmp_clk_factor_masks uart_factor_masks = { .den_shift = 0, }; -static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 8125, .den = 1536}, /*14.745MHZ */ +static struct u32_fract uart_factor_tbl[] = { + { .numerator = 8125, .denominator = 1536 }, /* 14.745MHZ */ }; static void pxa168_pll_init(struct pxa168_clk_unit *pxa_unit) diff --git a/drivers/clk/mmp/clk-of-pxa1928.c b/drivers/clk/mmp/clk-of-pxa1928.c index 2508a0d795f8..675d695c5f7d 100644 --- a/drivers/clk/mmp/clk-of-pxa1928.c +++ b/drivers/clk/mmp/clk-of-pxa1928.c @@ -58,9 +58,9 @@ static struct mmp_clk_factor_masks uart_factor_masks = { .den_shift = 0, }; -static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 832, .den = 234}, /*58.5MHZ */ - {.num = 1, .den = 1}, /*26MHZ */ +static struct u32_fract uart_factor_tbl[] = { + { .numerator = 832, .denominator = 234 }, /* 58.5MHZ */ + { .numerator = 1, .denominator = 1 }, /* 26MHZ */ }; static void pxa1928_pll_init(struct pxa1928_clk_unit *pxa_unit) diff --git a/drivers/clk/mmp/clk-of-pxa910.c b/drivers/clk/mmp/clk-of-pxa910.c index 4d15bac987eb..f5b0b7b278c0 100644 --- a/drivers/clk/mmp/clk-of-pxa910.c +++ b/drivers/clk/mmp/clk-of-pxa910.c @@ -84,8 +84,8 @@ static struct mmp_clk_factor_masks uart_factor_masks = { .den_shift = 0, }; -static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 8125, .den = 1536}, /*14.745MHZ */ +static struct u32_fract uart_factor_tbl[] = { + { .numerator = 8125, .denominator = 1536 }, /* 14.745MHZ */ }; static void pxa910_pll_init(struct pxa910_clk_unit *pxa_unit) diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c index 8a9b8fb3a465..2ea88945bffd 100644 --- a/drivers/clk/mmp/clk-pxa168.c +++ b/drivers/clk/mmp/clk-pxa168.c @@ -52,8 +52,8 @@ static struct mmp_clk_factor_masks uart_factor_masks = { .den_shift = 0, }; -static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 8125, .den = 1536}, /*14.745MHZ */ +static struct u32_fract uart_factor_tbl[] = { + { .numerator = 8125, .denominator = 1536 }, /* 14.745MHZ */ }; static const char *uart_parent[] = {"pll1_3_16", "uart_pll"}; diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c index 9fcd76316d7e..e29b0fd6f423 100644 --- a/drivers/clk/mmp/clk-pxa910.c +++ b/drivers/clk/mmp/clk-pxa910.c @@ -50,8 +50,8 @@ static struct mmp_clk_factor_masks uart_factor_masks = { .den_shift = 0, }; -static struct mmp_clk_factor_tbl uart_factor_tbl[] = { - {.num = 8125, .den = 1536}, /*14.745MHZ */ +static struct u32_fract uart_factor_tbl[] = { + { .numerator = 8125, .denominator = 1536 }, /* 14.745MHZ */ }; static const char *uart_parent[] = {"pll1_3_16", "uart_pll"}; diff --git a/drivers/clk/mmp/clk.h b/drivers/clk/mmp/clk.h index 55ac05379781..c83cec169ddc 100644 --- a/drivers/clk/mmp/clk.h +++ b/drivers/clk/mmp/clk.h @@ -3,6 +3,7 @@ #define __MACH_MMP_CLK_H #include +#include #include #include @@ -20,16 +21,11 @@ struct mmp_clk_factor_masks { unsigned int enable_mask; }; -struct mmp_clk_factor_tbl { - unsigned int num; - unsigned int den; -}; - struct mmp_clk_factor { struct clk_hw hw; void __iomem *base; struct mmp_clk_factor_masks *masks; - struct mmp_clk_factor_tbl *ftbl; + struct u32_fract *ftbl; unsigned int ftbl_cnt; spinlock_t *lock; }; @@ -37,7 +33,7 @@ struct mmp_clk_factor { extern struct clk *mmp_clk_register_factor(const char *name, const char *parent_name, unsigned long flags, void __iomem *base, struct mmp_clk_factor_masks *masks, - struct mmp_clk_factor_tbl *ftbl, unsigned int ftbl_cnt, + struct u32_fract *ftbl, unsigned int ftbl_cnt, spinlock_t *lock); /* Clock type "mix" */ From patchwork Fri Sep 29 15:41:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 13404550 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DFC3CE728C0 for ; Fri, 29 Sep 2023 15:43:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=04oPQcpOuHSLL2IDyiGneUtB7Rju6tYrPHnmZTqfzyQ=; b=aHyRiANiHMSrNG Y0h48nP/j6Ru0A6ncw64o5NOleoWQc4c8zKe5INbo12SFqSAvknu+88yXGxI5N9wA0UcLBkah26y9 cQ5ZJXL6+LpT4noJvENINwOgbH8wJH/V6lqpTc3TvvRK8VQ3++n71D3AZjPRHWZzze1jYDJL3Ce/J lnyhy14TdOZ+9Ji7CDVlx6sEWgMaN9Ek83uSubcZeuniw+THR4KrYqxhwIbX7JDFgzbVsLURWjttg d2CAYtljiLnaaT9LipZHxnftCBADwA8QinLPk/RqZS1PBNra5Hm6kHMXjUpidgEI4bF4C+ZzCZdr+ N23HcIeod3QT88suRyOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdv-008Dc9-3C; Fri, 29 Sep 2023 15:43:03 +0000 Received: from mx1.hosting.skole.hr ([161.53.165.185] helo=mx.skole.hr) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdk-008DUv-2H for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2023 15:42:55 +0000 Received: from mx1.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id AE4EF82788; Fri, 29 Sep 2023 17:42:49 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Date: Fri, 29 Sep 2023 17:41:59 +0200 Subject: [PATCH RESEND v5 3/8] dt-bindings: clock: Add Marvell PXA1908 clock bindings MIME-Version: 1.0 Message-Id: <20230929-pxa1908-lkml-v5-3-5aa5a1109c5f@skole.hr> References: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> In-Reply-To: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> To: Robert Jarzmik , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , =?utf-8?q?Duje_Mihanovi?= =?utf-8?q?=C4=87?= Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hardening@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, afaerber@suse.de, balejk@matfyz.cz X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=4871; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=AUK3ojXv/weyVgsG0fonV+dY76THzUXLtJhekj7l2Zk=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlFvByKEZwnLbjtEnIKan+33G1Pzg3xbjIK0UlI qXVNR8eZDSJAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZRbwcgAKCRCaEZ6wQi2W 4RqBD/9HnLK1rF9UZJRyKLHyF70/u9liG90KnVAii0wNo2NKIm56y930OGoHX7CdvSd9YC9763M Vu3xu1OvijxB6cTjBckway8JMdy5tP+deLJc63w5W1sgcSpD4K1HKznA3ouaJVRM5dMg0ERTFRO vBAv4aswfyY92Ptvgoaubj3Z3hbaakF0n5QLmf5lFcbWo8FBE4EzVLHttxAyhwHj/EJSr0fjjPp K+Y/sWcPS8zGQm3mSzSDLpyr8XZLk2LtSMGuX4J1FMuhAsyoTtqJOZIc5zKSaE+rZTHl53Mi8u8 JF8eddgkVi3V9Fehi2KRcOFcrGZRx5hjN70KvvFEql3w/X4I5cikV6++ygyxdBpW8t3vd/dmpkn xV9/bY1WF+HdavTnmxWIlLY8/zjo2O0wQwJtSMa17GWyCZproxaEGgzCZNO+fo5aD89aAWYhWUG GfYhUCepC1Mw2qqGqWbZx8glhTScCFdGCz9wytfNOZeanq8wOYSBj0B6Qxyh78PfAa548luccGN UvQ16Pu0Kq5NayWPLO50vZXES4q7yrTYFMrGPSNNLzhTpYOB34z3MZLuMJp/GboObHcfCYQTyCp 3KN2es7HRiqPIh1t8qlxXKgfa8hAWWUoPXYVKuxZjR4O6AwX+ueF2ZCuW0UDmUc/r9PK2zD1f6J 3kl2J6zUo2tGKIQ== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230929_084252_908820_0AA6B0FE X-CRM114-Status: GOOD ( 11.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add dt bindings and documentation for the Marvell PXA1908 clock controller. Signed-off-by: Duje Mihanović Reviewed-by: Conor Dooley --- .../devicetree/bindings/clock/marvell,pxa1908.yaml | 48 ++++++++++++ include/dt-bindings/clock/marvell,pxa1908.h | 88 ++++++++++++++++++++++ 2 files changed, 136 insertions(+) diff --git a/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml new file mode 100644 index 000000000000..4e78933232b6 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,pxa1908.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell PXA1908 Clock Controllers + +maintainers: + - Duje Mihanović + +description: | + The PXA1908 clock subsystem generates and supplies clock to various + controllers within the PXA1908 SoC. The PXA1908 contains numerous clock + controller blocks, with the ones currently supported being APBC, APBCP, MPMU + and APMU roughly corresponding to internal buses. + + All these clock identifiers could be found in . + +properties: + compatible: + enum: + - marvell,pxa1908-apbc + - marvell,pxa1908-apbcp + - marvell,pxa1908-mpmu + - marvell,pxa1908-apmu + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + # APMU block: + - | + clock-controller@d4282800 { + compatible = "marvell,pxa1908-apmu"; + reg = <0xd4282800 0x400>; + #clock-cells = <1>; + }; diff --git a/include/dt-bindings/clock/marvell,pxa1908.h b/include/dt-bindings/clock/marvell,pxa1908.h new file mode 100644 index 000000000000..fb15b0d0cd4c --- /dev/null +++ b/include/dt-bindings/clock/marvell,pxa1908.h @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +#ifndef __DTS_MARVELL_PXA1908_CLOCK_H +#define __DTS_MARVELL_PXA1908_CLOCK_H + +/* plls */ +#define PXA1908_CLK_CLK32 1 +#define PXA1908_CLK_VCTCXO 2 +#define PXA1908_CLK_PLL1_624 3 +#define PXA1908_CLK_PLL1_416 4 +#define PXA1908_CLK_PLL1_499 5 +#define PXA1908_CLK_PLL1_832 6 +#define PXA1908_CLK_PLL1_1248 7 +#define PXA1908_CLK_PLL1_D2 8 +#define PXA1908_CLK_PLL1_D4 9 +#define PXA1908_CLK_PLL1_D8 10 +#define PXA1908_CLK_PLL1_D16 11 +#define PXA1908_CLK_PLL1_D6 12 +#define PXA1908_CLK_PLL1_D12 13 +#define PXA1908_CLK_PLL1_D24 14 +#define PXA1908_CLK_PLL1_D48 15 +#define PXA1908_CLK_PLL1_D96 16 +#define PXA1908_CLK_PLL1_D13 17 +#define PXA1908_CLK_PLL1_32 18 +#define PXA1908_CLK_PLL1_208 19 +#define PXA1908_CLK_PLL1_117 20 +#define PXA1908_CLK_PLL1_416_GATE 21 +#define PXA1908_CLK_PLL1_624_GATE 22 +#define PXA1908_CLK_PLL1_832_GATE 23 +#define PXA1908_CLK_PLL1_1248_GATE 24 +#define PXA1908_CLK_PLL1_D2_GATE 25 +#define PXA1908_CLK_PLL1_499_EN 26 +#define PXA1908_CLK_PLL2VCO 27 +#define PXA1908_CLK_PLL2 28 +#define PXA1908_CLK_PLL2P 29 +#define PXA1908_CLK_PLL2VCODIV3 30 +#define PXA1908_CLK_PLL3VCO 31 +#define PXA1908_CLK_PLL3 32 +#define PXA1908_CLK_PLL3P 33 +#define PXA1908_CLK_PLL3VCODIV3 34 +#define PXA1908_CLK_PLL4VCO 35 +#define PXA1908_CLK_PLL4 36 +#define PXA1908_CLK_PLL4P 37 +#define PXA1908_CLK_PLL4VCODIV3 38 + +/* apb (apbc) peripherals */ +#define PXA1908_CLK_UART0 1 +#define PXA1908_CLK_UART1 2 +#define PXA1908_CLK_GPIO 3 +#define PXA1908_CLK_PWM0 4 +#define PXA1908_CLK_PWM1 5 +#define PXA1908_CLK_PWM2 6 +#define PXA1908_CLK_PWM3 7 +#define PXA1908_CLK_SSP0 8 +#define PXA1908_CLK_SSP1 9 +#define PXA1908_CLK_IPC_RST 10 +#define PXA1908_CLK_RTC 11 +#define PXA1908_CLK_TWSI0 12 +#define PXA1908_CLK_KPC 13 +#define PXA1908_CLK_SWJTAG 14 +#define PXA1908_CLK_SSP2 15 +#define PXA1908_CLK_TWSI1 16 +#define PXA1908_CLK_THERMAL 17 +#define PXA1908_CLK_TWSI3 18 + +/* apb (apbcp) peripherals */ +#define PXA1908_CLK_UART2 1 +#define PXA1908_CLK_TWSI2 2 +#define PXA1908_CLK_AICER 3 + +/* axi (apmu) peripherals */ +#define PXA1908_CLK_CCIC1 1 +#define PXA1908_CLK_ISP 2 +#define PXA1908_CLK_DSI1 3 +#define PXA1908_CLK_DISP1 4 +#define PXA1908_CLK_CCIC0 5 +#define PXA1908_CLK_SDH0 6 +#define PXA1908_CLK_SDH1 7 +#define PXA1908_CLK_USB 8 +#define PXA1908_CLK_NF 9 +#define PXA1908_CLK_CORE_DEBUG 10 +#define PXA1908_CLK_VPU 11 +#define PXA1908_CLK_GC 12 +#define PXA1908_CLK_SDH2 13 +#define PXA1908_CLK_GC2D 14 +#define PXA1908_CLK_TRACE 15 +#define PXA1908_CLK_DVC_DFC_DEBUG 16 + +#endif From patchwork Fri Sep 29 15:42:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 13404548 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0BEBFE728C1 for ; Fri, 29 Sep 2023 15:43:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6U2bF95ymtdPl9NymnwMNg7Lir55mjlGYdsW8Bv8mts=; b=ITS2oM7L60xW43 lpCyt9aSC2VosErcAS6DQGbhpBRr6gR0yjM5qXM7m/cw+bm9sj2uHQtqPaTazrHRODvyoDpvB5A+l DNOu/yqmHEaozkB3/Sxtj9n5fZOzil+f4CcwzWR6dLLxxX4fjfmoCUALVCUB/VOv7Nlai6o3LkxUD nrSFarJh1VyBUeYdp1wZsCynhJUfgcX2nGRlTICSwx8EJ5crIzxVvzYMI9cuSLVrlGLw9HKXotNtQ Y9FGeQkroz7xu7/nV8tRcIesz5axJ/bFMLab5MMErVeBRe8+TxIPAEff1eAuRhKSVWDAGZRzr/AaO 8Uujc5FJXN5tOZYNYshg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdy-008DeH-1d; Fri, 29 Sep 2023 15:43:06 +0000 Received: from mx1.hosting.skole.hr ([161.53.165.185] helo=mx.skole.hr) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdm-008DVs-25 for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2023 15:42:57 +0000 Received: from mx1.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id A0C55834CD; Fri, 29 Sep 2023 17:42:52 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Date: Fri, 29 Sep 2023 17:42:01 +0200 Subject: [PATCH RESEND v5 5/8] dt-bindings: marvell: Document PXA1908 SoC MIME-Version: 1.0 Message-Id: <20230929-pxa1908-lkml-v5-5-5aa5a1109c5f@skole.hr> References: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> In-Reply-To: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> To: Robert Jarzmik , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , =?utf-8?q?Duje_Mihanovi?= =?utf-8?q?=C4=87?= Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hardening@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, afaerber@suse.de, balejk@matfyz.cz, Krzysztof Kozlowski X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=890; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=68SP0psZM8Sot29iAM52aLi+c+3JVnNIUMMY8bC0VIc=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlFvBykbMfnls1yGf4fnlrBhT+2giyUpNMrmngY NrnBlnuSCWJAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZRbwcgAKCRCaEZ6wQi2W 4Q1UD/0a2+plywFrZfoPOUGfUG21u20/lq32w+NkuuOqs0DPmluvGJ5lXnub50JGVHmZDhS/mW6 Ln47gQ/55U0zv6SOIqHXJiR7tw8yZ/fZeny9n5orx7vRUa2GlER2xH9X8Ml8eRjU8mfR1ynopjW PXRSyNCqQeGaBChiK8V0bvZ2pKoLjuJV5iZUaRPGUnHvuy1R68ogDAtiwgPrPs8OS4hmCJVZSdS 9rUuN9TeXaNhIHr5ZRaShmFR1fv4vCgBthvyedVJCrOBJF3ebbvpFCwWdGf72TA5hYnwur2QMZv dKCyFntK5EmICsXlS3L/X8rN154ze0TcbuWZI98hLw9R1GExT1RsbkcNa3Wy6r2wx7KApqGHzRX bB1uGp8haqSOhURcbeAZ8WTszBaJIExB1Jms6SkeDBo1nq4zNPgDGgnKF4E8SH5tLB4DZXy/sf7 zjmqXpvZ0ZoFQh5XbRQG0SL3sIzO2SNNprqd6TkbdE7lJiDmB/3TJ4U++EeVzPZ+31WJFPTTT9D ExNtFFTVNBRtHNkIBhxKU5yxFy2s2yvPr+9bWFFV/LEM+Q5XVoVEGPahC7Bxd0FwCTdaTGdKOKi XZw0n8lHbSbB8bQ8Q0ODp36k2nUc3k8oUkk7IztLMv2pAxjEJb+vU8o7nQ26EDnKh55BYtUepuS AewQLy2gKT+t58A== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230929_084254_841297_631E5F21 X-CRM114-Status: UNSURE ( 7.95 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add dt binding for the Marvell PXA1908 SoC. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Duje Mihanović --- Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml index 4c43eaf3632e..f73bb8ec3a1a 100644 --- a/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml +++ b/Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml @@ -35,6 +35,11 @@ properties: - enum: - dell,wyse-ariel - const: marvell,mmp3 + - description: PXA1908 based boards + items: + - enum: + - samsung,coreprimevelte + - const: marvell,pxa1908 additionalProperties: true From patchwork Fri Sep 29 15:42:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 13404547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 83FD5E728C2 for ; Fri, 29 Sep 2023 15:43:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=krXO8NHzMf0O4JA2w3Vs/EX4HDaqiak365d5DC4sG5o=; b=V6rZSc+s4+Ar6W McrI1qEyG+ZkpXGjWHw/eMgC7Eqa17tbzr8e5yCnfWvMZER7IJN7p1vRQS5EAzrRK7x8tUdDBd218 ZwzKx+VvVGmnMPGHowTR722d6o749ufW5Qcjx5x8GmNxWZzd9hZ66hZ/7Wi/oZRs1SphkfRC7N5tp TBiKSEJXb/fwHCT0BI0/gA8V4YzuVXW9uJC3mSCmkDOujbfVRRJHGSfNhNKEdfplO+d2uu5Nq1Jst 8sQR+1O8eWKjw1UevNwD7LL+nNZPChBuf9kJTrfHzM/WHhSsgKvi9kVtfsKJNwNWP4P1MglAN+XTF xZ5rVMeTFpodHr7mhZvA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdz-008Df8-0k; Fri, 29 Sep 2023 15:43:07 +0000 Received: from mx1.hosting.skole.hr ([161.53.165.185] helo=mx.skole.hr) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdn-008DW7-11 for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2023 15:42:57 +0000 Received: from mx1.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id B954F8349A; Fri, 29 Sep 2023 17:42:53 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Date: Fri, 29 Sep 2023 17:42:02 +0200 Subject: [PATCH RESEND v5 6/8] arm64: Kconfig.platforms: Add config for Marvell PXA1908 platform MIME-Version: 1.0 Message-Id: <20230929-pxa1908-lkml-v5-6-5aa5a1109c5f@skole.hr> References: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> In-Reply-To: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> To: Robert Jarzmik , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , =?utf-8?q?Duje_Mihanovi?= =?utf-8?q?=C4=87?= Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hardening@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, afaerber@suse.de, balejk@matfyz.cz X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=848; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=EiZLJFEyV4LY8QGlZs87/IL+BtGJZigZwDQYelB5sZM=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlFvBy5uzW/LL/CcRvs8TKhAE2CJDg53uNJXpqB WIj3G5CfaSJAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZRbwcgAKCRCaEZ6wQi2W 4eK1D/oDPrI8Qg9Z7g/Nm10aEg0oGnGPrgFYif0TsiH1kF4RdzGfuNlM7Ph+z9VZysWbnCxvcFr JL7IVR5E86SvYVoWbtDyP8gt51aHZeW4wYs0LT+c/9zuZa49I4SGDKdPwHpyTPzYEYuU1clJ7qk oABb32rdSPMhbVHK0g4t0oKhAr0rrHOuQYGVIf0pa8Eyj/IM1HA6NzT6N3eDRY1XY1oBE84FwxW dJCRJ3NaEi0gef08e0kdkVrxx++x+1U8l+c6qWLx6/J+m7BP7/L7IJS5dqumHc15FOgSNtL4Abs MBoviEwxZqrwELp76IQUwK5SKCoJ/hyCnDEoNs8CViHPsZP3o8id3b2DcPauZwEp4+0lB6y08Mn Qfyhx5Ag6WQFMec/fhRG3xEbFBhwnuONl8waiBt0riSVCmkYIvc0HDRbW/c1OrEvmgPD2BCIKeB 4yTRZsRuyefAfCANJ4uXKpQ4Q37BJaPATaAqo6kR7HPrNga6v8+JzA9L3nWoB9ni8P5XfyWKBrp EZR7etx4f70NwLUNAjDw2jk85nwnREnuTKP/7U4NZJ9PhHVX2/J7IisV2MYuLVHj6hReE77M8yO E6S5080StLX2ysPiwQ6m8kYP0BwIuA1oVNriwAjlPUwh0f4bi1hA3r42Q3Fv/JSGRmRpmm0CTC5 CYB0hDhLjSL1CPg== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230929_084255_513588_6F885F17 X-CRM114-Status: UNSURE ( 9.01 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add ARCH_MMP configuration option for Marvell PXA1908 SoC. Signed-off-by: Duje Mihanović --- arch/arm64/Kconfig.platforms | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 6069120199bb..b417cae42c84 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -89,6 +89,17 @@ config ARCH_BERLIN help This enables support for Marvell Berlin SoC Family +config ARCH_MMP + bool "Marvell MMP SoC Family" + select ARM_GIC + select ARM_ARCH_TIMER + select ARM_SMMU + select MMP_PDMA + select PINCTRL_SINGLE + help + This enables support for Marvell MMP SoC family, currently + supporting PXA1908 aka IAP140. + config ARCH_BITMAIN bool "Bitmain SoC Platforms" help From patchwork Fri Sep 29 15:42:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 13404549 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1EDBE728C3 for ; Fri, 29 Sep 2023 15:43:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=YGFYy7lI3i6GB3MfI1UQIK44wKHEV1r7RdAOnOBfHFY=; b=N5ktdXlecHWFyv zFszunb8DrTrUzv/ORgbdcS2//yNlBqo+yzbIKyGAEMViQAJshH8EvOMjyWXn8u6RA3daXOgjq+HA QTVns0FAxi0DCKFzp7gIKLzz0eFcz0gF2pzbwhck3BHBeA/5ljz+bwXaTPf44onFKDk8JPFz1pd4d oCuYFuqcTqtVEd1BiU0lihwBT8vyWpyE3So7z7a+DBQhTaOas5ukVqpf/m6FnTEQkKZ7gvWdTpbV1 7dZr6qxMN6Z2/nI1K6Pq31swaKlOHZGuorc9o9FpmAKlehgG8XJHuFUp+JPjr2vB3rNNqLuj9irim 8jRdSVDnfC7uzHtBtUJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qmFe0-008Dfz-14; Fri, 29 Sep 2023 15:43:08 +0000 Received: from mx2.hosting.skole.hr ([161.53.165.186] helo=mx.skole.hr) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdo-008DWn-1a for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2023 15:42:59 +0000 Received: from mx2.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id D16C584797; Fri, 29 Sep 2023 17:42:54 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Date: Fri, 29 Sep 2023 17:42:03 +0200 Subject: [PATCH RESEND v5 7/8] arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte MIME-Version: 1.0 Message-Id: <20230929-pxa1908-lkml-v5-7-5aa5a1109c5f@skole.hr> References: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> In-Reply-To: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> To: Robert Jarzmik , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , =?utf-8?q?Duje_Mihanovi?= =?utf-8?q?=C4=87?= Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hardening@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, afaerber@suse.de, balejk@matfyz.cz X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=16631; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=2c0hb5LBLXsrVFv04ue9K/qoyIKoDb9fUmDQ4Od8x/w=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlFvBzv0ymFecw4ompNSIC35srYz7OK2u3d0k0k KDtt9ee1R+JAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZRbwcwAKCRCaEZ6wQi2W 4RyDEACMJMT/zaTT5CMslaCbzkgf2fBvDNa6KNXJMdzI/mnkARq7YkNV4bR2mY+GywxRv5dx+RL hEetNWcE9TUqq1WO9eaZjA7iQ9x4nZv/V0EJ5BBbzquMPahdiGwBB5HaIR6rS/YNVPWeUlEFBdi KmZMjb3hV4HgbJ+dSqY0pSiR3wc6ZCVm+2Xd6LUDYlwZH6G7KB3WMi2bZgRVCzW9TZxOQ3PGtVV qs3qEYuHnQYx/SIYBv5X77eVvJSCemKa7Vew8E4HvmpomDuHK+KfCLgKcV9YHwzYx1tlGv8EIyK Evbb/lbwbYpI58rqigSnvVCdGeq+P5mWlmB/bM3NdDxVCLqm0h95zSkW3RB+UDFYUAqqphFGEBe bUg79pWctt4I6P6TE/JRCl0NJp4ZIEVanKMydK+wUzpAsLS5IdBM3fvi4EwgKYJhLVkt5IL03rs zecI9sn5vABZm/tYEYz1jMYuSJk4m8b8/sWZAxa8f8RZetu8uyLF9rFoEBT4jwMytSyT5mAGzkk ddjS/VJQpfg9fsQnfO6TCFR0N0mH+3u+tPMX+24NvpMGX4gZcaqSzce9N+NwOuznqDRZssKJjKa 7kZSxxjJ7xlxx2poOPVwNsWP15fgqqWg4xt8QjGjZbtQmk0V6YkTUyBN/bD5+1vy+RHL5Nzt1nc GZ5jQ7zZCGlgBJA== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230929_084256_867021_361F00C7 X-CRM114-Status: GOOD ( 14.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add DTS for Marvell PXA1908 SoC and Samsung Galaxy Core Prime Value Edition LTE, a smartphone based on said SoC. Signed-off-by: Duje Mihanović --- arch/arm64/boot/dts/marvell/Makefile | 3 + .../dts/marvell/pxa1908-samsung-coreprimevelte.dts | 333 +++++++++++++++++++++ arch/arm64/boot/dts/marvell/pxa1908.dtsi | 295 ++++++++++++++++++ 3 files changed, 631 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile index 79ac09b58a89..263be6ec7567 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -27,3 +27,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db-B.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb + +# MMP SoC Family +dtb-$(CONFIG_ARCH_MMP) += pxa1908-samsung-coreprimevelte.dtb diff --git a/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts new file mode 100644 index 000000000000..e3c863d517a8 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts @@ -0,0 +1,333 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include "pxa1908.dtsi" +#include +#include + +/ { + model = "Samsung Galaxy Core Prime VE LTE"; + compatible = "samsung,coreprimevelte", "marvell,pxa1908"; + + aliases { + mmc0 = &sdh2; /* eMMC */ + mmc1 = &sdh0; /* SD card */ + serial0 = &uart0; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "serial0:115200n8"; + + fb0: framebuffer@17177000 { + compatible = "simple-framebuffer"; + reg = <0 0x17177000 0 (480 * 800 * 4)>; + width = <480>; + height = <800>; + stride = <(480 * 4)>; + format = "a8r8g8b8"; + }; + }; + + /* Bootloader fills this in */ + memory { + device_type = "memory"; + reg = <0 0 0 0>; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + framebuffer@17000000 { + reg = <0 0x17000000 0 0x1800000>; + no-map; + }; + + gpu@9000000 { + reg = <0 0x9000000 0 0x1000000>; + }; + + /* Communications processor, aka modem */ + cp@3000000 { + reg = <0 0x3000000 0 0x5000000>; + }; + + cm3@a000000 { + reg = <0 0xa000000 0 0x80000>; + }; + + seclog@8000000 { + reg = <0 0x8000000 0 0x100000>; + }; + + ramoops@8100000 { + compatible = "ramoops"; + reg = <0 0x8100000 0 0x40000>; + record-size = <0x8000>; + console-size = <0x20000>; + max-reason = <5>; + }; + }; + + + i2c-muic { + compatible = "i2c-gpio"; + sda-gpios = <&gpio 30 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + scl-gpios = <&gpio 29 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; + i2c-gpio,delay-us = <3>; + i2c-gpio,timeout-ms = <100>; + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c_muic_pins>; + + muic: extcon@14 { + compatible = "siliconmitus,sm5504-muic"; + reg = <0x14>; + interrupt-parent = <&gpio>; + interrupts = <0 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys_pins>; + autorepeat; + + key-home { + label = "Home"; + linux,code = ; + gpios = <&gpio 50 GPIO_ACTIVE_LOW>; + }; + + key-volup { + label = "Volume Up"; + linux,code = ; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + key-voldown { + label = "Volume Down"; + linux,code = ; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&smmu { + status = "okay"; +}; + +&pmx { + pinctrl-single,gpio-range = <&range 55 55 0>, + <&range 110 32 0>, + <&range 52 1 0>; + + pinctrl-names = "default"; + pinctrl-0 = <&board_pins_1 &board_pins_2 &board_pins_3>; + + board_pins_1: pinmux-board-1 { + pinctrl-single,pins = < + 0x160 0 + 0x164 0 + 0x168 0 + 0x16c 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0x8000 0x8000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0x8000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0x288 0x388>; + }; + + board_pins_2: pinmux-board-2 { + pinctrl-single,pins = < + 0x44 1 + 0x48 1 + 0x20 1 + 0x18 1 + 0x14 1 + 0x10 1 + 0xc 1 + 0x8 1 + 0x68 1 + 0x58 0 + 0x54 0 + 0x7c 0 + 0x6c 0 + 0x70 0 + 0x4c 1 + 0x50 1 + 0xac 0 + 0x90 0 + 0x8c 0 + 0x88 0 + 0x84 0 + 0xc8 0 + 0x128 0 + 0x190 0 + 0x194 0 + 0x1a0 0 + 0x114 0 + 0x118 0 + 0x1d8 0 + 0x1e4 0 + 0xe8 0 + 0x100 0 + 0x204 0 + 0x210 0 + 0x218 0 + >; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xc000>; + pinctrl-single,low-power-mode = <0x288 0x388>; + }; + + board_pins_3: pinmux-board-3 { + pinctrl-single,pins = < + 0x260 0 + 0x264 0 + 0x268 0 + 0x26c 0 + 0x270 0 + 0x274 0 + 0x78 0 + 0x74 0 + 0xb0 1 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + uart0_pins: pinmux-uart0 { + pinctrl-single,pins = < + 0x198 6 + 0x19c 6 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + gpio_keys_pins: pinmux-gpio-keys { + pinctrl-single,pins = < + 0x11c 0 + 0x120 0 + 0x1a4 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa0000 0x8000 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + i2c_muic_pins: pinmux-i2c-muic { + pinctrl-single,pins = < + 0x154 0 + 0x150 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0x288 0x388>; + }; + + sdh0_pins_1: pinmux-sdh0-1 { + pinctrl-single,pins = < + 0x108 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + sdh0_pins_2: pinmux-sdh0-2 { + pinctrl-single,pins = < + 0x94 0 + 0x98 0 + 0x9c 0 + 0xa0 0 + 0xa4 0 + >; + pinctrl-single,drive-strength = <0x800 0x1800>; + pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0 0x388>; + }; + + sdh0_pins_3: pinmux-sdh0-3 { + pinctrl-single,pins = < + 0xa8 0 + >; + pinctrl-single,drive-strength = <0x1000 0x1800>; + pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>; + pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>; + pinctrl-single,input-schmitt = <0 0x30>; + pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>; + pinctrl-single,low-power-mode = <0x208 0x388>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; +}; + +&twsi0 { + status = "okay"; +}; + +&twsi1 { + status = "okay"; +}; + +&twsi2 { + status = "okay"; +}; + +&twsi3 { + status = "okay"; +}; + +&usb { + extcon = <&muic>, <&muic>; +}; + +&sdh2 { + /* Disabled for now because initialization fails with -ETIMEDOUT. */ + status = "disabled"; + bus-width = <8>; + non-removable; + broken-cd; + mmc-ddr-1_8v; +}; + +&sdh0 { + pinctrl-names = "default"; + pinctrl-0 = <&sdh0_pins_1 &sdh0_pins_2 &sdh0_pins_3>; + cd-gpios = <&gpio 11 0>; + cd-inverted; + bus-width = <4>; + wp-inverted; +}; diff --git a/arch/arm64/boot/dts/marvell/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/pxa1908.dtsi new file mode 100644 index 000000000000..cc322b9a0e9e --- /dev/null +++ b/arch/arm64/boot/dts/marvell/pxa1908.dtsi @@ -0,0 +1,295 @@ +// SPDX-License-Identifier: GPL-2.0-only +/dts-v1/; + +#include +#include + +/ { + model = "Marvell Armada PXA1908"; + compatible = "marvell,pxa1908"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 0>; + enable-method = "psci"; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 1>; + enable-method = "psci"; + }; + + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 2>; + enable-method = "psci"; + }; + + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a53"; + reg = <0 3>; + enable-method = "psci"; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + smmu: iommu@c0010000 { + compatible = "arm,mmu-400"; + reg = <0 0xc0010000 0 0x10000>; + #global-interrupts = <1>; + #iommu-cells = <1>; + interrupts = , + ; + status = "disabled"; + }; + + gic: interrupt-controller@d1df9000 { + compatible = "arm,gic-400"; + reg = <0 0xd1df9000 0 0x1000>, + <0 0xd1dfa000 0 0x2000>, + /* The subsequent registers are guesses. */ + <0 0xd1dfc000 0 0x2000>, + <0 0xd1dfe000 0 0x2000>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <3>; + }; + + apb@d4000000 { + compatible = "simple-bus"; + reg = <0 0xd4000000 0 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xd4000000 0x200000>; + + pdma: dma-controller@0 { + compatible = "marvell,pdma-1.0"; + reg = <0 0x10000>; + interrupts = ; + dma-channels = <30>; + #dma-cells = <2>; + }; + + twsi1: i2c@10800 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10800 0x64>; + interrupts = ; + clocks = <&apbc PXA1908_CLK_TWSI1>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + twsi0: i2c@11000 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11000 0x64>; + interrupts = ; + clocks = <&apbc PXA1908_CLK_TWSI0>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + twsi3: i2c@13800 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x13800 0x64>; + interrupts = ; + clocks = <&apbc PXA1908_CLK_TWSI3>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + apbc: clock-controller@15000 { + compatible = "marvell,pxa1908-apbc"; + reg = <0x15000 0x1000>; + #clock-cells = <1>; + }; + + uart0: serial@17000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; + reg = <0x17000 0x1000>; + interrupts = ; + clocks = <&apbc PXA1908_CLK_UART0>; + reg-shift = <2>; + }; + + uart1: serial@18000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; + reg = <0x18000 0x1000>; + interrupts = ; + clocks = <&apbc PXA1908_CLK_UART1>; + reg-shift = <2>; + }; + + gpio: gpio@19000 { + compatible = "marvell,mmp-gpio"; + reg = <0x19000 0x800>; + #address-cells = <1>; + #size-cells = <1>; + gpio-controller; + #gpio-cells = <2>; + clocks = <&apbc PXA1908_CLK_GPIO>; + interrupts = ; + interrupt-names = "gpio_mux"; + interrupt-controller; + #interrupt-cells = <2>; + ranges = <0 0x19000 0x800>; + + gpio@0 { + reg = <0x0 0x4>; + }; + + gpio@4 { + reg = <0x4 0x4>; + }; + + gpio@8 { + reg = <0x8 0x4>; + }; + + gpio@100 { + reg = <0x100 0x4>; + }; + }; + + pmx: pinmux@1e000 { + compatible = "pinconf-single"; + reg = <0x1e000 0x330>; + #address-cells = <1>; + #size-cells = <1>; + #gpio-range-cells = <3>; + ranges; + + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <7>; + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + }; + + uart2: serial@36000 { + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; + reg = <0x36000 0x1000>; + interrupts = ; + clocks = <&apbcp PXA1908_CLK_UART2>; + reg-shift = <2>; + }; + + twsi2: i2c@37000 { + compatible = "mrvl,mmp-twsi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x37000 0x64>; + interrupts = ; + clocks = <&apbcp PXA1908_CLK_TWSI2>; + mrvl,i2c-fast-mode; + status = "disabled"; + }; + + apbcp: clock-controller@3b000 { + compatible = "marvell,pxa1908-apbcp"; + reg = <0x3b000 0x1000>; + #clock-cells = <1>; + }; + + mpmu: clock-controller@50000 { + compatible = "marvell,pxa1908-mpmu"; + reg = <0x50000 0x1000>; + #clock-cells = <1>; + }; + }; + + axi@d4200000 { + compatible = "simple-bus"; + reg = <0 0xd4200000 0 0x200000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0xd4200000 0x200000>; + + usbphy: phy@7000 { + compatible = "marvell,pxa1928-usb-phy"; + reg = <0x7000 0x200>; + clocks = <&apmu PXA1908_CLK_USB>; + #phy-cells = <0>; + }; + + usb: usb@8000 { + compatible = "chipidea,usb2"; + reg = <0x8000 0x200>; + interrupts = ; + clocks = <&apmu PXA1908_CLK_USB>; + phys = <&usbphy>; + phy-names = "usb-phy"; + }; + + sdh0: mmc@80000 { + compatible = "mrvl,pxav3-mmc"; + reg = <0x80000 0x120>; + interrupts = ; + clocks = <&apmu PXA1908_CLK_SDH0>; + clock-names = "io"; + mrvl,clk-delay-cycles = <31>; + }; + + sdh1: mmc@80800 { + compatible = "mrvl,pxav3-mmc"; + reg = <0x80800 0x120>; + interrupts = ; + clocks = <&apmu PXA1908_CLK_SDH1>; + clock-names = "io"; + mrvl,clk-delay-cycles = <31>; + }; + + sdh2: mmc@81000 { + compatible = "mrvl,pxav3-mmc"; + reg = <0x81000 0x120>; + interrupts = ; + clocks = <&apmu PXA1908_CLK_SDH2>; + clock-names = "io"; + mrvl,clk-delay-cycles = <31>; + }; + + apmu: clock-controller@82800 { + compatible = "marvell,pxa1908-apmu"; + reg = <0x82800 0x400>; + #clock-cells = <1>; + }; + }; + }; +}; From patchwork Fri Sep 29 15:42:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Duje_Mihanovi=C4=87?= X-Patchwork-Id: 13404551 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 553F5E728C2 for ; Fri, 29 Sep 2023 15:43:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References:Message-Id :MIME-Version:Subject:Date:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5WocjgE2nSgyEHzuyCcTHQMoPgJ7YMgDwSsWCZi+Lus=; b=1Mc8CEXk43lJzj gkJ97N0/X2MFydtZxHJIXthOu6HhbiB79MM8gyIhhnBekvCtTHPq6KYDao5yj6JsUvtcdYwhKQAHP ufu/I1oqsEpQj0FaDGgkEuZeNa6UxFGYreRmY4HBSnh9EKzENocKyo7ywOAKSndlPhzrEMj8zXhDR hF7tWLMjKgKBFjnYebyGwYcavmxRdW2hwR4Tc7kN2AunUrssIrD/aHKFQiQ7pZEkB2oUVDgGtE+fz A+u6ch5/ptdHmTuFOshHGq3DqSM1jwRCUUVcvG9DiCv/UrP4m4qJoorIP9tsMikaL3M2Jg+03uO+i RzwczF7XCShIno6OOGKA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdz-008DfU-2T; Fri, 29 Sep 2023 15:43:07 +0000 Received: from mx1.hosting.skole.hr ([161.53.165.185] helo=mx.skole.hr) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qmFdo-008DWg-0G for linux-arm-kernel@lists.infradead.org; Fri, 29 Sep 2023 15:42:58 +0000 Received: from mx1.hosting.skole.hr (localhost.localdomain [127.0.0.1]) by mx.skole.hr (mx.skole.hr) with ESMTP id 859A2834C9; Fri, 29 Sep 2023 17:42:54 +0200 (CEST) From: =?utf-8?q?Duje_Mihanovi=C4=87?= Date: Fri, 29 Sep 2023 17:42:04 +0200 Subject: [PATCH RESEND v5 8/8] MAINTAINERS: add myself as Marvell PXA1908 maintainer MIME-Version: 1.0 Message-Id: <20230929-pxa1908-lkml-v5-8-5aa5a1109c5f@skole.hr> References: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> In-Reply-To: <20230929-pxa1908-lkml-v5-0-5aa5a1109c5f@skole.hr> To: Robert Jarzmik , Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lubomir Rintel , Catalin Marinas , Will Deacon , Kees Cook , Tony Luck , "Guilherme G. Piccoli" , =?utf-8?q?Duje_Mihanovi?= =?utf-8?q?=C4=87?= Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hardening@vger.kernel.org, ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, afaerber@suse.de, balejk@matfyz.cz X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=908; i=duje.mihanovic@skole.hr; h=from:subject:message-id; bh=rZ0/2aarhuZmb4/RBctyFNylsa1DhpMnW4LU8kO7JSQ=; b=owEBbQKS/ZANAwAIAZoRnrBCLZbhAcsmYgBlFvBzztR/DmN/BrPp8VPfpH2DOR204+B0rFGw0 yxH1jjmnVKJAjMEAAEIAB0WIQRT351NnD/hEPs2LXiaEZ6wQi2W4QUCZRbwcwAKCRCaEZ6wQi2W 4dh5EACFr3lrsSwFYi4yZmCSHNc8n+hfwg/m1pLjQNkjuj2cl1ihInCd0B2fCurTjf1UHjVdSqZ bV8FF5OW7H9fzh0QrXZDiyitC3nBgEeeq+/Szn70GDb3zdBTkYXfbbJHWVCw6y6kekEVy8zMutw dvSL3Y0S9VqTzdRRtkpEiIp3MkOI39afEYk7eDZsMYFqugLl0gWQItz53w4ySmjQyaFWDi0wjeo vY0EFw5mPLyUZyDbwMO+QdTaowOgkRiGJDzY+E0c+21yQvTSpaIYekJXoU7v4t0N1hAbe56naDG S5UDfWHZN0A9d6p7PDNQjR6QR9XXhJqBpXka2yCbyl2YFL6L/jB9Vte4enhRDnI1FAKLxWjXSM1 QbuhjxEBBF4j80VFq2NwhrKWOZggDD2xpwFNCzUv52JsNq5XWuZRTMW6gudVWajfYMf7nWS81Dt 5H/m5kxEhD27+VqcLVwWYlqyIc69vupe3xzxVmX0KMbZxp8iq48G8xbLMFY3lDFz3wfbRoHacoC 0+F1Ta0SCTK9lcbFmvIz62b9GdIgT8vN1sHxn1Bq7/87j2oJnzwo/Ykohs+z7lScqwvZz4rFHZf qHR1q1uTqL26HQQWR9edspD5/K7S7OkNgQYaQCgkztjf0qJuYfBZ3RyUlHEcyuLiE4ukZwXWIA8 uy19OEOG8k8erug== X-Developer-Key: i=duje.mihanovic@skole.hr; a=openpgp; fpr=53DF9D4D9C3FE110FB362D789A119EB0422D96E1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230929_084256_277680_E501964A X-CRM114-Status: UNSURE ( 8.06 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add myself as the maintainer for Marvell PXA1908 SoC support. Signed-off-by: Duje Mihanović --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 0f966f05fb0d..6f5233f3904b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2299,6 +2299,15 @@ F: drivers/irqchip/irq-mvebu-* F: drivers/pinctrl/mvebu/ F: drivers/rtc/rtc-armada38x.c +ARM/Marvell PXA1908 SOC support +M: Duje Mihanović +L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) +S: Maintained +T: git https://gitlab.com/LegoLivesMatter/linux +F: arch/arm64/boot/dts/marvell/pxa1908* +F: drivers/clk/mmp/clk-of-pxa1908.c +F: include/dt-bindings/clock/marvell,pxa1908.h + ARM/Mediatek RTC DRIVER M: Eddie Huang M: Sean Wang