From patchwork Tue Oct 3 11:33:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng X-Patchwork-Id: 13407505 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B33EE75450 for ; Tue, 3 Oct 2023 11:34:20 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E4BC110E288; Tue, 3 Oct 2023 11:34:05 +0000 (UTC) Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by gabe.freedesktop.org (Postfix) with ESMTP id 627FB10E0ED; Tue, 3 Oct 2023 11:34:00 +0000 (UTC) Received: from loongson.cn (unknown [10.20.42.43]) by gateway (Coremail) with SMTP id _____8Bxyeom_BtlDs0uAA--.14452S3; Tue, 03 Oct 2023 19:33:58 +0800 (CST) Received: from openarena.loongson.cn (unknown [10.20.42.43]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx7y8k_Btl7JAXAA--.48472S3; Tue, 03 Oct 2023 19:33:57 +0800 (CST) From: Sui Jingfeng To: Lucas Stach Subject: [PATCH v11 1/5] drm/etnaviv: Add a dedicated function to get various clocks Date: Tue, 3 Oct 2023 19:33:52 +0800 Message-Id: <20231003113356.645394-2-suijingfeng@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003113356.645394-1-suijingfeng@loongson.cn> References: <20231003113356.645394-1-suijingfeng@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx7y8k_Btl7JAXAA--.48472S3 X-CM-SenderInfo: xvxlyxpqjiv03j6o00pqjv00gofq/ X-Coremail-Antispam: 1Uk129KBj93XoWxXFW8KFWxCr17Gw48Zr47Awc_yoW5Aw48pa 1fJ3W5tr1UCryag3yxAF13tr1akr1xCa4xuwn5Zrn3Zws8WF4Ut3yYkrWYqF45ury8XFWS kw15GF4UCFyF9rbCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Jr0_JF4l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4j6r4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI0UMc 02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUXVWUAwAv7VC2z280aVAF wI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28IcxkI7V AKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCj r7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6x IIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAI w20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x 0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxU7_MaUUUUU X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Gmeiner , etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Because the current implement is platform-dependent, there are systems which don't has the DT-based clock device drivers support. Such as x86 and Loongarch desktop platform. Don't rage quit if so. For the GPU in LS7A1000/LS2K1000, the working frequency of the GPU is control by the GFX PLL hardware. Typically, the GFX PLL will be configured by the platform BIOS(either UEFI or PMON) on per boot time. Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 53 ++++++++++++++++----------- 1 file changed, 32 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 9276756e1397..4aa7c59ae581 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -1586,6 +1586,35 @@ static irqreturn_t irq_handler(int irq, void *data) return ret; } +static int etnaviv_gpu_clk_get(struct etnaviv_gpu *gpu) +{ + struct device *dev = gpu->dev; + + gpu->clk_reg = devm_clk_get_optional(dev, "reg"); + DBG("clk_reg: %p", gpu->clk_reg); + if (IS_ERR(gpu->clk_reg)) + return PTR_ERR(gpu->clk_reg); + + gpu->clk_bus = devm_clk_get_optional(dev, "bus"); + DBG("clk_bus: %p", gpu->clk_bus); + if (IS_ERR(gpu->clk_bus)) + return PTR_ERR(gpu->clk_bus); + + gpu->clk_core = devm_clk_get(dev, "core"); + DBG("clk_core: %p", gpu->clk_core); + if (IS_ERR(gpu->clk_core)) + return PTR_ERR(gpu->clk_core); + gpu->base_rate_core = clk_get_rate(gpu->clk_core); + + gpu->clk_shader = devm_clk_get_optional(dev, "shader"); + DBG("clk_shader: %p", gpu->clk_shader); + if (IS_ERR(gpu->clk_shader)) + return PTR_ERR(gpu->clk_shader); + gpu->base_rate_shader = clk_get_rate(gpu->clk_shader); + + return 0; +} + static int etnaviv_gpu_clk_enable(struct etnaviv_gpu *gpu) { int ret; @@ -1861,27 +1890,9 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev) } /* Get Clocks: */ - gpu->clk_reg = devm_clk_get_optional(&pdev->dev, "reg"); - DBG("clk_reg: %p", gpu->clk_reg); - if (IS_ERR(gpu->clk_reg)) - return PTR_ERR(gpu->clk_reg); - - gpu->clk_bus = devm_clk_get_optional(&pdev->dev, "bus"); - DBG("clk_bus: %p", gpu->clk_bus); - if (IS_ERR(gpu->clk_bus)) - return PTR_ERR(gpu->clk_bus); - - gpu->clk_core = devm_clk_get(&pdev->dev, "core"); - DBG("clk_core: %p", gpu->clk_core); - if (IS_ERR(gpu->clk_core)) - return PTR_ERR(gpu->clk_core); - gpu->base_rate_core = clk_get_rate(gpu->clk_core); - - gpu->clk_shader = devm_clk_get_optional(&pdev->dev, "shader"); - DBG("clk_shader: %p", gpu->clk_shader); - if (IS_ERR(gpu->clk_shader)) - return PTR_ERR(gpu->clk_shader); - gpu->base_rate_shader = clk_get_rate(gpu->clk_shader); + err = etnaviv_gpu_clk_get(gpu); + if (err) + return err; /* TODO: figure out max mapped size */ dev_set_drvdata(dev, gpu); From patchwork Tue Oct 3 11:33:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng X-Patchwork-Id: 13407503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 64594E75451 for ; Tue, 3 Oct 2023 11:34:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2837410E276; Tue, 3 Oct 2023 11:34:05 +0000 (UTC) Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by gabe.freedesktop.org (Postfix) with ESMTP id 69A7410E1DB; Tue, 3 Oct 2023 11:34:00 +0000 (UTC) Received: from loongson.cn (unknown [10.20.42.43]) by gateway (Coremail) with SMTP id _____8Bxd+gm_BtlEs0uAA--.53569S3; Tue, 03 Oct 2023 19:33:58 +0800 (CST) Received: from openarena.loongson.cn (unknown [10.20.42.43]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx7y8k_Btl7JAXAA--.48472S4; Tue, 03 Oct 2023 19:33:58 +0800 (CST) From: Sui Jingfeng To: Lucas Stach Subject: [PATCH v11 2/5] drm/etnaviv: Add constructor and destructor function for etnaviv_drm_private Date: Tue, 3 Oct 2023 19:33:53 +0800 Message-Id: <20231003113356.645394-3-suijingfeng@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003113356.645394-1-suijingfeng@loongson.cn> References: <20231003113356.645394-1-suijingfeng@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx7y8k_Btl7JAXAA--.48472S4 X-CM-SenderInfo: xvxlyxpqjiv03j6o00pqjv00gofq/ X-Coremail-Antispam: 1Uk129KBj93XoWxWFy3ZFyUtr1fJFyUAF4xAFc_yoW5Kw1Upa n3ZFy0yrWkZF1kKa9xJr4rZa43ua1xWa48uasrWwn0qw4ayr1kWF1rtFyUCF93AFyrCF1a yw4UtF1UWF40k3gCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk0b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Jr0_Gr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4j6r4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc804VCY07AIYIkI8VC2zVCFFI0UMc 02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0I7IYx2IY67AKxVWUAVWUtwAv7VC2z280aVAF wI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcxkI7VAKI48JMxAIw28IcxkI7V AKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCj r7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUAVWUtwCIc40Y0x0EwIxGrwCI42IY6x IIjxv20xvE14v26r1I6r4UMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8JwCI42IY6xAI w20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2z280aVCY1x 0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxU2nYFDUUUU X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Gmeiner , etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Noticed that there are a lot of members in the struct etnaviv_drm_private, which are intended to be shared by all GPU core. This patch introduces two helper functions for the construction and destruction of the instances of it. A side benefit is that the error handling needed can be simplified. Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_drv.c | 70 +++++++++++++++++---------- 1 file changed, 44 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c index a9a1659840ec..41ef7a8b7839 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c @@ -41,6 +41,43 @@ static struct device_node *etnaviv_of_first_available_node(void) return NULL; } +static struct etnaviv_drm_private *etnaviv_alloc_private(struct device *dev) +{ + struct etnaviv_drm_private *priv; + + priv = kzalloc(sizeof(*priv), GFP_KERNEL); + if (!priv) + return ERR_PTR(-ENOMEM); + + xa_init_flags(&priv->active_contexts, XA_FLAGS_ALLOC); + + mutex_init(&priv->gem_lock); + INIT_LIST_HEAD(&priv->gem_list); + priv->num_gpus = 0; + priv->shm_gfp_mask = GFP_HIGHUSER | __GFP_RETRY_MAYFAIL | __GFP_NOWARN; + + priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(dev); + if (IS_ERR(priv->cmdbuf_suballoc)) { + kfree(priv); + dev_err(dev, "Failed to create cmdbuf suballocator\n"); + return ERR_PTR(-ENOMEM); + } + + return priv; +} + +static void etnaviv_free_private(struct etnaviv_drm_private *priv) +{ + if (!priv) + return; + + etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc); + + xa_destroy(&priv->active_contexts); + + kfree(priv); +} + static void load_gpu(struct drm_device *dev) { struct etnaviv_drm_private *priv = dev->dev_private; @@ -521,35 +558,21 @@ static int etnaviv_bind(struct device *dev) if (IS_ERR(drm)) return PTR_ERR(drm); - priv = kzalloc(sizeof(*priv), GFP_KERNEL); - if (!priv) { - dev_err(dev, "failed to allocate private data\n"); - ret = -ENOMEM; + priv = etnaviv_alloc_private(dev); + if (IS_ERR(priv)) { + ret = PTR_ERR(priv); goto out_put; } + drm->dev_private = priv; dma_set_max_seg_size(dev, SZ_2G); - xa_init_flags(&priv->active_contexts, XA_FLAGS_ALLOC); - - mutex_init(&priv->gem_lock); - INIT_LIST_HEAD(&priv->gem_list); - priv->num_gpus = 0; - priv->shm_gfp_mask = GFP_HIGHUSER | __GFP_RETRY_MAYFAIL | __GFP_NOWARN; - - priv->cmdbuf_suballoc = etnaviv_cmdbuf_suballoc_new(drm->dev); - if (IS_ERR(priv->cmdbuf_suballoc)) { - dev_err(drm->dev, "Failed to create cmdbuf suballocator\n"); - ret = PTR_ERR(priv->cmdbuf_suballoc); - goto out_free_priv; - } - dev_set_drvdata(dev, drm); ret = component_bind_all(dev, drm); if (ret < 0) - goto out_destroy_suballoc; + goto out_free_priv; load_gpu(drm); @@ -561,10 +584,8 @@ static int etnaviv_bind(struct device *dev) out_unbind: component_unbind_all(dev, drm); -out_destroy_suballoc: - etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc); out_free_priv: - kfree(priv); + etnaviv_free_private(priv); out_put: drm_dev_put(drm); @@ -580,12 +601,9 @@ static void etnaviv_unbind(struct device *dev) component_unbind_all(dev, drm); - etnaviv_cmdbuf_suballoc_destroy(priv->cmdbuf_suballoc); - - xa_destroy(&priv->active_contexts); + etnaviv_free_private(priv); drm->dev_private = NULL; - kfree(priv); drm_dev_put(drm); } From patchwork Tue Oct 3 11:33:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng X-Patchwork-Id: 13407506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67467E7544F for ; Tue, 3 Oct 2023 11:34:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D48110E28E; Tue, 3 Oct 2023 11:34:06 +0000 (UTC) Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by gabe.freedesktop.org (Postfix) with ESMTP id E769F10E276; Tue, 3 Oct 2023 11:34:01 +0000 (UTC) Received: from loongson.cn (unknown [10.20.42.43]) by gateway (Coremail) with SMTP id _____8AxJugm_BtlF80uAA--.30629S3; Tue, 03 Oct 2023 19:33:58 +0800 (CST) Received: from openarena.loongson.cn (unknown [10.20.42.43]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx7y8k_Btl7JAXAA--.48472S5; Tue, 03 Oct 2023 19:33:58 +0800 (CST) From: Sui Jingfeng To: Lucas Stach Subject: [PATCH v11 3/5] drm/etnaviv: Allow bypass component framework Date: Tue, 3 Oct 2023 19:33:54 +0800 Message-Id: <20231003113356.645394-4-suijingfeng@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003113356.645394-1-suijingfeng@loongson.cn> References: <20231003113356.645394-1-suijingfeng@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx7y8k_Btl7JAXAA--.48472S5 X-CM-SenderInfo: xvxlyxpqjiv03j6o00pqjv00gofq/ X-Coremail-Antispam: 1Uk129KBj93XoW3Jr48ZF4UtryUCF4fJrW8AFc_yoWftFWDpF 47JFyYkrW8uayqg34DArn5ZF1akw1Sq34Iy34kK3sa9ws8JryktFyYyFyjyrnxJFZ5WFW3 tr1DtrWUAF40y3gCm3ZEXasCq-sJn29KB7ZKAUJUUUU5529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUkFb4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v2 6r4UJVWxJr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27w Aqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2Ix0cI8IcVAFwI0_Jw0_WrylYx0Ex4A2jsIE 14v26r4j6F4UMcvjeVCFs4IE7xkEbVWUJVW8JwACjcxG0xvY0x0EwIxGrwCF04k20xvY0x 0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E 7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_JF0_Jw1lIxkGc2Ij64vIr41lIxAIcV C0I7IYx2IY67AKxVW8JVW5JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Gr0_Cr1lIxAIcVCF 04k26cxKx2IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7 CjxVAFwI0_Gr0_Gr1UYxBIdaVFxhVjvjDU0xZFpf9x07josjUUUUUU= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Gmeiner , etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Component framework is used to bind multiple GPU cores to a virtual master, but there are SoC/chipset that contain only one GPU core. In those case, component framework can be avoided. The reason is that usperspace programs (such as X server and Mesa) will search the PCI device to use precedently. Creating a virtual master device for PCI(e) GPUs is unnecessary and incurring troubles. This patch add additional code paths to allow bypassing the component frameworks, which pave the way for us to introduce the PCI device driver wrapper. The goal is to share the code between the PCI driver and the platform driver as much as possible. Platforms with a single GPU core could also try non-component code path. Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_drv.c | 48 +++++++++++----- drivers/gpu/drm/etnaviv/etnaviv_drv.h | 1 + drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 83 +++++++++++++++++---------- drivers/gpu/drm/etnaviv/etnaviv_gpu.h | 7 +++ 4 files changed, 96 insertions(+), 43 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c index 41ef7a8b7839..0b68c76d117e 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c @@ -25,6 +25,8 @@ #include "etnaviv_mmu.h" #include "etnaviv_perfmon.h" +static struct etnaviv_drm_private *etna_drm_priv_ptr; + /* * DRM operations: */ @@ -545,10 +547,7 @@ static const struct drm_driver etnaviv_drm_driver = { .minor = 3, }; -/* - * Platform driver: - */ -static int etnaviv_bind(struct device *dev) +static int etnaviv_drm_bind(struct device *dev, bool component) { struct etnaviv_drm_private *priv; struct drm_device *drm; @@ -564,13 +563,17 @@ static int etnaviv_bind(struct device *dev) goto out_put; } + priv->drm = drm; drm->dev_private = priv; + etna_drm_priv_ptr = priv; dma_set_max_seg_size(dev, SZ_2G); - dev_set_drvdata(dev, drm); + if (component) + ret = component_bind_all(dev, drm); + else + ret = etnaviv_gpu_bind(dev, NULL, drm); - ret = component_bind_all(dev, drm); if (ret < 0) goto out_free_priv; @@ -583,7 +586,10 @@ static int etnaviv_bind(struct device *dev) return 0; out_unbind: - component_unbind_all(dev, drm); + if (component) + component_unbind_all(dev, drm); + else + etnaviv_gpu_unbind(dev, NULL, drm); out_free_priv: etnaviv_free_private(priv); out_put: @@ -592,14 +598,17 @@ static int etnaviv_bind(struct device *dev) return ret; } -static void etnaviv_unbind(struct device *dev) +static void etnaviv_drm_unbind(struct device *dev, bool component) { - struct drm_device *drm = dev_get_drvdata(dev); - struct etnaviv_drm_private *priv = drm->dev_private; + struct etnaviv_drm_private *priv = etna_drm_priv_ptr; + struct drm_device *drm = priv->drm; drm_dev_unregister(drm); - component_unbind_all(dev, drm); + if (component) + component_unbind_all(dev, drm); + else + etnaviv_gpu_unbind(dev, NULL, drm); etnaviv_free_private(priv); @@ -608,9 +617,22 @@ static void etnaviv_unbind(struct device *dev) drm_dev_put(drm); } +/* + * Platform driver: + */ +static int etnaviv_master_bind(struct device *dev) +{ + return etnaviv_drm_bind(dev, true); +} + +static void etnaviv_master_unbind(struct device *dev) +{ + return etnaviv_drm_unbind(dev, true); +} + static const struct component_master_ops etnaviv_master_ops = { - .bind = etnaviv_bind, - .unbind = etnaviv_unbind, + .bind = etnaviv_master_bind, + .unbind = etnaviv_master_unbind, }; static int etnaviv_pdev_probe(struct platform_device *pdev) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.h b/drivers/gpu/drm/etnaviv/etnaviv_drv.h index b3eb1662e90c..e58f82e698de 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.h +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.h @@ -35,6 +35,7 @@ struct etnaviv_file_private { }; struct etnaviv_drm_private { + struct drm_device *drm; int num_gpus; struct etnaviv_gpu *gpu[ETNA_MAX_PIPES]; gfp_t shm_gfp_mask; diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 4aa7c59ae581..330f8a272184 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -1756,8 +1756,7 @@ static const struct thermal_cooling_device_ops cooling_ops = { .set_cur_state = etnaviv_gpu_cooling_set_cur_state, }; -static int etnaviv_gpu_bind(struct device *dev, struct device *master, - void *data) +int etnaviv_gpu_bind(struct device *dev, struct device *master, void *data) { struct drm_device *drm = data; struct etnaviv_drm_private *priv = drm->dev_private; @@ -1812,8 +1811,7 @@ static int etnaviv_gpu_bind(struct device *dev, struct device *master, return ret; } -static void etnaviv_gpu_unbind(struct device *dev, struct device *master, - void *data) +void etnaviv_gpu_unbind(struct device *dev, struct device *master, void *data) { struct etnaviv_gpu *gpu = dev_get_drvdata(dev); @@ -1858,9 +1856,9 @@ static const struct of_device_id etnaviv_gpu_match[] = { }; MODULE_DEVICE_TABLE(of, etnaviv_gpu_match); -static int etnaviv_gpu_platform_probe(struct platform_device *pdev) +int etnaviv_gpu_driver_create(struct device *dev, void __iomem *mmio, + int irq, bool component, bool has_clk) { - struct device *dev = &pdev->dev; struct etnaviv_gpu *gpu; int err; @@ -1868,31 +1866,28 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev) if (!gpu) return -ENOMEM; - gpu->dev = &pdev->dev; + gpu->dev = dev; + gpu->mmio = mmio; mutex_init(&gpu->lock); mutex_init(&gpu->sched_lock); - /* Map registers: */ - gpu->mmio = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(gpu->mmio)) - return PTR_ERR(gpu->mmio); - /* Get Interrupt: */ - gpu->irq = platform_get_irq(pdev, 0); + gpu->irq = irq; if (gpu->irq < 0) return gpu->irq; - err = devm_request_irq(&pdev->dev, gpu->irq, irq_handler, 0, - dev_name(gpu->dev), gpu); + err = devm_request_irq(dev, irq, irq_handler, 0, dev_name(dev), gpu); if (err) { dev_err(dev, "failed to request IRQ%u: %d\n", gpu->irq, err); return err; } /* Get Clocks: */ - err = etnaviv_gpu_clk_get(gpu); - if (err) - return err; + if (has_clk) { + err = etnaviv_gpu_clk_get(gpu); + if (err) + return err; + } /* TODO: figure out max mapped size */ dev_set_drvdata(dev, gpu); @@ -1902,24 +1897,27 @@ static int etnaviv_gpu_platform_probe(struct platform_device *pdev) * autosuspend delay is rather arbitary: no measurements have * yet been performed to determine an appropriate value. */ - pm_runtime_use_autosuspend(gpu->dev); - pm_runtime_set_autosuspend_delay(gpu->dev, 200); - pm_runtime_enable(gpu->dev); - - err = component_add(&pdev->dev, &gpu_ops); - if (err < 0) { - dev_err(&pdev->dev, "failed to register component: %d\n", err); - return err; + pm_runtime_use_autosuspend(dev); + pm_runtime_set_autosuspend_delay(dev, 200); + pm_runtime_enable(dev); + + if (component) { + err = component_add(dev, &gpu_ops); + if (err < 0) { + dev_err(dev, "failed to register component: %d\n", err); + return err; + } } return 0; } -static int etnaviv_gpu_platform_remove(struct platform_device *pdev) +void etnaviv_gpu_driver_destroy(struct device *dev, bool component) { - component_del(&pdev->dev, &gpu_ops); - pm_runtime_disable(&pdev->dev); - return 0; + if (component) + component_del(dev, &gpu_ops); + + pm_runtime_disable(dev); } static int etnaviv_gpu_rpm_suspend(struct device *dev) @@ -1973,6 +1971,31 @@ static const struct dev_pm_ops etnaviv_gpu_pm_ops = { RUNTIME_PM_OPS(etnaviv_gpu_rpm_suspend, etnaviv_gpu_rpm_resume, NULL) }; +static int etnaviv_gpu_platform_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + void __iomem *mmio; + int irq; + + /* Map registers: */ + mmio = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(mmio)) + return PTR_ERR(mmio); + + irq = platform_get_irq(pdev, 0); + + return etnaviv_gpu_driver_create(dev, mmio, irq, true, true); +} + +static int etnaviv_gpu_platform_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + etnaviv_gpu_driver_destroy(dev, true); + + return 0; +} + struct platform_driver etnaviv_gpu_driver = { .driver = { .name = "etnaviv-gpu", diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h index 197e0037732e..407f3a501b17 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.h +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.h @@ -215,6 +215,13 @@ void etnaviv_gpu_pm_put(struct etnaviv_gpu *gpu); int etnaviv_gpu_wait_idle(struct etnaviv_gpu *gpu, unsigned int timeout_ms); void etnaviv_gpu_start_fe(struct etnaviv_gpu *gpu, u32 address, u16 prefetch); +int etnaviv_gpu_bind(struct device *dev, struct device *master, void *data); +void etnaviv_gpu_unbind(struct device *dev, struct device *master, void *data); + +int etnaviv_gpu_driver_create(struct device *dev, void __iomem *mmio, + int irq, bool component, bool has_clk); +void etnaviv_gpu_driver_destroy(struct device *dev, bool component); + extern struct platform_driver etnaviv_gpu_driver; #endif /* __ETNAVIV_GPU_H__ */ From patchwork Tue Oct 3 11:33:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng X-Patchwork-Id: 13407504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20A0FE75451 for ; Tue, 3 Oct 2023 11:34:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5937610E0ED; Tue, 3 Oct 2023 11:34:05 +0000 (UTC) Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by gabe.freedesktop.org (Postfix) with ESMTP id 6237E10E0DF; Tue, 3 Oct 2023 11:34:00 +0000 (UTC) Received: from loongson.cn (unknown [10.20.42.43]) by gateway (Coremail) with SMTP id _____8AxTesn_BtlG80uAA--.18678S3; Tue, 03 Oct 2023 19:33:59 +0800 (CST) Received: from openarena.loongson.cn (unknown [10.20.42.43]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx7y8k_Btl7JAXAA--.48472S6; Tue, 03 Oct 2023 19:33:58 +0800 (CST) From: Sui Jingfeng To: Lucas Stach Subject: [PATCH v11 4/5] drm/etnaviv: Add driver support for the PCI devices Date: Tue, 3 Oct 2023 19:33:55 +0800 Message-Id: <20231003113356.645394-5-suijingfeng@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003113356.645394-1-suijingfeng@loongson.cn> References: <20231003113356.645394-1-suijingfeng@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx7y8k_Btl7JAXAA--.48472S6 X-CM-SenderInfo: xvxlyxpqjiv03j6o00pqjv00gofq/ X-Coremail-Antispam: 1Uk129KBj93XoW3Xr1DZr1fGr48WFy5uF4UAwc_yoWxuF1UpF 4rJFyYyry0vFWUK347JF1rZFy3K3WIgFyS93srJwn0vws8AryUXryqkFyDAr98JrZ3GFy3 trn8Kry7uF4UAFXCm3ZEXasCq-sJn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r1Y6r17M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv 67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6x kF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUcCD7UUUUU X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Gmeiner , etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" There is a Vivante GC1000 GPU (v5037) in Loongson LS2K1000 (0x0014:0x7a05) and LS7A1000 (0x0014:0x7a15), the GPU in these chips is a PCI(e) device. This patch adds PCI driver wrapper for this gpu. This GPU has only one GPU core, there no need to bind to anything for now. Hence, the component framework get bypassed. Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/Kconfig | 8 +++ drivers/gpu/drm/etnaviv/Makefile | 2 + drivers/gpu/drm/etnaviv/etnaviv_drv.c | 10 ++- drivers/gpu/drm/etnaviv/etnaviv_drv.h | 3 + drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c | 74 +++++++++++++++++++++++ drivers/gpu/drm/etnaviv/etnaviv_pci_drv.h | 18 ++++++ 6 files changed, 113 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c create mode 100644 drivers/gpu/drm/etnaviv/etnaviv_pci_drv.h diff --git a/drivers/gpu/drm/etnaviv/Kconfig b/drivers/gpu/drm/etnaviv/Kconfig index faa7fc68b009..38c251585ec1 100644 --- a/drivers/gpu/drm/etnaviv/Kconfig +++ b/drivers/gpu/drm/etnaviv/Kconfig @@ -15,6 +15,14 @@ config DRM_ETNAVIV help DRM driver for Vivante GPUs. +config DRM_ETNAVIV_PCI_DRIVER + bool "enable ETNAVIV PCI driver support" + depends on DRM_ETNAVIV + depends on PCI + help + Compile in support for Vivante GPUs attached via PCI(e). + Say Y if you have such hardwares. + config DRM_ETNAVIV_THERMAL bool "enable ETNAVIV thermal throttling" depends on DRM_ETNAVIV diff --git a/drivers/gpu/drm/etnaviv/Makefile b/drivers/gpu/drm/etnaviv/Makefile index 46e5ffad69a6..6829e1ebf2db 100644 --- a/drivers/gpu/drm/etnaviv/Makefile +++ b/drivers/gpu/drm/etnaviv/Makefile @@ -16,4 +16,6 @@ etnaviv-y := \ etnaviv_perfmon.o \ etnaviv_sched.o +etnaviv-$(CONFIG_DRM_ETNAVIV_PCI_DRIVER) += etnaviv_pci_drv.o + obj-$(CONFIG_DRM_ETNAVIV) += etnaviv.o diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c index 0b68c76d117e..8db86120b11d 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c @@ -23,6 +23,7 @@ #include "etnaviv_gpu.h" #include "etnaviv_gem.h" #include "etnaviv_mmu.h" +#include "etnaviv_pci_drv.h" #include "etnaviv_perfmon.h" static struct etnaviv_drm_private *etna_drm_priv_ptr; @@ -547,7 +548,7 @@ static const struct drm_driver etnaviv_drm_driver = { .minor = 3, }; -static int etnaviv_drm_bind(struct device *dev, bool component) +int etnaviv_drm_bind(struct device *dev, bool component) { struct etnaviv_drm_private *priv; struct drm_device *drm; @@ -598,7 +599,7 @@ static int etnaviv_drm_bind(struct device *dev, bool component) return ret; } -static void etnaviv_drm_unbind(struct device *dev, bool component) +void etnaviv_drm_unbind(struct device *dev, bool component) { struct etnaviv_drm_private *priv = etna_drm_priv_ptr; struct drm_device *drm = priv->drm; @@ -758,6 +759,10 @@ static int __init etnaviv_init(void) if (ret != 0) goto unregister_gpu_driver; + ret = etnaviv_register_pci_driver(); + if (ret != 0) + goto unregister_platform_driver; + /* * If the DT contains at least one available GPU device, instantiate * the DRM platform device. @@ -786,6 +791,7 @@ static void __exit etnaviv_exit(void) etnaviv_destroy_platform_device(&etnaviv_drm); platform_driver_unregister(&etnaviv_platform_driver); platform_driver_unregister(&etnaviv_gpu_driver); + etnaviv_unregister_pci_driver(); } module_exit(etnaviv_exit); diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.h b/drivers/gpu/drm/etnaviv/etnaviv_drv.h index e58f82e698de..9cd72948cfad 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.h +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.h @@ -83,6 +83,9 @@ bool etnaviv_cmd_validate_one(struct etnaviv_gpu *gpu, u32 *stream, unsigned int size, struct drm_etnaviv_gem_submit_reloc *relocs, unsigned int reloc_size); +int etnaviv_drm_bind(struct device *dev, bool component); +void etnaviv_drm_unbind(struct device *dev, bool component); + #ifdef CONFIG_DEBUG_FS void etnaviv_gem_describe_objects(struct etnaviv_drm_private *priv, struct seq_file *m); diff --git a/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c new file mode 100644 index 000000000000..37de661844d8 --- /dev/null +++ b/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.c @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +#include "etnaviv_drv.h" +#include "etnaviv_gpu.h" +#include "etnaviv_pci_drv.h" + +static int etnaviv_pci_probe(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + struct device *dev = &pdev->dev; + void __iomem *mmio; + int ret; + + ret = pcim_enable_device(pdev); + if (ret) { + dev_err(dev, "failed to enable\n"); + return ret; + } + + pci_set_master(pdev); + + ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32)); + if (ret) + return ret; + + /* PCI bar 0 contain the MMIO registers */ + mmio = pcim_iomap(pdev, 0, 0); + if (IS_ERR(mmio)) + return PTR_ERR(mmio); + + ret = etnaviv_gpu_driver_create(dev, mmio, pdev->irq, false, false); + if (ret) + return ret; + + return etnaviv_drm_bind(dev, false); +} + +static void etnaviv_pci_remove(struct pci_dev *pdev) +{ + struct device *dev = &pdev->dev; + + etnaviv_drm_unbind(dev, false); + + etnaviv_gpu_driver_destroy(dev, false); + + pci_clear_master(pdev); +} + +static const struct pci_device_id etnaviv_pci_id_lists[] = { + {PCI_VDEVICE(LOONGSON, 0x7a15)}, + {PCI_VDEVICE(LOONGSON, 0x7a05)}, + { } +}; + +static struct pci_driver etnaviv_pci_driver = { + .name = "etnaviv", + .id_table = etnaviv_pci_id_lists, + .probe = etnaviv_pci_probe, + .remove = etnaviv_pci_remove, +}; + +int etnaviv_register_pci_driver(void) +{ + return pci_register_driver(&etnaviv_pci_driver); +} + +void etnaviv_unregister_pci_driver(void) +{ + pci_unregister_driver(&etnaviv_pci_driver); +} + +MODULE_DEVICE_TABLE(pci, etnaviv_pci_id_lists); diff --git a/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.h b/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.h new file mode 100644 index 000000000000..1db559ee5e9b --- /dev/null +++ b/drivers/gpu/drm/etnaviv/etnaviv_pci_drv.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __ETNAVIV_PCI_DRV_H__ +#define __ETNAVIV_PCI_DRV_H__ + +#ifdef CONFIG_DRM_ETNAVIV_PCI_DRIVER + +int etnaviv_register_pci_driver(void); +void etnaviv_unregister_pci_driver(void); + +#else + +static inline int etnaviv_register_pci_driver(void) { return 0; } +static inline void etnaviv_unregister_pci_driver(void) { } + +#endif + +#endif From patchwork Tue Oct 3 11:33:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sui Jingfeng X-Patchwork-Id: 13407502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 563AFE75452 for ; Tue, 3 Oct 2023 11:34:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 37AE210E0DF; Tue, 3 Oct 2023 11:34:04 +0000 (UTC) Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by gabe.freedesktop.org (Postfix) with ESMTP id 70B1F10E26F; Tue, 3 Oct 2023 11:34:00 +0000 (UTC) Received: from loongson.cn (unknown [10.20.42.43]) by gateway (Coremail) with SMTP id _____8DxVugn_BtlHs0uAA--.54253S3; Tue, 03 Oct 2023 19:33:59 +0800 (CST) Received: from openarena.loongson.cn (unknown [10.20.42.43]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx7y8k_Btl7JAXAA--.48472S7; Tue, 03 Oct 2023 19:33:59 +0800 (CST) From: Sui Jingfeng To: Lucas Stach Subject: [PATCH v11 5/5] drm/etnaviv: Add support for cached coherent caching mode Date: Tue, 3 Oct 2023 19:33:56 +0800 Message-Id: <20231003113356.645394-6-suijingfeng@loongson.cn> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003113356.645394-1-suijingfeng@loongson.cn> References: <20231003113356.645394-1-suijingfeng@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx7y8k_Btl7JAXAA--.48472S7 X-CM-SenderInfo: xvxlyxpqjiv03j6o00pqjv00gofq/ X-Coremail-Antispam: 1Uk129KBj93XoWxGF4fXr18CFyxAF1DArWrZwc_yoW7JrWxpF s7AFyFyrWjvayjkw17AFn5ZFyak3WxWFZYk34Dtwn0v3y5Ar1jqr90kFs8Ar98JryfWrya qrsrKry3W3W7ArXCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3Ic02F40EFcxC0VAKzVAqx4xG6I80ebIjqfuFe4nvWSU5nxnvy29KBjDU 0xBIdaVrnRJUUUk2b4IE77IF4wAFF20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2 IYs7xG6rWj6s0DM7CIcVAFz4kK6r126r13M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48v e4kI8wA2z4x0Y4vE2Ix0cI8IcVAFwI0_Gr0_Xr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI 0_Gr0_Cr1l84ACjcxK6I8E87Iv67AKxVW8Jr0_Cr1UM28EF7xvwVC2z280aVCY1x0267AK xVW8Jr0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l57IF6xkI12xvs2x26I8E6xACxx 1l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1q6rW5McIj6I8E87Iv 67AKxVW8JVWxJwAm72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IYc2Ij64vIr41l42xK82IYc2 Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s02 6x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r126r1DMIIYrxkI7VAKI48JMIIF0x vE2Ix0cI8IcVAFwI0_Gr0_Xr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE 42xK8VAvwI8IcIk0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6x kF7I0E14v26r4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjxUco7KUUUUU X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Gmeiner , etnaviv@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Loongson CPUs maintain cache coherency by hardware, which means that the data in the CPU cache is identical to the data in main system memory. As for the peripheral device, most of Loongson chips choose to define the peripherals as DMA coherent by default, device drivers do not need to maintain the coherency between a processor and an I/O device manually. The above sttement is true for *cached* buffers only, this patch say nothing about WC buffers, it is likely implement-dependent. WC buffers can be DMA non-coherent on specific platform. Also because vivante GPU IP has been integrated into various platform, we need to do the probe work. this patch add code to test if a specific platform is cached coherent, utilize such hardware feature where suitable. And allow userspace to query. Signed-off-by: Sui Jingfeng --- drivers/gpu/drm/etnaviv/etnaviv_drv.c | 7 +++++++ drivers/gpu/drm/etnaviv/etnaviv_drv.h | 8 ++++++++ drivers/gpu/drm/etnaviv/etnaviv_gem.c | 16 ++++++++++++++-- drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 4 ++++ include/uapi/drm/etnaviv_drm.h | 1 + 5 files changed, 34 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.c b/drivers/gpu/drm/etnaviv/etnaviv_drv.c index 8db86120b11d..3598e2f840b3 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -66,6 +67,12 @@ static struct etnaviv_drm_private *etnaviv_alloc_private(struct device *dev) return ERR_PTR(-ENOMEM); } + /* + * The device_get_dma_attr(dev) == DEV_DMA_COHERENT don't work + * on LoongArch platform, so still use dev_is_dma_coherent(dev). + */ + priv->cached_coherent = dev_is_dma_coherent(dev); + return priv; } diff --git a/drivers/gpu/drm/etnaviv/etnaviv_drv.h b/drivers/gpu/drm/etnaviv/etnaviv_drv.h index 9cd72948cfad..760048c35481 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_drv.h +++ b/drivers/gpu/drm/etnaviv/etnaviv_drv.h @@ -46,6 +46,14 @@ struct etnaviv_drm_private { struct xarray active_contexts; u32 next_context_id; + /* + * If true, the GPU is capable of snooping CPU's cache. It means + * that cached buffer is coherent for both of the CPU and GPU's + * access. And the coherency is guaranteed by platform hardware. + * Software enforced coherency does not count here. + */ + bool cached_coherent; + /* list of GEM objects: */ struct mutex gem_lock; struct list_head gem_list; diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gem.c b/drivers/gpu/drm/etnaviv/etnaviv_gem.c index 71a6d2b1c80f..a72ca0a6883e 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gem.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gem.c @@ -342,6 +342,7 @@ void *etnaviv_gem_vmap(struct drm_gem_object *obj) static void *etnaviv_gem_vmap_impl(struct etnaviv_gem_object *obj) { struct page **pages; + pgprot_t prot; lockdep_assert_held(&obj->lock); @@ -349,8 +350,19 @@ static void *etnaviv_gem_vmap_impl(struct etnaviv_gem_object *obj) if (IS_ERR(pages)) return NULL; - return vmap(pages, obj->base.size >> PAGE_SHIFT, - VM_MAP, pgprot_writecombine(PAGE_KERNEL)); + switch (obj->flags) { + case ETNA_BO_CACHED: + prot = PAGE_KERNEL; + break; + case ETNA_BO_UNCACHED: + prot = pgprot_noncached(PAGE_KERNEL); + break; + case ETNA_BO_WC: + default: + prot = pgprot_writecombine(PAGE_KERNEL); + } + + return vmap(pages, obj->base.size >> PAGE_SHIFT, VM_MAP, prot); } static inline enum dma_data_direction etnaviv_op_to_dma_dir(u32 op) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c index 330f8a272184..9530dddd4273 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c @@ -164,6 +164,10 @@ int etnaviv_gpu_get_param(struct etnaviv_gpu *gpu, u32 param, u64 *value) *value = gpu->identity.eco_id; break; + case ETNAVIV_PARAM_CACHED_COHERENT: + *value = priv->cached_coherent; + break; + default: DBG("%s: invalid param: %u", dev_name(gpu->dev), param); return -EINVAL; diff --git a/include/uapi/drm/etnaviv_drm.h b/include/uapi/drm/etnaviv_drm.h index af024d90453d..61eaa8cd0f5e 100644 --- a/include/uapi/drm/etnaviv_drm.h +++ b/include/uapi/drm/etnaviv_drm.h @@ -77,6 +77,7 @@ struct drm_etnaviv_timespec { #define ETNAVIV_PARAM_GPU_PRODUCT_ID 0x1c #define ETNAVIV_PARAM_GPU_CUSTOMER_ID 0x1d #define ETNAVIV_PARAM_GPU_ECO_ID 0x1e +#define ETNAVIV_PARAM_CACHED_COHERENT 0x1f #define ETNA_MAX_PIPES 4