From patchwork Wed Oct 4 15:55:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408948 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D861E7C4D7 for ; Wed, 4 Oct 2023 15:56:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7373010E11F; Wed, 4 Oct 2023 15:56:16 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id BC77510E11F for ; Wed, 4 Oct 2023 15:56:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434973; x=1727970973; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=zaA45SaiA9pS52GQrSr2FCuaXj1spdQxrs7jbsMHJaw=; b=jMmvF28z5UbbRKKLp3O3rw2IUz9rZkUiE37S7V+OBtLZDaqrhYjtaqza nEPZawPpJGWG8XP8PabJsb+rN1hySiobKO+p7pYBd0L9qYhp+lX0Vvu34 C/LywfMurJPULj2v8uUnclo54cn4glM4fCPyLxUu+D8fOt18U610oq7ZV SgCYhDaNMQq75J+IYj05UD6dRa8VLJRGqFtoHZu9R38YKF/4IHLZ4vP5D Xc0jI3LlKnZwz0K7SVLshSGoklg3vNA+dlE2vCOdcnClZDHwRZBa3ZqZi rmjLIh3jKhfhuqE+O/ioJBzD+Nx4o1vUE1mfCziP0UhFqpGi4HJEz4l4L Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483754" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483754" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:13 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867440823" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867440823" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:11 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:10 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:55:56 +0300 Message-ID: <20231004155607.7719-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 01/12] drm/i915/psr: Unify PSR pre/post plane update hooks X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä intel_psr_pre_plane_update() operates on a per-crtc level, whereas intel_psr_post_plane_update() operates on the whole atomic commit, for no real reason that I can see. Adjust intel_psr_post_plane_update() to match the intel_psr_pre_plane_update() approach. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 3 ++- drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++---------------- drivers/gpu/drm/i915/display/intel_psr.h | 3 ++- 3 files changed, 8 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index b3ae81a6ab16..8683b030cebb 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -956,6 +956,8 @@ static void intel_post_plane_update(struct intel_atomic_state *state, intel_atomic_get_new_crtc_state(state, crtc); enum pipe pipe = crtc->pipe; + intel_psr_post_plane_update(state, crtc); + intel_frontbuffer_flip(dev_priv, new_crtc_state->fb_bits); if (new_crtc_state->update_wm_post && new_crtc_state->hw.active) @@ -7296,7 +7298,6 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) } intel_dbuf_post_plane_update(state); - intel_psr_post_plane_update(state); for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { intel_post_plane_update(state, crtc); diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 850b11f20285..bb65881e87cc 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2195,10 +2195,12 @@ void intel_psr_pre_plane_update(struct intel_atomic_state *state, } } -static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, - const struct intel_crtc_state *crtc_state) +void intel_psr_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc) { struct drm_i915_private *dev_priv = to_i915(state->base.dev); + const struct intel_crtc_state *crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); struct intel_encoder *encoder; if (!crtc_state->has_psr) @@ -2241,20 +2243,6 @@ static void _intel_psr_post_plane_update(const struct intel_atomic_state *state, } } -void intel_psr_post_plane_update(const struct intel_atomic_state *state) -{ - struct drm_i915_private *dev_priv = to_i915(state->base.dev); - struct intel_crtc_state *crtc_state; - struct intel_crtc *crtc; - int i; - - if (!HAS_PSR(dev_priv)) - return; - - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) - _intel_psr_post_plane_update(state, crtc_state); -} - static int _psr2_ready_for_pipe_update_locked(struct intel_dp *intel_dp) { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 0b95e8aa615f..bf35f42df6bc 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -24,7 +24,8 @@ struct intel_plane_state; void intel_psr_init_dpcd(struct intel_dp *intel_dp); void intel_psr_pre_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc); -void intel_psr_post_plane_update(const struct intel_atomic_state *state); +void intel_psr_post_plane_update(struct intel_atomic_state *state, + struct intel_crtc *crtc); void intel_psr_disable(struct intel_dp *intel_dp, const struct intel_crtc_state *old_crtc_state); int intel_psr_debug_set(struct intel_dp *intel_dp, u64 value); From patchwork Wed Oct 4 15:55:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408949 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51295E7C4D9 for ; Wed, 4 Oct 2023 15:56:19 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AABA010E131; Wed, 4 Oct 2023 15:56:17 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 78B6110E131 for ; Wed, 4 Oct 2023 15:56:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434976; x=1727970976; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=jmVHo9Wxeu7pdhqFZqMSvX0Cci9RZA0cLNC856nBCWA=; b=e1yn1gRWpblnQXkciHKwLd4y6ekRaVEAqd0q+j+PP3mC7CnK0ZZtLaWF /UuAYj7X/Sh3wLHFPhPoBow9MhtQyvCSDaKV8ihdCT2r/Hb9LUNUIOzrt sTiQP6uByfL+z6LaxTVRUo5nY/98rFxTs+rEnqn+vCluTlahqfnJFj2Iq fdJ6eplu+Z8XTYdt5OmHQC2T7QskXudcdYJC39TPANkBYCXoB7/k9047U nNu/TwJiQ9Ye6gxgryLt0dN8NduKtQsTNKyzO/LbR+iNTns9u3Wvw3w4p mV5jLoK0ESn1QuHEdRqdVWgM9gmcbMkWhFl6WIaqPKc9sahPveE9dpie1 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483772" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483772" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:16 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867440890" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867440890" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:14 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:13 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:55:57 +0300 Message-ID: <20231004155607.7719-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 02/12] drm/i915: Stop clobbering old crtc state during state check X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The state checker overwrites the old crtc state with the current hardware state. While that does save a kmalloc() it seems rather dubious as there might still be something that we need in the old crtc state. Stop doing that and just allocate a temporary state for the state checker. Should the extra malloc during the commit phase turn out too annoying we could of course preallocate one for each crtc, but let's proceed with the straightforward approch for now. And while at it let's mark the new crtc state as const to make sure the state checker doesn't mess it up. Signed-off-by: Ville Syrjälä --- .../drm/i915/display/intel_modeset_verify.c | 21 +++++++++---------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 138144a65a45..92b55b4fb74e 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -156,21 +156,20 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat } static void -verify_crtc_state(struct intel_crtc *crtc, - struct intel_crtc_state *old_crtc_state, - struct intel_crtc_state *new_crtc_state) +verify_crtc_state(struct intel_atomic_state *state, + struct intel_crtc *crtc) { struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - struct intel_encoder *encoder; - struct intel_crtc_state *pipe_config = old_crtc_state; - struct drm_atomic_state *state = old_crtc_state->uapi.state; + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + struct intel_crtc_state *pipe_config; struct intel_crtc *master_crtc; + struct intel_encoder *encoder; - __drm_atomic_helper_crtc_destroy_state(&old_crtc_state->uapi); - intel_crtc_free_hw_state(old_crtc_state); - intel_crtc_state_reset(old_crtc_state, crtc); - old_crtc_state->uapi.state = state; + pipe_config = intel_crtc_state_alloc(crtc); + if (!pipe_config) + return; drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s]\n", crtc->base.base.id, crtc->base.name); @@ -236,7 +235,7 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc, intel_wm_state_verify(crtc, new_crtc_state); verify_connector_state(state, crtc); - verify_crtc_state(crtc, old_crtc_state, new_crtc_state); + verify_crtc_state(state, crtc); intel_shared_dpll_state_verify(crtc, old_crtc_state, new_crtc_state); intel_mpllb_state_verify(state, new_crtc_state); intel_c10pll_state_verify(state, new_crtc_state); From patchwork Wed Oct 4 15:55:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408950 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 595BBE7C4D7 for ; Wed, 4 Oct 2023 15:56:21 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D269210E17B; Wed, 4 Oct 2023 15:56:20 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 78CCE10E17B for ; Wed, 4 Oct 2023 15:56:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434979; x=1727970979; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Bc8XE5SjqnZImXYAE6C20yTDjkv4os72KNJ9T3JW4Qc=; b=NeokPGxWgQyQ1huEaZk4BlbwmjhIQb3DOLcRPNpX/3mnwfrAFqqaiOxr fqj82hkrsvKB9nMuVxWsL+pcTnbbImfKeBcEiMoWnoxvYCPaW3fhqim/I hHjA+w+odOeA5Be9ObqfHwteJKdXmNlQNy/ROKLKFbpcm8+KfyqEpZ1Jf xpECNxV60YHptHedrRcNm3IyqinKYg42P4r4Fb2U102skP2gjkeLukpVu ixElbJHeXVSIwOhg5ZSQDgtQw56inxIqTdWE7Qm7BQh4sJIfaU0UT49uD wAZaX9AWaKIV/SjVbkRGFXoU1m0Wpa/QzXAYBzKpDalnO2HGTiGUocQ2Q g==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483779" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483779" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867440941" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867440941" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:17 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:16 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:55:58 +0300 Message-ID: <20231004155607.7719-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 03/12] drm/i915: Constify the crtc states in the DPLL checker X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The DPLL state checker should not be modifying the crtc states, so make the const. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 6 +++--- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 4 ++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 86cdd8c9f2d8..237cfc8780a4 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -4460,7 +4460,7 @@ static void verify_single_dpll_state(struct drm_i915_private *i915, struct intel_shared_dpll *pll, struct intel_crtc *crtc, - struct intel_crtc_state *new_crtc_state) + const struct intel_crtc_state *new_crtc_state) { struct intel_dpll_hw_state dpll_hw_state; u8 pipe_mask; @@ -4513,8 +4513,8 @@ verify_single_dpll_state(struct drm_i915_private *i915, } void intel_shared_dpll_state_verify(struct intel_crtc *crtc, - struct intel_crtc_state *old_crtc_state, - struct intel_crtc_state *new_crtc_state) + const struct intel_crtc_state *old_crtc_state, + const struct intel_crtc_state *new_crtc_state) { struct drm_i915_private *i915 = to_i915(crtc->base.dev); diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h index 75d2ff977b4e..e184680606e9 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -370,8 +370,8 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port); bool intel_dpll_is_combophy(enum intel_dpll_id id); void intel_shared_dpll_state_verify(struct intel_crtc *crtc, - struct intel_crtc_state *old_crtc_state, - struct intel_crtc_state *new_crtc_state); + const struct intel_crtc_state *old_crtc_state, + const struct intel_crtc_state *new_crtc_state); void intel_shared_dpll_verify_disabled(struct drm_i915_private *i915); #endif /* _INTEL_DPLL_MGR_H_ */ From patchwork Wed Oct 4 15:55:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408951 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6BC13E7C4D8 for ; Wed, 4 Oct 2023 15:56:25 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 02DC510E18E; Wed, 4 Oct 2023 15:56:25 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7544E10E18E for ; Wed, 4 Oct 2023 15:56:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434982; x=1727970982; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=74IFz6CnbjH06dPnwgy8oWkIVwTJwr9KJFMUmABh+wQ=; b=YeNUfsatJvVDWbPkh2OUbMJ1ZKWbESzRSrFaL/JcWXhST00Nz5HWAnEj jaG0W0n8Qc/huMylXi73itZ1kIPbCi3+LZs7theppdJxKct4j9D+PpJJ2 HCu+EAzBGWbFXMyYUUo6T5orPfBqMioBo8DHTu6pfH+tkHenAWCyMGERs QDnxgUeHplVOoOF0/Z/vh4Gjc4pj6MAv6zMWsAaqQLW61x9Md1K6nTeS/ XTX2MilogSERvWmRD4prVRZPVr8vWhRbS22n6F1Tvme8YxuweMnn+Sdzu hE0yB0U68kNEcQXjPvpAurmLzez3XJKhXqtPeCMWIBVYTZqVSuPad3Fs7 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483787" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483787" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:22 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867440988" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867440988" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:20 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:19 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:55:59 +0300 Message-ID: <20231004155607.7719-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 04/12] drm/i915: Simplify DPLL state checker calling convention X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Make life simpler by just passing in the atomic state + crtc instead of plumbing in all kinds of crtc states. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 14 +++++++++----- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 7 +++---- .../gpu/drm/i915/display/intel_modeset_verify.c | 4 ++-- 3 files changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c index 237cfc8780a4..399653a20f98 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c @@ -4512,11 +4512,14 @@ verify_single_dpll_state(struct drm_i915_private *i915, "pll hw state mismatch\n"); } -void intel_shared_dpll_state_verify(struct intel_crtc *crtc, - const struct intel_crtc_state *old_crtc_state, - const struct intel_crtc_state *new_crtc_state) +void intel_shared_dpll_state_verify(struct intel_atomic_state *state, + struct intel_crtc *crtc) { - struct drm_i915_private *i915 = to_i915(crtc->base.dev); + struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_crtc_state *old_crtc_state = + intel_atomic_get_old_crtc_state(state, crtc); + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); if (new_crtc_state->shared_dpll) verify_single_dpll_state(i915, new_crtc_state->shared_dpll, @@ -4536,8 +4539,9 @@ void intel_shared_dpll_state_verify(struct intel_crtc *crtc, } } -void intel_shared_dpll_verify_disabled(struct drm_i915_private *i915) +void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state) { + struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_shared_dpll *pll; int i; diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h index e184680606e9..dd4796a61751 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h @@ -369,9 +369,8 @@ void intel_dpll_dump_hw_state(struct drm_i915_private *i915, enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port); bool intel_dpll_is_combophy(enum intel_dpll_id id); -void intel_shared_dpll_state_verify(struct intel_crtc *crtc, - const struct intel_crtc_state *old_crtc_state, - const struct intel_crtc_state *new_crtc_state); -void intel_shared_dpll_verify_disabled(struct drm_i915_private *i915); +void intel_shared_dpll_state_verify(struct intel_atomic_state *state, + struct intel_crtc *crtc); +void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state); #endif /* _INTEL_DPLL_MGR_H_ */ diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 92b55b4fb74e..47d45ba1e707 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -236,7 +236,7 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc, intel_wm_state_verify(crtc, new_crtc_state); verify_connector_state(state, crtc); verify_crtc_state(state, crtc); - intel_shared_dpll_state_verify(crtc, old_crtc_state, new_crtc_state); + intel_shared_dpll_state_verify(state, crtc); intel_mpllb_state_verify(state, new_crtc_state); intel_c10pll_state_verify(state, new_crtc_state); } @@ -246,5 +246,5 @@ void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, { verify_encoder_state(dev_priv, state); verify_connector_state(state, NULL); - intel_shared_dpll_verify_disabled(dev_priv); + intel_shared_dpll_verify_disabled(state); } From patchwork Wed Oct 4 15:56:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408952 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2084BE7C4D7 for ; Wed, 4 Oct 2023 15:56:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A5BCC10E18F; Wed, 4 Oct 2023 15:56:27 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8BED810E18F for ; Wed, 4 Oct 2023 15:56:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434985; x=1727970985; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=P8fSaQc9XS5wRleJKAIqpN1r4K+XmbMQg6PWOiBK8p4=; b=BYa5xQFv5TBDvKJbtqSpDzTtyhp8P4wSyB/XfPN7sTXf7n1MwTR3yGf2 F6/xWy6hkPnL/vUB6h99XXmergmX1k7dhMKOEnjpkZDm5h+BmnODL0sPE lxr9EsFFt7gYkoMAmzy1CBINDEnnIBk5JXikBc6IrYg0mPLncJkhybCs8 R/WKbxqatVUyY4HOd3j4jgccJ+eEH+4z6NBT0mBZhv/S9Ga0CB0kf09fw Um2HWUAuNGb5Eellmo5X9Mfn/oMDkaRUTLyBsVDzQ8uIoaqfpXfrNswC1 brHzfT/FD23UUh9TWjrQ6UGb7ShGVGwNPaH27bfalzrFsCbXnnwz0mMXe Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483790" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483790" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441051" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441051" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:23 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:22 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:00 +0300 Message-ID: <20231004155607.7719-6-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 05/12] drm/i915: Constify watermark state checker X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The skl+ wm state checker has no reason to modify the crtc state, so make it const. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/skl_watermark.c | 2 +- drivers/gpu/drm/i915/display/skl_watermark.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index 846e9a3e94dc..d51cf92c96ae 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -3135,7 +3135,7 @@ static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915) } void intel_wm_state_verify(struct intel_crtc *crtc, - struct intel_crtc_state *new_crtc_state) + const struct intel_crtc_state *new_crtc_state) { struct drm_i915_private *i915 = to_i915(crtc->base.dev); struct skl_hw_state { diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h index edb61e33df83..18e4b0661cbb 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.h +++ b/drivers/gpu/drm/i915/display/skl_watermark.h @@ -39,7 +39,7 @@ bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb, int num_entries, int ignore_idx); void intel_wm_state_verify(struct intel_crtc *crtc, - struct intel_crtc_state *new_crtc_state); + const struct intel_crtc_state *new_crtc_state); void skl_watermark_ipc_init(struct drm_i915_private *i915); void skl_watermark_ipc_update(struct drm_i915_private *i915); From patchwork Wed Oct 4 15:56:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408953 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 78171E7C4D9 for ; Wed, 4 Oct 2023 15:56:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 05CB410E38D; Wed, 4 Oct 2023 15:56:30 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 97A7F10E38E for ; Wed, 4 Oct 2023 15:56:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434988; x=1727970988; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=2T/E11vf3vuNo6YFEP8nNv7mC79seQwo0Ns2ElOY+Hc=; b=cG4iKi/M4iKwqhjOktHYOZPaTv0yhP3Dv4W/O0Zgp8sFl913UK8cexHA rmCCo7Pg0h90KtRDRTIqnfyYEEb0EhT7bFrsjhBOEsb4QU15Y6tGSmX6T mucE4Trby8cJe6zYxclCx20uVtZbkxsKOnLJTM7HaLUWloZbJU7/k1XjV gZBChAViDiKg2pvPxS8bblL4mdxYq2PXSs3XKG4e22rZFsrjHmSSEEn/o aCchi8VMyhLddLjoQDvK9/ioSS7PU1mawVO58DA63Q5cycTdrRn/SBvFz fQ1trEUx/lk/lyYQIBMeQTkDBy9Q81ZpWU+FRAbFnWSOegW2RAeIPhXr2 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483797" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483797" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441112" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441112" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:26 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:25 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:01 +0300 Message-ID: <20231004155607.7719-7-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 06/12] drm/i915: Simplify watermark state checker calling convention X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä There is never any reason to pass in both the crtc and its state as one can always dig out the crtc from its state. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_modeset_verify.c | 2 +- drivers/gpu/drm/i915/display/skl_watermark.c | 4 ++-- drivers/gpu/drm/i915/display/skl_watermark.h | 3 +-- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 47d45ba1e707..bbee79aad0cd 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -233,7 +233,7 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc, !intel_crtc_needs_fastset(new_crtc_state)) return; - intel_wm_state_verify(crtc, new_crtc_state); + intel_wm_state_verify(new_crtc_state); verify_connector_state(state, crtc); verify_crtc_state(state, crtc); intel_shared_dpll_state_verify(state, crtc); diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c index d51cf92c96ae..e7a9fb4b1f6b 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.c +++ b/drivers/gpu/drm/i915/display/skl_watermark.c @@ -3134,9 +3134,9 @@ static void skl_wm_get_hw_state_and_sanitize(struct drm_i915_private *i915) skl_wm_sanitize(i915); } -void intel_wm_state_verify(struct intel_crtc *crtc, - const struct intel_crtc_state *new_crtc_state) +void intel_wm_state_verify(const struct intel_crtc_state *new_crtc_state) { + struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct drm_i915_private *i915 = to_i915(crtc->base.dev); struct skl_hw_state { struct skl_ddb_entry ddb[I915_MAX_PLANES]; diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h index 18e4b0661cbb..ca4312bf7012 100644 --- a/drivers/gpu/drm/i915/display/skl_watermark.h +++ b/drivers/gpu/drm/i915/display/skl_watermark.h @@ -38,8 +38,7 @@ bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb, const struct skl_ddb_entry *entries, int num_entries, int ignore_idx); -void intel_wm_state_verify(struct intel_crtc *crtc, - const struct intel_crtc_state *new_crtc_state); +void intel_wm_state_verify(const struct intel_crtc_state *new_crtc_state); void skl_watermark_ipc_init(struct drm_i915_private *i915); void skl_watermark_ipc_update(struct drm_i915_private *i915); From patchwork Wed Oct 4 15:56:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408954 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91C49E7C4D7 for ; Wed, 4 Oct 2023 15:56:33 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2159A10E38E; Wed, 4 Oct 2023 15:56:33 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id CD14610E38E for ; Wed, 4 Oct 2023 15:56:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434991; x=1727970991; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=pf1L1MZCCP1gCw+WY/TA3niuxJNSaQdsQvrS8pcA5b8=; b=RlrSmJDbDdHXX+at7cwULv9h1SQDRn/fj8lDkrOqzPVJjvMdqf0xo7NA XoExExhIH3I414G2nar1Wmuu4AGKinFwBr9NTRM51kaIGHCg4tGgQXuEv Qhe1onipYAf2U8BjV3IszEau84PjQCRfnJGDqtroNp2CiiBN+6XcakNLV PFpGRBRGjfeiLgK/ca9aGN5TSs3MGWddYLhcH2yRHbpY3I+J25NTUb2hd 9ROMenUhB4Dvs1tSUSurql3wx6wAth5vFVSY2rIpx5Oi1w0fgArJZxlCw 69VYekKKIt5l2gqQov6w0RKzMqo60krBRTSygmsUATUP32ztjYC93szGH A==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483804" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483804" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:31 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441157" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441157" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:29 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:28 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:02 +0300 Message-ID: <20231004155607.7719-8-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 07/12] drm/i915: Constify the snps/c10x PLL state checkers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä State checkers should never modify the crtc states, so make them const. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 4 ++-- drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 +- drivers/gpu/drm/i915/display/intel_snps_phy.c | 4 ++-- drivers/gpu/drm/i915/display/intel_snps_phy.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index abd607b564f1..1aba265afe41 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -3005,11 +3005,11 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder, } void intel_c10pll_state_verify(struct intel_atomic_state *state, - struct intel_crtc_state *new_crtc_state) + const struct intel_crtc_state *new_crtc_state) { struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_c10pll_state mpllb_hw_state = { 0 }; - struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10; + const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10; struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct intel_encoder *encoder; enum phy phy; diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h index 912e0eeb0be3..43f2fdb662c5 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h @@ -34,7 +34,7 @@ void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv, int intel_c10pll_calc_port_clock(struct intel_encoder *encoder, const struct intel_c10pll_state *pll_state); void intel_c10pll_state_verify(struct intel_atomic_state *state, - struct intel_crtc_state *new_crtc_state); + const struct intel_crtc_state *new_crtc_state); void intel_c20pll_readout_hw_state(struct intel_encoder *encoder, struct intel_c20pll_state *pll_state); void intel_c20pll_dump_hw_state(struct drm_i915_private *i915, diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c index 88ef56b6e0fd..bdceb6bd474c 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c @@ -1993,11 +1993,11 @@ int intel_snps_phy_check_hdmi_link_rate(int clock) } void intel_mpllb_state_verify(struct intel_atomic_state *state, - struct intel_crtc_state *new_crtc_state) + const struct intel_crtc_state *new_crtc_state) { struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_mpllb_state mpllb_hw_state = { 0 }; - struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state; + const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state; struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct intel_encoder *encoder; diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h index 557ef820bc0b..9d1d0c6a9cfe 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.h +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h @@ -33,6 +33,6 @@ int intel_snps_phy_check_hdmi_link_rate(int clock); void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_mpllb_state_verify(struct intel_atomic_state *state, - struct intel_crtc_state *new_crtc_state); + const struct intel_crtc_state *new_crtc_state); #endif /* __INTEL_SNPS_PHY_H__ */ From patchwork Wed Oct 4 15:56:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408955 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 98D79E7C4D7 for ; Wed, 4 Oct 2023 15:56:37 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2D2CF10E38F; Wed, 4 Oct 2023 15:56:37 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id AEB1210E38F for ; Wed, 4 Oct 2023 15:56:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434994; x=1727970994; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Q3JGoADfpeDBDIUlbB9r2E1Di/eOPzcNRYZ70vypQQo=; b=RvlLg6Qqa2OgAmpN3tq2SgcrRuXRzkl61mmtQcl2qVnSpy872w8IHld0 Vs4c1t66yIcbFQhJZMHNGedzCtmmtKwSTOBrAs0qHe+hM+uHn6HQ/nNiw y7EpIcKC/kGBxFaLLWimMr+97CPY7l+NibuX4zdPQp9H06HIHrqz30m/D IG+gMYa8RkoOfcsDWsIjikJvcTt+N1x09uiwh/aNzmsGH6XxeFXmz9lzF JZaN/w+ycPAIMRE5W0CMiwfgQ1LBbwokHYv+RyHg3FLOKqkKaBnp4k64M AOO9Zre4S+WCBkvqe4L5udncvMFcFDRymiMwIdRN2YoaRolfA3hcDqme/ A==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483806" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483806" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441197" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441197" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:32 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:31 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:03 +0300 Message-ID: <20231004155607.7719-9-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 08/12] drm/i915: Simplify snps/c10x DPLL state checker calling convetion X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Passing in the atomic state + crtc state is a bit weird. The latter can be just the crtc (which is the normal calling convention used in a lot of other places). Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_cx0_phy.c | 5 +++-- drivers/gpu/drm/i915/display/intel_cx0_phy.h | 3 ++- drivers/gpu/drm/i915/display/intel_modeset_verify.c | 4 ++-- drivers/gpu/drm/i915/display/intel_snps_phy.c | 5 +++-- drivers/gpu/drm/i915/display/intel_snps_phy.h | 3 ++- 5 files changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index 1aba265afe41..0ef28f4be36e 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -3005,12 +3005,13 @@ intel_mtl_port_pll_type(struct intel_encoder *encoder, } void intel_c10pll_state_verify(struct intel_atomic_state *state, - const struct intel_crtc_state *new_crtc_state) + struct intel_crtc *crtc) { struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); struct intel_c10pll_state mpllb_hw_state = { 0 }; const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10; - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct intel_encoder *encoder; enum phy phy; int i; diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.h b/drivers/gpu/drm/i915/display/intel_cx0_phy.h index 43f2fdb662c5..0e0a38dac8cd 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.h +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.h @@ -16,6 +16,7 @@ struct drm_i915_private; struct intel_atomic_state; struct intel_c10pll_state; struct intel_c20pll_state; +struct intel_crtc; struct intel_crtc_state; struct intel_encoder; struct intel_hdmi; @@ -34,7 +35,7 @@ void intel_c10pll_dump_hw_state(struct drm_i915_private *dev_priv, int intel_c10pll_calc_port_clock(struct intel_encoder *encoder, const struct intel_c10pll_state *pll_state); void intel_c10pll_state_verify(struct intel_atomic_state *state, - const struct intel_crtc_state *new_crtc_state); + struct intel_crtc *crtc); void intel_c20pll_readout_hw_state(struct intel_encoder *encoder, struct intel_c20pll_state *pll_state); void intel_c20pll_dump_hw_state(struct drm_i915_private *i915, diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index bbee79aad0cd..b876ec34b1a3 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -237,8 +237,8 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc, verify_connector_state(state, crtc); verify_crtc_state(state, crtc); intel_shared_dpll_state_verify(state, crtc); - intel_mpllb_state_verify(state, new_crtc_state); - intel_c10pll_state_verify(state, new_crtc_state); + intel_mpllb_state_verify(state, crtc); + intel_c10pll_state_verify(state, crtc); } void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.c b/drivers/gpu/drm/i915/display/intel_snps_phy.c index bdceb6bd474c..c0285365efae 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.c +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.c @@ -1993,12 +1993,13 @@ int intel_snps_phy_check_hdmi_link_rate(int clock) } void intel_mpllb_state_verify(struct intel_atomic_state *state, - const struct intel_crtc_state *new_crtc_state) + struct intel_crtc *crtc) { struct drm_i915_private *i915 = to_i915(state->base.dev); + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); struct intel_mpllb_state mpllb_hw_state = { 0 }; const struct intel_mpllb_state *mpllb_sw_state = &new_crtc_state->mpllb_state; - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc); struct intel_encoder *encoder; if (!IS_DG2(i915)) diff --git a/drivers/gpu/drm/i915/display/intel_snps_phy.h b/drivers/gpu/drm/i915/display/intel_snps_phy.h index 9d1d0c6a9cfe..515abf7c5902 100644 --- a/drivers/gpu/drm/i915/display/intel_snps_phy.h +++ b/drivers/gpu/drm/i915/display/intel_snps_phy.h @@ -10,6 +10,7 @@ struct drm_i915_private; struct intel_atomic_state; +struct intel_crtc; struct intel_crtc_state; struct intel_encoder; struct intel_mpllb_state; @@ -33,6 +34,6 @@ int intel_snps_phy_check_hdmi_link_rate(int clock); void intel_snps_phy_set_signal_levels(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_mpllb_state_verify(struct intel_atomic_state *state, - const struct intel_crtc_state *new_crtc_state); + struct intel_crtc *crtc); #endif /* __INTEL_SNPS_PHY_H__ */ From patchwork Wed Oct 4 15:56:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C3C97E7C4D9 for ; Wed, 4 Oct 2023 15:56:39 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 57E7310E390; Wed, 4 Oct 2023 15:56:39 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id 932B710E390 for ; Wed, 4 Oct 2023 15:56:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696434997; x=1727970997; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=FVoPEe1ZgvPRKOhv4gXCuEyeC56QbRt+8vJKAIGguEk=; b=fzn62BJLdJP+VCrgKX/PAVQF8QvW19gS31DgMxghQ7bNStoIgIJyX3lu fFPl7VqZJSRlc7VZOrR8jgwSGqQpGiJPrctt6LUb8EcSZJvHA9PFws0pb SL5LE/DoGJTbrf/X9/vW3yM6hsmFPtP2TsM4h+LeatnLY66xQw0aEqLY8 xDycOpLoEKa6s25VDdEXelrEU9yqOt7o37bZlp5XrGCyFfxpwkfrl0KOh AwPgJ1pRXWJMXkFNY5oYmHgn+1lnr5BJ2PVVcIMYX4dZP+61wz6WhCy7B 6nPvkZ2CNvHScTELb7B7t7hx8C5ZKtYNsEx3BbFABCqtdv3MlAt1IrxFN A==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483807" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483807" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441224" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441224" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:35 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:34 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:04 +0300 Message-ID: <20231004155607.7719-10-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 09/12] drm/i915: Constify remainder of the state checker X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Mark the remaining crtc states used by the state checker as const. There is no reason to ever mutate them here. Signed-off-by: Ville Syrjälä --- .../gpu/drm/i915/display/intel_modeset_verify.c | 14 +++++++------- .../gpu/drm/i915/display/intel_modeset_verify.h | 4 ++-- 2 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index b876ec34b1a3..9ac9c23782cc 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -23,8 +23,8 @@ * Cross check the actual hw state with our own modeset state tracking (and its * internal consistency). */ -static void intel_connector_verify_state(struct intel_crtc_state *crtc_state, - struct drm_connector_state *conn_state) +static void intel_connector_verify_state(const struct intel_crtc_state *crtc_state, + const struct drm_connector_state *conn_state) { struct intel_connector *connector = to_intel_connector(conn_state->connector); struct drm_i915_private *i915 = to_i915(connector->base.dev); @@ -66,12 +66,12 @@ verify_connector_state(struct intel_atomic_state *state, struct intel_crtc *crtc) { struct drm_connector *connector; - struct drm_connector_state *new_conn_state; + const struct drm_connector_state *new_conn_state; int i; for_each_new_connector_in_state(&state->base, connector, new_conn_state, i) { struct drm_encoder *encoder = connector->encoder; - struct intel_crtc_state *crtc_state = NULL; + const struct intel_crtc_state *crtc_state = NULL; if (new_conn_state->crtc != &crtc->base) continue; @@ -110,7 +110,7 @@ verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_stat { struct intel_encoder *encoder; struct drm_connector *connector; - struct drm_connector_state *old_conn_state, *new_conn_state; + const struct drm_connector_state *old_conn_state, *new_conn_state; int i; for_each_intel_encoder(&dev_priv->drm, encoder) { @@ -226,8 +226,8 @@ verify_crtc_state(struct intel_atomic_state *state, void intel_modeset_verify_crtc(struct intel_crtc *crtc, struct intel_atomic_state *state, - struct intel_crtc_state *old_crtc_state, - struct intel_crtc_state *new_crtc_state) + const struct intel_crtc_state *old_crtc_state, + const struct intel_crtc_state *new_crtc_state) { if (!intel_crtc_needs_modeset(new_crtc_state) && !intel_crtc_needs_fastset(new_crtc_state)) diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.h b/drivers/gpu/drm/i915/display/intel_modeset_verify.h index 2d6fbe4f7846..77786a877f6a 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.h +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.h @@ -13,8 +13,8 @@ struct intel_crtc_state; void intel_modeset_verify_crtc(struct intel_crtc *crtc, struct intel_atomic_state *state, - struct intel_crtc_state *old_crtc_state, - struct intel_crtc_state *new_crtc_state); + const struct intel_crtc_state *old_crtc_state, + const struct intel_crtc_state *new_crtc_state); void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, struct intel_atomic_state *state); From patchwork Wed Oct 4 15:56:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408957 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7158AE7C4D7 for ; Wed, 4 Oct 2023 15:56:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F1B1510E396; Wed, 4 Oct 2023 15:56:41 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id B322910E395 for ; Wed, 4 Oct 2023 15:56:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696435000; x=1727971000; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=TEY5yGIiuRLcVu8gmZp3JaTJW8AmH9ZfAjx7ChUToRM=; b=nlwCATonZ7e958FPbVuCuG4NMm2XJFcoJCQjEePoX4dcPcsu+gRLOYwk 1xSXAISPM7KjikAIRn072dOpWE5NG/5oUMPGX6TZYj2/y+XZ4c5pjO6Ul DDDgzQBJXrhnrKqP+p70KNjkiOOgZOmYfSr/KdwhMiuYM7nQ15YfRmRel msvlM7HRk8iuGjXNIBl7bV3X/+BB/xNNbSX0iIUk/DfXcehlENHGTBoVd 13WdeOIttYfPpP1uMeC3UTPPlq7M5KjRenCToJBQFV8ZHVx+Fyi4cYvSK XxuaPCvXR+DT4muvGwX6KHUOU0M/KGVCaMe9IF4SoHKp80V+loXbcrcPn Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483810" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483810" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441235" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441235" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:38 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:37 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:05 +0300 Message-ID: <20231004155607.7719-11-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 10/12] drm/i915: Simplify the state checker calling convetions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä We're passing in a totally random mismash of things into the state checker. Clean it up to pass in the minimum needed. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- .../drm/i915/display/intel_modeset_verify.c | 24 ++++++++++--------- .../drm/i915/display/intel_modeset_verify.h | 11 +++------ 3 files changed, 18 insertions(+), 21 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 8683b030cebb..e309fda108ef 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -7218,7 +7218,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_set_cdclk_pre_plane_update(state); - intel_modeset_verify_disabled(dev_priv, state); + intel_modeset_verify_disabled(state); } intel_sagv_pre_plane_update(state); @@ -7304,7 +7304,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state) intel_modeset_put_crtc_power_domains(crtc, &put_domains[crtc->pipe]); - intel_modeset_verify_crtc(crtc, state, old_crtc_state, new_crtc_state); + intel_modeset_verify_crtc(state, crtc); /* Must be done after gamma readout due to HSW split gamma vs. IPS w/a */ hsw_ips_post_update(state, crtc); diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 9ac9c23782cc..67fe754ac6e5 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -86,9 +86,10 @@ verify_connector_state(struct intel_atomic_state *state, } } -static void intel_pipe_config_sanity_check(struct drm_i915_private *dev_priv, - const struct intel_crtc_state *pipe_config) +static void intel_pipe_config_sanity_check(const struct intel_crtc_state *pipe_config) { + struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev); + if (pipe_config->has_pch_encoder) { int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, pipe_config), &pipe_config->fdi_m_n); @@ -106,8 +107,9 @@ static void intel_pipe_config_sanity_check(struct drm_i915_private *dev_priv, } static void -verify_encoder_state(struct drm_i915_private *dev_priv, struct intel_atomic_state *state) +verify_encoder_state(struct intel_atomic_state *state) { + struct drm_i915_private *dev_priv = to_i915(state->base.dev); struct intel_encoder *encoder; struct drm_connector *connector; const struct drm_connector_state *old_conn_state, *new_conn_state; @@ -214,7 +216,7 @@ verify_crtc_state(struct intel_atomic_state *state, if (!new_crtc_state->hw.active) return; - intel_pipe_config_sanity_check(dev_priv, pipe_config); + intel_pipe_config_sanity_check(pipe_config); if (!intel_pipe_config_compare(new_crtc_state, pipe_config, false)) { @@ -224,11 +226,12 @@ verify_crtc_state(struct intel_atomic_state *state, } } -void intel_modeset_verify_crtc(struct intel_crtc *crtc, - struct intel_atomic_state *state, - const struct intel_crtc_state *old_crtc_state, - const struct intel_crtc_state *new_crtc_state) +void intel_modeset_verify_crtc(struct intel_atomic_state *state, + struct intel_crtc *crtc) { + const struct intel_crtc_state *new_crtc_state = + intel_atomic_get_new_crtc_state(state, crtc); + if (!intel_crtc_needs_modeset(new_crtc_state) && !intel_crtc_needs_fastset(new_crtc_state)) return; @@ -241,10 +244,9 @@ void intel_modeset_verify_crtc(struct intel_crtc *crtc, intel_c10pll_state_verify(state, crtc); } -void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, - struct intel_atomic_state *state) +void intel_modeset_verify_disabled(struct intel_atomic_state *state) { - verify_encoder_state(dev_priv, state); + verify_encoder_state(state); verify_connector_state(state, NULL); intel_shared_dpll_verify_disabled(state); } diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.h b/drivers/gpu/drm/i915/display/intel_modeset_verify.h index 77786a877f6a..3bef8735cb4b 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.h +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.h @@ -6,16 +6,11 @@ #ifndef __INTEL_MODESET_VERIFY_H__ #define __INTEL_MODESET_VERIFY_H__ -struct drm_i915_private; struct intel_atomic_state; struct intel_crtc; -struct intel_crtc_state; -void intel_modeset_verify_crtc(struct intel_crtc *crtc, - struct intel_atomic_state *state, - const struct intel_crtc_state *old_crtc_state, - const struct intel_crtc_state *new_crtc_state); -void intel_modeset_verify_disabled(struct drm_i915_private *dev_priv, - struct intel_atomic_state *state); +void intel_modeset_verify_crtc(struct intel_atomic_state *state, + struct intel_crtc *crtc); +void intel_modeset_verify_disabled(struct intel_atomic_state *state); #endif /* __INTEL_MODESET_VERIFY_H__ */ From patchwork Wed Oct 4 15:56:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408958 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F3BBE7C4D7 for ; Wed, 4 Oct 2023 15:56:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9725110E398; Wed, 4 Oct 2023 15:56:46 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id BD80E10E391 for ; Wed, 4 Oct 2023 15:56:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696435003; x=1727971003; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=FFIfWt+7wbXRPeSRlkVQSIRW/gF3MZp7fIzqF0jWXH0=; b=hEVW+Z1wRboDRC5LHcy0zmtSKn0NZguJM3CsaR8aei21hBUz1sjkrjeR GiM2XA7xAkA1gJwQkPlTN/VkdA0QCKgZtvRHc/X57ogg8006vJt/ws201 mNlfkQlo9Lq+duXxDFQNy7dxTxHNTYdItz/BnE5RxDT8KFCBJEzSobFe8 097EHBsrIicJ5njz8fuPi7kWSQvYhAC3ca5Kjv9UWi4AFJk0BBwNvgApk syIns8/mYVW04I7GpbAj7epJO8pG/7Kl5BGjkNJlH2fha/AUtyfNlQIyc dHlud+S3j60HmbMiVMM19tZwyX71Cvg+q5OVa675BFjrG4dPBzvfG0Hjl Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483813" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483813" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441250" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441250" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:41 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:40 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:06 +0300 Message-ID: <20231004155607.7719-12-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 11/12] drm/i915: s/pipe_config/crtc_state/ in the state checker X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Switch over to the modern variable naming in the state checker. Ie. rename the pipe_config stuff to crtc_state. Also make it clear which is the "software state" (ie. what the current state should be) vs. "hardware state" (ie. what the currnet state really is). Signed-off-by: Ville Syrjälä --- .../drm/i915/display/intel_modeset_verify.c | 56 +++++++++---------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index 67fe754ac6e5..a55de82fa81f 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -86,14 +86,14 @@ verify_connector_state(struct intel_atomic_state *state, } } -static void intel_pipe_config_sanity_check(const struct intel_crtc_state *pipe_config) +static void intel_pipe_config_sanity_check(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev); + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); - if (pipe_config->has_pch_encoder) { - int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, pipe_config), - &pipe_config->fdi_m_n); - int dotclock = pipe_config->hw.adjusted_mode.crtc_clock; + if (crtc_state->has_pch_encoder) { + int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, crtc_state), + &crtc_state->fdi_m_n); + int dotclock = crtc_state->hw.adjusted_mode.crtc_clock; /* * FDI already provided one idea for the dotclock. @@ -163,66 +163,66 @@ verify_crtc_state(struct intel_atomic_state *state, { struct drm_device *dev = crtc->base.dev; struct drm_i915_private *dev_priv = to_i915(dev); - const struct intel_crtc_state *new_crtc_state = + const struct intel_crtc_state *sw_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); - struct intel_crtc_state *pipe_config; + struct intel_crtc_state *hw_crtc_state; struct intel_crtc *master_crtc; struct intel_encoder *encoder; - pipe_config = intel_crtc_state_alloc(crtc); - if (!pipe_config) + hw_crtc_state = intel_crtc_state_alloc(crtc); + if (!hw_crtc_state) return; drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s]\n", crtc->base.base.id, crtc->base.name); - pipe_config->hw.enable = new_crtc_state->hw.enable; + hw_crtc_state->hw.enable = sw_crtc_state->hw.enable; - intel_crtc_get_pipe_config(pipe_config); + intel_crtc_get_pipe_config(hw_crtc_state); /* we keep both pipes enabled on 830 */ - if (IS_I830(dev_priv) && pipe_config->hw.active) - pipe_config->hw.active = new_crtc_state->hw.active; + if (IS_I830(dev_priv) && hw_crtc_state->hw.active) + hw_crtc_state->hw.active = sw_crtc_state->hw.active; I915_STATE_WARN(dev_priv, - new_crtc_state->hw.active != pipe_config->hw.active, + sw_crtc_state->hw.active != hw_crtc_state->hw.active, "crtc active state doesn't match with hw state (expected %i, found %i)\n", - new_crtc_state->hw.active, pipe_config->hw.active); + sw_crtc_state->hw.active, hw_crtc_state->hw.active); - I915_STATE_WARN(dev_priv, crtc->active != new_crtc_state->hw.active, + I915_STATE_WARN(dev_priv, crtc->active != sw_crtc_state->hw.active, "transitional active state does not match atomic hw state (expected %i, found %i)\n", - new_crtc_state->hw.active, crtc->active); + sw_crtc_state->hw.active, crtc->active); - master_crtc = intel_master_crtc(new_crtc_state); + master_crtc = intel_master_crtc(sw_crtc_state); for_each_encoder_on_crtc(dev, &master_crtc->base, encoder) { enum pipe pipe; bool active; active = encoder->get_hw_state(encoder, &pipe); - I915_STATE_WARN(dev_priv, active != new_crtc_state->hw.active, + I915_STATE_WARN(dev_priv, active != sw_crtc_state->hw.active, "[ENCODER:%i] active %i with crtc active %i\n", encoder->base.base.id, active, - new_crtc_state->hw.active); + sw_crtc_state->hw.active); I915_STATE_WARN(dev_priv, active && master_crtc->pipe != pipe, "Encoder connected to wrong pipe %c\n", pipe_name(pipe)); if (active) - intel_encoder_get_config(encoder, pipe_config); + intel_encoder_get_config(encoder, hw_crtc_state); } - if (!new_crtc_state->hw.active) + if (!sw_crtc_state->hw.active) return; - intel_pipe_config_sanity_check(pipe_config); + intel_pipe_config_sanity_check(hw_crtc_state); - if (!intel_pipe_config_compare(new_crtc_state, - pipe_config, false)) { + if (!intel_pipe_config_compare(sw_crtc_state, + hw_crtc_state, false)) { I915_STATE_WARN(dev_priv, 1, "pipe state doesn't match!\n"); - intel_crtc_state_dump(pipe_config, NULL, "hw state"); - intel_crtc_state_dump(new_crtc_state, NULL, "sw state"); + intel_crtc_state_dump(hw_crtc_state, NULL, "hw state"); + intel_crtc_state_dump(sw_crtc_state, NULL, "sw state"); } } From patchwork Wed Oct 4 15:56:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13408959 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B6B05E7C4D9 for ; Wed, 4 Oct 2023 15:56:48 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 44D8F10E395; Wed, 4 Oct 2023 15:56:48 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by gabe.freedesktop.org (Postfix) with ESMTPS id B0D1F10E399 for ; Wed, 4 Oct 2023 15:56:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696435006; x=1727971006; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=auM2rNzBpvbr16YrVoFZk9q4AhvKAutp2PFRn5ccN2E=; b=meW8XjxAGNxckijgPDUsRKDnmeOfHyXN5kCSOAEhNufpCDyDD8S+Qn9R fmirXLCX08Axducg9Eh4ox479uErgpt0fWV4pNiYCHaZTvdlhZuBLMsid 2YBi6hpkq5HPIjNH1sEeldUNwnv+OAsTmoLiTm/tbwOxzqDa3FbgzBzEu UWzZRrDi1YXgrJL3Q1U52dUNKEzemExT1mS5KeWMalPJ0328v1VJZx3y4 wYMhXkJ9TXVnYDL9bQl345b+EOr5RIJdqeF8OVk4V78PJHyVfCZgHoUMV uCK4sttzSs34zorl/0lL208Oxf8lir+v1hV2tPFKO5/Ku3v2H+Y6YaTKA A==; X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="363483821" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="363483821" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Oct 2023 08:56:46 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10853"; a="867441269" X-IronPort-AV: E=Sophos;i="6.03,200,1694761200"; d="scan'208";a="867441269" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.153]) by fmsmga002.fm.intel.com with SMTP; 04 Oct 2023 08:56:44 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 04 Oct 2023 18:56:43 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Wed, 4 Oct 2023 18:56:07 +0300 Message-ID: <20231004155607.7719-13-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231004155607.7719-1-ville.syrjala@linux.intel.com> References: <20231004155607.7719-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 12/12] drm/i915: s/dev_priv/i915/ in the state checker X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Switch the state checker over to using the new 'i915' variable name insteda of the old 'dev_priv'. Signed-off-by: Ville Syrjälä --- .../drm/i915/display/intel_modeset_verify.c | 34 +++++++++---------- 1 file changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c index a55de82fa81f..f417493e3e17 100644 --- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c +++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c @@ -88,10 +88,10 @@ verify_connector_state(struct intel_atomic_state *state, static void intel_pipe_config_sanity_check(const struct intel_crtc_state *crtc_state) { - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev); if (crtc_state->has_pch_encoder) { - int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, crtc_state), + int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(i915, crtc_state), &crtc_state->fdi_m_n); int dotclock = crtc_state->hw.adjusted_mode.crtc_clock; @@ -100,7 +100,7 @@ static void intel_pipe_config_sanity_check(const struct intel_crtc_state *crtc_s * Yell if the encoder disagrees. Allow for slight * rounding differences. */ - drm_WARN(&dev_priv->drm, abs(fdi_dotclock - dotclock) > 1, + drm_WARN(&i915->drm, abs(fdi_dotclock - dotclock) > 1, "FDI dotclock and encoder dotclock mismatch, fdi: %i, encoder: %i\n", fdi_dotclock, dotclock); } @@ -109,17 +109,17 @@ static void intel_pipe_config_sanity_check(const struct intel_crtc_state *crtc_s static void verify_encoder_state(struct intel_atomic_state *state) { - struct drm_i915_private *dev_priv = to_i915(state->base.dev); + struct drm_i915_private *i915 = to_i915(state->base.dev); struct intel_encoder *encoder; struct drm_connector *connector; const struct drm_connector_state *old_conn_state, *new_conn_state; int i; - for_each_intel_encoder(&dev_priv->drm, encoder) { + for_each_intel_encoder(&i915->drm, encoder) { bool enabled = false, found = false; enum pipe pipe; - drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s]\n", + drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s]\n", encoder->base.base.id, encoder->base.name); @@ -134,7 +134,7 @@ verify_encoder_state(struct intel_atomic_state *state) found = true; enabled = true; - I915_STATE_WARN(dev_priv, + I915_STATE_WARN(i915, new_conn_state->crtc != encoder->base.crtc, "connector's crtc doesn't match encoder crtc\n"); } @@ -142,7 +142,7 @@ verify_encoder_state(struct intel_atomic_state *state) if (!found) continue; - I915_STATE_WARN(dev_priv, !!encoder->base.crtc != enabled, + I915_STATE_WARN(i915, !!encoder->base.crtc != enabled, "encoder's enabled state mismatch (expected %i, found %i)\n", !!encoder->base.crtc, enabled); @@ -150,7 +150,7 @@ verify_encoder_state(struct intel_atomic_state *state) bool active; active = encoder->get_hw_state(encoder, &pipe); - I915_STATE_WARN(dev_priv, active, + I915_STATE_WARN(i915, active, "encoder detached but still enabled on pipe %c.\n", pipe_name(pipe)); } @@ -162,7 +162,7 @@ verify_crtc_state(struct intel_atomic_state *state, struct intel_crtc *crtc) { struct drm_device *dev = crtc->base.dev; - struct drm_i915_private *dev_priv = to_i915(dev); + struct drm_i915_private *i915 = to_i915(dev); const struct intel_crtc_state *sw_crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct intel_crtc_state *hw_crtc_state; @@ -173,7 +173,7 @@ verify_crtc_state(struct intel_atomic_state *state, if (!hw_crtc_state) return; - drm_dbg_kms(&dev_priv->drm, "[CRTC:%d:%s]\n", crtc->base.base.id, + drm_dbg_kms(&i915->drm, "[CRTC:%d:%s]\n", crtc->base.base.id, crtc->base.name); hw_crtc_state->hw.enable = sw_crtc_state->hw.enable; @@ -181,15 +181,15 @@ verify_crtc_state(struct intel_atomic_state *state, intel_crtc_get_pipe_config(hw_crtc_state); /* we keep both pipes enabled on 830 */ - if (IS_I830(dev_priv) && hw_crtc_state->hw.active) + if (IS_I830(i915) && hw_crtc_state->hw.active) hw_crtc_state->hw.active = sw_crtc_state->hw.active; - I915_STATE_WARN(dev_priv, + I915_STATE_WARN(i915, sw_crtc_state->hw.active != hw_crtc_state->hw.active, "crtc active state doesn't match with hw state (expected %i, found %i)\n", sw_crtc_state->hw.active, hw_crtc_state->hw.active); - I915_STATE_WARN(dev_priv, crtc->active != sw_crtc_state->hw.active, + I915_STATE_WARN(i915, crtc->active != sw_crtc_state->hw.active, "transitional active state does not match atomic hw state (expected %i, found %i)\n", sw_crtc_state->hw.active, crtc->active); @@ -200,12 +200,12 @@ verify_crtc_state(struct intel_atomic_state *state, bool active; active = encoder->get_hw_state(encoder, &pipe); - I915_STATE_WARN(dev_priv, active != sw_crtc_state->hw.active, + I915_STATE_WARN(i915, active != sw_crtc_state->hw.active, "[ENCODER:%i] active %i with crtc active %i\n", encoder->base.base.id, active, sw_crtc_state->hw.active); - I915_STATE_WARN(dev_priv, active && master_crtc->pipe != pipe, + I915_STATE_WARN(i915, active && master_crtc->pipe != pipe, "Encoder connected to wrong pipe %c\n", pipe_name(pipe)); @@ -220,7 +220,7 @@ verify_crtc_state(struct intel_atomic_state *state, if (!intel_pipe_config_compare(sw_crtc_state, hw_crtc_state, false)) { - I915_STATE_WARN(dev_priv, 1, "pipe state doesn't match!\n"); + I915_STATE_WARN(i915, 1, "pipe state doesn't match!\n"); intel_crtc_state_dump(hw_crtc_state, NULL, "hw state"); intel_crtc_state_dump(sw_crtc_state, NULL, "sw state"); }