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Mon, 9 Oct 2023 01:11:47 -0700 Received: from wendy.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Mon, 9 Oct 2023 01:11:44 -0700 From: Conor Dooley To: CC: , , Randy Dunlap , Geert Uytterhoeven , "Magnus Damm" , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Lad Prabhakar" , , Subject: [PATCH] soc: renesas: select ERRATA_ANDES for R9A07G043 only when alternatives are present Date: Mon, 9 Oct 2023 09:11:16 +0100 Message-ID: <20231009-sandbar-botch-0f398fd2e289@wendy> X-Mailer: git-send-email 2.40.1 MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2092; i=conor.dooley@microchip.com; h=from:subject:message-id; bh=E3CND1oVozdmN9W0JejJjJ0D+lE+Z95291t40RDveyk=; b=owGbwMvMwCFWscWwfUFT0iXG02pJDKnKWxdas1qKH/XSOb61bOl0g6X/+VtfGpRu+1zZzRZ8eHLs XIPtHaUsDGIcDLJiiiyJt/tapNb/cdnh3PMWZg4rE8gQBi5OAZjIjXRGhiadnbuvN0UoHa+p3dK8Om +5MPdH/h3CKgHam3+nuj0un87wvy4039TNcUHL6SjF8Nh7SeIxv6rXy/sxJqzr3zaV90ESCwA= X-Developer-Key: i=conor.dooley@microchip.com; a=openpgp; fpr=F9ECA03CF54F12CD01F1655722E2C55B37CF380C X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231009_011202_566991_89F8853F X-CRM114-Status: GOOD ( 11.66 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Randy reported a randconfig build issue against linux-next: WARNING: unmet direct dependencies detected for ERRATA_ANDES Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y] Selected by [y]: - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y] ../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration 59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end, On RISC-V, alternatives are not usable in XIP kernels, which this randconfig happened to select. Add a check for whether alternatives are available before selecting the ERRATA_ANDES config option. Reported-by: Randy Dunlap Acked-by: Randy Dunlap Tested-by: Randy Dunlap Closes: https://lore.kernel.org/all/09a6b0f0-76a1-45e3-ab52-329c47393d1d@infradead.org/ Signed-off-by: Conor Dooley --- CC: Geert Uytterhoeven CC: Magnus Damm CC: Paul Walmsley CC: Palmer Dabbelt CC: Albert Ou CC: Lad Prabhakar CC: linux-renesas-soc@vger.kernel.org CC: linux-kernel@vger.kernel.org CC: linux-riscv@lists.infradead.org --- drivers/soc/renesas/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 7b74de732718..a97bf8e897cd 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -343,7 +343,7 @@ config ARCH_R9A07G043 select ARCH_RZG2L select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT select DMA_GLOBAL_POOL - select ERRATA_ANDES if RISCV_SBI + select ERRATA_ANDES if (RISCV_SBI && RISCV_ALTERNATIVE) select ERRATA_ANDES_CMO if ERRATA_ANDES help This enables support for the Renesas RZ/Five SoC.