From patchwork Thu Oct 12 22:35:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13419935 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 75CDF3D013 for ; Thu, 12 Oct 2023 22:35:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="PX6lNn9A" Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EAF0AC9 for ; Thu, 12 Oct 2023 15:35:23 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2b9338e4695so18650461fa.2 for ; Thu, 12 Oct 2023 15:35:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697150122; x=1697754922; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=t8U+a3PhU8m5mApmJF8MtIvjJ5OqBpg+Pl3mnQuevJg=; b=PX6lNn9AThhXP8+nyVUcaa1tZhfQAw+6YVsqbdYckmvNa7ULpaq9Q8QVi6cpDNG2v4 ba95jYbOflf10dBd9IxWw6j7GTK7yy8wrt838bF+0Fkj1/ThKusqPmZalG09COcARm/U lDVOXkAUkG5FuUUQoJeVBIzLhK9rFTFxRz3uslg8LfsC0JMQE3guMlmPDqkLTdJ8C5Zb ohmEQdELgWBc00rndcb3hy9iPtitlvE4UWNYlRY72ar34wt28CdImNPFiXmd0PEl3NIy kwc+Doewq0H02LpiBm4PLUprSPl/RlaWVj76FZmxNKkhFpImxeNBKV+gQcR0Zh9VsHGu qhNA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697150122; x=1697754922; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=t8U+a3PhU8m5mApmJF8MtIvjJ5OqBpg+Pl3mnQuevJg=; b=kCGG3wW3dC2SAaJeZSxtGose/WbchAIwMeNFZu75F2n+UeN+R4d5P6TrzPW534Wxkj msovVMJP5nS8ujtCV3A2DCeOh4i5zp5ZNs1XbPk4yqMWmZLOKHyHecrCSrOVVP2NOoC8 XpcJ+k7lGJoCwAgwaELk5bSijGZ4hJQHu9XbJX/j2bZALc57eZ19hYrZ7gNH/4hcgA3u EEw7O0QPjcbj45Ncw+bUTRBO5K8kDIgLRp0e/J5gVEg9meCfDV6DdqrQrjSiRa+7f0Eq 5ZwtBcYua1ic6KsbQZTCJYELEvZxZCfV/HJHQH46sHbv5yUmWmGugHV+tPuxVCf8RkRx Ui+Q== X-Gm-Message-State: AOJu0Yxu4xMwPwOL6SWfNCBsilwMdTjza/7zMETFX8poFksRqTV1JzBU 8qjBG0Rr8j8XG0bTqJuzYnDprA== X-Google-Smtp-Source: AGHT+IGZTSbPvJZxknKfkA/iTsRvkhXfDcNp+3UEqfdvugniSIIFexQMavXsFpbuZZAamp/mOQab9g== X-Received: by 2002:a2e:be0e:0:b0:2c5:12b:6ef2 with SMTP id z14-20020a2ebe0e000000b002c5012b6ef2mr1334606ljq.33.1697150122289; Thu, 12 Oct 2023 15:35:22 -0700 (PDT) Received: from [192.168.1.2] (c-21d3225c.014-348-6c756e10.bbcust.telenor.se. [92.34.211.33]) by smtp.gmail.com with ESMTPSA id x21-20020a05651c105500b002bcb89e92dcsm3811671ljm.6.2023.10.12.15.35.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 15:35:21 -0700 (PDT) From: Linus Walleij Date: Fri, 13 Oct 2023 00:35:14 +0200 Subject: [PATCH 1/3] ARM: dts: marvell: Fix some common switch mistakes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231013-marvell-88e6152-wan-led-v1-1-0712ba99857c@linaro.org> References: <20231013-marvell-88e6152-wan-led-v1-0-0712ba99857c@linaro.org> In-Reply-To: <20231013-marvell-88e6152-wan-led-v1-0-0712ba99857c@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be switch@0. This serves as an example of fixes needed for introducing a schema for the bindings, but the patch can simply be applied. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/marvell/armada-370-rd.dts | 2 -- arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts | 2 -- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 2 -- arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 2 -- arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts | 2 -- 7 files changed, 2 insertions(+), 12 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-370-rd.dts b/arch/arm/boot/dts/marvell/armada-370-rd.dts index b459a670f615..e3a1834986ee 100644 --- a/arch/arm/boot/dts/marvell/armada-370-rd.dts +++ b/arch/arm/boot/dts/marvell/armada-370-rd.dts @@ -151,8 +151,6 @@ led@0 { switch: switch@10 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x10>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts index f4c4b213ef4e..d4fff4ea9f20 100644 --- a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts +++ b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts @@ -79,14 +79,12 @@ &mdio { switch@0 { compatible = "marvell,mv88e6190"; - #address-cells = <1>; #interrupt-cells = <2>; interrupt-controller; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&switch_interrupt_pins>; pinctrl-names = "default"; - #size-cells = <0>; reg = <0>; mdio { diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 1990f7d0cc79..1be0419f8f3e 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -7,7 +7,7 @@ / { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6190"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts index b795ad573891..6ec536222bfb 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts @@ -11,7 +11,7 @@ &sfp0 { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi index fc8216fd9f60..63a0bc9455ca 100644 --- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi @@ -160,8 +160,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts index 32c569df142f..ab46903580aa 100644 --- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts @@ -94,8 +94,6 @@ &mdio { switch@4 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <4>; pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts index 7a0614fd0c93..2a5518c73bff 100644 --- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts @@ -267,8 +267,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { From patchwork Thu Oct 12 22:35:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13419936 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4CECF3D010 for ; Thu, 12 Oct 2023 22:35:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ou/YDB2z" Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66527DA for ; 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[92.34.211.33]) by smtp.gmail.com with ESMTPSA id x21-20020a05651c105500b002bcb89e92dcsm3811671ljm.6.2023.10.12.15.35.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 15:35:22 -0700 (PDT) From: Linus Walleij Date: Fri, 13 Oct 2023 00:35:15 +0200 Subject: [PATCH 2/3] RFC: dt-bindings: marvell: Rewrite in schema Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231013-marvell-88e6152-wan-led-v1-2-0712ba99857c@linaro.org> References: <20231013-marvell-88e6152-wan-led-v1-0-0712ba99857c@linaro.org> In-Reply-To: <20231013-marvell-88e6152-wan-led-v1-0-0712ba99857c@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org This is an attempt to rewrite the Marvell MV88E6xxx switch bindings in YAML schema. The current text binding says: WARNING: This binding is currently unstable. Do not program it into a FLASH never to be changed again. Once this binding is stable, this warning will be removed. Well that never happened before we switched to YAML markup, we can't have it like this, what about fixing the mess? Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6xxx.yaml | 249 +++++++++++++++++++++ .../devicetree/bindings/net/dsa/marvell.txt | 109 --------- MAINTAINERS | 2 +- 3 files changed, 250 insertions(+), 110 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml new file mode 100644 index 000000000000..8ff94e8b89da --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml @@ -0,0 +1,249 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6xxx switch family + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6xxx switch series has been produced and sold + by Marvell since at least 2010. The switch has a few compatibles which + just indicate the base address of the switch, then operating systems + can investigate switch ID registers to find out which actual version + of the switch it is dealing with. + +properties: + compatible: + oneOf: + - enum: + - marvell,mv88e6060 + - marvell,mv88e6085 + - marvell,mv88e6190 + - marvell,mv88e6250 + description: | + marvell,mv88e6060: The oldest Marvell switch supported (singular version) + marvell,mv88e6085: This switch uses base address 0x10. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6085" should be + specified. This includes the following list of MV88Exxxx switches: + 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176, + 6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352 + marvell,mv88e6190: This switch uses base address 0x00. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6190" should be + specified. This includes the following list of MV88Exxxx switches: + 6190, 6190X, 6191, 6290, 6361, 6390, 6390X + marvell,mv88e6250: This switch uses base address 0x08 or 0x18. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6250" should be + specified. This includes the following list of MV88Exxxx switches: + 6220, 6250 + reg: + maxItems: 1 + + eeprom-length: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Set to the length of an EEPROM connected to the switch. Must be + set if the switch can not detect the presence and/or size of a connected + EEPROM, otherwise optional. + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + + interrupts: + description: The switch provides an external interrupt line, but it is + not always used by target systems. + maxItems: 1 + + interrupt-controller: + description: The switch has an internal interrupt controller used by + the different sub-blocks. + + '#interrupt-cells': + description: The internal interrupt controller only supports triggering + on IRQ_TYPE_LEVEL_HIGH + # FIXME: what is this? this should be one cell should it not? + # the Linux mv88e6xxx driver does not implement .irq_set_type in its irq_chip + # so at least in that implementation the type is flat out ignored. + const: 2 + + mdio: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an internal mdio bus to + access switch ports, which is handled in this node. + + mdio-external: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an external mdio bus to + access switch ports. + + mdio1: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Older version of mdio-external + deprecated: true + properties: + compatible: + const: marvell,mv88e6xxx-mdio-external + + required: + - compatible + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + patternProperties: + "^(ethernet-)?port@[0-9a-f]+$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0: switch@0 { + compatible = "marvell,mv88e6085"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { + reg = <4>; + label = "wan"; + }; + + port@5 { + reg = <5>; + phy-mode = "sgmii"; + ethernet = <ð2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch0phy0: switch0phy@0 { + reg = <0>; + interrupt-parent = <&switch0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + }; + }; + + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch1: switch@0 { + compatible = "marvell,mv88e6190"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch1phy0: switch1phy@0 { + reg = <0>; + interrupt-parent = <&switch1>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + mdio-external { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + switch1phy9: switch1phy@9 { + reg = <9>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt deleted file mode 100644 index 6ec0c181b6db..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt +++ /dev/null @@ -1,109 +0,0 @@ -Marvell DSA Switch Device Tree Bindings ---------------------------------------- - -WARNING: This binding is currently unstable. Do not program it into a -FLASH never to be changed again. Once this binding is stable, this -warning will be removed. - -If you need a stable binding, use the old dsa.txt binding. - -Marvell Switches are MDIO devices. The following properties should be -placed as a child node of an mdio device. - -The properties described here are those specific to Marvell devices. -Additional required and optional properties can be found in dsa.txt. - -The compatibility string is used only to find an identification register, -which is at a different MDIO base address in different switch families. -- "marvell,mv88e6085" : Switch has base address 0x10. Use with models: - 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, - 6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321, - 6341, 6350, 6351, 6352 -- "marvell,mv88e6190" : Switch has base address 0x00. Use with models: - 6190, 6190X, 6191, 6290, 6361, 6390, 6390X -- "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model: - 6220, 6250 - -Required properties: -- compatible : Should be one of "marvell,mv88e6085", - "marvell,mv88e6190" or "marvell,mv88e6250" as - indicated above -- reg : Address on the MII bus for the switch. - -Optional properties: - -- reset-gpios : Should be a gpio specifier for a reset line -- interrupts : Interrupt from the switch -- interrupt-controller : Indicates the switch is itself an interrupt - controller. This is used for the PHY interrupts. -#interrupt-cells = <2> : Controller uses two cells, number and flag -- eeprom-length : Set to the length of an EEPROM connected to the - switch. Must be set if the switch can not detect - the presence and/or size of a connected EEPROM, - otherwise optional. -- mdio : Container of PHY and devices on the switches MDIO - bus. -- mdio? : Container of PHYs and devices on the external MDIO - bus. The node must contains a compatible string of - "marvell,mv88e6xxx-mdio-external" - -Example: - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6085"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6190"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - mdio1 { - compatible = "marvell,mv88e6xxx-mdio-external"; - #address-cells = <1>; - #size-cells = <0>; - switch1phy9: switch1phy0@9 { - reg = <9>; - }; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 90f13281d297..1b4475254d27 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,7 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/dsa/marvell.txt +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ F: include/linux/dsa/mv88e6xxx.h From patchwork Thu Oct 12 22:35:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13419934 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 613E03D007 for ; Thu, 12 Oct 2023 22:35:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="v+kANZss" Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50BEFCF for ; Thu, 12 Oct 2023 15:35:26 -0700 (PDT) Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2b9c907bc68so17476441fa.2 for ; Thu, 12 Oct 2023 15:35:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697150124; x=1697754924; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=tqJlehcmenMJKM/lRPSpwuiQHgzEckA+N7fF4C2GzPM=; b=v+kANZss6YBdV6eFFe+RAJoB4T+27iaybTpm5sfZiB4cxEaLJSGZTQiZ1vCnlBgpzf 39dAox+yWHneDJFOlSlt02dtDfE2aU6q5PgjHyp9Ljhy/dxTevd9iPs9dyHh8fpU4ltr vePUczpweFeTFW8CG1ClC75/yUaZ3ehb4t7nlFW18dtShUAChZoyaCWaGtyekRICR8q+ ilOWgpHP7nR8vSIIkorl0D9rXBVwhjI/hfipPg9MKNcQisgtr5XR6poMq0JVF9Vd0At0 N7OZyzXb7J8mtGNh11V+7eywGQanopsTTzsJU1SVezBWApuoqqXt940jhjjUGPK8bgez tdlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697150124; x=1697754924; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tqJlehcmenMJKM/lRPSpwuiQHgzEckA+N7fF4C2GzPM=; b=Cp+o7vy5RpziWeviTUlGFINV9U7n6y+ALfNLHe4VZFGhfCw9AzcNDpjdwl2uUrW30B sk1OgksXzidk8JBg8AJ0oScEu+uYEmD7fFYbRGYkMjDJY/8OkicqJgiFYWPsAGwbziz4 RTVOlIFR2D/yD9FOG+lLgMAEPkrFejvgU/4hmoS+UxbFLir/KDnM+ccSxmis120OeGfR e5AeIEKFK6Zp59GJMbIB1LjgS/OHxqWFE4t06QWL0hIbRd/t8L24kPOXlM3VRNA7vVDa pmXGlXDtbHrXTAAlk/8PQmRxTW20QdTEn0X7BEqX/GaWYwVQb59G+K6cALni3aP3Kzmv yPew== X-Gm-Message-State: AOJu0YzvPARk0XXd1jiE4o6TUd5B8PVp++JqW1TqLR8nD8cN95EgFq8T OgcO1WqfoFSpeLjguR45Wg8IkQ== X-Google-Smtp-Source: AGHT+IGRG9wyMhGDQ5kQd403PBsws9XNSvk9hZvSX0ryk0Cx//eQH3D87/fY5EPfSQfxBqXMgaBm9w== X-Received: by 2002:a2e:95d5:0:b0:2c0:298d:32df with SMTP id y21-20020a2e95d5000000b002c0298d32dfmr24561108ljh.9.1697150124454; Thu, 12 Oct 2023 15:35:24 -0700 (PDT) Received: from [192.168.1.2] (c-21d3225c.014-348-6c756e10.bbcust.telenor.se. [92.34.211.33]) by smtp.gmail.com with ESMTPSA id x21-20020a05651c105500b002bcb89e92dcsm3811671ljm.6.2023.10.12.15.35.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 15:35:24 -0700 (PDT) From: Linus Walleij Date: Fri, 13 Oct 2023 00:35:16 +0200 Subject: [PATCH 3/3] RFC: net: dsa: mv88e6xxx: Register mdio-external Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231013-marvell-88e6152-wan-led-v1-3-0712ba99857c@linaro.org> References: <20231013-marvell-88e6152-wan-led-v1-0-0712ba99857c@linaro.org> In-Reply-To: <20231013-marvell-88e6152-wan-led-v1-0-0712ba99857c@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Make it legal to have a subnode just named "mdio-external" and have that be recognized immediately as the external MDIO bus, register it and return. Only fallback to the old method with a compatible in the external bus node if this doesn't work. This is the result of deprecating the old DT method of providing a node "mdio1" with a compatible string. Signed-off-by: Linus Walleij --- drivers/net/dsa/mv88e6xxx/chip.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 52a99d8bada0..05f6776885f6 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -3676,7 +3676,21 @@ static int mv88e6xxx_mdios_register(struct mv88e6xxx_chip *chip) if (err) return err; - /* Walk the device tree, and see if there are any other nodes + /* If the optional external bus is explicitly named as such, + * just register it and be done with this. + */ + child = of_get_child_by_name(np, "mdio-external"); + if (child) { + err = mv88e6xxx_mdio_register(chip, child, true); + of_node_put(child); + if (err) + return err; + return 0; + } + + /* Deprecated binding with compatible: + * + * Walk the device tree, and see if there are any other nodes * which say they are compatible with the external mdio * bus. */