From patchwork Fri Oct 13 13:13:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13420915 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D92DFCDB482 for ; Fri, 13 Oct 2023 13:14:16 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 427C310E609; Fri, 13 Oct 2023 13:14:16 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 17ED610E608; Fri, 13 Oct 2023 13:14:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697202852; x=1728738852; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=sRdaAneFm1tqOIfNUOOIGJYqZR3ZNY941Wkdz46zgTk=; b=Uv6iMWw1VmkPdTcsx64MaaCkt1lo8NAEuIc91mq4ej0Sr/WmCBN/BlGs zNAGhHS/IbB18WiM0RgxvMSgxFP4UWldyPY5VGN7TEQMHNjL7kQi72qPv K3SLNcINgXMtD+OeXf7BsSHNj6nW0K4EmnJn75kozW5kvTeZQgj/PsZoe HZZnTJm+8cSWfCOZOuEdpK7ZzneGOYakq3yGbtCEDhsUWqfb3doqAGz/p JeXOYzQMfKtWWpewwOfwks5FM5i1HGyljbHJljYk6a99H4vqyu2GZlVZC 7ifEs4ctq6nBkpws8a/yLmbBVrFoYM1V+fAxLKSVWjWgK2qgLJzAvPtr7 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="449370217" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="449370217" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2023 06:14:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="1086135998" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="1086135998" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmsmga005.fm.intel.com with SMTP; 13 Oct 2023 06:14:06 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 13 Oct 2023 16:14:06 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 13 Oct 2023 16:13:59 +0300 Message-ID: <20231013131402.24072-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231013131402.24072-1-ville.syrjala@linux.intel.com> References: <20231013131402.24072-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/4] drm: Fix color LUT rounding X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The current implementation of drm_color_lut_extract() generates weird results. Eg. if we go through all the values for 16->8bpc conversion we see the following pattern: in out (count) 0 - 7f -> 0 (128) 80 - 17f -> 1 (256) 180 - 27f -> 2 (256) 280 - 37f -> 3 (256) ... fb80 - fc7f -> fc (256) fc80 - fd7f -> fd (256) fd80 - fe7f -> fe (256) fe80 - ffff -> ff (384) So less values map to 0 and more values map 0xff, which doesn't seem particularly great. To get just the same number of input values to map to the same output values we'd just need to drop the rounding entrirely. But perhaps a better idea would be to follow the OpenGL int<->float conversion rules, in which case we get the following results: in out (count) 0 - 80 -> 0 (129) 81 - 181 -> 1 (257) 182 - 282 -> 2 (257) 283 - 383 -> 3 (257) ... fc7c - fd7c -> fc (257) fd7d - fe7d -> fd (257) fe7e - ff7e -> fe (257) ff7f - ffff -> ff (129) Note that since the divisor is constant the compiler is able to optimize away the integer division in most cases. The only exception is the _ULL() case on 32bit architectures since that gets emitted as inline asm via do_div() and thus the compiler doesn't get to optimize it. Signed-off-by: Ville Syrjälä Reviewed-by: Chaitanya Kumar Borah --- include/drm/drm_color_mgmt.h | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h index 81c298488b0c..6be3cbe18944 100644 --- a/include/drm/drm_color_mgmt.h +++ b/include/drm/drm_color_mgmt.h @@ -36,20 +36,16 @@ struct drm_plane; * * Extract a degamma/gamma LUT value provided by user (in the form of * &drm_color_lut entries) and round it to the precision supported by the - * hardware. + * hardware, following OpenGL int<->float conversion rules. */ static inline u32 drm_color_lut_extract(u32 user_input, int bit_precision) { - u32 val = user_input; - u32 max = 0xffff >> (16 - bit_precision); - - /* Round only if we're not using full precision. */ - if (bit_precision < 16) { - val += 1UL << (16 - bit_precision - 1); - val >>= 16 - bit_precision; - } - - return clamp_val(val, 0, max); + if (bit_precision > 16) + return DIV_ROUND_CLOSEST_ULL(mul_u32_u32(user_input, (1 << bit_precision) - 1), + (1 << 16) - 1); + else + return DIV_ROUND_CLOSEST(user_input * ((1 << bit_precision) - 1), + (1 << 16) - 1); } u64 drm_color_ctm_s31_32_to_qm_n(u64 user_input, u32 m, u32 n); From patchwork Fri Oct 13 13:14:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13420916 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D823CDB47E for ; Fri, 13 Oct 2023 13:14:23 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E8ED010E60C; Fri, 13 Oct 2023 13:14:19 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0737510E608; Fri, 13 Oct 2023 13:14:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697202856; x=1728738856; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=5xrug8HZq43uY520921QuJPLKII1x9LKK5MRop5qt/0=; b=hhooh1qW6nn+V5Wkr+RZvX3/4ESA0lRwxgUTTwTC+fMbKgSxEsa0Fu+V xNA7tkJGMoDRML+oeGt5fQ2OJGVuC6i2DxuWiqCjvkBB0So1HQz0b2Q47 GNKv/wDZVRG6pBpAEp86f/TCcHMI+RPqDGpLEAh3Wi+sWi/uzN+IlGzIm +PJ7PPFpy88aMCLW57qlVK6TMB35pIhdskdzyCINMmFI+hNJ6LklPSgJi 19DT+z7EZPWpL0MfH3lQw4yp7xDhwc9zCYAMqEF4LaxCUyr8Y8ZD4abqN aCr1YeydEBNDvK9QdwVaXQBso/oXenm0oSAyiwMAMh7wB3O0+LDUm//OX g==; X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="449370254" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="449370254" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2023 06:14:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="1086136005" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="1086136005" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmsmga005.fm.intel.com with SMTP; 13 Oct 2023 06:14:10 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 13 Oct 2023 16:14:09 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 13 Oct 2023 16:14:00 +0300 Message-ID: <20231013131402.24072-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231013131402.24072-1-ville.syrjala@linux.intel.com> References: <20231013131402.24072-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/4] drm/i915: Adjust LUT rounding rules X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä drm_color_lut_extract() rounding was changed to follow the OpenGL int<->float conversion rules. Adjust intel_color_lut_pack() to match. Signed-off-by: Ville Syrjälä Reviewed-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 2a2a163ea652..b01f463af861 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -785,14 +785,12 @@ static void chv_assign_csc(struct intel_crtc_state *crtc_state) /* convert hw value with given bit_precision to lut property val */ static u32 intel_color_lut_pack(u32 val, int bit_precision) { - u32 max = 0xffff >> (16 - bit_precision); - - val = clamp_val(val, 0, max); - - if (bit_precision < 16) - val <<= 16 - bit_precision; - - return val; + if (bit_precision > 16) + return DIV_ROUND_CLOSEST_ULL(mul_u32_u32(val, (1 << 16) - 1), + (1 << bit_precision) - 1); + else + return DIV_ROUND_CLOSEST(val * ((1 << 16) - 1), + (1 << bit_precision) - 1); } static u32 i9xx_lut_8(const struct drm_color_lut *color) From patchwork Fri Oct 13 13:14:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13420917 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC87DCDB482 for ; Fri, 13 Oct 2023 13:14:24 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4356010E610; Fri, 13 Oct 2023 13:14:24 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.31]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7B53610E60F; Fri, 13 Oct 2023 13:14:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697202860; x=1728738860; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=932ydnVlvZh6eMR3QgiFORqNpGA5FsujVeGmvJ+24c4=; b=MbT8xmttVwI74kbPRAnMokaUA+u78v4x8Zhw1EOGI32aV+6GUH0iFv6E pJjzvVU/HvqO0zkrHNgMrsB0a+9zrJxfMXUjRS6pgDicUK6Y7GmOHTTF9 m73YauqSei+eYtGNltjIXrE3e6jEejRieSBdPBq2sQkBu3DYwsaQfWuhR hW90DnM0+zNqP34xsUcd1EUllcu1F9EcTkQsvgUXP1OHgxcQ8ZYsc6ESr 9H/hd5tV4lnje82bPEJKDVK6hKbX1bwVY6UlKD4WqakVmMNMJoZuR9DtX +B7S5TyvUH8wpn+89OgjHlCzr4Sf3tm5dRRbT31NirPD9ibNkyjbUGYRq g==; X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="449370289" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="449370289" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2023 06:14:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="1086136012" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="1086136012" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmsmga005.fm.intel.com with SMTP; 13 Oct 2023 06:14:13 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 13 Oct 2023 16:14:12 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 13 Oct 2023 16:14:01 +0300 Message-ID: <20231013131402.24072-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231013131402.24072-1-ville.syrjala@linux.intel.com> References: <20231013131402.24072-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/4] drm/i915: s/clamp()/min()/ in i965_lut_11p6_max_pack() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Use min() instead of clamp() since the color values involved are unsigned. No functional changes. Signed-off-by: Ville Syrjälä Reviewed-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index b01f463af861..a4b30614bd63 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -909,7 +909,7 @@ static void i965_lut_10p6_pack(struct drm_color_lut *entry, u32 ldw, u32 udw) static u16 i965_lut_11p6_max_pack(u32 val) { /* PIPEGCMAX is 11.6, clamp to 10.6 */ - return clamp_val(val, 0, 0xffff); + return min(val, 0xffffu); } static u32 ilk_lut_10(const struct drm_color_lut *color) From patchwork Fri Oct 13 13:14:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13420918 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6A2B4CDB483 for ; Fri, 13 Oct 2023 13:14:30 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B670910E619; Fri, 13 Oct 2023 13:14:29 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5C44410E614; Fri, 13 Oct 2023 13:14:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697202865; x=1728738865; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Qr59Yi24PHiUnxx/s+d240/+MYyFwfb7z75KJdz2jiQ=; b=LzGEsBBgV9Thfdrr8L215+FPhFSNK6gR+vSuOYWShn3KiLJLgyQmc/Sx 6kXGYA60eX/8ZPqQwNJxYGwSEhRs6O68j0nkF5PuMQ4GozbIcxzU3l+co Tuqo5MjqOfmM0yzHCsioYDmWuphxF1mh4g8GqhwCNSMprLeUFbg/4S7oe qx4db4KSkOsaMwcDOhDthqooMxz50oszCWkzM/C1YWqk4Txb0J6K+hMOB mzi0hn5vHhKWlsS7Kzma6QgD4Lt42h1bxixNQus+fOcynYJVgNF30GLp3 x887d4vgelYRUMx+kThSDw5DI8/5ctr3eRlOzQuwHD5skg1J/ngMdF/DW A==; X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="416230687" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="416230687" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2023 06:14:19 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10862"; a="878541853" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="878541853" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga004.jf.intel.com with SMTP; 13 Oct 2023 06:14:16 -0700 Received: by stinkbox (sSMTP sendmail emulation); Fri, 13 Oct 2023 16:14:15 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Fri, 13 Oct 2023 16:14:02 +0300 Message-ID: <20231013131402.24072-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231013131402.24072-1-ville.syrjala@linux.intel.com> References: <20231013131402.24072-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/4] drm/i915: Fix glk+ degamma LUT conversions X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The current implementation of change_lut_val_precision() is just a convoluted way of shifting by 8. Implement the proper rounding by just using drm_color_lut_extract() and intel_color_lut_pack() like everyone else does. And as the uapi can't handle >=1.0 values but the hardware can we need to clamp the results appropriately in the readout path. Signed-off-by: Ville Syrjälä Reviewed-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 54 +++++++++++----------- 1 file changed, 28 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index a4b30614bd63..1cfbb3650304 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -1526,14 +1526,27 @@ static int glk_degamma_lut_size(struct drm_i915_private *i915) return 35; } -/* - * change_lut_val_precision: helper function to upscale or downscale lut values. - * Parameters 'to' and 'from' needs to be less than 32. This should be sufficient - * as currently there are no lut values exceeding 32 bit. - */ -static u32 change_lut_val_precision(u32 lut_val, int to, int from) +static u32 glk_degamma_lut(const struct drm_color_lut *color) +{ + return color->green; +} + +static void glk_degamma_lut_pack(struct drm_color_lut *entry, u32 val) +{ + /* PRE_CSC_GAMC_DATA is 3.16, clamp to 0.16 */ + entry->red = entry->green = entry->blue = min(val, 0xffffu); +} + +static u32 mtl_degamma_lut(const struct drm_color_lut *color) +{ + return drm_color_lut_extract(color->green, 24); +} + +static void mtl_degamma_lut_pack(struct drm_color_lut *entry, u32 val) { - return mul_u32_u32(lut_val, (1 << to)) / (1 << from); + /* PRE_CSC_GAMC_DATA is 3.24, clamp to 0.16 */ + entry->red = entry->green = entry->blue = + intel_color_lut_pack(min(val, 0xffffffu), 24); } static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state, @@ -1570,20 +1583,16 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state, * ToDo: Extend to max 7.0. Enable 32 bit input value * as compared to just 16 to achieve this. */ - u32 lut_val; - - if (DISPLAY_VER(i915) >= 14) - lut_val = change_lut_val_precision(lut[i].green, 24, 16); - else - lut_val = lut[i].green; - ilk_lut_write(crtc_state, PRE_CSC_GAMC_DATA(pipe), - lut_val); + DISPLAY_VER(i915) >= 14 ? + mtl_degamma_lut(&lut[i]) : glk_degamma_lut(&lut[i])); } /* Clamp values > 1.0. */ while (i++ < glk_degamma_lut_size(i915)) - ilk_lut_write(crtc_state, PRE_CSC_GAMC_DATA(pipe), 1 << 16); + ilk_lut_write(crtc_state, PRE_CSC_GAMC_DATA(pipe), + DISPLAY_VER(i915) >= 14 ? + 1 << 24 : 1 << 16); ilk_lut_write(crtc_state, PRE_CSC_GAMC_INDEX(pipe), 0); } @@ -3573,17 +3582,10 @@ static struct drm_property_blob *glk_read_degamma_lut(struct intel_crtc *crtc) for (i = 0; i < lut_size; i++) { u32 val = intel_de_read_fw(dev_priv, PRE_CSC_GAMC_DATA(pipe)); - /* - * For MTL and beyond, convert back the 24 bit lut values - * read from HW to 16 bit values to maintain parity with - * userspace values - */ if (DISPLAY_VER(dev_priv) >= 14) - val = change_lut_val_precision(val, 16, 24); - - lut[i].red = val; - lut[i].green = val; - lut[i].blue = val; + mtl_degamma_lut_pack(&lut[i], val); + else + glk_degamma_lut_pack(&lut[i], val); } intel_de_write_fw(dev_priv, PRE_CSC_GAMC_INDEX(pipe),