From patchwork Mon Oct 16 09:12:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13422791 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DE7E01BDF3 for ; Mon, 16 Oct 2023 09:13:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="f5fl/9Fk" Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 70795E8 for ; Mon, 16 Oct 2023 02:12:58 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id 2adb3069b0e04-507ac66a969so1079278e87.3 for ; Mon, 16 Oct 2023 02:12:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697447576; x=1698052376; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=csVtIQiJ9rcTmlc5xFEcy0AWIMG7+y05IyEKJ7NN1pU=; b=f5fl/9Fk4aXIHCrEqnKOWWSgXAUu/gbgVDklFKbFqvt0mhSHLX5u1ngmq3kb2R9yfQ VgB+ml9TPHXqF1aqHq6+XXPsPk990hxJpUMD6i+OnMPP40ZTV7l4Vxtmud3Tw+uQT8A3 PQvhOQ0qPHmQb4/94rH9EbligYwROVlaQ7v23sQzNrFZbNvKjO2Zz3r29baU/DTXLwZO q2UBUhD+lg9po717JojkH6gptYDSd9647e0GOucUWbW1rc20IM9yQqSBppGRAJF4gy/K BvNOoS3fC+NiwKiIPX4nlBPgAPmWhDo0u3cCjPwQLQjDQtL6JfAEgj/FrD9Wd5slMzNb 3d/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697447576; x=1698052376; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=csVtIQiJ9rcTmlc5xFEcy0AWIMG7+y05IyEKJ7NN1pU=; b=l9uxrK5cNwBPXg0t7RWzSF+3YNwXFkurr/leC5EpEw7vVwNSiSU2nTL5XvruRI7YML 8KqiBtHw71bY1qUnm1TINVU4JoJqr0FcfRRANan74TRZGOn/gpPFoQ575TqQbPl1vNdq KgNbWgQPZvqw9eTOA3Abpa3KZrxpIQeB0JXgMdAQYdPTip3SExMXgzzRDt1NLlFGjoEs ogQ6TWTIEAiXKLKN5STLJxBPyS/w4Nq3pPKHOFH4qQ/JPO7Falnfts0wT6NBXtTmVVdT L3UY+rsq8GZboMe1fzqR83h4TSxkWdWekDqWsCJYchwhLnu3TuwMUAIgTMgt6qlIAji5 hqmQ== X-Gm-Message-State: AOJu0YxlXr8kuAhqOVJD2UBRjEaQrRsEewpQvQHDEghr7YxJX4pB59Mp bzz8ewPT9wOGr+RLW/W0lbI6PQ== X-Google-Smtp-Source: AGHT+IEhf1ZsjuOfp9xd3c48xuenGBWFwudFwVwlvigx7lRsAOfLnq0/U+WivFfTpQdzCgIPcA/hHQ== X-Received: by 2002:ac2:5f47:0:b0:507:9f51:acee with SMTP id 7-20020ac25f47000000b005079f51aceemr5111729lfz.22.1697447576507; Mon, 16 Oct 2023 02:12:56 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id br34-20020a056512402200b005068e7a2e7dsm4160986lfb.77.2023.10.16.02.12.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 02:12:56 -0700 (PDT) From: Linus Walleij Date: Mon, 16 Oct 2023 11:12:54 +0200 Subject: [PATCH net-next v3 1/6] dt-bindings: marvell: Rewrite MV88E6xxx in schema Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231016-marvell-88e6152-wan-led-v3-1-38cd449dfb15@linaro.org> References: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> In-Reply-To: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org This is an attempt to rewrite the Marvell MV88E6xxx switch bindings in YAML schema. The current text binding says: WARNING: This binding is currently unstable. Do not program it into a FLASH never to be changed again. Once this binding is stable, this warning will be removed. Well that never happened before we switched to YAML markup, we can't have it like this, what about fixing the mess? Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6xxx.yaml | 243 +++++++++++++++++++++ .../devicetree/bindings/net/dsa/marvell.txt | 109 --------- MAINTAINERS | 2 +- 3 files changed, 244 insertions(+), 110 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml new file mode 100644 index 000000000000..954db04147f8 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml @@ -0,0 +1,243 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6xxx DSA switch family + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6xxx switch series has been produced and sold + by Marvell since at least 2010. The switch has a few compatibles which + just indicate the base address of the switch, then operating systems + can investigate switch ID registers to find out which actual version + of the switch it is dealing with. + +properties: + compatible: + oneOf: + - enum: + - marvell,mv88e6085 + - marvell,mv88e6190 + - marvell,mv88e6250 + description: | + marvell,mv88e6085: This switch uses base address 0x10. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6085" should be + specified. This includes the following list of MV88Exxxx switches: + 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176, + 6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352 + marvell,mv88e6190: This switch uses base address 0x00. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6190" should be + specified. This includes the following list of MV88Exxxx switches: + 6190, 6190X, 6191, 6290, 6361, 6390, 6390X + marvell,mv88e6250: This switch uses base address 0x08 or 0x18. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6250" should be + specified. This includes the following list of MV88Exxxx switches: + 6220, 6250 + + reg: + maxItems: 1 + + eeprom-length: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Set to the length of an EEPROM connected to the switch. Must be + set if the switch can not detect the presence and/or size of a connected + EEPROM, otherwise optional. + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + + interrupts: + description: The switch provides an external interrupt line, but it is + not always used by target systems. + maxItems: 1 + + interrupt-controller: + description: The switch has an internal interrupt controller used by + the different sub-blocks. + + '#interrupt-cells': + description: The internal interrupt controller only supports triggering + on active high level interrupts so the second cell must alway be set to + IRQ_TYPE_LEVEL_HIGH. + const: 2 + + mdio: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an varying combination of + internal and external MDIO buses, in some cases a combined bus that + can be used both internally and externally. This node is for the + primary bus, used internally and sometimes also externally. + + mdio-external: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches that have a separate external + MDIO bus use this port to access external components on the MDIO bus. + + properties: + compatible: + const: marvell,mv88e6xxx-mdio-external + + required: + - compatible + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0: switch@0 { + compatible = "marvell,mv88e6085"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { + reg = <4>; + label = "wan"; + }; + + port@5 { + reg = <5>; + phy-mode = "sgmii"; + ethernet = <ð2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch0phy0: switch0phy@0 { + reg = <0>; + interrupt-parent = <&switch0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + }; + }; + + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch1: switch@0 { + compatible = "marvell,mv88e6190"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch1phy0: switch1phy@0 { + reg = <0>; + interrupt-parent = <&switch1>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + mdio-external { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + switch1phy9: switch1phy@9 { + reg = <9>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt deleted file mode 100644 index 6ec0c181b6db..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt +++ /dev/null @@ -1,109 +0,0 @@ -Marvell DSA Switch Device Tree Bindings ---------------------------------------- - -WARNING: This binding is currently unstable. Do not program it into a -FLASH never to be changed again. Once this binding is stable, this -warning will be removed. - -If you need a stable binding, use the old dsa.txt binding. - -Marvell Switches are MDIO devices. The following properties should be -placed as a child node of an mdio device. - -The properties described here are those specific to Marvell devices. -Additional required and optional properties can be found in dsa.txt. - -The compatibility string is used only to find an identification register, -which is at a different MDIO base address in different switch families. -- "marvell,mv88e6085" : Switch has base address 0x10. Use with models: - 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, - 6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321, - 6341, 6350, 6351, 6352 -- "marvell,mv88e6190" : Switch has base address 0x00. Use with models: - 6190, 6190X, 6191, 6290, 6361, 6390, 6390X -- "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model: - 6220, 6250 - -Required properties: -- compatible : Should be one of "marvell,mv88e6085", - "marvell,mv88e6190" or "marvell,mv88e6250" as - indicated above -- reg : Address on the MII bus for the switch. - -Optional properties: - -- reset-gpios : Should be a gpio specifier for a reset line -- interrupts : Interrupt from the switch -- interrupt-controller : Indicates the switch is itself an interrupt - controller. This is used for the PHY interrupts. -#interrupt-cells = <2> : Controller uses two cells, number and flag -- eeprom-length : Set to the length of an EEPROM connected to the - switch. Must be set if the switch can not detect - the presence and/or size of a connected EEPROM, - otherwise optional. -- mdio : Container of PHY and devices on the switches MDIO - bus. -- mdio? : Container of PHYs and devices on the external MDIO - bus. The node must contains a compatible string of - "marvell,mv88e6xxx-mdio-external" - -Example: - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6085"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6190"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - mdio1 { - compatible = "marvell,mv88e6xxx-mdio-external"; - #address-cells = <1>; - #size-cells = <0>; - switch1phy9: switch1phy0@9 { - reg = <9>; - }; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 90f13281d297..1b4475254d27 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,7 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/dsa/marvell.txt +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ F: include/linux/dsa/mv88e6xxx.h From patchwork Mon Oct 16 09:12:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13422792 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F4431C28D for ; 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Mon, 16 Oct 2023 02:12:57 -0700 (PDT) From: Linus Walleij Date: Mon, 16 Oct 2023 11:12:55 +0200 Subject: [PATCH net-next v3 2/6] dt-bindings: marvell: Add Marvell MV88E6060 DSA schema Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231016-marvell-88e6152-wan-led-v3-2-38cd449dfb15@linaro.org> References: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> In-Reply-To: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org The Marvell MV88E6060 is one of the oldest DSA switches from Marvell, and it has DT bindings used in the wild. Let's define them properly. It is different enough from the rest of the MV88E6xxx switches that it deserves its own binding. Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6060.yaml | 105 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 106 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml new file mode 100644 index 000000000000..01db7df1bab6 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml @@ -0,0 +1,105 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6060.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6060 DSA switch + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6060 switch has been produced and sold by Marvell + since at least 2010. The switch has one pin ADDR4 that controls the + MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus + connected to the switch, the PHY:s inside the switch appear as + independent devices on address 0x00-0x04 or 0x10-0x14, so in difference + from many other DSA switches this switch does not have an internal + MDIO bus for the PHY devices. + +properties: + compatible: + const: marvell,mv88e6060 + description: + The MV88E6060 is the oldest Marvell DSA switch product, and + as such a bit limited in features compared to later hardware. + + reg: + maxItems: 1 + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch@16 { + compatible = "marvell,mv88e6060"; + reg = <16>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@5 { + reg = <5>; + phy-mode = "rev-mii"; + ethernet = <ðc>; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 1b4475254d27..4c933a2a56ad 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,6 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ From patchwork Mon Oct 16 09:12:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13422794 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2AD871C685 for ; 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Mon, 16 Oct 2023 02:12:58 -0700 (PDT) From: Linus Walleij Date: Mon, 16 Oct 2023 11:12:56 +0200 Subject: [PATCH net-next v3 3/6] dt-bindings: net: mvusb: Fix up DSA example Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231016-marvell-88e6152-wan-led-v3-3-38cd449dfb15@linaro.org> References: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> In-Reply-To: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org When adding a proper schema for the Marvell mx88e6xxx switch, the scripts start complaining about this embedded example: dtschema/dtc warnings/errors: net/marvell,mvusb.example.dtb: switch@0: ports: '#address-cells' is a required property from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# net/marvell,mvusb.example.dtb: switch@0: ports: '#size-cells' is a required property from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# Fix this up by extending the example. Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/net/marvell,mvusb.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml index 3a3325168048..ee677cf7df4e 100644 --- a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml +++ b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml @@ -56,6 +56,12 @@ examples: ports { /* Port definitions */ + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + }; }; mdio { From patchwork Mon Oct 16 09:12:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13422793 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 49F1A1C68A for ; Mon, 16 Oct 2023 09:13:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="hV1+j3oW" Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C49CE6 for ; Mon, 16 Oct 2023 02:13:01 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-507a98517f3so1266797e87.0 for ; Mon, 16 Oct 2023 02:13:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697447579; x=1698052379; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=XhgTFSg7xZQFKqQUdPj7mdXINHwkkUMiMJQ/LwbGzwg=; b=hV1+j3oWkJdZ47Ch0mlBiSELXadHIAWPM9iTzg05wH/Lw0noqw2OwkR6zKitV7/yXU rk8X5uHrJYgv7HCqZ4zGvgtPiX6+TNCmzxcvy8yzMp22hxNrkrquIdVZqXELoZXUlIJV G4V7phcoOE1Ek9ejF+nCGBvpXYJ4FhVAK3d/2KNw6THBUSk0jGbf0lD5OdEdHuSPIfM3 S/8ZytuKKUInv2AB2wbVbOGpUyC1wrlyTIu8SCdTskJFmf84/gAD4FBi3+xWwQPr2EMq n5xQ8DYoGYoxdKZDMLeYMeQyzLJC50jDzMHIZ7uEi9EoCaH8u/0Uf1BDmtyXRqbROdk6 gEtQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697447579; x=1698052379; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XhgTFSg7xZQFKqQUdPj7mdXINHwkkUMiMJQ/LwbGzwg=; b=aZWgwqqdbP2YKPTG2oAGr5BJP2oZesC82lc3873RtjKIUib1hsqNUb8xW4baEdeJmG 4906pXmhguJ6srWURqF6CL0yW0Wgi3s+y+UCO8QMWlFl/3ejiSf3BfTkSkFjzNhy/BdT taOhcx43oSnSQoQUM8NLZeo5dliJFCpJ4nB54uo75uofYpsQ+wNVK1MfutnNWBrX9kbs RkHF7yR22G20PPtfHd/Urzh9F728S10GUl5nPFXdOFfUSIS009U74qzpWNnlhjwAI/lv zI07UH8Jyda8/+XvUXL7QSBplhS/jqUuuKbP2b2Kxm5NE7t0iBJ0X2R8U9qGwCt5dxtb H55Q== X-Gm-Message-State: AOJu0Yw3hno+sHKZ9bzSFeZF3dn3+Zt2LBEMO8HiezeeB6h8y0bC7/ZI ZPu/oQPDV38/WZF/mQFJFwz8dw== X-Google-Smtp-Source: AGHT+IFwxkItfXo61GLxyM7+8mDRV2+ix06U126IFotWglQsdZKz0AerU0/hD4OYRK7FL4MKJarDRA== X-Received: by 2002:ac2:5623:0:b0:507:a624:3f36 with SMTP id b3-20020ac25623000000b00507a6243f36mr3355753lff.11.1697447579524; Mon, 16 Oct 2023 02:12:59 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id br34-20020a056512402200b005068e7a2e7dsm4160986lfb.77.2023.10.16.02.12.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 02:12:59 -0700 (PDT) From: Linus Walleij Date: Mon, 16 Oct 2023 11:12:57 +0200 Subject: [PATCH net-next v3 4/6] ARM: dts: marvell: Fix some common switch mistakes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231016-marvell-88e6152-wan-led-v3-4-38cd449dfb15@linaro.org> References: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> In-Reply-To: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be switch@0. - port@a is not normal port naming, use decimal port@10. - The ports node should have port@0 etc children, no plural "ports". This serves as an example of fixes needed for introducing a schema for the bindings, but the patch can simply be applied. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/marvell/armada-370-rd.dts | 2 -- .../arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts | 6 ++---- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 2 -- arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts | 16 +++++++--------- arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 2 -- arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts | 2 -- 8 files changed, 11 insertions(+), 23 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-370-rd.dts b/arch/arm/boot/dts/marvell/armada-370-rd.dts index b459a670f615..e3a1834986ee 100644 --- a/arch/arm/boot/dts/marvell/armada-370-rd.dts +++ b/arch/arm/boot/dts/marvell/armada-370-rd.dts @@ -151,8 +151,6 @@ led@0 { switch: switch@10 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x10>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts index f4c4b213ef4e..cf37f53ec070 100644 --- a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts +++ b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts @@ -79,14 +79,12 @@ &mdio { switch@0 { compatible = "marvell,mv88e6190"; - #address-cells = <1>; #interrupt-cells = <2>; interrupt-controller; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&switch_interrupt_pins>; pinctrl-names = "default"; - #size-cells = <0>; reg = <0>; mdio { @@ -214,12 +212,12 @@ port@9 { reg = <9>; }; - port@a { + port@10 { /* 88X3310P external phy */ label = "lan10"; phy-handle = <&phy2>; phy-mode = "xaui"; - reg = <0xa>; + reg = <10>; }; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 1990f7d0cc79..1be0419f8f3e 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -7,7 +7,7 @@ / { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6190"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts index b795ad573891..6ec536222bfb 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts @@ -11,7 +11,7 @@ &sfp0 { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi index fc8216fd9f60..63a0bc9455ca 100644 --- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi @@ -160,8 +160,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 2d8d319bec83..8c69dbd6a2c7 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -439,8 +439,6 @@ switch@10 { pinctrl-names = "default"; pinctrl-0 = <&swint_pins>; compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; dsa,member = <0 0>; reg = <0x10>; @@ -452,32 +450,32 @@ ports { #address-cells = <1>; #size-cells = <0>; - ports@0 { + port@0 { reg = <0>; label = "lan0"; }; - ports@1 { + port@1 { reg = <1>; label = "lan1"; }; - ports@2 { + port@2 { reg = <2>; label = "lan2"; }; - ports@3 { + port@3 { reg = <3>; label = "lan3"; }; - ports@4 { + port@4 { reg = <4>; label = "lan4"; }; - ports@5 { + port@5 { reg = <5>; ethernet = <ð1>; phy-mode = "rgmii-id"; @@ -488,7 +486,7 @@ fixed-link { }; }; - ports@6 { + port@6 { reg = <6>; ethernet = <ð0>; phy-mode = "rgmii-id"; diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts index 32c569df142f..ab46903580aa 100644 --- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts @@ -94,8 +94,6 @@ &mdio { switch@4 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <4>; pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts index 7a0614fd0c93..2a5518c73bff 100644 --- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts @@ -267,8 +267,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { From patchwork Mon Oct 16 09:12:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13422795 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 818351C6B7 for ; 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Mon, 16 Oct 2023 02:13:00 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id br34-20020a056512402200b005068e7a2e7dsm4160986lfb.77.2023.10.16.02.12.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 02:13:00 -0700 (PDT) From: Linus Walleij Date: Mon, 16 Oct 2023 11:12:58 +0200 Subject: [PATCH net-next v3 5/6] ARM: dts: nxp: Fix some common switch mistakes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231016-marvell-88e6152-wan-led-v3-5-38cd449dfb15@linaro.org> References: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> In-Reply-To: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Fix some errors in the Marvell MV88E6xxx switch descriptions: - switch0@0 is not OK, should be switch@0 Signed-off-by: Linus Walleij --- arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts | 2 +- arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts | 8 ++++---- arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts | 2 +- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts | 4 ++-- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts index 1a19aec8957b..add47d8fb58a 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts @@ -162,7 +162,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6085"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_switch>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts index df1335492a19..50356bd87d04 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts @@ -47,7 +47,7 @@ mdio_mux_1: mdio@1 { #address-cells = <1>; #size-cells = <0>; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 0>; @@ -130,7 +130,7 @@ mdio_mux_2: mdio@2 { #address-cells = <1>; #size-cells = <0>; - switch1: switch1@0 { + switch1: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 1>; @@ -188,7 +188,7 @@ mdio_mux_4: mdio@4 { #address-cells = <1>; #size-cells = <0>; - switch2: switch2@0 { + switch2: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 2>; @@ -276,7 +276,7 @@ mdio_mux_8: mdio@8 { #address-cells = <1>; #size-cells = <0>; - switch3: switch3@0 { + switch3: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 3>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts index 1461804ecaea..20e9e2dacbe6 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts @@ -123,7 +123,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts index 463c2452b9b7..aa53a60518c3 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts @@ -112,7 +112,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -167,7 +167,7 @@ port@9 { }; }; - mdio1 { + mdio-external { compatible = "marvell,mv88e6xxx-mdio-external"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts index f5ae0d5de315..0b7063b74130 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts @@ -137,7 +137,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; From patchwork Mon Oct 16 09:12:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13422796 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF9FC1CA86 for ; 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Mon, 16 Oct 2023 02:13:01 -0700 (PDT) From: Linus Walleij Date: Mon, 16 Oct 2023 11:12:59 +0200 Subject: [PATCH net-next v3 6/6] ARM64: dts: marvell: Fix some common switch mistakes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231016-marvell-88e6152-wan-led-v3-6-38cd449dfb15@linaro.org> References: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> In-Reply-To: <20231016-marvell-88e6152-wan-led-v3-0-38cd449dfb15@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net X-Patchwork-Delegate: kuba@kernel.org Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be switch@0. - port@a is not normal port naming, use decimal port@10. Signed-off-by: Linus Walleij --- .../boot/dts/marvell/armada-3720-espressobin.dtsi | 4 +-- .../boot/dts/marvell/armada-3720-gl-mv1000.dts | 4 +-- .../boot/dts/marvell/armada-3720-turris-mox.dts | 32 +++++++++++----------- .../boot/dts/marvell/armada-7040-mochabin.dts | 2 -- .../dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +- arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 6 ++-- 6 files changed, 21 insertions(+), 29 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi index 5fc613d24151..b526efeee293 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi @@ -145,10 +145,8 @@ &usb2 { }; &mdio { - switch0: switch0@1 { + switch0: switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index b1b45b4fa9d4..5de4417f929c 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -152,10 +152,8 @@ &uart0 { }; &mdio { - switch0: switch0@1 { + switch0: switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index 9eab2bb22134..ea66ba5a9762 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -305,7 +305,7 @@ phy1: ethernet-phy@1 { }; /* switch nodes are enabled by U-Boot if modules are present */ - switch0@10 { + switch@10 { compatible = "marvell,mv88e6190"; reg = <0x10>; dsa,member = <0 0>; @@ -410,8 +410,8 @@ port@9 { managed = "in-band-status"; }; - switch0port10: port@a { - reg = <0xa>; + switch0port10: port@10 { + reg = <10>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; @@ -419,8 +419,8 @@ switch0port10: port@a { status = "disabled"; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -430,7 +430,7 @@ port-sfp@a { }; }; - switch0@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 0>; @@ -497,7 +497,7 @@ port@5 { }; }; - switch1@11 { + switch@11 { compatible = "marvell,mv88e6190"; reg = <0x11>; dsa,member = <0 1>; @@ -602,8 +602,8 @@ switch1port9: port@9 { link = <&switch0port10>; }; - switch1port10: port@a { - reg = <0xa>; + switch1port10: port@10 { + reg = <10>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; @@ -611,8 +611,8 @@ switch1port10: port@a { status = "disabled"; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -622,7 +622,7 @@ port-sfp@a { }; }; - switch1@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 1>; @@ -689,7 +689,7 @@ port@5 { }; }; - switch2@12 { + switch@12 { compatible = "marvell,mv88e6190"; reg = <0x12>; dsa,member = <0 2>; @@ -794,8 +794,8 @@ switch2port9: port@9 { link = <&switch1port10 &switch0port10>; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -805,7 +805,7 @@ port-sfp@a { }; }; - switch2@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 2>; diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts index 48202810bf78..3cc794fcf12e 100644 --- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts +++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts @@ -303,8 +303,6 @@ eth2phy: ethernet-phy@1 { /* 88E6141 Topaz switch */ switch: switch@3 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <3>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index 4125202028c8..7a25ea36b565 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -497,7 +497,7 @@ ge_phy: ethernet-phy@0 { reset-deassert-us = <10000>; }; - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi index 32cfb3e2efc3..2f6281b66467 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi @@ -207,11 +207,9 @@ phy0: ethernet-phy@0 { reg = <0>; }; - switch6: switch0@6 { + switch6: switch@6 { /* Actual device is MV88E6393X */ compatible = "marvell,mv88e6190"; - #address-cells = <1>; - #size-cells = <0>; reg = <6>; interrupt-parent = <&cp0_gpio1>; interrupts = <28 IRQ_TYPE_LEVEL_LOW>; @@ -280,7 +278,7 @@ port@9 { managed = "in-band-status"; }; - port@a { + port@10 { reg = <10>; ethernet = <&cp0_eth0>; phy-mode = "10gbase-r";