From patchwork Tue Aug 14 06:12:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjie Lin X-Patchwork-Id: 10565033 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BCF441390 for ; Tue, 14 Aug 2018 06:12:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AB27B294B9 for ; Tue, 14 Aug 2018 06:12:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9F7E6294F0; Tue, 14 Aug 2018 06:12:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 5045B294B9 for ; Tue, 14 Aug 2018 06:12:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=51TChDQhkxwVUqJaqlzZzWDixV30C2/IqbgvYsewX9Y=; b=X4gWRFxRxtGma8 fDlKNl5v+TGm69l+vDRmAULn/vnh5CgwYIeOxxw4FoQdeOkxLhlUZGurctxP1a/KEWFiKAQNnnrN4 QHO2qrZcA6P7mk7wRGHP3TOP/jYqubw65a98iks3Jfa6ViERMASSzi0mKIatSAfAfhpMukUNTPO/Y bowWZ1ZGVN/i9BX+8faEKoQK2iyeBQUOv9A5KwjTUZn3S0cwQQCkwRgXAv5YSPy5z5LFp7f1SEfg6 90BeryXGVQWKHCoR68fskhqSd588bAB2hXykIayjniBPrAuSazxZp+KVyDv5xlG+B/sF+nhyscrVP h2+XDCyCExtS9X/orDuw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1fpSYv-0000Kr-73; Tue, 14 Aug 2018 06:12:13 +0000 Received: from mail-sh2.amlogic.com ([58.32.228.45]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fpSYi-0008Gs-Tq; Tue, 14 Aug 2018 06:12:03 +0000 Received: from droid10.amlogic.com (10.18.11.213) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Tue, 14 Aug 2018 14:11:49 +0800 From: Hanjie Lin To: Kishon Vijay Abraham I Subject: [PATCH 1/2] dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe Phy controller Date: Tue, 14 Aug 2018 02:12:13 -0400 Message-ID: <1534227134-151584-2-git-send-email-hanjie.lin@amlogic.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534227134-151584-1-git-send-email-hanjie.lin@amlogic.com> References: <1534227134-151584-1-git-send-email-hanjie.lin@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.11.213] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180813_231201_272613_68CDECE0 X-CRM114-Status: UNSURE ( 9.48 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Hanjie Lin , devicetree@vger.kernel.org, linux-pci@vger.kernel.org, shawn.lin@rock-chips.com, linux-kernel@vger.kernel.org, Yue Wang , Kevin Hilman , Carlo Caione , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yue Wang The Meson-PCIE-PHY controller supports the 5-Gbps data rate of the PCI Express Gen 2 specification and is backwardcompatible with the 2.5-Gbps Gen 1.1 specification with only inferred idle detection supported on AMLOGIC SoCs. Signed-off-by: Hanjie Lin Signed-off-by: Yue Wang --- .../bindings/phy/amlogic,meson-pcie-phy.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt b/Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt new file mode 100644 index 0000000..db99085 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt @@ -0,0 +1,31 @@ +* Amlogic Meson AXG PCIE PHY binding + +Required properties: +- compatible: Should be + - "amlogic,axg-pcie-phy" +- #phys-cells: must be 0 (see phy-bindings.txt in this directory) +- reg: The base address and length of the registers +- resets: phandle to the reset lines +- reset-names: must contain "phy" and "peripheral" + - "port_a" Port A reset + - "port_b" Port B reset + - "phy" PHY reset + - "apb" APB reset +Optional properties: +- phy-supply: see phy-bindings.txt in this directory + +Example: + pcie_phy: pcie-phy@ff644000 { + #phy-cells = <0>; + compatible = "amlogic,axg-pcie-phy"; + reg = <0x0 0xff644000 0x0 0x2000>; + resets = <&reset RESET_PCIE_A>, + <&reset RESET_PCIE_B>, + <&reset RESET_PCIE_PHY>, + <&reset RESET_PCIE_APB>; + reset-names = + "port_a", + "port_b", + "phy", + "apb"; + }; From patchwork Tue Aug 14 06:12:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hanjie Lin X-Patchwork-Id: 10565037 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B52711510 for ; Tue, 14 Aug 2018 06:12:36 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7C88294B9 for ; Tue, 14 Aug 2018 06:12:36 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9BECB294F0; Tue, 14 Aug 2018 06:12:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 1A62B294B9 for ; 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Tue, 14 Aug 2018 06:12:34 +0000 Received: from mail-sh2.amlogic.com ([58.32.228.45]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1fpSYy-000088-5L; Tue, 14 Aug 2018 06:12:23 +0000 Received: from droid10.amlogic.com (10.18.11.213) by mail-sh2.amlogic.com (10.18.11.6) with Microsoft SMTP Server id 15.0.1320.4; Tue, 14 Aug 2018 14:11:50 +0800 From: Hanjie Lin To: Kishon Vijay Abraham I Subject: [PATCH 2/2] PCI: meson: add the Amlogic Meson PCIe phy driver Date: Tue, 14 Aug 2018 02:12:14 -0400 Message-ID: <1534227134-151584-3-git-send-email-hanjie.lin@amlogic.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1534227134-151584-1-git-send-email-hanjie.lin@amlogic.com> References: <1534227134-151584-1-git-send-email-hanjie.lin@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.18.11.213] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180813_231216_720808_76117549 X-CRM114-Status: GOOD ( 13.49 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Hanjie Lin , linux-pci@vger.kernel.org, shawn.lin@rock-chips.com, linux-kernel@vger.kernel.org, Yue Wang , Kevin Hilman , Carlo Caione , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yue Wang The Meson-PCIE-PHY controller supports the 5-Gbps data rate of the PCI Express Gen 2 specification and is backwardcompatible with the 2.5-Gbps Gen 1.1 specification with only inferred idle detection supported on AMLOGIC SoCs. Signed-off-by: Yue Wang Signed-off-by: Hanjie Lin --- drivers/phy/amlogic/Kconfig | 8 ++ drivers/phy/amlogic/Makefile | 1 + drivers/phy/amlogic/phy-meson-axg-pcie.c | 160 +++++++++++++++++++++++++++++++ 3 files changed, 169 insertions(+) create mode 100644 drivers/phy/amlogic/phy-meson-axg-pcie.c diff --git a/drivers/phy/amlogic/Kconfig b/drivers/phy/amlogic/Kconfig index 23fe1cd..3ab07f9 100644 --- a/drivers/phy/amlogic/Kconfig +++ b/drivers/phy/amlogic/Kconfig @@ -36,3 +36,11 @@ config PHY_MESON_GXL_USB3 Enable this to support the Meson USB3 PHY and OTG detection IP block found in Meson GXL and GXM SoCs. If unsure, say N. + +config PHY_MESON_AXG_PCIE + bool "Meson AXG PCIe PHY driver" + depends on OF && (ARCH_MESON || COMPILE_TEST) + select GENERIC_PHY + help + Enable PCIe PHY support for Meson AXG SoC series. + This driver provides PHY interface for Meson PCIe controller. \ No newline at end of file diff --git a/drivers/phy/amlogic/Makefile b/drivers/phy/amlogic/Makefile index 4fd8848..5ab8578 100644 --- a/drivers/phy/amlogic/Makefile +++ b/drivers/phy/amlogic/Makefile @@ -1,3 +1,4 @@ obj-$(CONFIG_PHY_MESON8B_USB2) += phy-meson8b-usb2.o obj-$(CONFIG_PHY_MESON_GXL_USB2) += phy-meson-gxl-usb2.o obj-$(CONFIG_PHY_MESON_GXL_USB3) += phy-meson-gxl-usb3.o +obj-$(CONFIG_PHY_MESON_AXG_PCIE) += phy-meson-axg-pcie.o diff --git a/drivers/phy/amlogic/phy-meson-axg-pcie.c b/drivers/phy/amlogic/phy-meson-axg-pcie.c new file mode 100644 index 0000000..8bc5c49 --- /dev/null +++ b/drivers/phy/amlogic/phy-meson-axg-pcie.c @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: (GPL-2.0+ or MIT) +/* + * Amlogic MESON SoC series PCIe PHY driver + * + * Phy provider for PCIe controller on MESON SoC series + * + * Copyright (c) 2018 Amlogic, inc. + * Yue Wang + */ + +#include +#include +#include +#include +#include +#include +#include + +struct meson_pcie_phy_data { + const struct phy_ops *ops; +}; + +struct meson_pcie_reset { + struct reset_control *port_a; + struct reset_control *port_b; + struct reset_control *phy; + struct reset_control *apb; +}; + +struct meson_pcie_phy { + const struct meson_pcie_phy_data *data; + struct meson_pcie_reset reset; + void __iomem *phy_base; +}; + +static int meson_pcie_phy_init(struct phy *phy) +{ + struct meson_pcie_phy *mphy = phy_get_drvdata(phy); + struct meson_pcie_reset *mrst = &mphy->reset; + + writel(0x1c, mphy->phy_base); + reset_control_assert(mrst->port_a); + reset_control_assert(mrst->port_b); + reset_control_assert(mrst->phy); + reset_control_assert(mrst->apb); + udelay(400); + reset_control_deassert(mrst->port_a); + reset_control_deassert(mrst->port_b); + reset_control_deassert(mrst->phy); + reset_control_deassert(mrst->apb); + udelay(500); + + return 0; +} + +static const struct phy_ops meson_phy_ops = { + .init = meson_pcie_phy_init, + .owner = THIS_MODULE, +}; + +static const struct meson_pcie_phy_data meson_pcie_phy_data = { + .ops = &meson_phy_ops, +}; + +static const struct of_device_id meson_pcie_phy_match[] = { + { + .compatible = "amlogic,axg-pcie-phy", + .data = &meson_pcie_phy_data, + }, + {}, +}; + +static int meson_pcie_phy_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct meson_pcie_phy *mphy; + struct meson_pcie_reset *mrst; + struct phy *generic_phy; + struct phy_provider *phy_provider; + struct resource *res; + const struct meson_pcie_phy_data *data; + + data = of_device_get_match_data(dev); + if (!data) + return -ENODEV; + + mphy = devm_kzalloc(dev, sizeof(*mphy), GFP_KERNEL); + if (!mphy) + return -ENOMEM; + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + mphy->phy_base = devm_ioremap_resource(dev, res); + if (IS_ERR(mphy->phy_base)) + return PTR_ERR(mphy->phy_base); + + mrst = &mphy->reset; + + mrst->port_a = devm_reset_control_get_shared(dev, "port_a"); + if (IS_ERR(mrst->port_a)) { + if (PTR_ERR(mrst->port_a) != -EPROBE_DEFER) + dev_err(dev, "couldn't get port a reset %ld\n", + PTR_ERR(mrst->port_a)); + + return PTR_ERR(mrst->port_a); + } + + mrst->port_b = devm_reset_control_get_shared(dev, "port_b"); + if (IS_ERR(mrst->port_b)) { + if (PTR_ERR(mrst->port_b) != -EPROBE_DEFER) + dev_err(dev, "couldn't get port b reset %ld\n", + PTR_ERR(mrst->port_b)); + + return PTR_ERR(mrst->port_b); + } + + mrst->phy = devm_reset_control_get_shared(dev, "phy"); + if (IS_ERR(mrst->phy)) { + if (PTR_ERR(mrst->phy) != -EPROBE_DEFER) + dev_err(dev, "couldn't get phy reset\n"); + + return PTR_ERR(mrst->phy); + } + + mrst->apb = devm_reset_control_get_shared(dev, "apb"); + if (IS_ERR(mrst->apb)) { + if (PTR_ERR(mrst->apb) != -EPROBE_DEFER) + dev_err(dev, "couldn't get apb reset\n"); + + return PTR_ERR(mrst->apb); + } + + reset_control_deassert(mrst->port_a); + reset_control_deassert(mrst->port_b); + reset_control_deassert(mrst->phy); + reset_control_deassert(mrst->apb); + + mphy->data = data; + + generic_phy = devm_phy_create(dev, dev->of_node, mphy->data->ops); + if (IS_ERR(generic_phy)) { + if (PTR_ERR(generic_phy) != -EPROBE_DEFER) + dev_err(dev, "failed to create PHY\n"); + + return PTR_ERR(generic_phy); + } + + phy_set_drvdata(generic_phy, mphy); + phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate); + + return PTR_ERR_OR_ZERO(phy_provider); +} + +static struct platform_driver meson_pcie_phy_driver = { + .probe = meson_pcie_phy_probe, + .driver = { + .of_match_table = meson_pcie_phy_match, + .name = "meson-pcie-phy", + } +}; + +builtin_platform_driver(meson_pcie_phy_driver);