From patchwork Wed Oct 18 12:35:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13426993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 376F4CDB482 for ; Wed, 18 Oct 2023 12:36:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=d9vV/w9Fz+9jaquDjdA7tyyEX4ns/k1zxyzdj4nbPc8=; b=4WjvLMISHqf8KG Pm0mv6YLcWX9jCNTOiWLzmyWa/jkBqBbUfC70Rspgok2i2Tis8Hfbnr2crGBtIFYzB1RV34vrdpBw yKuCLdDL0UJUNzwGoJ5Kt9zB24OjYf017/2+BJ0UHA5oHBja7Y3x9JiHC1BrKxDErknT36Ko3QmiA uvM8RtcPmyc6hDakJtU3ifxeM0AydSiNX4x2rlIVS6NHzH4+So3qSw1WyL3Y5f3Fbi2q1ItY7xwiQ acivcV+ZmZYQODs3MQrImNRhiECmaFBuLuGGWYlwmKkuoBj8dyzLrtW+dupDujO9yeUfE+90zc3HN XJ6qa4UpuEhnRs79461A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qt5mW-00Efjy-0z; Wed, 18 Oct 2023 12:36:12 +0000 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qt5mP-00Efe5-2h for linux-arm-kernel@lists.infradead.org; Wed, 18 Oct 2023 12:36:07 +0000 Received: by mail-wm1-x329.google.com with SMTP id 5b1f17b1804b1-40790b0a224so14960585e9.0 for ; Wed, 18 Oct 2023 05:36:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697632563; x=1698237363; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0v0ZmldTmEHElH0nzfPoImpxhHxc/jfxnYXGlHkEaSw=; b=COjzchPNOEQXcpN5RLvYRdoxR5DgBivjvS1e+yodUQ6cfjSoXGk+vkOnpWCnU8tKRN AkqtK7i6DWkgXoQyVh1B/1cseBPBuV8WSgib4YsVYjD3FM6zkHWwAlwyapoGMo1n2G+m 7GK3BNxfnn/47EdyDROWf2IfFSfEv88QLXaYqiROCBkdtEjM4u6QnziHLf42WY8SIWpU g7i79zIEHh9Zo26D4hUnZM6wKe66PMGmoeEEGRJg9lFLNZm7gvYBlUs/T+XwWZ8WkzdA sPgQ0MySNIqGVBbGuWjVc3I7sZouIKVwoN3YAB11TtrA9MxgqjB2hZsGG33Rw3Kl8BLh hzQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697632563; x=1698237363; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0v0ZmldTmEHElH0nzfPoImpxhHxc/jfxnYXGlHkEaSw=; b=OS13DGP2qubcnSwL8BUSEh2xFZq/JrEdWk+4f9dfOa6ZypianYiP75vqT4PIT9+Ps4 j5//a855mXyhXPZlYZ6SYCyG7yggSo0pdeepKAyhz0/fFGwDxCcjZODKehWSjfBx2xzo iZioArRHqL9BMGYNkYDvFbpsVwSkZ6E35iVF9CyY3jhAVEMtikV7yFrsIxXPpzFC1eh5 X6/PtdCB1b7sB3sulU9XJR1+snZvVWhe9IPFM6giCmgDBUfQhGr9PhPhD32hVodMp0KV 88M/CXIL73IufyT+wJl+Ie6CXtaLX360thhn13uubD9CqD3PIZIeebVZzI+hLA5i7F+1 sSKQ== X-Gm-Message-State: AOJu0Yw6UEnftGVWsYKNnLL6A1OLgzlN7tHkMchcn7fvyT0c6NVmNhY/ 3U3FHGouYsbPqvMInc+wJbY= X-Google-Smtp-Source: AGHT+IHYxeHjCIR/FT2JDqNfUwmEd2G8A/49wx/hETYLT6M/03g9TnduO1+10bkcfRpmv5Wp7ErFMw== X-Received: by 2002:a05:600c:3511:b0:404:72fe:ed5c with SMTP id h17-20020a05600c351100b0040472feed5cmr4380670wmq.29.1697632558280; Wed, 18 Oct 2023 05:35:58 -0700 (PDT) Received: from localhost.localdomain (93-34-89-13.ip49.fastwebnet.it. [93.34.89.13]) by smtp.googlemail.com with ESMTPSA id q28-20020adfab1c000000b003248a490e3asm2048211wrc.39.2023.10.18.05.35.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 05:35:57 -0700 (PDT) From: Christian Marangi To: Raju Rangoju , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Ping-Ke Shih , Kalle Valo , Simon Horman , Daniel Borkmann , Jiri Pirko , Hangbin Liu , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-wireless@vger.kernel.org Cc: Christian Marangi Subject: [net-next PATCH v4 1/4] net: introduce napi_is_scheduled helper Date: Wed, 18 Oct 2023 14:35:47 +0200 Message-Id: <20231018123550.27110-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231018123550.27110-1-ansuelsmth@gmail.com> References: <20231018123550.27110-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231018_053605_874810_05D0F656 X-CRM114-Status: GOOD ( 19.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org We currently have napi_if_scheduled_mark_missed that can be used to check if napi is scheduled but that does more thing than simply checking it and return a bool. Some driver already implement custom function to check if napi is scheduled. Drop these custom function and introduce napi_is_scheduled that simply check if napi is scheduled atomically. Update any driver and code that implement a similar check and instead use this new helper. Signed-off-by: Christian Marangi --- drivers/net/ethernet/chelsio/cxgb3/sge.c | 8 -------- drivers/net/wireless/realtek/rtw89/core.c | 2 +- include/linux/netdevice.h | 23 +++++++++++++++++++++++ net/core/dev.c | 2 +- 4 files changed, 25 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/chelsio/cxgb3/sge.c b/drivers/net/ethernet/chelsio/cxgb3/sge.c index 2e9a74fe0970..71fa2dc19034 100644 --- a/drivers/net/ethernet/chelsio/cxgb3/sge.c +++ b/drivers/net/ethernet/chelsio/cxgb3/sge.c @@ -2501,14 +2501,6 @@ static int napi_rx_handler(struct napi_struct *napi, int budget) return work_done; } -/* - * Returns true if the device is already scheduled for polling. - */ -static inline int napi_is_scheduled(struct napi_struct *napi) -{ - return test_bit(NAPI_STATE_SCHED, &napi->state); -} - /** * process_pure_responses - process pure responses from a response queue * @adap: the adapter diff --git a/drivers/net/wireless/realtek/rtw89/core.c b/drivers/net/wireless/realtek/rtw89/core.c index cca18d7ea1dd..6faf4dcf007c 100644 --- a/drivers/net/wireless/realtek/rtw89/core.c +++ b/drivers/net/wireless/realtek/rtw89/core.c @@ -1919,7 +1919,7 @@ static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev, struct napi_struct *napi = &rtwdev->napi; /* In low power mode, napi isn't scheduled. Receive it to netif. */ - if (unlikely(!test_bit(NAPI_STATE_SCHED, &napi->state))) + if (unlikely(!napi_is_scheduled(napi))) napi = NULL; rtw89_core_hw_to_sband_rate(rx_status); diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 1c7681263d30..b8bf669212cc 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -482,6 +482,29 @@ static inline bool napi_prefer_busy_poll(struct napi_struct *n) return test_bit(NAPI_STATE_PREFER_BUSY_POLL, &n->state); } +/** + * napi_is_scheduled - test if NAPI is scheduled + * @n: NAPI context + * + * This check is "best-effort". With no locking implemented, + * a NAPI can be scheduled or terminate right after this check + * and produce not precise results. + * + * NAPI_STATE_SCHED is an internal state, napi_is_scheduled + * should not be used normally and napi_schedule should be + * used instead. + * + * Use only if the driver really needs to check if a NAPI + * is scheduled for example in the context of delayed timer + * that can be skipped if a NAPI is already scheduled. + * + * Return True if NAPI is scheduled, False otherwise. + */ +static inline bool napi_is_scheduled(struct napi_struct *n) +{ + return test_bit(NAPI_STATE_SCHED, &n->state); +} + bool napi_schedule_prep(struct napi_struct *n); /** diff --git a/net/core/dev.c b/net/core/dev.c index 3ca746a5f0ad..8d267fc0b988 100644 --- a/net/core/dev.c +++ b/net/core/dev.c @@ -6527,7 +6527,7 @@ static int __napi_poll(struct napi_struct *n, bool *repoll) * accidentally calling ->poll() when NAPI is not scheduled. */ work = 0; - if (test_bit(NAPI_STATE_SCHED, &n->state)) { + if (napi_is_scheduled(n)) { work = n->poll(n, weight); trace_napi_poll(n, work, weight); } From patchwork Wed Oct 18 12:35:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13426990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 74A48CDB47E for ; Wed, 18 Oct 2023 12:36:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=3xRVVi68y+GNNSBzQLzVelki3ki1lYmnNmGkMDBbgds=; b=A4UhaFr0b3Ptfe DTVF3p7QLcbbU/GACx/dQmXIw9fDXISpMXR6AxuuisYm03A6VrUltehIRqUpUhGDOcREE6MTZTd/T W/vIaMmTWvr9smwEO/08L27io4I6tnsXWAs+QVGE/Pd096FrE6Jw2bF+twBekqiTMzBMWNO8iV8zM HhhK9xH7upvRS3AJEfgzlOGCbPu6o8EhqF746Aom3qFWwZY5xbAF1M/zqn1BfxJwYq2FXOID2MHtK WlIPGJjJo99YpMV0rsAdEhSbXMaOuF/DL6xj3954VHYET+3omLqfBxOf6VKOEkPWpC4tBSVW3bzn1 Tv9hvcj9vbRxCccZfvaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1qt5mU-00Efi3-15; Wed, 18 Oct 2023 12:36:10 +0000 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1qt5mN-00EfdU-1q for linux-arm-kernel@lists.infradead.org; Wed, 18 Oct 2023 12:36:04 +0000 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-32d834ec222so6039230f8f.0 for ; Wed, 18 Oct 2023 05:36:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697632560; x=1698237360; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zIsjeim7XUbQUze6bD56uxG9gvOx0giE5m3S+sNf+CI=; b=EHuxhVL75tJSsz9J7sxANCt8J5dN8LFf38gB5Gc+CzoyeU+Y0KBkA9aFSIFA+t6SmT gGUUcvFLxiT3TBcSHOXP1YkjjVWHgDxcXeyoqk4Z4cvsKnL39+gRMQaeJCf5Jc8hPmLL Z5a+5WVq+Oml9hx4Bp0rXwBw9Qz4dqPep+K78BjxRjZSalEUfVwRUdHXiikUTIg7SJXy Sx/jrZTVAAQX6h2iYgWGK0Qpxz0EyXwiKG3fPshZZJH0u/KJ2PvgQSX4R+JfENAPga8c lW394919JA8Tp++jVnuw16gT11kDSmSJrnYCklIdP0F6E1Qy8JK7Sw4obtJLA2ssw9eQ djAg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697632560; x=1698237360; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zIsjeim7XUbQUze6bD56uxG9gvOx0giE5m3S+sNf+CI=; b=UQ/taT5jIekvr79uqQ8mD089wi/QpHJtNZIBIgo/nXbZl8Z4F4/TErIBfYZy4mZBtb huuWD1U616xnrXnoNFMu9xe0Ov8kQRI1AQgzJ7SHUixasndBrUKfbQnP3Otw2MHGkxz0 MpN+82p4iyfi3MwP/zeRctXF5UdFoElBIT6R9T+ukyt+vC4EGMQUE5nUT0jbSTXjlUWq GvyXV7EaqcFZBXJvp0qs+SYpCS9XRvQwgqoLZ7Ga2R501mmh/pvf2JPb19lLbzxfSob/ 9dPD6yULxVQYHMp9zEHEvFgxvQ1O9XhmHeoWp7djl3PI4+bS6vCuda/uI/y012OsRPYr 0O9g== X-Gm-Message-State: AOJu0Yx8whn0jLvVfUOzo2QxbUsF97AyxMd20CEMYA7PqgQi68QqGtZT cs+Pqo6eahh9v2ji1m2L1Os= X-Google-Smtp-Source: AGHT+IEZ/yWPDm00bOSfruAAtBtiN55X0phfrsbW+b1WslVPJVgBsSSIwAeMQJfpT/HeejohPGGPLA== X-Received: by 2002:adf:e8c6:0:b0:32d:9d6b:ac99 with SMTP id k6-20020adfe8c6000000b0032d9d6bac99mr4372102wrn.31.1697632559722; Wed, 18 Oct 2023 05:35:59 -0700 (PDT) Received: from localhost.localdomain (93-34-89-13.ip49.fastwebnet.it. [93.34.89.13]) by smtp.googlemail.com with ESMTPSA id q28-20020adfab1c000000b003248a490e3asm2048211wrc.39.2023.10.18.05.35.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 05:35:59 -0700 (PDT) From: Christian Marangi To: Raju Rangoju , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Ping-Ke Shih , Kalle Valo , Simon Horman , Daniel Borkmann , Jiri Pirko , Hangbin Liu , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-wireless@vger.kernel.org Cc: Christian Marangi Subject: [net-next PATCH v4 2/4] net: stmmac: improve TX timer arm logic Date: Wed, 18 Oct 2023 14:35:48 +0200 Message-Id: <20231018123550.27110-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231018123550.27110-1-ansuelsmth@gmail.com> References: <20231018123550.27110-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231018_053603_612206_267824F4 X-CRM114-Status: GOOD ( 21.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There is currently a problem with the TX timer getting armed multiple unnecessary times causing big performance regression on some device that suffer from heavy handling of hrtimer rearm. The use of the TX timer is an old implementation that predates the napi implementation and the interrupt enable/disable handling. Due to stmmac being a very old code, the TX timer was never evaluated again with this new implementation and was kept there causing performance regression. The performance regression started to appear with kernel version 4.19 with 8fce33317023 ("net: stmmac: Rework coalesce timer and fix multi-queue races") where the timer was reduced to 1ms causing it to be armed 40 times more than before. Decreasing the timer made the problem more present and caused the regression in the other of 600-700mbps on some device (regression where this was notice is ipq806x). The problem is in the fact that handling the hrtimer on some target is expensive and recent kernel made the timer armed much more times. A solution that was proposed was reverting the hrtimer change and use mod_timer but such solution would still hide the real problem in the current implementation. To fix the regression, apply some additional logic and skip arming the timer when not needed. Arm the timer ONLY if a napi is not already scheduled. Running the timer is redundant since the same function (stmmac_tx_clean) will run in the napi TX poll. Also try to cancel any timer if a napi is scheduled to prevent redundant run of TX call. With the following new logic the original performance are restored while keeping using the hrtimer. Signed-off-by: Christian Marangi --- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index bb1dbf4c9f6c..5124ee87286c 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -2996,13 +2996,25 @@ static void stmmac_tx_timer_arm(struct stmmac_priv *priv, u32 queue) { struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; u32 tx_coal_timer = priv->tx_coal_timer[queue]; + struct stmmac_channel *ch; + struct napi_struct *napi; if (!tx_coal_timer) return; - hrtimer_start(&tx_q->txtimer, - STMMAC_COAL_TIMER(tx_coal_timer), - HRTIMER_MODE_REL); + ch = &priv->channel[tx_q->queue_index]; + napi = tx_q->xsk_pool ? &ch->rxtx_napi : &ch->tx_napi; + + /* Arm timer only if napi is not already scheduled. + * Try to cancel any timer if napi is scheduled, timer will be armed + * again in the next scheduled napi. + */ + if (unlikely(!napi_is_scheduled(napi))) + hrtimer_start(&tx_q->txtimer, + STMMAC_COAL_TIMER(tx_coal_timer), + HRTIMER_MODE_REL); + else + hrtimer_try_to_cancel(&tx_q->txtimer); } /** From patchwork Wed Oct 18 12:35:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13426991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20A46CDB482 for ; Wed, 18 Oct 2023 12:36:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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[93.34.89.13]) by smtp.googlemail.com with ESMTPSA id q28-20020adfab1c000000b003248a490e3asm2048211wrc.39.2023.10.18.05.35.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 05:36:00 -0700 (PDT) From: Christian Marangi To: Raju Rangoju , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Ping-Ke Shih , Kalle Valo , Simon Horman , Daniel Borkmann , Jiri Pirko , Hangbin Liu , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-wireless@vger.kernel.org Cc: Christian Marangi Subject: [net-next PATCH v4 3/4] net: stmmac: move TX timer arm after DMA enable Date: Wed, 18 Oct 2023 14:35:49 +0200 Message-Id: <20231018123550.27110-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231018123550.27110-1-ansuelsmth@gmail.com> References: <20231018123550.27110-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231018_053604_861491_FDFA1283 X-CRM114-Status: GOOD ( 17.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Move TX timer arm call after DMA interrupt is enabled again. The TX timer arm function changed logic and now is skipped if a napi is already scheduled. By moving the TX timer arm call after DMA is enabled, we permit to correctly skip if a DMA interrupt has been fired and a napi has been scheduled again. Signed-off-by: Christian Marangi --- .../net/ethernet/stmicro/stmmac/stmmac_main.c | 22 +++++++++++++++---- 1 file changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index 5124ee87286c..11055e98efcc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -2543,9 +2543,13 @@ static void stmmac_bump_dma_threshold(struct stmmac_priv *priv, u32 chan) * @priv: driver private structure * @budget: napi budget limiting this functions packet handling * @queue: TX queue index + * @pending_packets: signal to arm the TX coal timer * Description: it reclaims the transmit resources after transmission completes. + * If some packets still needs to be handled, due to TX coalesce, set + * pending_packets to true to make NAPI arm the TX coal timer. */ -static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue) +static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue, + bool *pending_packets) { struct stmmac_tx_queue *tx_q = &priv->dma_conf.tx_queue[queue]; struct stmmac_txq_stats *txq_stats = &priv->xstats.txq_stats[queue]; @@ -2706,7 +2710,7 @@ static int stmmac_tx_clean(struct stmmac_priv *priv, int budget, u32 queue) /* We still have pending packets, let's call for a new scheduling */ if (tx_q->dirty_tx != tx_q->cur_tx) - stmmac_tx_timer_arm(priv, queue); + *pending_packets = true; flags = u64_stats_update_begin_irqsave(&txq_stats->syncp); txq_stats->tx_packets += tx_packets; @@ -5572,6 +5576,7 @@ static int stmmac_napi_poll_tx(struct napi_struct *napi, int budget) container_of(napi, struct stmmac_channel, tx_napi); struct stmmac_priv *priv = ch->priv_data; struct stmmac_txq_stats *txq_stats; + bool pending_packets = false; u32 chan = ch->index; unsigned long flags; int work_done; @@ -5581,7 +5586,7 @@ static int stmmac_napi_poll_tx(struct napi_struct *napi, int budget) txq_stats->napi_poll++; u64_stats_update_end_irqrestore(&txq_stats->syncp, flags); - work_done = stmmac_tx_clean(priv, budget, chan); + work_done = stmmac_tx_clean(priv, budget, chan, &pending_packets); work_done = min(work_done, budget); if (work_done < budget && napi_complete_done(napi, work_done)) { @@ -5592,6 +5597,10 @@ static int stmmac_napi_poll_tx(struct napi_struct *napi, int budget) spin_unlock_irqrestore(&ch->lock, flags); } + /* TX still have packet to handle, check if we need to arm tx timer */ + if (pending_packets) + stmmac_tx_timer_arm(priv, chan); + return work_done; } @@ -5600,6 +5609,7 @@ static int stmmac_napi_poll_rxtx(struct napi_struct *napi, int budget) struct stmmac_channel *ch = container_of(napi, struct stmmac_channel, rxtx_napi); struct stmmac_priv *priv = ch->priv_data; + bool tx_pending_packets = false; int rx_done, tx_done, rxtx_done; struct stmmac_rxq_stats *rxq_stats; struct stmmac_txq_stats *txq_stats; @@ -5616,7 +5626,7 @@ static int stmmac_napi_poll_rxtx(struct napi_struct *napi, int budget) txq_stats->napi_poll++; u64_stats_update_end_irqrestore(&txq_stats->syncp, flags); - tx_done = stmmac_tx_clean(priv, budget, chan); + tx_done = stmmac_tx_clean(priv, budget, chan, &tx_pending_packets); tx_done = min(tx_done, budget); rx_done = stmmac_rx_zc(priv, budget, chan); @@ -5641,6 +5651,10 @@ static int stmmac_napi_poll_rxtx(struct napi_struct *napi, int budget) spin_unlock_irqrestore(&ch->lock, flags); } + /* TX still have packet to handle, check if we need to arm tx timer */ + if (tx_pending_packets) + stmmac_tx_timer_arm(priv, chan); + return min(rxtx_done, budget - 1); } From patchwork Wed Oct 18 12:35:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 13426992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A76ECCDB484 for ; Wed, 18 Oct 2023 12:36:35 +0000 (UTC) DKIM-Signature: v=1; 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[93.34.89.13]) by smtp.googlemail.com with ESMTPSA id q28-20020adfab1c000000b003248a490e3asm2048211wrc.39.2023.10.18.05.36.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Oct 2023 05:36:01 -0700 (PDT) From: Christian Marangi To: Raju Rangoju , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Ping-Ke Shih , Kalle Valo , Simon Horman , Daniel Borkmann , Jiri Pirko , Hangbin Liu , netdev@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-wireless@vger.kernel.org Cc: Christian Marangi Subject: [net-next PATCH v4 4/4] net: stmmac: increase TX coalesce timer to 5ms Date: Wed, 18 Oct 2023 14:35:50 +0200 Message-Id: <20231018123550.27110-5-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231018123550.27110-1-ansuelsmth@gmail.com> References: <20231018123550.27110-1-ansuelsmth@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231018_053605_272540_CFC4C227 X-CRM114-Status: GOOD ( 15.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Commit 8fce33317023 ("net: stmmac: Rework coalesce timer and fix multi-queue races") decreased the TX coalesce timer from 40ms to 1ms. This caused some performance regression on some target (regression was reported at least on ipq806x) in the order of 600mbps dropping from gigabit handling to only 200mbps. The problem was identified in the TX timer getting armed too much time. While this was fixed and improved in another commit, performance can be improved even further by increasing the timer delay a bit moving from 1ms to 5ms. The value is a good balance between battery saving by prevending too much interrupt to be generated and permitting good performance for internet oriented devices. Signed-off-by: Christian Marangi --- drivers/net/ethernet/stmicro/stmmac/common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index 1e996c29043d..e3f650e88f82 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h @@ -293,7 +293,7 @@ struct stmmac_safety_stats { #define MIN_DMA_RIWT 0x10 #define DEF_DMA_RIWT 0xa0 /* Tx coalesce parameters */ -#define STMMAC_COAL_TX_TIMER 1000 +#define STMMAC_COAL_TX_TIMER 5000 #define STMMAC_MAX_COAL_TX_TICK 100000 #define STMMAC_TX_MAX_FRAMES 256 #define STMMAC_TX_FRAMES 25