From patchwork Wed Feb 13 16:21:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Chris Wilson X-Patchwork-Id: 10810329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4B69A14E1 for ; Wed, 13 Feb 2019 16:22:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3AAA62E08B for ; Wed, 13 Feb 2019 16:22:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 38CD02E0BF; Wed, 13 Feb 2019 16:22:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B1B9C2E0BD for ; Wed, 13 Feb 2019 16:22:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 605576E326; Wed, 13 Feb 2019 16:22:09 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from fireflyinternet.com (mail.fireflyinternet.com [109.228.58.192]) by gabe.freedesktop.org (Postfix) with ESMTPS id E32536E326 for ; Wed, 13 Feb 2019 16:22:07 +0000 (UTC) X-Default-Received-SPF: pass (skip=forwardok (res=PASS)) x-ip-name=78.156.65.138; Received: from haswell.alporthouse.com (unverified [78.156.65.138]) by fireflyinternet.com (Firefly Internet (M1)) with ESMTP id 15565232-1500050 for multiple; Wed, 13 Feb 2019 16:21:46 +0000 From: Chris Wilson To: intel-gfx@lists.freedesktop.org Date: Wed, 13 Feb 2019 16:21:42 +0000 Message-Id: <20190213162142.2095-1-chris@chris-wilson.co.uk> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH] drm/i915/psr: Bump vblank evasion time for seamless updates X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jani Nikula , Paulo Zanoni Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" X-Virus-Scanned: ClamAV using ClamSMTP Each set of registers we need to rewrite during a pageflip/modeset increases the required evasion window. Modesets with PSR enabled empirically take up to 350us to complete the register programming, so provide a corresponding boost to the evasion window. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105870 Signed-off-by: Chris Wilson Cc: Jani Nikula Cc: Ville Syrjälä Cc: Paulo Zanoni Cc: Jose Roberto de Souza --- drivers/gpu/drm/i915/intel_sprite.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index 610398607e8e..03cafb953538 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c @@ -84,14 +84,30 @@ void intel_pipe_update_start(const struct intel_crtc_state *new_crtc_state) intel_crtc_has_type(new_crtc_state, INTEL_OUTPUT_DSI); DEFINE_WAIT(wait); u32 psr_status; + int evasion; vblank_start = adjusted_mode->crtc_vblank_start; if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) vblank_start = DIV_ROUND_UP(vblank_start, 2); + /* + * Estimate how long it will take to reprogram display registers. + * + * As we wish to avoid changing registers across the vblank to + * avoid register write tearing, where the new frame uses an incomplete + * mismash of state, we aim to complete our writes before the start + * of the vblank. So we must delay starting our writes until after our + * evasion window. + * + * Each additional bit of state adds a set of registers we need to + * reprogram, increasing our required evasion window. + */ + evasion = VBLANK_EVASION_TIME_US; + if (dev_priv->psr.enabled || new_crtc_state->has_psr) + evasion += 300; + /* FIXME needs to be calibrated sensibly */ - min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, - VBLANK_EVASION_TIME_US); + min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, evasion); max = vblank_start - 1; if (min <= 0 || max <= 0)