From patchwork Sat Oct 28 23:56:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 13439634 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CF67FC4332F for ; Sat, 28 Oct 2023 23:57:11 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qwtAJ-0007c3-Iy; Sat, 28 Oct 2023 19:56:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAH-0007aj-Bd for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:25 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAE-0006JS-P7 for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:25 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 3C8BF756088; Sun, 29 Oct 2023 01:56:23 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 08C59756082; Sun, 29 Oct 2023 01:56:23 +0200 (CEST) Message-Id: <4fac19bc5b9c1e9e98fefc0467ba1ef1d5baee16.1698536342.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH 1/4] hw/isa/vt82c686: Bring back via_isa_set_irq() To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 01:56:23 +0200 (CEST) Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The VIA intergrated south bridge chips combine several functions and allow routing their interrupts to any of the ISA IRQs (also allowing multiple components to share the same ISA IRQ, e.g. pegasos2 firmware configures USB, sound and PCI to use IRQ 9). Bring back via_isa_set_irq() that takes the component that wants to change an IRQ and keeps track of interrupt status of each source separately and does the mapping to ISA IRQ within the ISA bridge to allow different sources to control the same ISA IRQ lines. This may not handle cases when the ISA IRQ is also controlled by devices directly, not going through via_isa_set_irq() such as serial, parallel or keyboard but these IRQs being conventionally fixed are not likely for guests to change or share with other devices so hopefully this does not cause a problem in practice. This reverts commit 4e5a20b6da9b1f6d2e9621ed7eb8b239560104ae. Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 31 +++++++++++++++++++++++++++++++ include/hw/isa/vt82c686.h | 2 ++ 2 files changed, 33 insertions(+) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 57bdfb4e78..07ae8d73bc 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -549,6 +549,7 @@ struct ViaISAState { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa_irqs_in; + uint16_t isa_irq_state[ISA_NUM_IRQS]; ViaSuperIOState via_sio; MC146818RtcState rtc; PCIIDEState ide; @@ -592,6 +593,36 @@ static const TypeInfo via_isa_info = { }, }; +void via_isa_set_irq(PCIDevice *d, int pin, int level) +{ + ViaISAState *s = VIA_ISA(pci_get_function_0(d)); + int n = PCI_FUNC(d->devfn); + uint8_t isa_irq = d->config[PCI_INTERRUPT_LINE], max_irq = 15; + + switch (n) { + case 2: /* USB ports 0-1 */ + case 3: /* USB ports 2-3 */ + max_irq = 14; + break; + } + + if (unlikely(isa_irq > max_irq || isa_irq == 2)) { + qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing %d for %d", + isa_irq, n); + return; + } + if (!isa_irq) { + return; + } + + if (level) { + s->isa_irq_state[isa_irq] |= BIT(n); + } else { + s->isa_irq_state[isa_irq] &= ~BIT(n); + } + qemu_set_irq(s->isa_irqs_in[isa_irq], !!s->isa_irq_state[isa_irq]); +} + static void via_isa_request_i8259_irq(void *opaque, int irq, int level) { ViaISAState *s = opaque; diff --git a/include/hw/isa/vt82c686.h b/include/hw/isa/vt82c686.h index b6e95b2851..da1722daf2 100644 --- a/include/hw/isa/vt82c686.h +++ b/include/hw/isa/vt82c686.h @@ -34,4 +34,6 @@ struct ViaAC97State { uint32_t ac97_cmd; }; +void via_isa_set_irq(PCIDevice *d, int n, int level); + #endif From patchwork Sat Oct 28 23:56:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 13439636 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 84185C4167D for ; Sat, 28 Oct 2023 23:57:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qwtAO-0007dB-8i; Sat, 28 Oct 2023 19:56:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAH-0007b8-Pc for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:25 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAE-0006Jb-P0 for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:25 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 316C37560A7; Sun, 29 Oct 2023 01:56:24 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 14FF5756082; Sun, 29 Oct 2023 01:56:24 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH 2/4] hw/usb/vt82c686-uhci-pci: Use ISA instead of PCI interrupts To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 01:56:24 +0200 (CEST) Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This device is part of a superio/ISA bridge chip and IRQs from it are routed to an ISA interrupt. Use via_isa_set_irq() function to implement this in a vt82c686-uhci-pci specific irq handler. This reverts commit 422a6e8075752bc5342afd3eace23a4990dd7d98. Signed-off-by: BALATON Zoltan --- hw/usb/vt82c686-uhci-pci.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/hw/usb/vt82c686-uhci-pci.c b/hw/usb/vt82c686-uhci-pci.c index b4884c9011..6162806172 100644 --- a/hw/usb/vt82c686-uhci-pci.c +++ b/hw/usb/vt82c686-uhci-pci.c @@ -1,7 +1,14 @@ #include "qemu/osdep.h" +#include "hw/irq.h" #include "hw/isa/vt82c686.h" #include "hcd-uhci.h" +static void uhci_isa_set_irq(void *opaque, int irq_num, int level) +{ + UHCIState *s = opaque; + via_isa_set_irq(&s->dev, 0, level); +} + static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) { UHCIState *s = UHCI(dev); @@ -15,6 +22,8 @@ static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) pci_set_long(pci_conf + 0xc0, 0x00002000); usb_uhci_common_realize(dev, errp); + object_unref(s->irq); + s->irq = qemu_allocate_irq(uhci_isa_set_irq, s, 0); } static UHCIInfo uhci_info[] = { From patchwork Sat Oct 28 23:56:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 13439635 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D346DC4167D for ; Sat, 28 Oct 2023 23:57:11 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qwtAK-0007cn-NB; Sat, 28 Oct 2023 19:56:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAJ-0007bq-As for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:27 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAH-0006Jj-JM for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:27 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 4E9E07560AC; Sun, 29 Oct 2023 01:56:25 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 27614756082; Sun, 29 Oct 2023 01:56:25 +0200 (CEST) Message-Id: <8a72238b3c78578011c5274c2ecbe4883bb73555.1698536342.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH 3/4] hw/isa/vt82c686: Route PIRQ inputs using via_isa_set_irq() To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 01:56:25 +0200 (CEST) Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The chip has 4 pins (called PIRQA-D in VT82C686B and PINTA-D in VT8231) that are meant to be connected to PCI IRQ lines and allow routing PCI interrupts to the ISA PIC. Route these in via_isa_set_irq() to make it possible to share them with internal functions that can also be routed to the same ISA IRQs. Fixes: 2fdadd02e675caca4aba4ae26317701fe2c4c901 Signed-off-by: BALATON Zoltan --- hw/isa/vt82c686.c | 65 +++++++++++++++++------------------------------ 1 file changed, 24 insertions(+), 41 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 07ae8d73bc..18cc2f653d 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -593,6 +593,21 @@ static const TypeInfo via_isa_info = { }, }; +static int via_isa_get_pci_irq(const ViaISAState *s, int pin) +{ + switch (pin) { + case 0: + return s->dev.config[0x55] >> 4; + case 1: + return s->dev.config[0x56] & 0xf; + case 2: + return s->dev.config[0x56] >> 4; + case 3: + return s->dev.config[0x57] >> 4; + } + return 0; +} + void via_isa_set_irq(PCIDevice *d, int pin, int level) { ViaISAState *s = VIA_ISA(pci_get_function_0(d)); @@ -600,6 +615,10 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level) uint8_t isa_irq = d->config[PCI_INTERRUPT_LINE], max_irq = 15; switch (n) { + case 0: /* PIRQ/PINT inputs */ + isa_irq = via_isa_get_pci_irq(s, pin); + n = 12 + pin; + break; case 2: /* USB ports 0-1 */ case 3: /* USB ports 2-3 */ max_irq = 14; @@ -623,50 +642,15 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level) qemu_set_irq(s->isa_irqs_in[isa_irq], !!s->isa_irq_state[isa_irq]); } -static void via_isa_request_i8259_irq(void *opaque, int irq, int level) -{ - ViaISAState *s = opaque; - qemu_set_irq(s->cpu_intr, level); -} - -static int via_isa_get_pci_irq(const ViaISAState *s, int irq_num) +static void via_isa_pirq(void *opaque, int pin, int level) { - switch (irq_num) { - case 0: - return s->dev.config[0x55] >> 4; - case 1: - return s->dev.config[0x56] & 0xf; - case 2: - return s->dev.config[0x56] >> 4; - case 3: - return s->dev.config[0x57] >> 4; - } - return 0; + via_isa_set_irq(opaque, pin, level); } -static void via_isa_set_pci_irq(void *opaque, int irq_num, int level) +static void via_isa_request_i8259_irq(void *opaque, int irq, int level) { ViaISAState *s = opaque; - PCIBus *bus = pci_get_bus(&s->dev); - int i, pic_level, pic_irq = via_isa_get_pci_irq(s, irq_num); - - /* IRQ 0: disabled, IRQ 2,8,13: reserved */ - if (!pic_irq) { - return; - } - if (unlikely(pic_irq == 2 || pic_irq == 8 || pic_irq == 13)) { - qemu_log_mask(LOG_GUEST_ERROR, "Invalid ISA IRQ routing"); - } - - /* The pic level is the logical OR of all the PCI irqs mapped to it. */ - pic_level = 0; - for (i = 0; i < PCI_NUM_PINS; i++) { - if (pic_irq == via_isa_get_pci_irq(s, i)) { - pic_level |= pci_bus_get_irq_level(bus, i); - } - } - /* Now we change the pic irq level according to the via irq mappings. */ - qemu_set_irq(s->isa_irqs_in[pic_irq], pic_level); + qemu_set_irq(s->cpu_intr, level); } static void via_isa_realize(PCIDevice *d, Error **errp) @@ -679,6 +663,7 @@ static void via_isa_realize(PCIDevice *d, Error **errp) int i; qdev_init_gpio_out(dev, &s->cpu_intr, 1); + qdev_init_gpio_in_named(dev, via_isa_pirq, "pirq", PCI_NUM_PINS); isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d), errp); @@ -692,8 +677,6 @@ static void via_isa_realize(PCIDevice *d, Error **errp) i8254_pit_init(isa_bus, 0x40, 0, NULL); i8257_dma_init(isa_bus, 0); - qdev_init_gpio_in_named(dev, via_isa_set_pci_irq, "pirq", PCI_NUM_PINS); - /* RTC */ qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { From patchwork Sat Oct 28 23:56:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 13439637 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 75B47C4332F for ; Sat, 28 Oct 2023 23:57:31 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qwtAK-0007cX-5L; Sat, 28 Oct 2023 19:56:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAJ-0007bZ-49 for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:27 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qwtAH-0006Jo-LC for qemu-devel@nongnu.org; Sat, 28 Oct 2023 19:56:26 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 57AD07560AF; Sun, 29 Oct 2023 01:56:26 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 38760756082; Sun, 29 Oct 2023 01:56:26 +0200 (CEST) Message-Id: <94c8fd2a10450a3c8418d84f75a937ecae497c2f.1698536342.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH 4/4] hw/audio/via-ac97: Route interrupts using via_isa_set_irq() To: qemu-devel@nongnu.org Cc: philmd@linaro.org, Jiaxun Yang , Bernhard Beschow , vr_qemu@t-online.de Date: Sun, 29 Oct 2023 01:56:26 +0200 (CEST) Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Signed-off-by: BALATON Zoltan --- hw/audio/via-ac97.c | 8 ++++---- hw/isa/vt82c686.c | 1 + 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/audio/via-ac97.c b/hw/audio/via-ac97.c index 30095a4c7a..4c127a1def 100644 --- a/hw/audio/via-ac97.c +++ b/hw/audio/via-ac97.c @@ -211,14 +211,14 @@ static void out_cb(void *opaque, int avail) AUD_set_active_out(s->vo, 0); } if (c->type & STAT_EOL) { - pci_set_irq(&s->dev, 1); + via_isa_set_irq(&s->dev, 0, 1); } } if (CLEN_IS_FLAG(c)) { c->stat |= STAT_FLAG; c->stat |= STAT_PAUSED; if (c->type & STAT_FLAG) { - pci_set_irq(&s->dev, 1); + via_isa_set_irq(&s->dev, 0, 1); } } if (CLEN_IS_STOP(c)) { @@ -305,13 +305,13 @@ static void sgd_write(void *opaque, hwaddr addr, uint64_t val, unsigned size) if (val & STAT_EOL) { s->aur.stat &= ~(STAT_EOL | STAT_PAUSED); if (s->aur.type & STAT_EOL) { - pci_set_irq(&s->dev, 0); + via_isa_set_irq(&s->dev, 0, 0); } } if (val & STAT_FLAG) { s->aur.stat &= ~(STAT_FLAG | STAT_PAUSED); if (s->aur.type & STAT_FLAG) { - pci_set_irq(&s->dev, 0); + via_isa_set_irq(&s->dev, 0, 0); } } break; diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 18cc2f653d..830aac7670 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -621,6 +621,7 @@ void via_isa_set_irq(PCIDevice *d, int pin, int level) break; case 2: /* USB ports 0-1 */ case 3: /* USB ports 2-3 */ + case 5: /* AC97 audio */ max_irq = 14; break; }