From patchwork Sun Oct 29 04:27:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439651 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5BBBE15A4; Sun, 29 Oct 2023 04:27:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="IvJciyui" Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10762CC; Sat, 28 Oct 2023 21:27:22 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id ABAB56607333; Sun, 29 Oct 2023 04:27:20 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553640; bh=PlB2C/4GvlsigVQBPsB7o3BhZ4Nod/EAPxHc0U5Br04=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=IvJciyuiLEiU0mjm3j5yU+9wBhoTihTYs0be1p8pK5cxDFlWmQguAHTD2J84d5A8a 37Diph3gwxxywFpXLbIng8xYQtWM2gHKEawZiMGZQPDaF2mbR3PRjpTGiU2i2sPsba fq3dMmfbJkv11ahyXvyL/lc8Jqtki9KOiylNSjOhoP1q6PLl0o0wd0GKlY7eu1hsHw aazZuCpabGuw7t4cjMv9sHOfiJI4djx1UtAhYOpaKfrPlWQ3T6mfZgOvO2Iqdp9iIk 4Sk9dansjJNzr4CTm+r0j4fjCCHsdgqwIEqBJyiBvXdJqWBDQ6gfnDb4hd9uMdeT27 FMS6lhywrubBg== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 01/12] dt-bindings: net: snps,dwmac: Allow exclusive usage of ahb reset Date: Sun, 29 Oct 2023 06:27:01 +0200 Message-ID: <20231029042712.520010-2-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The Synopsys DesignWare MAC found on the StarFive JH7100 SoC requires just the 'ahb' reset name, but the binding allows selecting it only in conjunction with 'stmmaceth'. Fix the issue by permitting exclusive usage of the 'ahb' reset name. Signed-off-by: Cristian Ciocaltea --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 5c2769dc689a..a4d7172ea701 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -146,7 +146,7 @@ properties: reset-names: minItems: 1 items: - - const: stmmaceth + - enum: [stmmaceth, ahb] - const: ahb power-domains: From patchwork Sun Oct 29 04:27:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439652 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5AC7A53A8; Sun, 29 Oct 2023 04:27:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="f9Rmiofb" Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35D71AD; Sat, 28 Oct 2023 21:27:25 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 87BFD6607340; Sun, 29 Oct 2023 04:27:23 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553643; bh=4Ac1sglox319ZVY8QnDJ6GHvVijM8j/9ar97NnhyoHk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f9RmiofbNDogf+uRfHtS+0K95TOVfmqAfkEvxWAwnE/dhAKhpBy0KtWzjSQXD1w2u foLopAjd7AESsMpHFRXmsiPu2JZ4DcYMLZ+ituDeDEuH3kJKchUVaKIg/YtjwgxTH/ +2477CasfBUls5EIXnwVF5u20RDEVMS+kq8HZbYzTNqiVLjvXMSbhIk1DYpt4k7C9i Cjlbu6okC4jp5dRj0OGQpLvRZo8HQTx3yH+VHlIiIs8VypO8W10n1/vYNqne8iEVVL aboZIrf6qfiqONkhYZVqypqVm0R5IgG53qO9JW8iAzmG2yY6phGyaX8YVja9l3JzbD lcQpNxLbad60w== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 02/12] dt-bindings: net: starfive,jh7110-dwmac: Drop superfluous select Date: Sun, 29 Oct 2023 06:27:02 +0200 Message-ID: <20231029042712.520010-3-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The usage of 'select' doesn't seem to have any influence on how this binding schema is applied to the nodes, hence remove it. Signed-off-by: Cristian Ciocaltea --- .../devicetree/bindings/net/starfive,jh7110-dwmac.yaml | 9 --------- 1 file changed, 9 deletions(-) diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml index 5e7cfbbebce6..cc3e1c6fc135 100644 --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml @@ -11,15 +11,6 @@ maintainers: - Emil Renner Berthing - Samin Guo -select: - properties: - compatible: - contains: - enum: - - starfive,jh7110-dwmac - required: - - compatible - properties: compatible: items: From patchwork Sun Oct 29 04:27:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439653 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D4B02610D; Sun, 29 Oct 2023 04:27:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="eAfMhxoC" Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 693EACC; Sat, 28 Oct 2023 21:27:28 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2518D6607387; Sun, 29 Oct 2023 04:27:27 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553647; bh=aHc95vXeiD53iNm6WA6zZHpTycbLrCk2GHcf/JepTCc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eAfMhxoCssDhrVUBxoF7h+coBfWSFQ0b/VVZgHI4x6CLxCT5IRwovOcHYtFIz6Cmv pm9P2BJEjHQAwTHLiVX65xLCL/VjCzSCT7OcAYc8pZCj2jbn+b3VObJ9hHtQDNk+Cj B6Brz6BoeZbvAVlXMEBZ1BADNAwJ3+N8nAoaxqYqhTfCYpzzuANSoiPdVZKAbNupkq 1I+NIzIq5ulExgqjFkXd4nDD4rXbOvsdkyyBAB+kiy+Lb0jnT7K6oQ8Khqo5O8YOf7 Q2JS4LbhDORaQZWpM6hyLvJbQfyAUwZsKGWHfuh+jHWJcLvS7fMtq6zU3WEyYCwPO3 v/ltCiFkKDHpw== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 03/12] dt-bindings: net: starfive,jh7110-dwmac: Drop redundant reset description Date: Sun, 29 Oct 2023 06:27:03 +0200 Message-ID: <20231029042712.520010-4-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The reset description items are already provided by the referenced snps,dwmac.yaml schema, hence replace them with the necessary {min,max}Items. Signed-off-by: Cristian Ciocaltea --- .../devicetree/bindings/net/starfive,jh7110-dwmac.yaml | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml index cc3e1c6fc135..44e58755a5a2 100644 --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml @@ -46,9 +46,8 @@ properties: maxItems: 3 resets: - items: - - description: MAC Reset signal. - - description: AHB Reset signal. + minItems: 2 + maxItems: 2 reset-names: items: From patchwork Sun Oct 29 04:27:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439654 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64396610D; Sun, 29 Oct 2023 04:27:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Rvy3Fwnc" Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A739DE; Sat, 28 Oct 2023 21:27:31 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 3985F6607358; Sun, 29 Oct 2023 04:27:30 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553650; bh=HYnOv1bZbC6YWnZHMcSXUrZe4V8nd4RINTu6Y/8lH6M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rvy3FwncjJ0oYP16fFMcc0rwTE7emu3xfbn+KOMFppAeM12CquO1m2hAJsmpZZ5xo uABCC/QOlfTbZEpLs69GdVlgjDVNAdPr5fsqMEnZ4WEJA1RDgKUmh/2sUn7synHEyI gnI4SJn4KJ68xKJ2HDcvAhKZZ95+E30x+dDwtYb/mzrvG3qmz86ffVqSJD8S8Uemvq hp5zw5EqE4DaR9x3H1wbhAJnhTL1pYSvTbTidjnbh4c2hzaItikrwOhoopWxF4pUit deqSB81GPpBYorgcSmuKaniKxh3V4VTFmsmD+cGkcaNDfvmrGhCu1rCLraD2wW+PSZ tbwTY27t4JIJA== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 04/12] dt-bindings: net: starfive,jh7110-dwmac: Add JH7100 SoC compatible Date: Sun, 29 Oct 2023 06:27:04 +0200 Message-ID: <20231029042712.520010-5-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The Synopsys DesignWare MAC found on StarFive JH7100 SoC is quite similar to the newer JH7110, but it requires only two interrupts and a single reset line. Signed-off-by: Cristian Ciocaltea --- .../devicetree/bindings/net/snps,dwmac.yaml | 1 + .../bindings/net/starfive,jh7110-dwmac.yaml | 74 +++++++++++++------ 2 files changed, 54 insertions(+), 21 deletions(-) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index a4d7172ea701..c1380ff1c054 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -95,6 +95,7 @@ properties: - snps,dwmac-5.20 - snps,dwxgmac - snps,dwxgmac-2.10 + - starfive,jh7100-dwmac - starfive,jh7110-dwmac reg: diff --git a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml index 44e58755a5a2..70e35a3401f4 100644 --- a/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/starfive,jh7110-dwmac.yaml @@ -13,10 +13,14 @@ maintainers: properties: compatible: - items: - - enum: - - starfive,jh7110-dwmac - - const: snps,dwmac-5.20 + oneOf: + - items: + - const: starfive,jh7100-dwmac + - const: snps,dwmac + - items: + - enum: + - starfive,jh7110-dwmac + - const: snps,dwmac-5.20 reg: maxItems: 1 @@ -37,23 +41,6 @@ properties: - const: tx - const: gtx - interrupts: - minItems: 3 - maxItems: 3 - - interrupt-names: - minItems: 3 - maxItems: 3 - - resets: - minItems: 2 - maxItems: 2 - - reset-names: - items: - - const: stmmaceth - - const: ahb - starfive,tx-use-rgmii-clk: description: Tx clock is provided by external rgmii clock. @@ -84,6 +71,51 @@ required: allOf: - $ref: snps,dwmac.yaml# + - if: + properties: + compatible: + contains: + const: starfive,jh7100-dwmac + then: + properties: + interrupts: + minItems: 2 + maxItems: 2 + + interrupt-names: + minItems: 2 + maxItems: 2 + + resets: + maxItems: 1 + + reset-names: + const: ahb + + - if: + properties: + compatible: + contains: + const: starfive,jh7110-dwmac + then: + properties: + interrupts: + minItems: 3 + maxItems: 3 + + interrupt-names: + minItems: 3 + maxItems: 3 + + resets: + minItems: 2 + maxItems: 2 + + reset-names: + items: + - const: stmmaceth + - const: ahb + unevaluatedProperties: false examples: From patchwork Sun Oct 29 04:27:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439655 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8AF6863B5; Sun, 29 Oct 2023 04:27:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="Ply1YYfp" Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1EFA8CC; Sat, 28 Oct 2023 21:27:35 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id C16796607385; Sun, 29 Oct 2023 04:27:33 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553653; bh=rQEEY6dQh5x1XU/k0bkvaMxbU5A9Ka+KlBHywJ6TdZA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Ply1YYfpowSWtHZbXt0ZnAxukmin99chjF272ojHa0/L8dD4MgwT8yDf3dX5K0kH7 N3qheSFgI2+Na+BqE5ZPpFRj6DsYlmMgAw2ya2cl/vVMRYIBAgt0xG/J+EUyVSIyiq MHvqlJ79Hdy061OWUwAi2apEw/xePCHFtUJr6AgNclKW40CsbaR3bQKVG+x2MoF7Dy DsgtRJ84r+PAtfm/vxu2KtRmDXgEOEVOeY0kdp0HCH3WOAoNKlmFaGjtayHxc88GBW J4D3DP56T1NEpd9rfPxsYKjXw9qxOjXgEL9+Tnos5kBCwN/2V0M7glqryd5IscL55+ seI9heDfUmE8A== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 05/12] net: stmmac: dwmac-starfive: Add support for JH7100 SoC Date: Sun, 29 Oct 2023 06:27:05 +0200 Message-ID: <20231029042712.520010-6-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add a missing quirk to enable support for the StarFive JH7100 SoC. Additionally, for greater flexibility in operation, allow using the rgmii-rxid and rgmii-txid phy modes. Co-developed-by: Emil Renner Berthing Signed-off-by: Emil Renner Berthing Signed-off-by: Cristian Ciocaltea --- drivers/net/ethernet/stmicro/stmmac/Kconfig | 6 ++-- .../ethernet/stmicro/stmmac/dwmac-starfive.c | 32 ++++++++++++++++--- 2 files changed, 31 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig index a2b9e289aa36..c3c2c8360047 100644 --- a/drivers/net/ethernet/stmicro/stmmac/Kconfig +++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig @@ -165,9 +165,9 @@ config DWMAC_STARFIVE help Support for ethernet controllers on StarFive RISC-V SoCs - This selects the StarFive platform specific glue layer support for - the stmmac device driver. This driver is used for StarFive JH7110 - ethernet controller. + This selects the StarFive platform specific glue layer support + for the stmmac device driver. This driver is used for the + StarFive JH7100 and JH7110 ethernet controllers. config DWMAC_STI tristate "STi GMAC support" diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c index 5d630affb4d1..88c431edcea0 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-starfive.c @@ -15,13 +15,20 @@ #include "stmmac_platform.h" -#define STARFIVE_DWMAC_PHY_INFT_RGMII 0x1 -#define STARFIVE_DWMAC_PHY_INFT_RMII 0x4 -#define STARFIVE_DWMAC_PHY_INFT_FIELD 0x7U +#define STARFIVE_DWMAC_PHY_INFT_RGMII 0x1 +#define STARFIVE_DWMAC_PHY_INFT_RMII 0x4 +#define STARFIVE_DWMAC_PHY_INFT_FIELD 0x7U + +#define JH7100_SYSMAIN_REGISTER49_DLYCHAIN 0xc8 + +struct starfive_dwmac_data { + unsigned int gtxclk_dlychain; +}; struct starfive_dwmac { struct device *dev; struct clk *clk_tx; + const struct starfive_dwmac_data *data; }; static void starfive_dwmac_fix_mac_speed(void *priv, unsigned int speed, unsigned int mode) @@ -67,6 +74,8 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat) case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: mode = STARFIVE_DWMAC_PHY_INFT_RGMII; break; @@ -89,6 +98,14 @@ static int starfive_dwmac_set_mode(struct plat_stmmacenet_data *plat_dat) if (err) return dev_err_probe(dwmac->dev, err, "error setting phy mode\n"); + if (dwmac->data) { + err = regmap_write(regmap, JH7100_SYSMAIN_REGISTER49_DLYCHAIN, + dwmac->data->gtxclk_dlychain); + if (err) + return dev_err_probe(dwmac->dev, err, + "error selecting gtxclk delay chain\n"); + } + return 0; } @@ -114,6 +131,8 @@ static int starfive_dwmac_probe(struct platform_device *pdev) if (!dwmac) return -ENOMEM; + dwmac->data = device_get_match_data(&pdev->dev); + dwmac->clk_tx = devm_clk_get_enabled(&pdev->dev, "tx"); if (IS_ERR(dwmac->clk_tx)) return dev_err_probe(&pdev->dev, PTR_ERR(dwmac->clk_tx), @@ -144,8 +163,13 @@ static int starfive_dwmac_probe(struct platform_device *pdev) return stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); } +static const struct starfive_dwmac_data jh7100_data = { + .gtxclk_dlychain = 4 +}; + static const struct of_device_id starfive_dwmac_match[] = { - { .compatible = "starfive,jh7110-dwmac" }, + { .compatible = "starfive,jh7100-dwmac", .data = &jh7100_data }, + { .compatible = "starfive,jh7110-dwmac" }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, starfive_dwmac_match); From patchwork Sun Oct 29 04:27:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439656 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A28763B5; Sun, 29 Oct 2023 04:27:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="hO7JKhCf" Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B30C10B; Sat, 28 Oct 2023 21:27:38 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id B04776607388; Sun, 29 Oct 2023 04:27:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553656; bh=ws/tHftC6ooYXFFPrRkdjo583U1IPv/5VDVbOl/IleQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hO7JKhCfgez4T2EdD7WdvDzdPCr/74lUNLBlZiIJrZFAB1wawXL4bQeTCrsiL5oK2 Ef/Y6mxqH+0jfzTktFf4NAqixF5R8VcduHXBNa8HanlJ9Ee+qTcgwm0K7AhyHFFk50 xq2HZox5esJDX1w7WAVPy5G4wHEaeqO7RREU38MBxdSct1YdbILqymZ3Ckdg9ybW8e samRlBIopNGtUSJVE9F3pKDQ8BtRBwWKUUxN6dCOH45PlHOcB2wNbSBmoIRuixe4PD IKf2ch/qYB7zxV+dxuUfMYSyzOHObaGDiiCibF5A5UcNEVC7Gsr38czGoBvd9lfTRl QBaTfTewEIMOA== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 06/12] riscv: dts: starfive: jh7100: Add dma-noncoherent property Date: Sun, 29 Oct 2023 06:27:06 +0200 Message-ID: <20231029042712.520010-7-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The RISC-V architecture is by default coherent, since it selects ARCH_DMA_DEFAULT_COHERENT, but the StarFive JH7100 is not, hence provide the dma-noncoherent property to the soc DT node. Signed-off-by: Cristian Ciocaltea --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index e68cafe7545f..06bb157ce111 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -144,6 +144,7 @@ soc { interrupt-parent = <&plic>; #address-cells = <2>; #size-cells = <2>; + dma-noncoherent; ranges; clint: clint@2000000 { From patchwork Sun Oct 29 04:27:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439657 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D9CE263B5; Sun, 29 Oct 2023 04:27:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="iMRgCpF7" Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE6BC1B1; Sat, 28 Oct 2023 21:27:41 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 0F09A6607389; Sun, 29 Oct 2023 04:27:40 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553660; bh=fo6HEuz5sJOg727sDFQWk+LeppJl81dX/k1wa7xON88=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iMRgCpF7osoY3RVkpyYj8QNWRMXBGY/WK2XOrfNGUB2rnbJ5DORbiCiVbz75ThenZ 0gd0ey2nhUgbNaIDL6JN9zxl+EJq+zzj7jjUu0WM4ThiSSFg1RPmiRiF5QICSCVL1X 93/RCaEjL1WPlh/878jE0q31pz1EzjkdGJmLQgj1bMQWl7k7HGPhsFpD5AALGntsIx Qa6JS6V+No2AqxeS7ukWyOzsI/aE6w6854hukMPWAIwr6zHjPARTWusEixiOdUmaqB lIoWcsAbE4XmlWCWSe6W+gl6HIctXYNqD7C6ZtDcSBetdlOzHJpf0OWzbyflu+nlOp QWorF+FdL9wnw== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 07/12] riscv: dts: starfive: jh7100: Add ccache DT node Date: Sun, 29 Oct 2023 06:27:07 +0200 Message-ID: <20231029042712.520010-8-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide a DT node for the SiFive Composable Cache controller found on the StarFive JH7100 SoC. Note this is also used to support non-coherent DMA, via the sifive,cache-ops cache flushing operations. Signed-off-by: Cristian Ciocaltea --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 06bb157ce111..a8a5bb00b0d8 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -32,6 +32,7 @@ U74_0: cpu@0 { i-tlb-sets = <1>; i-tlb-size = <32>; mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", @@ -60,6 +61,7 @@ U74_1: cpu@1 { i-tlb-sets = <1>; i-tlb-size = <32>; mmu-type = "riscv,sv39"; + next-level-cache = <&ccache>; riscv,isa = "rv64imafdc"; riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", @@ -147,6 +149,18 @@ soc { dma-noncoherent; ranges; + ccache: cache-controller@2010000 { + compatible = "starfive,jh7100-ccache", "sifive,ccache0", "cache"; + reg = <0x0 0x2010000 0x0 0x1000>; + interrupts = <128>, <130>, <131>, <129>; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <2048>; + cache-size = <2097152>; + cache-unified; + sifive,cache-ops; + }; + clint: clint@2000000 { compatible = "starfive,jh7100-clint", "sifive,clint0"; reg = <0x0 0x2000000 0x0 0x10000>; From patchwork Sun Oct 29 04:27:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439658 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B62C26AD9; Sun, 29 Oct 2023 04:27:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="D5SzQHKM" Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34B2CD54; Sat, 28 Oct 2023 21:27:45 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id E02A8660738A; Sun, 29 Oct 2023 04:27:42 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553663; bh=xvv/tFFVtJp+rbBYtKgTLulVc7HdAalSk1KKPFjFju0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=D5SzQHKMiq3FRLM4nvNNRyGURYA4qwkqxN8c1LO85/vBDaS5eKZEaYgpC85M8rdsF BiP7aAnwvRU+Hdd9LkVsID0hco3/F7Ub/R7TGvAiW8jxFeviRk0xsMqgvIeKjTdIxf b15Pjhm8JHpsZe2xV0oLnhIEV6lxUJxzl5gTzyt9Mx4nD+J04epuaQ/6tg+20yRcd/ qHrjt1Rldo9Q+S31pa3H4FHLrviNVlJr0asKrsRHkU+MAmdj5jS4TWDR1JjQYnnFKi nPgn6c1IrSE23vp/S/A7lEN01u3A0aXWS364hzBX6UKky7Ca2lMdHTXnmeFlhdF46e JnCP10NVUj6TA== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com, Emil Renner Berthing Subject: [PATCH v2 08/12] riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards Date: Sun, 29 Oct 2023 06:27:08 +0200 Message-ID: <20231029042712.520010-9-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Emil Renner Berthing The StarFive JH7100 SoC has non-coherent device DMAs, but most drivers expect to be able to allocate coherent memory for DMA descriptors and such. However on the JH7100 DDR memory appears twice in the physical memory map, once cached and once uncached: 0x00_8000_0000 - 0x08_7fff_ffff : Off chip DDR memory, cached 0x10_0000_0000 - 0x17_ffff_ffff : Off chip DDR memory, uncached To use this uncached region we create a global DMA memory pool there and reserve the corresponding area in the cached region. However the uncached region is fully above the 32bit address limit, so add a dma-ranges map so the DMA address used for peripherals is still in the regular cached region below the limit. Link: https://github.com/starfive-tech/JH7100_Docs/blob/main/JH7100%20Data%20Sheet%20V01.01.04-EN%20(4-21-2021).pdf Signed-off-by: Emil Renner Berthing Signed-off-by: Cristian Ciocaltea --- .../boot/dts/starfive/jh7100-common.dtsi | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi index b93ce351a90f..504c73f01f14 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi @@ -39,6 +39,30 @@ led-ack { label = "ack"; }; }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + dma-reserved { + reg = <0x0 0xfa000000 0x0 0x1000000>; + no-map; + }; + + linux,dma { + compatible = "shared-dma-pool"; + reg = <0x10 0x7a000000 0x0 0x1000000>; + no-map; + linux,dma-default; + }; + }; + + soc { + dma-ranges = <0x00 0x80000000 0x00 0x80000000 0x00 0x7a000000>, + <0x00 0xfa000000 0x10 0x7a000000 0x00 0x01000000>, + <0x00 0xfb000000 0x00 0xfb000000 0x07 0x85000000>; + }; }; &gpio { From patchwork Sun Oct 29 04:27:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439659 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A8E6B63A4; Sun, 29 Oct 2023 04:27:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="lT8K7AO9" Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62528D6F; Sat, 28 Oct 2023 21:27:48 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 7B716660738C; Sun, 29 Oct 2023 04:27:46 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553666; bh=PHON8ijCTHS0JtMsAgOPwRF7WOfbum611F0K1TIiSeA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lT8K7AO9nvKHATkyZcUyBAN8PE8D+dp7VT6rXaazWSOoq+gzBHL15IsqfyPlZU/3Y BHc5LXSwaqdsyuU8Put466sAI4Ckam/d+2KkmLsYh3rpI928HXYnHdzkpp2fwnCGR3 HUX4RSEj9XvfBDLwSjULDrYUzq65W058DGFUEpY5sLN4juAjQVYH6mL7Y6h+7qosvX rEcgd9D7BxPFpfQ5I7QUzp4A47wrzPNZjuvE9quB8jrgoUbmMfYir0HmQhlTxFPHSD bOZhhJnUkdz46w1l4UBmyBpcY9CRkki+9ghroThq1ITBbmbVzVXhAWihbRArW/vvne AXjtMopS+12nw== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 09/12] riscv: dts: starfive: jh7100: Add sysmain and gmac DT nodes Date: Sun, 29 Oct 2023 06:27:09 +0200 Message-ID: <20231029042712.520010-10-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide the sysmain and gmac DT nodes supporting the DWMAC found on the StarFive JH7100 SoC. Signed-off-by: Cristian Ciocaltea --- arch/riscv/boot/dts/starfive/jh7100.dtsi | 36 ++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index a8a5bb00b0d8..e8228e96d350 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -179,6 +179,37 @@ plic: interrupt-controller@c000000 { riscv,ndev = <133>; }; + gmac: ethernet@10020000 { + compatible = "starfive,jh7100-dwmac", "snps,dwmac"; + reg = <0x0 0x10020000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>, + <&clkgen JH7100_CLK_GMAC_AHB>, + <&clkgen JH7100_CLK_GMAC_PTP_REF>, + <&clkgen JH7100_CLK_GMAC_TX_INV>, + <&clkgen JH7100_CLK_GMAC_GTX>; + clock-names = "stmmaceth", "pclk", "ptp_ref", "tx", "gtx"; + resets = <&rstgen JH7100_RSTN_GMAC_AHB>; + reset-names = "ahb"; + interrupts = <6>, <7>; + interrupt-names = "macirq", "eth_wake_irq"; + max-frame-size = <9000>; + snps,multicast-filter-bins = <32>; + snps,perfect-filter-entries = <128>; + starfive,syscon = <&sysmain 0x70 0>; + rx-fifo-depth = <32768>; + tx-fifo-depth = <16384>; + snps,axi-config = <&stmmac_axi_setup>; + snps,fixed-burst; + snps,force_thresh_dma_mode; + status = "disabled"; + + stmmac_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <256 128 64 32 0 0 0>; + }; + }; + clkgen: clock-controller@11800000 { compatible = "starfive,jh7100-clkgen"; reg = <0x0 0x11800000 0x0 0x10000>; @@ -193,6 +224,11 @@ rstgen: reset-controller@11840000 { #reset-cells = <1>; }; + sysmain: syscon@11850000 { + compatible = "starfive,jh7100-sysmain", "syscon"; + reg = <0x0 0x11850000 0x0 0x10000>; + }; + i2c0: i2c@118b0000 { compatible = "snps,designware-i2c"; reg = <0x0 0x118b0000 0x0 0x10000>; From patchwork Sun Oct 29 04:27:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439660 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 990D363A4; Sun, 29 Oct 2023 04:28:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="C8+/FjFH" Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E82210F1; Sat, 28 Oct 2023 21:27:51 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 56370660734A; Sun, 29 Oct 2023 04:27:49 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553669; bh=XPFhkQiEs+IGnpXs/VjChiy7INWlUvumm6K55Zul0rU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C8+/FjFH44VcIQoEE5TuvkJsBmdkwjJNiQYePXC8QCQKnlodiftL7rIknTTyFaq7S Cu0VbqfW/VBEVttKYtISUXNs0PBw0jHxh04y28J7NHmrnDTS3eRdvVJx/UODNaoDMj LpET5/HJOZjm/9hjPiyDrIz2iz/NBD/NneiJNgxOj5dBZHDS3NcBPosr5mN4pAc5uF +el73KBoQd7VP+auerViiI6gWlkmB5ErUZ5+YoRVzyBU0vbPdRCAUfhWPU+Iq7Nsx7 PWGcn3za+cEF/I7zaVfxWipeZ1FgAgerFSYVvPiab548Chgqh25B2iTZfLmGAHIZ0U VI7eDOEjRiUOA== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 10/12] riscv: dts: starfive: jh7100-common: Setup gmac pinmux Date: Sun, 29 Oct 2023 06:27:10 +0200 Message-ID: <20231029042712.520010-11-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add pinmux configuration for the DWMAC found on the JH7100 based boards. Signed-off-by: Cristian Ciocaltea --- .../boot/dts/starfive/jh7100-common.dtsi | 76 +++++++++++++++++++ 1 file changed, 76 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi index 504c73f01f14..b556e28069c4 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-common.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100-common.dtsi @@ -65,7 +65,83 @@ soc { }; }; +&gmac { + pinctrl-names = "default"; + pinctrl-0 = <&gmac_pins>; +}; + &gpio { + gmac_pins: gmac-0 { + gtxclk-pins { + pins = ; + bias-pull-up; + drive-strength = <35>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + miitxclk-pins { + pins = ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + tx-pins { + pins = , + , + , + , + , + , + , + , + ; + bias-pull-up; + drive-strength = <35>; + input-disable; + input-schmitt-disable; + slew-rate = <0>; + }; + rxclk-pins { + pins = ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-disable; + slew-rate = <6>; + }; + rxer-pins { + pins = ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-disable; + slew-rate = <0>; + }; + rx-pins { + pins = , + , + , + , + , + , + , + , + , + , + , + , + ; + bias-pull-up; + drive-strength = <14>; + input-enable; + input-schmitt-enable; + slew-rate = <0>; + }; + }; + i2c0_pins: i2c0-0 { i2c-pins { pinmux = X-Patchwork-Id: 13439661 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76BC06108; Sun, 29 Oct 2023 04:28:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="RBPXQz2G" Received: from madras.collabora.co.uk (madras.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e5ab]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80193171E; Sat, 28 Oct 2023 21:27:55 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 21E036607340; Sun, 29 Oct 2023 04:27:53 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553673; bh=AC+Ls3ytNnSvtsq4GFfS8dc+BFMLEfoCVREKO8KW7lU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=RBPXQz2GQGNqffqr51uwLxSOhlWrlkDw3YEFs3NbSf/nxgGJOX1fcRb6/DIhxT13w gNjyWhoEGy6ckmKdXx87Nqn6KdlEUhVgboS5Gy40r6ymqy5eYtuWeajVDgkqWHVOJg I9Eq0d8Wil0pk8/ZKzljUpTNKrufiMAVWlMujcY4jig24W4WVWezOr+TOm0ymEetan +wqbErUZw9mkSdnV7eMBlLLnQohAi+RhCwneJRwQUHnmc2A1YWDiyDF/Dz2EApxyW0 gE2lcXa3TgbG+ktNl+mvhxtR5uG5p7bAN6zMkjQ4hj6Sc9sw7PqWb6bzfFLk0r7nza Our6kpSl5wJ0Q== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 11/12] riscv: dts: starfive: visionfive-v1: Enable gmac and setup phy Date: Sun, 29 Oct 2023 06:27:11 +0200 Message-ID: <20231029042712.520010-12-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The StarFive VisionFive V1 SBC has a Motorcomm YT8521 PHY supporting RGMII-ID, but requires manual adjustment of the RX internal delay to work properly. The default RX delay provided by the driver is 1.95 ns, which proves to be too high. Applying a 50% reduction seems to mitigate the issue. Signed-off-by: Cristian Ciocaltea --- .../starfive/jh7100-starfive-visionfive-v1.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts index e82af72f1aaf..e043a27f7612 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts +++ b/arch/riscv/boot/dts/starfive/jh7100-starfive-visionfive-v1.dts @@ -18,3 +18,20 @@ gpio-restart { priority = <224>; }; }; + +&gmac { + phy-handle = <&phy>; + phy-mode = "rgmii-id"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy: ethernet-phy@0 { + reg = <0>; + rx-internal-delay-ps = <900>; + }; + }; +}; From patchwork Sun Oct 29 04:27:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cristian Ciocaltea X-Patchwork-Id: 13439662 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A03D9612B; Sun, 29 Oct 2023 04:28:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="X8xz1amO" Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 14AA31731; Sat, 28 Oct 2023 21:27:57 -0700 (PDT) Received: from localhost (unknown [188.24.143.101]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: cristicc) by madras.collabora.co.uk (Postfix) with ESMTPSA id 6FE22660738D; Sun, 29 Oct 2023 04:27:56 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1698553676; bh=IawNSWO2nYKHHHriF9PdoR+WZ4Zc1Xf7Yl52QH6o0QU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=X8xz1amOAUhfC1grOMQOkX6TCY90OvTcGTlMMTuyLOxvgt+jCk+tlII2+qv6mUbzp LjSmLIKhWkpXCnWBw1q08+h8l97XkKbjXckbJTOz8mgbVsRSnXlvxVRKhAhtS03Umc 4SLSJppYNagRnNboB8csnRcflTemiFfXMMRfLqPR8AdoUpL62eqp7y7o59elnkNZwc dhnnjp2a+C26/ld9tNKWr//lm0ZvAemc2RXj4BYDUgRd6CjBxlOlvuj7pO7o+L9XnH 4diRZg6XeYYrXsy9Hp/LySve42JZFWWaFvtfevlo/im6ikISE8WvoSVm0KSbBRkiMw j5f2rWmemIeiQ== From: Cristian Ciocaltea To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Emil Renner Berthing , Samin Guo , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Richard Cochran , Giuseppe Cavallaro Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, kernel@collabora.com Subject: [PATCH v2 12/12] [UNTESTED] riscv: dts: starfive: beaglev-starlight: Enable gmac Date: Sun, 29 Oct 2023 06:27:12 +0200 Message-ID: <20231029042712.520010-13-cristian.ciocaltea@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> References: <20231029042712.520010-1-cristian.ciocaltea@collabora.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The BeagleV Starlight SBC uses a Microchip KSZ9031RNXCA PHY supporting RGMII-ID. TODO: Verify if manual adjustment of the RX internal delay is needed. If yes, add the mdio & phy sub-nodes. Signed-off-by: Cristian Ciocaltea --- arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts index 7cda3a89020a..d3f4c99d98da 100644 --- a/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts +++ b/arch/riscv/boot/dts/starfive/jh7100-beaglev-starlight.dts @@ -11,3 +11,8 @@ / { model = "BeagleV Starlight Beta"; compatible = "beagle,beaglev-starlight-jh7100-r0", "starfive,jh7100"; }; + +&gmac { + phy-mode = "rgmii-id"; + status = "okay"; +};