From patchwork Tue Oct 31 18:21:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matyas, Daniel" X-Patchwork-Id: 13442347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80A9DC4332F for ; Tue, 31 Oct 2023 22:41:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234459AbjJaWlw (ORCPT ); Tue, 31 Oct 2023 18:41:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55992 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234390AbjJaWlv (ORCPT ); Tue, 31 Oct 2023 18:41:51 -0400 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DAC55102; Tue, 31 Oct 2023 15:41:44 -0700 (PDT) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 39VM9GK7004517; Tue, 31 Oct 2023 18:41:30 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3u38jds73p-961 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 18:41:29 -0400 (EDT) Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 39VIMJst034707 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 31 Oct 2023 14:22:19 -0400 Received: from ASHBCASHYB4.ad.analog.com (10.64.17.132) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Tue, 31 Oct 2023 14:22:18 -0400 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBCASHYB4.ad.analog.com (10.64.17.132) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Tue, 31 Oct 2023 14:22:18 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Tue, 31 Oct 2023 14:22:18 -0400 Received: from daniel-Precision-5530.ad.analog.com ([10.48.65.198]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 39VIM1d2022309; Tue, 31 Oct 2023 14:22:04 -0400 From: Daniel Matyas CC: Daniel Matyas , kernel test robot , Jean Delvare , Guenter Roeck , Jonathan Corbet , , , Subject: [PATCH v6 1/5] hwmon: max31827: Handle new properties from the devicetree Date: Tue, 31 Oct 2023 20:21:53 +0200 Message-ID: <20231031182158.124608-1-daniel.matyas@analog.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: 5tWyA4pnXRo8BOnWgBhteesIA0jJhQGh X-Proofpoint-ORIG-GUID: 5tWyA4pnXRo8BOnWgBhteesIA0jJhQGh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_09,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 impostorscore=0 bulkscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2310240000 definitions=main-2310310186 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Used fwnode to retrieve data from the devicetree in the init_client function. If the uint32 properties are not present, the default values are used for max31827 chip. Signed-off-by: Daniel Matyas --- v5 -> v6: Added back default value for adi,fault-q and adi,alarm-pol. Converting adi,fault-q from devicetree to register bits is cleaner. v4 -> v5: Removed comment from __bf_shf() and used ffs() instead of ffs64(). Added tabs where there was a need. Removed i2c_client from private structure. In init_client() passed device structure, because I only used that. Changed error message when the data in adi,fault-q is invalid. Fwnode is initialized in init_client(). v3 -> v4: Renamed property names to correspond with binding. v2 -> v3: Separated patch into 2. Fixed 'WARNING: Unexpected indentation.' Reported-by: kernel test robot v2: Added patch. Documentation/hwmon/max31827.rst | 48 ++++++++++++++++---- drivers/hwmon/max31827.c | 75 +++++++++++++++++++++++++++++--- 2 files changed, 108 insertions(+), 15 deletions(-) diff --git a/Documentation/hwmon/max31827.rst b/Documentation/hwmon/max31827.rst index 9a1055a007cf..a8bbfb85dd02 100644 --- a/Documentation/hwmon/max31827.rst +++ b/Documentation/hwmon/max31827.rst @@ -52,13 +52,21 @@ MAX31827 has low and over temperature alarms with an effective value and a hysteresis value: -40 and -30 degrees for under temperature alarm and +100 and +90 degrees for over temperature alarm. -The alarm can be configured in comparator and interrupt mode. Currently only -comparator mode is implemented. In Comparator mode, the OT/UT status bits have a -value of 1 when the temperature rises above the TH value or falls below TL, -which is also subject to the Fault Queue selection. OT status returns to 0 when -the temperature drops below the TH_HYST value or when shutdown mode is entered. -Similarly, UT status returns to 0 when the temperature rises above TL_HYST value -or when shutdown mode is entered. +The alarm can be configured in comparator and interrupt mode from the +devicetree. In Comparator mode, the OT/UT status bits have a value of 1 when the +temperature rises above the TH value or falls below TL, which is also subject to +the Fault Queue selection. OT status returns to 0 when the temperature drops +below the TH_HYST value or when shutdown mode is entered. Similarly, UT status +returns to 0 when the temperature rises above TL_HYST value or when shutdown +mode is entered. + +In interrupt mode exceeding TH also sets OT status to 1, which remains set until +a read operation is performed on the configuration/status register (max or min +attribute); at this point, it returns to 0. Once OT status is set to 1 from +exceeding TH and reset, it is set to 1 again only when the temperature drops +below TH_HYST. The output remains asserted until it is reset by a read. It is +set again if the temperature rises above TH, and so on. The same logic applies +to the operation of the UT status bit. Putting the MAX31827 into shutdown mode also resets the OT/UT status bits. Note that if the mode is changed while OT/UT status bits are set, an OT/UT status @@ -68,6 +76,18 @@ clear the status bits before changing the operating mode. The conversions can be manual with the one-shot functionality and automatic with a set frequency. When powered on, the chip measures temperatures with 1 conv/s. +The conversion rate can be modified with update_interval attribute of the chip. +Conversion/second = 1/update_interval. Thus, the available options according to +the data sheet are: + +- 64000 (ms) = 1 conv/64 sec +- 32000 (ms) = 1 conv/32 sec +- 16000 (ms) = 1 conv/16 sec +- 4000 (ms) = 1 conv/4 sec +- 1000 (ms) = 1 conv/sec (default) +- 250 (ms) = 4 conv/sec +- 125 (ms) = 8 conv/sec + Enabling the device when it is already enabled has the side effect of setting the conversion frequency to 1 conv/s. The conversion time varies depending on the resolution. The conversion time doubles with every bit of increased @@ -83,8 +103,18 @@ in the writing of alarm values too. For positive numbers the user-input value will always be rounded down to the nearest possible value, for negative numbers the user-input will always be rounded up to the nearest possible value. +Bus timeout resets the I2C-compatible interface when SCL is low for more than +30ms (nominal). + +Alarm polarity determines if the active state of the alarm is low or high. The +behavior for both settings is dependent on the Fault Queue setting. The ALARM +pin is an open-drain output and requires a pullup resistor to operate. + +The Fault Queue bits select how many consecutive temperature faults must occur +before overtemperature or undertemperature faults are indicated in the +corresponding status bits. + Notes ----- -Currently fault queue, alarm polarity and resolution cannot be modified. -PEC is not implemented either. +PEC and resolution are not implemented. diff --git a/drivers/hwmon/max31827.c b/drivers/hwmon/max31827.c index 614bbf5d25fa..bc201a8fcd5b 100644 --- a/drivers/hwmon/max31827.c +++ b/drivers/hwmon/max31827.c @@ -12,6 +12,7 @@ #include #include #include +#include #define MAX31827_T_REG 0x0 #define MAX31827_CONFIGURATION_REG 0x2 @@ -22,9 +23,17 @@ #define MAX31827_CONFIGURATION_1SHOT_MASK BIT(0) #define MAX31827_CONFIGURATION_CNV_RATE_MASK GENMASK(3, 1) +#define MAX31827_CONFIGURATION_TIMEOUT_MASK BIT(5) +#define MAX31827_CONFIGURATION_RESOLUTION_MASK GENMASK(7, 6) +#define MAX31827_CONFIGURATION_ALRM_POL_MASK BIT(8) +#define MAX31827_CONFIGURATION_COMP_INT_MASK BIT(9) +#define MAX31827_CONFIGURATION_FLT_Q_MASK GENMASK(11, 10) #define MAX31827_CONFIGURATION_U_TEMP_STAT_MASK BIT(14) #define MAX31827_CONFIGURATION_O_TEMP_STAT_MASK BIT(15) +#define MAX31827_ALRM_POL_LOW 0x0 +#define MAX31827_FLT_Q_1 0x0 + #define MAX31827_12_BIT_CNV_TIME 140 #define MAX31827_16_BIT_TO_M_DGR(x) (sign_extend32(x, 15) * 1000 / 16) @@ -361,14 +370,68 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type, return -EOPNOTSUPP; } -static int max31827_init_client(struct max31827_state *st) +static int max31827_init_client(struct max31827_state *st, + struct device *dev) { + struct fwnode_handle *fwnode; + unsigned int res = 0; + u32 data, lsb_idx; + bool prop; + int ret; + + fwnode = dev_fwnode(dev); + st->enable = true; + res |= MAX31827_DEVICE_ENABLE(1); + + res |= MAX31827_CONFIGURATION_RESOLUTION_MASK; + + prop = fwnode_property_read_bool(fwnode, "adi,comp-int"); + res |= FIELD_PREP(MAX31827_CONFIGURATION_COMP_INT_MASK, prop); + + prop = fwnode_property_read_bool(fwnode, "adi,timeout-enable"); + res |= FIELD_PREP(MAX31827_CONFIGURATION_TIMEOUT_MASK, !prop); + + if (fwnode_property_present(fwnode, "adi,alarm-pol")) { + ret = fwnode_property_read_u32(fwnode, "adi,alarm-pol", &data); + if (ret) + return ret; + + res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK, !!data); + } else { + /* + * Set default value. + */ + res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK, + MAX31827_ALRM_POL_LOW); + } + + if (fwnode_property_present(fwnode, "adi,fault-q")) { + ret = fwnode_property_read_u32(fwnode, "adi,fault-q", &data); + if (ret) + return ret; + + /* + * Convert the desired fault queue into register bits. + */ + if (data != 0) + lsb_idx = __ffs(data); + + if (hweight32(data) != 1 || lsb_idx > 4) { + dev_err(dev, "Invalid data in adi,fault-q\n"); + return -EINVAL; + } + + res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK, lsb_idx); + } else { + /* + * Set default value. + */ + res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK, + MAX31827_FLT_Q_1); + } - return regmap_update_bits(st->regmap, MAX31827_CONFIGURATION_REG, - MAX31827_CONFIGURATION_1SHOT_MASK | - MAX31827_CONFIGURATION_CNV_RATE_MASK, - MAX31827_DEVICE_ENABLE(1)); + return regmap_write(st->regmap, MAX31827_CONFIGURATION_REG, res); } static const struct hwmon_channel_info *max31827_info[] = { @@ -412,7 +475,7 @@ static int max31827_probe(struct i2c_client *client) return dev_err_probe(dev, PTR_ERR(st->regmap), "Failed to allocate regmap.\n"); - err = max31827_init_client(st); + err = max31827_init_client(st, dev); if (err) return err; From patchwork Tue Oct 31 18:21:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matyas, Daniel" X-Patchwork-Id: 13442345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34D39C4167D for ; Tue, 31 Oct 2023 22:40:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232345AbjJaWk6 (ORCPT ); Tue, 31 Oct 2023 18:40:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231778AbjJaWk5 (ORCPT ); Tue, 31 Oct 2023 18:40:57 -0400 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 03288F9; Tue, 31 Oct 2023 15:40:55 -0700 (PDT) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 39VM9GJJ004517; Tue, 31 Oct 2023 18:40:40 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3u38jds73p-929 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 18:40:40 -0400 (EDT) Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 39VIMI0L034703 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 31 Oct 2023 14:22:18 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Tue, 31 Oct 2023 14:22:17 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Tue, 31 Oct 2023 14:22:17 -0400 Received: from daniel-Precision-5530.ad.analog.com ([10.48.65.198]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 39VIM1d3022309; Tue, 31 Oct 2023 14:22:10 -0400 From: Daniel Matyas CC: Daniel Matyas , Jean Delvare , Guenter Roeck , Jonathan Corbet , , , Subject: [PATCH v6 2/5] hwmon: max31827: Add support for max31828 and max31829 Date: Tue, 31 Oct 2023 20:21:54 +0200 Message-ID: <20231031182158.124608-2-daniel.matyas@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231031182158.124608-1-daniel.matyas@analog.com> References: <20231031182158.124608-1-daniel.matyas@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: aBKzbCIm_ns0zUnHY6Uo3oFg1iP81WHu X-Proofpoint-ORIG-GUID: aBKzbCIm_ns0zUnHY6Uo3oFg1iP81WHu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_09,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 impostorscore=0 bulkscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2310240000 definitions=main-2310310186 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Created of_match_table and id_table entries for max31828 and max31829. When adi,flt-q and/or adi,alrm-pol are not mentioned, the default configuration is loaded based on the type of the chip. Signed-off-by: Daniel Matyas --- v5 -> v6: Selecting default value for adi,fault-q and adi,alarm-pol with switch() statement. Used device_get_match_data() to get data more generally. Now max31827 = 1 in enum. v4 -> v5: Passed i2c_client to init_client(), because I needed it to retrieve device id. Used a simple if to load default configuration. No more switch. v3 -> v4: No change. v3: Added patch. drivers/hwmon/max31827.c | 64 +++++++++++++++++++++++++++++++++------- 1 file changed, 53 insertions(+), 11 deletions(-) diff --git a/drivers/hwmon/max31827.c b/drivers/hwmon/max31827.c index bc201a8fcd5b..738ce5ca6e39 100644 --- a/drivers/hwmon/max31827.c +++ b/drivers/hwmon/max31827.c @@ -32,7 +32,9 @@ #define MAX31827_CONFIGURATION_O_TEMP_STAT_MASK BIT(15) #define MAX31827_ALRM_POL_LOW 0x0 +#define MAX31827_ALRM_POL_HIGH 0x1 #define MAX31827_FLT_Q_1 0x0 +#define MAX31827_FLT_Q_4 0x2 #define MAX31827_12_BIT_CNV_TIME 140 @@ -40,6 +42,8 @@ #define MAX31827_M_DGR_TO_16_BIT(x) (((x) << 4) / 1000) #define MAX31827_DEVICE_ENABLE(x) ((x) ? 0xA : 0x0) +enum chips { max31827 = 1, max31828, max31829 }; + enum max31827_cnv { MAX31827_CNV_1_DIV_64_HZ = 1, MAX31827_CNV_1_DIV_32_HZ, @@ -370,12 +374,21 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type, return -EOPNOTSUPP; } +static const struct i2c_device_id max31827_i2c_ids[] = { + { "max31827", max31827 }, + { "max31828", max31828 }, + { "max31829", max31829 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, max31827_i2c_ids); + static int max31827_init_client(struct max31827_state *st, struct device *dev) { struct fwnode_handle *fwnode; unsigned int res = 0; u32 data, lsb_idx; + enum chips type; bool prop; int ret; @@ -392,6 +405,8 @@ static int max31827_init_client(struct max31827_state *st, prop = fwnode_property_read_bool(fwnode, "adi,timeout-enable"); res |= FIELD_PREP(MAX31827_CONFIGURATION_TIMEOUT_MASK, !prop); + type = (enum chips)(uintptr_t)device_get_match_data(dev); + if (fwnode_property_present(fwnode, "adi,alarm-pol")) { ret = fwnode_property_read_u32(fwnode, "adi,alarm-pol", &data); if (ret) @@ -402,8 +417,19 @@ static int max31827_init_client(struct max31827_state *st, /* * Set default value. */ - res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK, - MAX31827_ALRM_POL_LOW); + switch (type) { + case max31827: + case max31828: + res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK, + MAX31827_ALRM_POL_LOW); + break; + case max31829: + res |= FIELD_PREP(MAX31827_CONFIGURATION_ALRM_POL_MASK, + MAX31827_ALRM_POL_HIGH); + break; + default: + return -EOPNOTSUPP; + } } if (fwnode_property_present(fwnode, "adi,fault-q")) { @@ -427,8 +453,19 @@ static int max31827_init_client(struct max31827_state *st, /* * Set default value. */ - res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK, - MAX31827_FLT_Q_1); + switch (type) { + case max31827: + res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK, + MAX31827_FLT_Q_1); + break; + case max31828: + case max31829: + res |= FIELD_PREP(MAX31827_CONFIGURATION_FLT_Q_MASK, + MAX31827_FLT_Q_4); + break; + default: + return -EOPNOTSUPP; + } } return regmap_write(st->regmap, MAX31827_CONFIGURATION_REG, res); @@ -486,14 +523,19 @@ static int max31827_probe(struct i2c_client *client) return PTR_ERR_OR_ZERO(hwmon_dev); } -static const struct i2c_device_id max31827_i2c_ids[] = { - { "max31827", 0 }, - { } -}; -MODULE_DEVICE_TABLE(i2c, max31827_i2c_ids); - static const struct of_device_id max31827_of_match[] = { - { .compatible = "adi,max31827" }, + { + .compatible = "adi,max31827", + .data = (void *)max31827 + }, + { + .compatible = "adi,max31828", + .data = (void *)max31828 + }, + { + .compatible = "adi,max31829", + .data = (void *)max31829 + }, { } }; MODULE_DEVICE_TABLE(of, max31827_of_match); From patchwork Tue Oct 31 18:21:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matyas, Daniel" X-Patchwork-Id: 13442344 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 440F8C4167B for ; Tue, 31 Oct 2023 22:40:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232168AbjJaWky (ORCPT ); Tue, 31 Oct 2023 18:40:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52918 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231778AbjJaWkx (ORCPT ); Tue, 31 Oct 2023 18:40:53 -0400 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A559BF9; Tue, 31 Oct 2023 15:40:51 -0700 (PDT) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 39VM9GJF004517; Tue, 31 Oct 2023 18:40:37 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3u38jds73p-926 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 18:40:37 -0400 (EDT) Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 39VIMMlL034716 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 31 Oct 2023 14:22:22 -0400 Received: from ASHBMBX8.ad.analog.com (10.64.17.5) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Tue, 31 Oct 2023 14:22:21 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Tue, 31 Oct 2023 14:22:21 -0400 Received: from daniel-Precision-5530.ad.analog.com ([10.48.65.198]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 39VIM1d4022309; Tue, 31 Oct 2023 14:22:12 -0400 From: Daniel Matyas CC: Daniel Matyas , Jean Delvare , Guenter Roeck , Jonathan Corbet , , , Subject: [PATCH v6 3/5] hwmon: max31827: Update bits with shutdown_write() Date: Tue, 31 Oct 2023 20:21:55 +0200 Message-ID: <20231031182158.124608-3-daniel.matyas@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231031182158.124608-1-daniel.matyas@analog.com> References: <20231031182158.124608-1-daniel.matyas@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: Mr4oP-X9d1mWCpAQO4F1Kvc28a4ezKQX X-Proofpoint-ORIG-GUID: Mr4oP-X9d1mWCpAQO4F1Kvc28a4ezKQX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_09,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 impostorscore=0 bulkscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2310240000 definitions=main-2310310186 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Added 'mask' parameter to the shutdown_write() function. Now it can either write or update bits, depending on the value of mask. This is needed, because for alarms a write is necessary, but for resolution only the resolution bits should be updated. Signed-off-by: Daniel Matyas --- v4 -> v6: No change. v4: Added patch. drivers/hwmon/max31827.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/hwmon/max31827.c b/drivers/hwmon/max31827.c index 738ce5ca6e39..41e4f716605a 100644 --- a/drivers/hwmon/max31827.c +++ b/drivers/hwmon/max31827.c @@ -80,7 +80,7 @@ static const struct regmap_config max31827_regmap = { }; static int shutdown_write(struct max31827_state *st, unsigned int reg, - unsigned int val) + unsigned int mask, unsigned int val) { unsigned int cfg; unsigned int cnv_rate; @@ -97,7 +97,10 @@ static int shutdown_write(struct max31827_state *st, unsigned int reg, mutex_lock(&st->lock); if (!st->enable) { - ret = regmap_write(st->regmap, reg, val); + if (!mask) + ret = regmap_write(st->regmap, reg, val); + else + ret = regmap_update_bits(st->regmap, reg, mask, val); goto unlock; } @@ -112,7 +115,11 @@ static int shutdown_write(struct max31827_state *st, unsigned int reg, if (ret) goto unlock; - ret = regmap_write(st->regmap, reg, val); + if (!mask) + ret = regmap_write(st->regmap, reg, val); + else + ret = regmap_update_bits(st->regmap, reg, mask, val); + if (ret) goto unlock; @@ -130,7 +137,7 @@ static int write_alarm_val(struct max31827_state *st, unsigned int reg, { val = MAX31827_M_DGR_TO_16_BIT(val); - return shutdown_write(st, reg, val); + return shutdown_write(st, reg, 0, val); } static umode_t max31827_is_visible(const void *state, From patchwork Tue Oct 31 18:21:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matyas, Daniel" X-Patchwork-Id: 13442343 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B0E9C4332F for ; Tue, 31 Oct 2023 22:40:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231905AbjJaWky (ORCPT ); Tue, 31 Oct 2023 18:40:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52890 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231904AbjJaWkx (ORCPT ); Tue, 31 Oct 2023 18:40:53 -0400 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E91AD107; Tue, 31 Oct 2023 15:40:50 -0700 (PDT) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 39VM9GJE004517; Tue, 31 Oct 2023 18:40:36 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3u38jds73p-925 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 18:40:36 -0400 (EDT) Received: from ASHBMBX9.ad.analog.com (ASHBMBX9.ad.analog.com [10.64.17.10]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 39VIMLDO034712 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 31 Oct 2023 14:22:21 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBMBX9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Tue, 31 Oct 2023 14:22:20 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Tue, 31 Oct 2023 14:22:20 -0400 Received: from daniel-Precision-5530.ad.analog.com ([10.48.65.198]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 39VIM1d5022309; Tue, 31 Oct 2023 14:22:14 -0400 From: Daniel Matyas CC: Daniel Matyas , Jean Delvare , Guenter Roeck , Jonathan Corbet , , , Subject: [PATCH v6 4/5] hwmon: max31827: Return closest value in update_interval Date: Tue, 31 Oct 2023 20:21:56 +0200 Message-ID: <20231031182158.124608-4-daniel.matyas@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231031182158.124608-1-daniel.matyas@analog.com> References: <20231031182158.124608-1-daniel.matyas@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: _fSsahaF-pzgaOHeyfgC5Qpb6ZYBvaiw X-Proofpoint-ORIG-GUID: _fSsahaF-pzgaOHeyfgC5Qpb6ZYBvaiw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_09,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=924 lowpriorityscore=0 suspectscore=0 impostorscore=0 bulkscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2310240000 definitions=main-2310310186 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org When user writes a value to update_interval which does not match the possible values, instead of returning invalid error, return the closest value. Signed-off-by: Daniel Matyas --- v6: Added patch. drivers/hwmon/max31827.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/hwmon/max31827.c b/drivers/hwmon/max31827.c index 41e4f716605a..13ebe691475a 100644 --- a/drivers/hwmon/max31827.c +++ b/drivers/hwmon/max31827.c @@ -360,9 +360,8 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type, val < max31827_conversions[res]) res++; - if (res == ARRAY_SIZE(max31827_conversions) || - val != max31827_conversions[res]) - return -EINVAL; + if (res == ARRAY_SIZE(max31827_conversions)) + res = ARRAY_SIZE(max31827_conversions) - 1; res = FIELD_PREP(MAX31827_CONFIGURATION_CNV_RATE_MASK, res); From patchwork Tue Oct 31 18:21:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matyas, Daniel" X-Patchwork-Id: 13442346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EA00EC4332F for ; Tue, 31 Oct 2023 22:41:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231904AbjJaWlJ (ORCPT ); Tue, 31 Oct 2023 18:41:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33248 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344871AbjJaWlH (ORCPT ); Tue, 31 Oct 2023 18:41:07 -0400 Received: from mx0a-00128a01.pphosted.com (mx0a-00128a01.pphosted.com [148.163.135.77]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E6329110; Tue, 31 Oct 2023 15:41:02 -0700 (PDT) Received: from pps.filterd (m0167088.ppops.net [127.0.0.1]) by mx0a-00128a01.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 39VM9GJP004517; Tue, 31 Oct 2023 18:40:47 -0400 Received: from nwd2mta3.analog.com ([137.71.173.56]) by mx0a-00128a01.pphosted.com (PPS) with ESMTPS id 3u38jds73p-934 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 18:40:47 -0400 (EDT) Received: from ASHBMBX8.ad.analog.com (ASHBMBX8.ad.analog.com [10.64.17.5]) by nwd2mta3.analog.com (8.14.7/8.14.7) with ESMTP id 39VIMP1L034724 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 31 Oct 2023 14:22:25 -0400 Received: from ASHBMBX9.ad.analog.com (10.64.17.10) by ASHBMBX8.ad.analog.com (10.64.17.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.14; Tue, 31 Oct 2023 14:22:24 -0400 Received: from zeus.spd.analog.com (10.66.68.11) by ashbmbx9.ad.analog.com (10.64.17.10) with Microsoft SMTP Server id 15.2.986.14 via Frontend Transport; Tue, 31 Oct 2023 14:22:24 -0400 Received: from daniel-Precision-5530.ad.analog.com ([10.48.65.198]) by zeus.spd.analog.com (8.15.1/8.15.1) with ESMTP id 39VIM1d6022309; Tue, 31 Oct 2023 14:22:16 -0400 From: Daniel Matyas CC: Daniel Matyas , Jean Delvare , Guenter Roeck , Jonathan Corbet , , , Subject: [PATCH v6 5/5] hwmon: max31827: Add custom attribute for resolution Date: Tue, 31 Oct 2023 20:21:57 +0200 Message-ID: <20231031182158.124608-5-daniel.matyas@analog.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231031182158.124608-1-daniel.matyas@analog.com> References: <20231031182158.124608-1-daniel.matyas@analog.com> MIME-Version: 1.0 X-ADIRuleOP-NewSCL: Rule Triggered X-Proofpoint-GUID: 2Jo_6VfOCUs_KY3Pc8O37ztpyfqC4ovE X-Proofpoint-ORIG-GUID: 2Jo_6VfOCUs_KY3Pc8O37ztpyfqC4ovE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-31_09,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 lowpriorityscore=0 suspectscore=0 impostorscore=0 bulkscore=0 spamscore=0 phishscore=0 malwarescore=0 clxscore=1015 mlxscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2310240000 definitions=main-2310310186 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-hwmon@vger.kernel.org Added custom channel-specific (temp1) attribute for resolution. The wait time for a conversion in one-shot mode (enable = 0) depends on the resolution. When resolution is 12-bit, the conversion time is 140ms, but the minimum update_interval is 125ms. Handled this problem by waiting an additional 15ms (125ms + 15ms = 140ms). Added 'mask' parameter to the shutdown_write() function. Now it can either write or update bits, depending on the value of mask. This is needed, because for alarms a write is necessary, but for resolution only the resolution bits should be updated. Signed-off-by: Daniel Matyas --- v5 -> v6: Resolution selects value closest to input value. v3 -> v5: No change. v2 -> v3: Fixed indentation problems in .rst. v1 -> v2: Changed subject. Separated patch. Removed timeout sysfs attribute and kept only resolution. Added temp1_ prefix to resolution. Changed value of resolution from bits to milli-degrees Celsius. Added appropriate documentation. Documentation/hwmon/max31827.rst | 29 ++++++-- drivers/hwmon/max31827.c | 122 ++++++++++++++++++++++++++++--- 2 files changed, 134 insertions(+), 17 deletions(-) diff --git a/Documentation/hwmon/max31827.rst b/Documentation/hwmon/max31827.rst index a8bbfb85dd02..44ab9dc064cb 100644 --- a/Documentation/hwmon/max31827.rst +++ b/Documentation/hwmon/max31827.rst @@ -90,11 +90,28 @@ the data sheet are: Enabling the device when it is already enabled has the side effect of setting the conversion frequency to 1 conv/s. The conversion time varies depending on -the resolution. The conversion time doubles with every bit of increased -resolution. For 10 bit resolution 35ms are needed, while for 12 bit resolution -(default) 140ms. When chip is in shutdown mode and a read operation is -requested, one-shot is triggered, the device waits for 140 (conversion time) ms, -and only after that is the temperature value register read. +the resolution. + +The conversion time doubles with every bit of increased resolution. The +available resolutions are: + +- 8 bit -> 8.75 ms conversion time +- 9 bit -> 17.5 ms conversion time +- 10 bit -> 35 ms conversion time +- 12 bit (default) -> 140 ms conversion time + +There is a temp1_resolution attribute which indicates the unit change in the +input temperature in milli-degrees C. + +- 1000 mC -> 8 bit +- 500 mC -> 9 bit +- 250 mC -> 10 bit +- 62 mC -> 12 bit (default) - actually this is 62.5, but the fil returns 62 + +When chip is in shutdown mode and a read operation is requested, one-shot is +triggered, the device waits for ms, and only after that is +the temperature value register read. Note that the conversion times are rounded +up to the nearest possible integer. The LSB of the temperature values is 0.0625 degrees Celsius, but the values of the temperatures are displayed in milli-degrees. This means, that some data is @@ -117,4 +134,4 @@ corresponding status bits. Notes ----- -PEC and resolution are not implemented. +PEC is not implemented. diff --git a/drivers/hwmon/max31827.c b/drivers/hwmon/max31827.c index 13ebe691475a..ea10b4a0fcab 100644 --- a/drivers/hwmon/max31827.c +++ b/drivers/hwmon/max31827.c @@ -36,6 +36,9 @@ #define MAX31827_FLT_Q_1 0x0 #define MAX31827_FLT_Q_4 0x2 +#define MAX31827_8_BIT_CNV_TIME 9 +#define MAX31827_9_BIT_CNV_TIME 18 +#define MAX31827_10_BIT_CNV_TIME 35 #define MAX31827_12_BIT_CNV_TIME 140 #define MAX31827_16_BIT_TO_M_DGR(x) (sign_extend32(x, 15) * 1000 / 16) @@ -64,6 +67,27 @@ static const u16 max31827_conversions[] = { [MAX31827_CNV_8_HZ] = 125, }; +enum max31827_resolution { + MAX31827_RES_8_BIT = 0, + MAX31827_RES_9_BIT, + MAX31827_RES_10_BIT, + MAX31827_RES_12_BIT, +}; + +static const u16 max31827_resolutions[] = { + [MAX31827_RES_8_BIT] = 1000, + [MAX31827_RES_9_BIT] = 500, + [MAX31827_RES_10_BIT] = 250, + [MAX31827_RES_12_BIT] = 62, +}; + +static const u16 max31827_conv_times[] = { + [MAX31827_RES_8_BIT] = MAX31827_8_BIT_CNV_TIME, + [MAX31827_RES_9_BIT] = MAX31827_9_BIT_CNV_TIME, + [MAX31827_RES_10_BIT] = MAX31827_10_BIT_CNV_TIME, + [MAX31827_RES_12_BIT] = MAX31827_12_BIT_CNV_TIME, +}; + struct max31827_state { /* * Prevent simultaneous access to the i2c client. @@ -71,6 +95,8 @@ struct max31827_state { struct mutex lock; struct regmap *regmap; bool enable; + unsigned int resolution; + unsigned int update_interval; }; static const struct regmap_config max31827_regmap = { @@ -87,9 +113,9 @@ static int shutdown_write(struct max31827_state *st, unsigned int reg, int ret; /* - * Before the Temperature Threshold Alarm and Alarm Hysteresis Threshold - * register values are changed over I2C, the part must be in shutdown - * mode. + * Before the Temperature Threshold Alarm, Alarm Hysteresis Threshold + * and Resolution bits from Configuration register are changed over I2C, + * the part must be in shutdown mode. * * Mutex is used to ensure, that some other process doesn't change the * configuration register. @@ -207,9 +233,18 @@ static int max31827_read(struct device *dev, enum hwmon_sensor_types type, mutex_unlock(&st->lock); return ret; } - - msleep(MAX31827_12_BIT_CNV_TIME); + msleep(max31827_conv_times[st->resolution]); } + + /* + * For 12-bit resolution the conversion time is 140 ms, + * thus an additional 15 ms is needed to complete the + * conversion: 125 ms + 15 ms = 140 ms + */ + if (max31827_resolutions[st->resolution] == 12 && + st->update_interval == 125) + usleep_range(15000, 20000); + ret = regmap_read(st->regmap, MAX31827_T_REG, &uval); mutex_unlock(&st->lock); @@ -366,10 +401,14 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type, res = FIELD_PREP(MAX31827_CONFIGURATION_CNV_RATE_MASK, res); - return regmap_update_bits(st->regmap, - MAX31827_CONFIGURATION_REG, - MAX31827_CONFIGURATION_CNV_RATE_MASK, - res); + ret = regmap_update_bits(st->regmap, + MAX31827_CONFIGURATION_REG, + MAX31827_CONFIGURATION_CNV_RATE_MASK, + res); + if (ret) + return ret; + + st->update_interval = val; } break; @@ -377,9 +416,70 @@ static int max31827_write(struct device *dev, enum hwmon_sensor_types type, return -EOPNOTSUPP; } - return -EOPNOTSUPP; + return 0; +} + +static ssize_t temp1_resolution_show(struct device *dev, + struct device_attribute *devattr, + char *buf) +{ + struct max31827_state *st = dev_get_drvdata(dev); + unsigned int val; + int ret; + + ret = regmap_read(st->regmap, MAX31827_CONFIGURATION_REG, &val); + if (ret) + return ret; + + val = FIELD_GET(MAX31827_CONFIGURATION_RESOLUTION_MASK, val); + + return scnprintf(buf, PAGE_SIZE, "%u\n", max31827_resolutions[val]); +} + +static ssize_t temp1_resolution_store(struct device *dev, + struct device_attribute *devattr, + const char *buf, size_t count) +{ + struct max31827_state *st = dev_get_drvdata(dev); + unsigned int idx = 0; + unsigned int val; + int ret; + + ret = kstrtouint(buf, 10, &val); + if (ret) + return ret; + + /* + * Convert the desired resolution into register + * bits. idx is already initialized with 0. + * + * This was inspired by lm73 driver. + */ + while (idx < ARRAY_SIZE(max31827_resolutions) && + val < max31827_resolutions[idx]) + idx++; + + if (idx == ARRAY_SIZE(max31827_resolutions)) + idx = ARRAY_SIZE(max31827_resolutions) - 1; + + st->resolution = idx; + + ret = shutdown_write(st, MAX31827_CONFIGURATION_REG, + MAX31827_CONFIGURATION_RESOLUTION_MASK, + FIELD_PREP(MAX31827_CONFIGURATION_RESOLUTION_MASK, + idx)); + + return ret ? ret : count; } +static DEVICE_ATTR_RW(temp1_resolution); + +static struct attribute *max31827_attrs[] = { + &dev_attr_temp1_resolution.attr, + NULL +}; +ATTRIBUTE_GROUPS(max31827); + static const struct i2c_device_id max31827_i2c_ids[] = { { "max31827", max31827 }, { "max31828", max31828 }, @@ -524,7 +624,7 @@ static int max31827_probe(struct i2c_client *client) hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, st, &max31827_chip_info, - NULL); + max31827_groups); return PTR_ERR_OR_ZERO(hwmon_dev); }