From patchwork Thu Nov 2 00:24:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E20E3C4332F for ; Thu, 2 Nov 2023 00:27:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLXU-0000f7-4J; Wed, 01 Nov 2023 20:26:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLXF-0000Z9-T2 for qemu-devel@nongnu.org; Wed, 01 Nov 2023 20:26:10 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLXE-0008Lv-D1 for qemu-devel@nongnu.org; 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Thu, 2 Nov 2023 00:26:01 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id E68F7C1290F; Thu, 2 Nov 2023 00:25:44 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 01/33] target/alpha: Tidy up alpha_cpu_class_by_name() Date: Thu, 2 Nov 2023 10:24:28 +1000 Message-ID: <20231102002500.1750692-2-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; 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The default CPU model is used when no matching CPU model is found. The conditions to fall back to the default CPU model can be combined so that the code looks a bit simplified. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gavin Shan --- target/alpha/cpu.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 51b7d8d1bf..c7ae4d6a41 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -142,13 +142,10 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(ALPHA_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (oc != NULL && object_class_is_abstract(oc)) { - oc = NULL; - } /* TODO: remove match everything nonsense */ - /* Default to ev67; no reason not to emulate insns by default. */ - if (!oc) { + if (!oc || object_class_is_abstract(oc)) { + /* Default to ev67, no reason not to emulate insns by default */ oc = object_class_by_name(ALPHA_CPU_TYPE_NAME("ev67")); } From patchwork Thu Nov 2 00:24:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443177 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5B8FBC4167D for ; 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Thu, 2 Nov 2023 00:26:01 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 02/33] hw/cpu: Call object_class_is_abstract() once in cpu_class_by_name() Date: Thu, 2 Nov 2023 10:24:29 +1000 Message-ID: <20231102002500.1750692-3-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé Let CPUClass::class_by_name() handlers to return abstract classes, and filter them once in the public cpu_class_by_name() method. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gavin Shan --- hw/core/cpu-common.c | 8 +++++++- include/hw/core/cpu.h | 7 ++++--- target/alpha/cpu.c | 2 +- target/arm/cpu.c | 3 +-- target/avr/cpu.c | 3 +-- target/cris/cpu.c | 3 +-- target/hexagon/cpu.c | 3 +-- target/loongarch/cpu.c | 3 +-- target/m68k/cpu.c | 3 +-- target/openrisc/cpu.c | 3 +-- target/riscv/cpu.c | 3 +-- target/rx/cpu.c | 5 +---- target/sh4/cpu.c | 3 --- target/tricore/cpu.c | 3 +-- target/xtensa/cpu.c | 3 +-- 15 files changed, 23 insertions(+), 32 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index bab8942c30..bca0323e9f 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -150,9 +150,15 @@ static bool cpu_common_has_work(CPUState *cs) ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) { CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); + ObjectClass *oc; assert(cpu_model && cc->class_by_name); - return cc->class_by_name(cpu_model); + oc = cc->class_by_name(cpu_model); + if (oc && !object_class_is_abstract(oc)) { + return oc; + } + + return NULL; } static void cpu_common_parse_features(const char *typename, char *features, diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 18593db5b2..ee85aafdf5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -102,7 +102,7 @@ struct SysemuCPUOps; /** * CPUClass: * @class_by_name: Callback to map -cpu command line model name to an - * instantiatable CPU type. + * instantiatable CPU type. * @parse_features: Callback to parse command line arguments. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. @@ -772,9 +772,10 @@ void cpu_reset(CPUState *cpu); * @typename: The CPU base type. * @cpu_model: The model string without any parameters. * - * Looks up a CPU #ObjectClass matching name @cpu_model. + * Looks up a concrete CPU #ObjectClass matching name @cpu_model. * - * Returns: A #CPUClass or %NULL if not matching class is found. + * Returns: A concrete #CPUClass or %NULL if no matching class is found + * or if the matching class is abstract. */ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index c7ae4d6a41..9436859c7b 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -126,7 +126,7 @@ static ObjectClass *alpha_cpu_class_by_name(const char *cpu_model) int i; oc = object_class_by_name(cpu_model); - if (oc != NULL && object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) != NULL && + if (object_class_dynamic_cast(oc, TYPE_ALPHA_CPU) && !object_class_is_abstract(oc)) { return oc; } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 954328d72a..8c622d6b59 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2399,8 +2399,7 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) oc = object_class_by_name(typename); g_strfreev(cpuname); g_free(typename); - if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) || - object_class_is_abstract(oc)) { + if (!object_class_dynamic_cast(oc, TYPE_ARM_CPU)) { return NULL; } return oc; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 14d8b9d1f0..113d522f75 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -157,8 +157,7 @@ static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) ObjectClass *oc; oc = object_class_by_name(cpu_model); - if (object_class_dynamic_cast(oc, TYPE_AVR_CPU) == NULL || - object_class_is_abstract(oc)) { + if (!object_class_dynamic_cast(oc, TYPE_AVR_CPU)) { oc = NULL; } return oc; diff --git a/target/cris/cpu.c b/target/cris/cpu.c index be4a44c218..1cb431cd46 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -95,8 +95,7 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(CRIS_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) || - object_class_is_abstract(oc))) { + if (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU)) { oc = NULL; } return oc; diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 1adc11b713..bd5adb7acd 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -63,8 +63,7 @@ static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model) oc = object_class_by_name(typename); g_strfreev(cpuname); g_free(typename); - if (!oc || !object_class_dynamic_cast(oc, TYPE_HEXAGON_CPU) || - object_class_is_abstract(oc)) { + if (!object_class_dynamic_cast(oc, TYPE_HEXAGON_CPU)) { return NULL; } return oc; diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index ef1bf89dac..06d1b9bb95 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -648,8 +648,7 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model) } } - if (object_class_dynamic_cast(oc, TYPE_LOONGARCH_CPU) - && !object_class_is_abstract(oc)) { + if (object_class_dynamic_cast(oc, TYPE_LOONGARCH_CPU)) { return oc; } return NULL; diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 538d9473c2..fe381cc5d3 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -111,8 +111,7 @@ static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL || - object_class_is_abstract(oc))) { + if (!object_class_dynamic_cast(oc, TYPE_M68K_CPU)) { return NULL; } return oc; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index f5a3d5273b..cc94f37e77 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -164,8 +164,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) || - object_class_is_abstract(oc))) { + if (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU)) { return NULL; } return oc; diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index ac4a6c7eec..018bad6f82 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -636,8 +636,7 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) oc = object_class_by_name(typename); g_strfreev(cpuname); g_free(typename); - if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) || - object_class_is_abstract(oc)) { + if (!object_class_dynamic_cast(oc, TYPE_RISCV_CPU)) { return NULL; } return oc; diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 4d0d3a0c8c..0063837e93 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -111,16 +111,13 @@ static ObjectClass *rx_cpu_class_by_name(const char *cpu_model) char *typename; oc = object_class_by_name(cpu_model); - if (oc != NULL && object_class_dynamic_cast(oc, TYPE_RX_CPU) != NULL && + if (object_class_dynamic_cast(oc, TYPE_RX_CPU) && !object_class_is_abstract(oc)) { return oc; } typename = g_strdup_printf(RX_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (oc != NULL && object_class_is_abstract(oc)) { - oc = NULL; - } return oc; } diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 788e41fea6..a8ec98b134 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -152,9 +152,6 @@ static ObjectClass *superh_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s); oc = object_class_by_name(typename); - if (oc != NULL && object_class_is_abstract(oc)) { - oc = NULL; - } out: g_free(s); diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 5ca666ee12..47e1c272cf 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -132,8 +132,7 @@ static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) || - object_class_is_abstract(oc)) { + if (!object_class_dynamic_cast(oc, TYPE_TRICORE_CPU)) { return NULL; } return oc; diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index ea1dae7390..5d1c090467 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -141,8 +141,7 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) || - object_class_is_abstract(oc)) { + if (!object_class_dynamic_cast(oc, TYPE_XTENSA_CPU)) { return NULL; } return oc; From patchwork Thu Nov 2 00:24:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443170 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05F6DC4332F for ; Thu, 2 Nov 2023 00:28:28 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLXp-0000qd-Rr; Wed, 01 Nov 2023 20:26:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLXm-0000pj-Tb for qemu-devel@nongnu.org; Wed, 01 Nov 2023 20:26:42 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.129.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLXk-0008Pv-GD for qemu-devel@nongnu.org; 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Thu, 2 Nov 2023 00:26:31 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id D45D7C1290F; Thu, 2 Nov 2023 00:26:16 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 03/33] cpu: Call object_class_dynamic_cast() once in cpu_class_by_name() Date: Thu, 2 Nov 2023 10:24:30 +1000 Message-ID: <20231102002500.1750692-4-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé For all targets, the CPU class returned from CPUClass::class_by_name() and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be compatible. Lets apply the check in cpu_class_by_name() for once, instead of having the check in CPUClass::class_by_name() for individual target. In order to make CPU_RESOLVING_TYPE visible to cpu_class_by_name(), the helper has to be moved to cpu-target.c Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Gavin Shan Reviewed-by: Igor Mammedov --- cpu-target.c | 15 +++++++++++++++ hw/core/cpu-common.c | 14 -------------- target/arm/cpu.c | 4 +--- target/avr/cpu.c | 8 +------- target/cris/cpu.c | 4 +--- target/hexagon/cpu.c | 4 +--- target/loongarch/cpu.c | 8 +------- target/m68k/cpu.c | 4 +--- target/openrisc/cpu.c | 4 +--- target/riscv/cpu.c | 4 +--- target/tricore/cpu.c | 4 +--- target/xtensa/cpu.c | 4 +--- 12 files changed, 25 insertions(+), 52 deletions(-) diff --git a/cpu-target.c b/cpu-target.c index 79363ae370..876b498233 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -250,6 +250,21 @@ void cpu_exec_initfn(CPUState *cpu) #endif } +ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) +{ + CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); + ObjectClass *oc; + + assert(cpu_model && cc->class_by_name); + oc = cc->class_by_name(cpu_model); + if (oc && !object_class_is_abstract(oc) && + object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE)) { + return oc; + } + + return NULL; +} + const char *parse_cpu_option(const char *cpu_option) { ObjectClass *oc; diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index bca0323e9f..1024de53bb 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -147,20 +147,6 @@ static bool cpu_common_has_work(CPUState *cs) return false; } -ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) -{ - CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); - ObjectClass *oc; - - assert(cpu_model && cc->class_by_name); - oc = cc->class_by_name(cpu_model); - if (oc && !object_class_is_abstract(oc)) { - return oc; - } - - return NULL; -} - static void cpu_common_parse_features(const char *typename, char *features, Error **errp) { diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 8c622d6b59..4942239b34 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2399,9 +2399,7 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) oc = object_class_by_name(typename); g_strfreev(cpuname); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_ARM_CPU)) { - return NULL; - } + return oc; } diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 113d522f75..a36cc48aae 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -154,13 +154,7 @@ static void avr_cpu_initfn(Object *obj) static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) { - ObjectClass *oc; - - oc = object_class_by_name(cpu_model); - if (!object_class_dynamic_cast(oc, TYPE_AVR_CPU)) { - oc = NULL; - } - return oc; + return object_class_by_name(cpu_model); } static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 1cb431cd46..a5083a0077 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -95,9 +95,7 @@ static ObjectClass *cris_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(CRIS_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU)) { - oc = NULL; - } + return oc; } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index bd5adb7acd..aa48f5fe89 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -63,9 +63,7 @@ static ObjectClass *hexagon_cpu_class_by_name(const char *cpu_model) oc = object_class_by_name(typename); g_strfreev(cpuname); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_HEXAGON_CPU)) { - return NULL; - } + return oc; } diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 06d1b9bb95..c6712e13f9 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -643,15 +643,9 @@ static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model) g_autofree char *typename = g_strdup_printf(LOONGARCH_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); - if (!oc) { - return NULL; - } } - if (object_class_dynamic_cast(oc, TYPE_LOONGARCH_CPU)) { - return oc; - } - return NULL; + return oc; } void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index fe381cc5d3..6cd5b56d6f 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -111,9 +111,7 @@ static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_M68K_CPU)) { - return NULL; - } + return oc; } diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index cc94f37e77..f7d53c592a 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -164,9 +164,7 @@ static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU)) { - return NULL; - } + return oc; } diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 018bad6f82..8b4024338c 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -636,9 +636,7 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) oc = object_class_by_name(typename); g_strfreev(cpuname); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_RISCV_CPU)) { - return NULL; - } + return oc; } diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 47e1c272cf..8acacdf0c0 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -132,9 +132,7 @@ static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_TRICORE_CPU)) { - return NULL; - } + return oc; } diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 5d1c090467..93e782a6e0 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -141,9 +141,7 @@ static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model) typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model); oc = object_class_by_name(typename); g_free(typename); - if (!object_class_dynamic_cast(oc, TYPE_XTENSA_CPU)) { - return NULL; - } + return oc; } From patchwork Thu Nov 2 00:24:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4C0F8C4332F for ; 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Thu, 2 Nov 2023 00:26:31 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 04/33] cpu: Add helper cpu_model_from_type() Date: Thu, 2 Nov 2023 10:24:31 +1000 Message-ID: <20231102002500.1750692-5-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add helper cpu_model_from_type() to extract the CPU model name from the CPU type name in two circumstances: (1) The CPU type name is the combination of the CPU model name and suffix. (2) The CPU type name is same to the CPU model name. The helper will be used in the subsequent commits to conver the CPU type name to the CPU model name. Suggested-by: Igor Mammedov Signed-off-by: Gavin Shan --- cpu-target.c | 16 ++++++++++++++++ include/hw/core/cpu.h | 12 ++++++++++++ 2 files changed, 28 insertions(+) diff --git a/cpu-target.c b/cpu-target.c index 876b498233..344bad5736 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -265,6 +265,22 @@ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) return NULL; } +char *cpu_model_from_type(const char *typename) +{ + const char *suffix = "-" CPU_RESOLVING_TYPE; + + if (!object_class_by_name(typename)) { + return NULL; + } + + if (strlen(typename) > strlen(suffix) && + !strcmp(typename + strlen(typename) - strlen(suffix), suffix)) { + return g_strndup(typename, strlen(typename) - strlen(suffix)); + } + + return g_strdup(typename); +} + const char *parse_cpu_option(const char *cpu_option) { ObjectClass *oc; diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index ee85aafdf5..8179c55759 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -779,6 +779,18 @@ void cpu_reset(CPUState *cpu); */ ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model); +/** + * cpu_model_from_type: + * @typename: The CPU type name + * + * Extract the CPU model name from the CPU type name. The + * CPU type name is either the combination of the CPU model + * name and suffix, or same to the CPU model name. + * + * Returns: CPU model name or NULL if the CPU class doesn't exist + */ +char *cpu_model_from_type(const char *typename); + /** * cpu_create: * @typename: The CPU type. From patchwork Thu Nov 2 00:24:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 381D1C4332F for ; Thu, 2 Nov 2023 00:29:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLYN-0001io-RM; Wed, 01 Nov 2023 20:27:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLYM-0001dX-FS for qemu-devel@nongnu.org; Wed, 01 Nov 2023 20:27:18 -0400 Received: from us-smtp-delivery-124.mimecast.com ([170.10.133.124]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLYC-0000Oj-HL for qemu-devel@nongnu.org; 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Thu, 2 Nov 2023 00:27:01 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 39EBBC1290F; Thu, 2 Nov 2023 00:26:46 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 05/33] target/alpha: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:32 +1000 Message-ID: <20231102002500.1750692-6-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/alpha, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names instead of the CPU type names. Signed-off-by: Gavin Shan --- target/alpha/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 9436859c7b..d4b35434cd 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -89,9 +89,11 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) static void alpha_cpu_list_entry(gpointer data, gpointer user_data) { - ObjectClass *oc = data; + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); - qemu_printf(" %s\n", object_class_get_name(oc)); + qemu_printf(" %s\n", model); + g_free(model); } void alpha_cpu_list(void) From patchwork Thu Nov 2 00:24:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443176 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 21CB2C4332F for ; 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Thu, 2 Nov 2023 00:27:01 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 06/33] target/arm: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:33 +1000 Message-ID: <20231102002500.1750692-7-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/arm, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. In arm_cpu_list_entry(), @name is renamed to @model since it points to CPU model name instead of CPU type name. Signed-off-by: Gavin Shan --- target/arm/arm-qmp-cmds.c | 6 ++---- target/arm/helper.c | 12 +++++------- 2 files changed, 7 insertions(+), 11 deletions(-) diff --git a/target/arm/arm-qmp-cmds.c b/target/arm/arm-qmp-cmds.c index b53d5efe13..c8c712a2c6 100644 --- a/target/arm/arm-qmp-cmds.c +++ b/target/arm/arm-qmp-cmds.c @@ -233,12 +233,10 @@ static void arm_cpu_add_definition(gpointer data, gpointer user_data) ObjectClass *oc = data; CpuDefinitionInfoList **cpu_list = user_data; CpuDefinitionInfo *info; - const char *typename; + const char *typename = object_class_get_name(oc); - typename = object_class_get_name(oc); info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_ARM_CPU)); + info->name = cpu_model_from_type(typename); info->q_typename = g_strdup(typename); QAPI_LIST_PREPEND(*cpu_list, info); diff --git a/target/arm/helper.c b/target/arm/helper.c index 5dc0d20a84..baf4b104ef 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9436,17 +9436,15 @@ static void arm_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; CPUClass *cc = CPU_CLASS(oc); - const char *typename; - char *name; + const char *typename = object_class_get_name(oc); + char *model = cpu_model_from_type(typename); - typename = object_class_get_name(oc); - name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_ARM_CPU)); if (cc->deprecation_note) { - qemu_printf(" %s (deprecated)\n", name); + qemu_printf(" %s (deprecated)\n", model); } else { - qemu_printf(" %s\n", name); + qemu_printf(" %s\n", model); } - g_free(name); + g_free(model); } void arm_cpu_list(void) From patchwork Thu Nov 2 00:24:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443178 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 323CCC4332F for ; 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Thu, 2 Nov 2023 00:27:16 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 07/33] target/avr: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:34 +1000 Message-ID: <20231102002500.1750692-8-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/avr, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Besides, the conversion from CPU model name to CPU type name needs to be supported in avr_cpu_class_by_name(). Signed-off-by: Gavin Shan --- target/avr/cpu.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index a36cc48aae..4203ea1368 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -154,7 +154,20 @@ static void avr_cpu_initfn(Object *obj) static ObjectClass *avr_cpu_class_by_name(const char *cpu_model) { - return object_class_by_name(cpu_model); + ObjectClass *oc; + char *typename; + + oc = object_class_by_name(cpu_model); + if (object_class_dynamic_cast(oc, TYPE_AVR_CPU) && + !object_class_is_abstract(oc)) { + return oc; + } + + typename = g_strdup_printf(AVR_CPU_TYPE_NAME("%s"), cpu_model); + oc = object_class_by_name(typename); + g_free(typename); + + return oc; } static void avr_cpu_dump_state(CPUState *cs, FILE *f, int flags) @@ -357,14 +370,17 @@ typedef struct AVRCPUInfo { static void avr_cpu_list_entry(gpointer data, gpointer user_data) { const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); - qemu_printf("%s\n", typename); + qemu_printf(" %s\n", model); + g_free(model); } void avr_cpu_list(void) { GSList *list; list = object_class_get_list_sorted(TYPE_AVR_CPU, false); + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, avr_cpu_list_entry, NULL); g_slist_free(list); } From patchwork Thu Nov 2 00:24:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5849FC4332F for ; Thu, 2 Nov 2023 00:29:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLZL-0003Tf-EK; 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Wed, 01 Nov 2023 20:27:48 -0400 X-MC-Unique: lD8CWVIoOzqaHwkY-JdZaQ-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 53AAB1C05AA7; Thu, 2 Nov 2023 00:27:46 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 231A0C1290F; Thu, 2 Nov 2023 00:27:31 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 08/33] target/cris: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:35 +1000 Message-ID: <20231102002500.1750692-9-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/cris, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan --- target/cris/cpu.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index a5083a0077..73fe1510f1 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -119,11 +119,10 @@ static void cris_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; const char *typename = object_class_get_name(oc); - char *name; + char *model = cpu_model_from_type(typename); - name = g_strndup(typename, strlen(typename) - strlen(CRIS_CPU_TYPE_SUFFIX)); - qemu_printf(" %s\n", name); - g_free(name); + qemu_printf(" %s\n", model); + g_free(model); } void cris_cpu_list(void) From patchwork Thu Nov 2 00:24:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE6BFC4332F for ; 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Thu, 2 Nov 2023 00:27:46 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 09/33] target/hexagon: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:36 +1000 Message-ID: <20231102002500.1750692-10-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/hexagon, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan --- target/hexagon/cpu.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index aa48f5fe89..cfff005a1a 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -34,13 +34,11 @@ static void hexagon_v73_cpu_init(Object *obj) { } static void hexagon_cpu_list_entry(gpointer data, gpointer user_data) { - ObjectClass *oc = data; - char *name = g_strdup(object_class_get_name(oc)); - if (g_str_has_suffix(name, HEXAGON_CPU_TYPE_SUFFIX)) { - name[strlen(name) - strlen(HEXAGON_CPU_TYPE_SUFFIX)] = '\0'; - } - qemu_printf(" %s\n", name); - g_free(name); + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); } void hexagon_cpu_list(void) From patchwork Thu Nov 2 00:24:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1385C4167B for ; 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Thu, 2 Nov 2023 00:28:01 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 10/33] target/i386: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:37 +1000 Message-ID: <20231102002500.1750692-11-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/i386, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to convert the CPU type name to the CPU model name. Signed-off-by: Gavin Shan --- target/i386/cpu.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fc8484cb5e..f77149ed25 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1744,8 +1744,7 @@ static char *x86_cpu_class_get_model_name(X86CPUClass *cc) { const char *class_name = object_class_get_name(OBJECT_CLASS(cc)); assert(g_str_has_suffix(class_name, X86_CPU_TYPE_SUFFIX)); - return g_strndup(class_name, - strlen(class_name) - strlen(X86_CPU_TYPE_SUFFIX)); + return cpu_model_from_type(class_name); } typedef struct X86CPUVersionDefinition { @@ -5547,7 +5546,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc = data; X86CPUClass *cc = X86_CPU_CLASS(oc); - g_autofree char *name = x86_cpu_class_get_model_name(cc); + g_autofree char *model = x86_cpu_class_get_model_name(cc); g_autofree char *desc = g_strdup(cc->model_description); g_autofree char *alias_of = x86_cpu_class_get_alias_of(cc); g_autofree char *model_id = x86_cpu_class_get_model_id(cc); @@ -5571,7 +5570,7 @@ static void x86_cpu_list_entry(gpointer data, gpointer user_data) desc = g_strdup_printf("%s (deprecated)", olddesc); } - qemu_printf("x86 %-20s %s\n", name, desc); + qemu_printf("x86 %-20s %s\n", model, desc); } /* list available CPU models and flags */ From patchwork Thu Nov 2 00:24:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43326C4167B for ; Thu, 2 Nov 2023 00:37:10 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLaA-0004es-DD; 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Wed, 01 Nov 2023 20:28:35 -0400 X-MC-Unique: dsoQOapfPiSZUEN68-Lntw-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 010B21C05AA4; Thu, 2 Nov 2023 00:28:31 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C39BFC1290F; Thu, 2 Nov 2023 00:28:16 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 11/33] target/loongarch: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:38 +1000 Message-ID: <20231102002500.1750692-12-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/loongarch, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan --- target/loongarch/cpu.c | 5 ++++- target/loongarch/loongarch-qmp-cmds.c | 3 +-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index c6712e13f9..8c6b6f47ed 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -477,14 +477,17 @@ static void loongarch_la132_initfn(Object *obj) static void loongarch_cpu_list_entry(gpointer data, gpointer user_data) { const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); - qemu_printf("%s\n", typename); + qemu_printf(" %s\n", model); + g_free(model); } void loongarch_cpu_list(void) { GSList *list; list = object_class_get_list_sorted(TYPE_LOONGARCH_CPU, false); + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, loongarch_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/loongarch/loongarch-qmp-cmds.c b/target/loongarch/loongarch-qmp-cmds.c index 6c25957881..815ceaf0ea 100644 --- a/target/loongarch/loongarch-qmp-cmds.c +++ b/target/loongarch/loongarch-qmp-cmds.c @@ -17,8 +17,7 @@ static void loongarch_cpu_add_definition(gpointer data, gpointer user_data) CpuDefinitionInfo *info = g_new0(CpuDefinitionInfo, 1); const char *typename = object_class_get_name(oc); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_LOONGARCH_CPU)); + info->name = cpu_model_from_type(typename); info->q_typename = g_strdup(typename); QAPI_LIST_PREPEND(*cpu_list, info); From patchwork Thu Nov 2 00:24:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443174 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 004D8C4167D for ; Thu, 2 Nov 2023 00:29:33 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLaK-0005HM-K2; Wed, 01 Nov 2023 20:29:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLa5-0004G3-Vh for qemu-devel@nongnu.org; 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Wed, 01 Nov 2023 20:28:51 -0400 X-MC-Unique: dhTE4DibNIm1VBia0-XplA-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 4784D812C33; Thu, 2 Nov 2023 00:28:49 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 80AA6C1290F; Thu, 2 Nov 2023 00:28:31 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 12/33] target/m68k: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:39 +1000 Message-ID: <20231102002500.1750692-13-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/m68k, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan --- target/m68k/helper.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 0a1544cd68..47f2cee69a 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -49,14 +49,11 @@ static gint m68k_cpu_list_compare(gconstpointer a, gconstpointer b) static void m68k_cpu_list_entry(gpointer data, gpointer user_data) { - ObjectClass *c = data; - const char *typename; - char *name; - - typename = object_class_get_name(c); - name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_M68K_CPU)); - qemu_printf("%s\n", name); - g_free(name); + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); } void m68k_cpu_list(void) @@ -65,6 +62,7 @@ void m68k_cpu_list(void) list = object_class_get_list(TYPE_M68K_CPU, false); list = g_slist_sort(list, m68k_cpu_list_compare); + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, m68k_cpu_list_entry, NULL); g_slist_free(list); } From patchwork Thu Nov 2 00:24:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443195 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A4AFBC4167B for ; Thu, 2 Nov 2023 00:35:49 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLaM-0005Mv-BH; Wed, 01 Nov 2023 20:29:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLaE-00053W-Ci for qemu-devel@nongnu.org; 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Wed, 01 Nov 2023 20:29:06 -0400 X-MC-Unique: uaTAYfPbM9eDgzS2C9qUeg-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 02D1A812C27; Thu, 2 Nov 2023 00:29:04 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id C569FC1290F; Thu, 2 Nov 2023 00:28:49 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 13/33] target/mips: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:40 +1000 Message-ID: <20231102002500.1750692-14-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/mips, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Besides, mips_cpu_list() is reimplemented to dynamically fetch the CPU model names from the registered CPU types , instead of the staticly defined array. Signed-off-by: Gavin Shan --- target/mips/cpu-defs.c.inc | 9 --------- target/mips/cpu.c | 18 ++++++++++++++++++ target/mips/sysemu/mips-qmp-cmds.c | 3 +-- 3 files changed, 19 insertions(+), 11 deletions(-) diff --git a/target/mips/cpu-defs.c.inc b/target/mips/cpu-defs.c.inc index c0c389c59a..fbf787d8ce 100644 --- a/target/mips/cpu-defs.c.inc +++ b/target/mips/cpu-defs.c.inc @@ -1018,15 +1018,6 @@ const mips_def_t mips_defs[] = }; const int mips_defs_number = ARRAY_SIZE(mips_defs); -void mips_cpu_list(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(mips_defs); i++) { - qemu_printf("MIPS '%s'\n", mips_defs[i].name); - } -} - static void fpu_init (CPUMIPSState *env, const mips_def_t *def) { int i; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index a0023edd43..131978563b 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -565,6 +565,24 @@ static const struct TCGCPUOps mips_tcg_ops = { }; #endif /* CONFIG_TCG */ +static void mips_cpu_list_entry(gpointer data, gpointer user_data) +{ + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); +} + +void mips_cpu_list(void) +{ + GSList *list; + list = object_class_get_list_sorted(TYPE_MIPS_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, mips_cpu_list_entry, NULL); + g_slist_free(list); +} + static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); diff --git a/target/mips/sysemu/mips-qmp-cmds.c b/target/mips/sysemu/mips-qmp-cmds.c index 6db4626412..7340ac70ba 100644 --- a/target/mips/sysemu/mips-qmp-cmds.c +++ b/target/mips/sysemu/mips-qmp-cmds.c @@ -19,8 +19,7 @@ static void mips_cpu_add_definition(gpointer data, gpointer user_data) typename = object_class_get_name(oc); info = g_malloc0(sizeof(*info)); - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_MIPS_CPU)); + info->name = cpu_model_from_type(typename); info->q_typename = g_strdup(typename); QAPI_LIST_PREPEND(*cpu_list, info); From patchwork Thu Nov 2 00:24:41 2023 Content-Type: text/plain; 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Thu, 2 Nov 2023 00:29:19 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 80FC4C1290F; Thu, 2 Nov 2023 00:29:04 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 14/33] target/openrisc: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:41 +1000 Message-ID: <20231102002500.1750692-15-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/openrisc, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan --- target/openrisc/cpu.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index f7d53c592a..701aa62293 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -273,15 +273,11 @@ static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b) static void openrisc_cpu_list_entry(gpointer data, gpointer user_data) { - ObjectClass *oc = data; - const char *typename; - char *name; - - typename = object_class_get_name(oc); - name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_OPENRISC_CPU)); - qemu_printf(" %s\n", name); - g_free(name); + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); } void cpu_openrisc_list(void) From patchwork Thu Nov 2 00:24:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443179 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9215AC4167D for ; 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Thu, 2 Nov 2023 00:29:19 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 15/33] target/ppc: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:42 +1000 Message-ID: <20231102002500.1750692-16-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/ppc, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan Reviewed-by: Cédric Le Goater --- target/ppc/cpu_init.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 40fe14a6c2..a8ab698700 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -7029,16 +7029,15 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); DeviceClass *family = DEVICE_CLASS(ppc_cpu_get_family_class(pcc)); const char *typename = object_class_get_name(oc); - char *name; + char *model; int i; if (unlikely(strcmp(typename, TYPE_HOST_POWERPC_CPU) == 0)) { return; } - name = g_strndup(typename, - strlen(typename) - strlen(POWERPC_CPU_TYPE_SUFFIX)); - qemu_printf("PowerPC %-16s PVR %08x\n", name, pcc->pvr); + model = cpu_model_from_type(typename); + qemu_printf("PowerPC %-16s PVR %08x\n", model, pcc->pvr); for (i = 0; ppc_cpu_aliases[i].alias != NULL; i++) { PowerPCCPUAlias *alias = &ppc_cpu_aliases[i]; ObjectClass *alias_oc = ppc_cpu_class_by_name(alias->model); @@ -7055,10 +7054,10 @@ static void ppc_cpu_list_entry(gpointer data, gpointer user_data) alias->alias, family->desc); } else { qemu_printf("PowerPC %-16s (alias for %s)\n", - alias->alias, name); + alias->alias, model); } } - g_free(name); + g_free(model); } void ppc_cpu_list(void) @@ -7067,6 +7066,7 @@ void ppc_cpu_list(void) list = object_class_get_list(TYPE_POWERPC_CPU, false); list = g_slist_sort(list, ppc_cpu_list_compare); + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, ppc_cpu_list_entry, NULL); g_slist_free(list); From patchwork Thu Nov 2 00:24:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443183 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95C04C4167B for ; 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Thu, 2 Nov 2023 00:29:34 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 16/33] target/riscv: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:43 +1000 Message-ID: <20231102002500.1750692-17-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/riscv, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Besides, @cpuname is renamed to @model in riscv_cpu_class_by_name() since it points to CPU model name instead of CPU type name. Signed-off-by: Gavin Shan Reviewed-by: Daniel Henrique Barboza --- target/riscv/cpu.c | 14 ++++++++------ target/riscv/riscv-qmp-cmds.c | 3 +-- 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 8b4024338c..9f47379145 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -629,12 +629,12 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; char *typename; - char **cpuname; + char **model; - cpuname = g_strsplit(cpu_model, ",", 1); - typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpuname[0]); + model = g_strsplit(cpu_model, ",", 1); + typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), model[0]); oc = object_class_by_name(typename); - g_strfreev(cpuname); + g_strfreev(model); g_free(typename); return oc; @@ -1644,9 +1644,10 @@ static gint riscv_cpu_list_compare(gconstpointer a, gconstpointer b) static void riscv_cpu_list_entry(gpointer data, gpointer user_data) { const char *typename = object_class_get_name(OBJECT_CLASS(data)); - int len = strlen(typename) - strlen(RISCV_CPU_TYPE_SUFFIX); + char *model = cpu_model_from_type(typename); - qemu_printf("%.*s\n", len, typename); + qemu_printf(" %s\n", model); + g_free(model); } void riscv_cpu_list(void) @@ -1655,6 +1656,7 @@ void riscv_cpu_list(void) list = object_class_get_list(TYPE_RISCV_CPU, false); list = g_slist_sort(list, riscv_cpu_list_compare); + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, riscv_cpu_list_entry, NULL); g_slist_free(list); } diff --git a/target/riscv/riscv-qmp-cmds.c b/target/riscv/riscv-qmp-cmds.c index 5ecff1afb3..22f728673f 100644 --- a/target/riscv/riscv-qmp-cmds.c +++ b/target/riscv/riscv-qmp-cmds.c @@ -35,8 +35,7 @@ static void riscv_cpu_add_definition(gpointer data, gpointer user_data) const char *typename = object_class_get_name(oc); ObjectClass *dyn_class; - info->name = g_strndup(typename, - strlen(typename) - strlen("-" TYPE_RISCV_CPU)); + info->name = cpu_model_from_type(typename); info->q_typename = g_strdup(typename); dyn_class = object_class_dynamic_cast(oc, TYPE_RISCV_DYNAMIC_CPU); From patchwork Thu Nov 2 00:24:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443196 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1D208C4167D for ; Thu, 2 Nov 2023 00:35:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLbm-00086X-8u; Wed, 01 Nov 2023 20:30:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLbi-0007vo-TV for qemu-devel@nongnu.org; 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Wed, 01 Nov 2023 20:30:06 -0400 X-MC-Unique: -41JO_AzPli-nSpvaJj0Hg-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 20F43185A781; Thu, 2 Nov 2023 00:30:04 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BD2B5C1290F; Thu, 2 Nov 2023 00:29:49 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 17/33] target/rx: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:44 +1000 Message-ID: <20231102002500.1750692-18-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/rx, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan --- target/rx/cpu.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 0063837e93..fea7f596ca 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -91,9 +91,11 @@ static void rx_cpu_reset_hold(Object *obj) static void rx_cpu_list_entry(gpointer data, gpointer user_data) { - ObjectClass *oc = data; + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); - qemu_printf(" %s\n", object_class_get_name(oc)); + qemu_printf(" %s\n", model); + g_free(model); } void rx_cpu_list(void) From patchwork Thu Nov 2 00:24:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443186 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3EBD2C0018A for ; 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Thu, 2 Nov 2023 00:30:04 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 18/33] target/s390x: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:45 +1000 Message-ID: <20231102002500.1750692-19-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/s390x, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan --- target/s390x/cpu_models.c | 12 ++++++------ target/s390x/cpu_models_sysemu.c | 9 ++++----- 2 files changed, 10 insertions(+), 11 deletions(-) diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 4dead48650..71635b92c8 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -339,7 +339,8 @@ static void s390_print_cpu_model_list_entry(gpointer data, gpointer user_data) { const S390CPUClass *scc = S390_CPU_CLASS((ObjectClass *)data); CPUClass *cc = CPU_CLASS(scc); - char *name = g_strdup(object_class_get_name((ObjectClass *)data)); + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); g_autoptr(GString) details = g_string_new(""); if (scc->is_static) { @@ -356,14 +357,12 @@ static void s390_print_cpu_model_list_entry(gpointer data, gpointer user_data) g_string_truncate(details, details->len - 2); } - /* strip off the -s390x-cpu */ - g_strrstr(name, "-" TYPE_S390_CPU)[0] = 0; if (details->len) { - qemu_printf("s390 %-15s %-35s (%s)\n", name, scc->desc, details->str); + qemu_printf("s390 %-15s %-35s (%s)\n", model, scc->desc, details->str); } else { - qemu_printf("s390 %-15s %-35s\n", name, scc->desc); + qemu_printf("s390 %-15s %-35s\n", model, scc->desc); } - g_free(name); + g_free(model); } static gint s390_cpu_list_compare(gconstpointer a, gconstpointer b) @@ -408,6 +407,7 @@ void s390_cpu_list(void) list = object_class_get_list(TYPE_S390_CPU, false); list = g_slist_sort(list, s390_cpu_list_compare); + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, s390_print_cpu_model_list_entry, NULL); g_slist_free(list); diff --git a/target/s390x/cpu_models_sysemu.c b/target/s390x/cpu_models_sysemu.c index 63981bf36b..c41af253d3 100644 --- a/target/s390x/cpu_models_sysemu.c +++ b/target/s390x/cpu_models_sysemu.c @@ -55,17 +55,16 @@ static void create_cpu_model_list(ObjectClass *klass, void *opaque) struct CpuDefinitionInfoListData *cpu_list_data = opaque; CpuDefinitionInfoList **cpu_list = &cpu_list_data->list; CpuDefinitionInfo *info; - char *name = g_strdup(object_class_get_name(klass)); + const char *typename = object_class_get_name(klass); + char *model = cpu_model_from_type(typename); S390CPUClass *scc = S390_CPU_CLASS(klass); - /* strip off the -s390x-cpu */ - g_strrstr(name, "-" TYPE_S390_CPU)[0] = 0; info = g_new0(CpuDefinitionInfo, 1); - info->name = name; + info->name = model; info->has_migration_safe = true; info->migration_safe = scc->is_migration_safe; info->q_static = scc->is_static; - info->q_typename = g_strdup(object_class_get_name(klass)); + info->q_typename = g_strdup(typename); /* check for unavailable features */ if (cpu_list_data->model) { Object *obj; From patchwork Thu Nov 2 00:24:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443187 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E657DC4332F for ; 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Thu, 2 Nov 2023 00:30:20 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 19/33] target/sh4: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:46 +1000 Message-ID: <20231102002500.1750692-20-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_INVALID=0.1, DKIM_SIGNED=0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/sh4, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Besides, superh_cpu_class_by_name() is improved by avoiding "goto out" tag and renaming @s to @model since it points to CPU model name. Signed-off-by: Gavin Shan --- target/sh4/cpu.c | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index a8ec98b134..6097ddd52d 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -125,9 +125,10 @@ static void superh_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) static void superh_cpu_list_entry(gpointer data, gpointer user_data) { const char *typename = object_class_get_name(OBJECT_CLASS(data)); - int len = strlen(typename) - strlen(SUPERH_CPU_TYPE_SUFFIX); + char *model = cpu_model_from_type(typename); - qemu_printf("%.*s\n", len, typename); + qemu_printf(" %s\n", model); + g_free(model); } void sh4_cpu_list(void) @@ -135,6 +136,7 @@ void sh4_cpu_list(void) GSList *list; list = object_class_get_list_sorted(TYPE_SUPERH_CPU, false); + qemu_printf("Available CPUs:\n"); g_slist_foreach(list, superh_cpu_list_entry, NULL); g_slist_free(list); } @@ -142,20 +144,19 @@ void sh4_cpu_list(void) static ObjectClass *superh_cpu_class_by_name(const char *cpu_model) { ObjectClass *oc; - char *s, *typename = NULL; + char *model, *typename; - s = g_ascii_strdown(cpu_model, -1); - if (strcmp(s, "any") == 0) { - oc = object_class_by_name(TYPE_SH7750R_CPU); - goto out; + model = g_ascii_strdown(cpu_model, -1); + if (strcmp(model, "any") == 0) { + typename = g_strdup(TYPE_SH7750R_CPU); + } else { + typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), model); } - typename = g_strdup_printf(SUPERH_CPU_TYPE_NAME("%s"), s); oc = object_class_by_name(typename); - -out: - g_free(s); + g_free(model); g_free(typename); + return oc; } From patchwork Thu Nov 2 00:24:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443184 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AF2BFC4167B for ; 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Thu, 2 Nov 2023 00:30:51 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 37A38C1290F; Thu, 2 Nov 2023 00:30:35 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 20/33] target/tricore: Use generic helper to show CPU model names Date: Thu, 2 Nov 2023 10:24:47 +1000 Message-ID: <20231102002500.1750692-21-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For target/tricore, the registered CPU type name is always the combination of the CPU model name and suffix. Use cpu_model_from_type() to show the CPU model names. Signed-off-by: Gavin Shan Reviewed-by: Bastian Koppelmann --- target/tricore/helper.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 7e5da3cb23..1b5fbd4ab0 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -98,14 +98,11 @@ bool tricore_cpu_tlb_fill(CPUState *cs, vaddr address, int size, static void tricore_cpu_list_entry(gpointer data, gpointer user_data) { - ObjectClass *oc = data; - const char *typename; - char *name; - - typename = object_class_get_name(oc); - name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_TRICORE_CPU)); - qemu_printf(" %s\n", name); - g_free(name); + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); } void tricore_cpu_list(void) From patchwork Thu Nov 2 00:24:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443182 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86634C4332F for ; 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Thu, 2 Nov 2023 00:30:52 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 21/33] target/hppa: Implement hppa_cpu_list() Date: Thu, 2 Nov 2023 10:24:48 +1000 Message-ID: <20231102002500.1750692-22-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Implement hppa_cpu_list() to support cpu_list(). With this applied, the available CPU model names, same to the CPU type names, are shown as below. $ ./build/qemu-system-hppa -cpu ? Available CPUs: hppa-cpu Signed-off-by: Gavin Shan --- target/hppa/cpu.c | 19 +++++++++++++++++++ target/hppa/cpu.h | 3 +++ 2 files changed, 22 insertions(+) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 1644297bf8..2b5198d7c8 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -143,6 +143,25 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) #endif } +static void hppa_cpu_list_entry(gpointer data, gpointer user_data) +{ + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); +} + +void hppa_cpu_list(void) +{ + GSList *list; + + list = object_class_get_list_sorted(TYPE_HPPA_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, hppa_cpu_list_entry, NULL); + g_slist_free(list); +} + static void hppa_cpu_initfn(Object *obj) { CPUState *cs = CPU(obj); diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 798d0c26d7..d8106c89dc 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -357,5 +357,8 @@ void hppa_cpu_alarm_timer(void *); int hppa_artype_for_page(CPUHPPAState *env, target_ulong vaddr); #endif G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra); +void hppa_cpu_list(void); + +#define cpu_list hppa_cpu_list #endif /* HPPA_CPU_H */ From patchwork Thu Nov 2 00:24:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443193 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A7A8BC4167B for ; Thu, 2 Nov 2023 00:34:52 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLch-0000tp-I7; Wed, 01 Nov 2023 20:31:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLcU-0000Mn-BK for qemu-devel@nongnu.org; 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Wed, 01 Nov 2023 20:31:26 -0400 X-MC-Unique: DQxB4sdrPdeSvc8cEyscpw-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 819473C0F663; Thu, 2 Nov 2023 00:31:24 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 06DF7C1290F; Thu, 2 Nov 2023 00:31:08 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 22/33] target/microblaze: Implement microblaze_cpu_list() Date: Thu, 2 Nov 2023 10:24:49 +1000 Message-ID: <20231102002500.1750692-23-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Implement microblaze_cpu_list() to support cpu_list(). With this applied, the available CPU model names, same to the CPU type names, are shown as below. $ ./build/qemu-system-hppa -cpu ? Available CPUs: microblaze-cpu Signed-off-by: Gavin Shan --- target/microblaze/cpu.c | 20 ++++++++++++++++++++ target/microblaze/cpu.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index bbb3335cad..7d05dd954c 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "qemu/module.h" #include "hw/qdev-properties.h" @@ -291,6 +292,25 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) mcc->parent_realize(dev, errp); } +static void microblaze_cpu_list_entry(gpointer data, gpointer user_data) +{ + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); +} + +void microblaze_cpu_list(void) +{ + GSList *list; + + list = object_class_get_list_sorted(TYPE_MICROBLAZE_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, microblaze_cpu_list_entry, NULL); + g_slist_free(list); +} + static void mb_cpu_initfn(Object *obj) { MicroBlazeCPU *cpu = MICROBLAZE_CPU(obj); diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index e43c49d4af..d5ad25a866 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -372,6 +372,9 @@ int mb_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); int mb_cpu_gdb_read_stack_protect(CPUArchState *cpu, GByteArray *buf, int reg); int mb_cpu_gdb_write_stack_protect(CPUArchState *cpu, uint8_t *buf, int reg); +void microblaze_cpu_list(void); + +#define cpu_list microblaze_cpu_list static inline uint32_t mb_cpu_read_msr(const CPUMBState *env) { From patchwork Thu Nov 2 00:24:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443181 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2140FC0018A for ; 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Thu, 2 Nov 2023 00:31:24 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 23/33] target/nios2: Implement nios2_cpu_list() Date: Thu, 2 Nov 2023 10:24:50 +1000 Message-ID: <20231102002500.1750692-24-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Implement nios2_cpu_list() to support cpu_list(). With this applied, the available CPU model names, same to the CPU type names, are shown as below. $ ./build/qemu-system-nios2 -cpu ? Available CPUs: nios2-cpu Signed-off-by: Gavin Shan --- target/nios2/cpu.c | 20 ++++++++++++++++++++ target/nios2/cpu.h | 3 +++ 2 files changed, 23 insertions(+) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 15e499f828..5981418aee 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/module.h" #include "qapi/error.h" +#include "qemu/qemu-print.h" #include "cpu.h" #include "exec/log.h" #include "gdbstub/helpers.h" @@ -111,6 +112,25 @@ static void iic_set_irq(void *opaque, int irq, int level) } #endif +static void nios2_cpu_list_entry(gpointer data, gpointer user_data) +{ + const char *typename = object_class_get_name(OBJECT_CLASS(data)); + char *model = cpu_model_from_type(typename); + + qemu_printf(" %s\n", model); + g_free(model); +} + +void nios2_cpu_list(void) +{ + GSList *list; + + list = object_class_get_list_sorted(TYPE_NIOS2_CPU, false); + qemu_printf("Available CPUs:\n"); + g_slist_foreach(list, nios2_cpu_list_entry, NULL); + g_slist_free(list); +} + static void nios2_cpu_initfn(Object *obj) { #if !defined(CONFIG_USER_ONLY) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 70b6377a4f..93bf84b620 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -291,6 +291,9 @@ bool nios2_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); #endif +void nios2_cpu_list(void); + +#define cpu_list nios2_cpu_list typedef CPUNios2State CPUArchState; typedef Nios2CPU ArchCPU; From patchwork Thu Nov 2 00:24:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443199 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B66B6C4332F for ; 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Thu, 2 Nov 2023 00:31:41 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 24/33] cpu: Mark cpu_list() supported on all targets Date: Thu, 2 Nov 2023 10:24:51 +1000 Message-ID: <20231102002500.1750692-25-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Remove the false conditions and comments since cpu_list() has been supported on all targets. Signed-off-by: Gavin Shan --- bsd-user/main.c | 3 --- cpu-target.c | 3 --- 2 files changed, 6 deletions(-) diff --git a/bsd-user/main.c b/bsd-user/main.c index c402fadf46..d3612ef0f5 100644 --- a/bsd-user/main.c +++ b/bsd-user/main.c @@ -378,10 +378,7 @@ int main(int argc, char **argv) } else if (!strcmp(r, "cpu")) { cpu_model = argv[optind++]; if (is_help_option(cpu_model)) { - /* XXX: implement xxx_cpu_list for targets that still miss it */ -#if defined(cpu_list) cpu_list(); -#endif exit(1); } } else if (!strcmp(r, "B")) { diff --git a/cpu-target.c b/cpu-target.c index 344bad5736..3037a2c6ee 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -310,10 +310,7 @@ const char *parse_cpu_option(const char *cpu_option) void list_cpus(void) { - /* XXX: implement xxx_cpu_list for targets that still miss it */ -#if defined(cpu_list) cpu_list(); -#endif } #if defined(CONFIG_USER_ONLY) From patchwork Thu Nov 2 00:24:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443188 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D0C2C4332F for ; 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Thu, 2 Nov 2023 00:31:58 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 25/33] machine: Constify MachineClass::valid_cpu_types[i] Date: Thu, 2 Nov 2023 10:24:52 +1000 Message-ID: <20231102002500.1750692-26-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Constify MachineClass::valid_cpu_types[i], as suggested by Richard Henderson. Suggested-by: Richard Henderson Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/m68k/q800.c | 2 +- include/hw/boards.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 1d7cd5ff1c..38d4bc2013 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -726,7 +726,7 @@ static GlobalProperty hw_compat_q800[] = { }; static const size_t hw_compat_q800_len = G_N_ELEMENTS(hw_compat_q800); -static const char *q800_machine_valid_cpu_types[] = { +static const char * const q800_machine_valid_cpu_types[] = { M68K_CPU_TYPE_NAME("m68040"), NULL }; diff --git a/include/hw/boards.h b/include/hw/boards.h index a735999298..da85f86efb 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -273,7 +273,7 @@ struct MachineClass { bool has_hotpluggable_cpus; bool ignore_memory_transaction_failures; int numa_mem_align_shift; - const char **valid_cpu_types; + const char * const *valid_cpu_types; strList *allowed_dynamic_sysbus_devices; bool auto_enable_numa_with_memhp; bool auto_enable_numa_with_memdev; From patchwork Thu Nov 2 00:24:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443192 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62206C4332F for ; Thu, 2 Nov 2023 00:34:51 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLe8-0004qn-WF; Wed, 01 Nov 2023 20:33:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qyLdu-0004IR-V4 for qemu-devel@nongnu.org; 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Wed, 01 Nov 2023 20:32:34 -0400 X-MC-Unique: P6BqOck6NYm9FV0hYF4pow-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id D146D3C0F663; Thu, 2 Nov 2023 00:32:30 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 86C7CC0FE05; Thu, 2 Nov 2023 00:32:14 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 26/33] machine: Use error handling when CPU type is checked Date: Thu, 2 Nov 2023 10:24:53 +1000 Message-ID: <20231102002500.1750692-27-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org QEMU will be terminated if the specified CPU type isn't supported in machine_run_board_init(). The list of supported CPU type names is tracked by mc->valid_cpu_types. The error handling can be used to propagate error messages, to be consistent how the errors are handled for other situations in the same function. No functional change intended. Suggested-by: Igor Mammedov Signed-off-by: Gavin Shan --- hw/core/machine.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 50edaab737..1c17a0d5bf 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1393,6 +1393,7 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error * MachineClass *machine_class = MACHINE_GET_CLASS(machine); ObjectClass *oc = object_class_by_name(machine->cpu_type); CPUClass *cc; + Error *local_err = NULL; /* This checkpoint is required by replay to separate prior clock reading from the other reads, because timer polling functions query @@ -1465,15 +1466,16 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error * if (!machine_class->valid_cpu_types[i]) { /* The user specified CPU is not valid */ - error_report("Invalid CPU type: %s", machine->cpu_type); - error_printf("The valid types are: %s", - machine_class->valid_cpu_types[0]); + error_setg(&local_err, "Invalid CPU type: %s", machine->cpu_type); + error_append_hint(&local_err, "The valid types are: %s", + machine_class->valid_cpu_types[0]); for (i = 1; machine_class->valid_cpu_types[i]; i++) { - error_printf(", %s", machine_class->valid_cpu_types[i]); + error_append_hint(&local_err, ", %s", + machine_class->valid_cpu_types[i]); } - error_printf("\n"); + error_append_hint(&local_err, "\n"); - exit(1); + error_propagate(errp, local_err); } } From patchwork Thu Nov 2 00:24:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443197 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 06B57C4332F for ; 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Thu, 2 Nov 2023 00:32:31 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 27/33] machine: Introduce helper is_cpu_type_supported() Date: Thu, 2 Nov 2023 10:24:54 +1000 Message-ID: <20231102002500.1750692-28-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The logic, to check if the specified CPU type is supported in machine_run_board_init(), is independent enough. Factor it out into helper is_cpu_type_supported(). machine_run_board_init() looks a bit clean with this. Since we're here, @machine_class is renamed to @mc to avoid multiple line spanning of code. The comments are tweaked a bit either. No functional change intended. Signed-off-by: Gavin Shan --- hw/core/machine.c | 82 +++++++++++++++++++++++++---------------------- 1 file changed, 44 insertions(+), 38 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 1c17a0d5bf..2d78692df1 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1386,13 +1386,51 @@ out: return r; } +static void is_cpu_type_supported(MachineState *machine, Error **errp) +{ + MachineClass *mc = MACHINE_GET_CLASS(machine); + ObjectClass *oc = object_class_by_name(machine->cpu_type); + CPUClass *cc; + int i; + + /* + * Check if the user specified CPU type is supported when the valid + * CPU types have been determined. Note that the user specified CPU + * type is provided through '-cpu' option. + */ + if (mc->valid_cpu_types && machine->cpu_type) { + for (i = 0; mc->valid_cpu_types[i]; i++) { + if (object_class_dynamic_cast(oc, mc->valid_cpu_types[i])) { + break; + } + } + + /* The user specified CPU type isn't valid */ + if (!mc->valid_cpu_types[i]) { + error_setg(errp, "Invalid CPU type: %s", machine->cpu_type); + error_append_hint(errp, "The valid types are: %s", + mc->valid_cpu_types[0]); + for (i = 1; mc->valid_cpu_types[i]; i++) { + error_append_hint(errp, ", %s", mc->valid_cpu_types[i]); + } + + error_append_hint(errp, "\n"); + return; + } + } + + /* Check if CPU type is deprecated and warn if so */ + cc = CPU_CLASS(oc); + if (cc && cc->deprecation_note) { + warn_report("CPU model %s is deprecated -- %s", + machine->cpu_type, cc->deprecation_note); + } +} void machine_run_board_init(MachineState *machine, const char *mem_path, Error **errp) { ERRP_GUARD(); MachineClass *machine_class = MACHINE_GET_CLASS(machine); - ObjectClass *oc = object_class_by_name(machine->cpu_type); - CPUClass *cc; Error *local_err = NULL; /* This checkpoint is required by replay to separate prior clock @@ -1448,42 +1486,10 @@ void machine_run_board_init(MachineState *machine, const char *mem_path, Error * machine->ram = machine_consume_memdev(machine, machine->memdev); } - /* If the machine supports the valid_cpu_types check and the user - * specified a CPU with -cpu check here that the user CPU is supported. - */ - if (machine_class->valid_cpu_types && machine->cpu_type) { - int i; - - for (i = 0; machine_class->valid_cpu_types[i]; i++) { - if (object_class_dynamic_cast(oc, - machine_class->valid_cpu_types[i])) { - /* The user specified CPU is in the valid field, we are - * good to go. - */ - break; - } - } - - if (!machine_class->valid_cpu_types[i]) { - /* The user specified CPU is not valid */ - error_setg(&local_err, "Invalid CPU type: %s", machine->cpu_type); - error_append_hint(&local_err, "The valid types are: %s", - machine_class->valid_cpu_types[0]); - for (i = 1; machine_class->valid_cpu_types[i]; i++) { - error_append_hint(&local_err, ", %s", - machine_class->valid_cpu_types[i]); - } - error_append_hint(&local_err, "\n"); - - error_propagate(errp, local_err); - } - } - - /* Check if CPU type is deprecated and warn if so */ - cc = CPU_CLASS(oc); - if (cc && cc->deprecation_note) { - warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, - cc->deprecation_note); + /* Check if the CPU type is supported */ + is_cpu_type_supported(machine, &local_err); + if (local_err) { + error_propagate(errp, local_err); } if (machine->cgs) { From patchwork Thu Nov 2 00:24:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443200 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0AEA9C0018A for ; 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Thu, 2 Nov 2023 00:32:47 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 28/33] machine: Print CPU model name instead of CPU type name Date: Thu, 2 Nov 2023 10:24:55 +1000 Message-ID: <20231102002500.1750692-29-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The names of supported CPU models instead of CPU types should be printed when the user specified CPU type isn't supported, to be consistent with the output from '-cpu ?'. Correct the error messages to print CPU model names instead of CPU type names. Signed-off-by: Gavin Shan --- hw/core/machine.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/hw/core/machine.c b/hw/core/machine.c index 2d78692df1..1dd0f8831b 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -1391,6 +1391,7 @@ static void is_cpu_type_supported(MachineState *machine, Error **errp) MachineClass *mc = MACHINE_GET_CLASS(machine); ObjectClass *oc = object_class_by_name(machine->cpu_type); CPUClass *cc; + char *model; int i; /* @@ -1407,11 +1408,21 @@ static void is_cpu_type_supported(MachineState *machine, Error **errp) /* The user specified CPU type isn't valid */ if (!mc->valid_cpu_types[i]) { - error_setg(errp, "Invalid CPU type: %s", machine->cpu_type); - error_append_hint(errp, "The valid types are: %s", - mc->valid_cpu_types[0]); + model = cpu_model_from_type(machine->cpu_type); + g_assert(model != NULL); + error_setg(errp, "Invalid CPU type: %s", model); + g_free(model); + + model = cpu_model_from_type(mc->valid_cpu_types[0]); + g_assert(model != NULL); + error_append_hint(errp, "The valid types are: %s", model); + g_free(model); + for (i = 1; mc->valid_cpu_types[i]; i++) { - error_append_hint(errp, ", %s", mc->valid_cpu_types[i]); + model = cpu_model_from_type(mc->valid_cpu_types[i]); + g_assert(model != NULL); + error_append_hint(errp, ", %s", model); + g_free(model); } error_append_hint(errp, "\n"); From patchwork Thu Nov 2 00:24:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443185 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DB1B8C4332F for ; Thu, 2 Nov 2023 00:33:47 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qyLec-0006wZ-F9; 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Wed, 01 Nov 2023 20:33:21 -0400 X-MC-Unique: TAGpdD2rP6-J9fJVLscs6Q-1 Received: from smtp.corp.redhat.com (int-mx08.intmail.prod.int.rdu2.redhat.com [10.11.54.8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id A5E853C0F66F; Thu, 2 Nov 2023 00:33:18 +0000 (UTC) Received: from gshan.redhat.com (unknown [10.64.136.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 5F673C0FE05; Thu, 2 Nov 2023 00:33:03 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 29/33] hw/arm/virt: Check CPU type in machine_run_board_init() Date: Thu, 2 Nov 2023 10:24:56 +1000 Message-ID: <20231102002500.1750692-30-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do the check by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/arm/virt.c | 21 +++------------------ 1 file changed, 3 insertions(+), 18 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 92085d2d8f..5bacd3a7f0 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -203,7 +203,7 @@ static const int a15irqmap[] = { [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */ }; -static const char *valid_cpus[] = { +static const char * const valid_cpu_types[] = { #ifdef CONFIG_TCG ARM_CPU_TYPE_NAME("cortex-a7"), ARM_CPU_TYPE_NAME("cortex-a15"), @@ -221,20 +221,9 @@ static const char *valid_cpus[] = { ARM_CPU_TYPE_NAME("cortex-a57"), ARM_CPU_TYPE_NAME("host"), ARM_CPU_TYPE_NAME("max"), + NULL }; -static bool cpu_type_valid(const char *cpu) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) { - if (strcmp(cpu, valid_cpus[i]) == 0) { - return true; - } - } - return false; -} - static void create_randomness(MachineState *ms, const char *node) { struct { @@ -2034,11 +2023,6 @@ static void machvirt_init(MachineState *machine) unsigned int smp_cpus = machine->smp.cpus; unsigned int max_cpus = machine->smp.max_cpus; - if (!cpu_type_valid(machine->cpu_type)) { - error_report("mach-virt: CPU type %s not supported", machine->cpu_type); - exit(1); - } - possible_cpus = mc->possible_cpu_arch_ids(machine); /* @@ -2957,6 +2941,7 @@ static void virt_machine_class_init(ObjectClass *oc, void *data) #else mc->default_cpu_type = ARM_CPU_TYPE_NAME("max"); #endif + mc->valid_cpu_types = valid_cpu_types; mc->get_default_cpu_node_id = virt_get_default_cpu_node_id; mc->kvm_type = virt_kvm_type; assert(!mc->get_hotplug_handler); From patchwork Thu Nov 2 00:24:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443190 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C29FC4332F for ; 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Thu, 2 Nov 2023 00:33:18 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 30/33] hw/arm/virt: Hide host CPU model for tcg Date: Thu, 2 Nov 2023 10:24:57 +1000 Message-ID: <20231102002500.1750692-31-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; 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For example, the following error messages are seen when the guest is started with option '-cpu cortex-a8' on tcg. ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \ assertion failed: (model != NULL) Bail out! ERROR:../hw/core/machine.c:1423:is_cpu_type_supported: \ assertion failed: (model != NULL) Aborted (core dumped) Hide 'host' CPU model until KVM or HVF is enabled. With this applied, the valid CPU models can be shown. qemu-system-aarch64: Invalid CPU type: cortex-a8 The valid types are: cortex-a7, cortex-a15, cortex-a35, \ cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, \ neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53, \ cortex-a57, max Signed-off-by: Gavin Shan Reviewed-by: Richard Henderson --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 5bacd3a7f0..1ac2e29244 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -219,7 +219,9 @@ static const char * const valid_cpu_types[] = { #endif ARM_CPU_TYPE_NAME("cortex-a53"), ARM_CPU_TYPE_NAME("cortex-a57"), +#if defined(CONFIG_KVM) || defined(CONFIG_HVF) ARM_CPU_TYPE_NAME("host"), +#endif ARM_CPU_TYPE_NAME("max"), NULL }; From patchwork Thu Nov 2 00:24:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443189 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6E7BAC4167B for ; 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Thu, 2 Nov 2023 00:33:35 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 31/33] hw/arm/sbsa-ref: Check CPU type in machine_run_board_init() Date: Thu, 2 Nov 2023 10:24:58 +1000 Message-ID: <20231102002500.1750692-32-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do it by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Leif Lindholm Reviewed-by: Richard Henderson --- hw/arm/sbsa-ref.c | 21 +++------------------ 1 file changed, 3 insertions(+), 18 deletions(-) diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index bce44690e5..64c321f627 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -144,27 +144,16 @@ static const int sbsa_ref_irqmap[] = { [SBSA_GWDT_WS0] = 16, }; -static const char * const valid_cpus[] = { +static const char * const valid_cpu_types[] = { ARM_CPU_TYPE_NAME("cortex-a57"), ARM_CPU_TYPE_NAME("cortex-a72"), ARM_CPU_TYPE_NAME("neoverse-n1"), ARM_CPU_TYPE_NAME("neoverse-v1"), ARM_CPU_TYPE_NAME("neoverse-n2"), ARM_CPU_TYPE_NAME("max"), + NULL, }; -static bool cpu_type_valid(const char *cpu) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) { - if (strcmp(cpu, valid_cpus[i]) == 0) { - return true; - } - } - return false; -} - static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) { uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER; @@ -730,11 +719,6 @@ static void sbsa_ref_init(MachineState *machine) const CPUArchIdList *possible_cpus; int n, sbsa_max_cpus; - if (!cpu_type_valid(machine->cpu_type)) { - error_report("sbsa-ref: CPU type %s not supported", machine->cpu_type); - exit(1); - } - if (kvm_enabled()) { error_report("sbsa-ref: KVM is not supported for this machine"); exit(1); @@ -899,6 +883,7 @@ static void sbsa_ref_class_init(ObjectClass *oc, void *data) mc->init = sbsa_ref_init; mc->desc = "QEMU 'SBSA Reference' ARM Virtual Machine"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("neoverse-n1"); + mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = 512; mc->pci_allow_0_address = true; mc->minimum_page_bits = 12; From patchwork Thu Nov 2 00:24:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443201 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91DD3C4332F for ; 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Thu, 2 Nov 2023 00:33:50 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 32/33] hw/arm: Check CPU type in machine_run_board_init() Date: Thu, 2 Nov 2023 10:24:59 +1000 Message-ID: <20231102002500.1750692-33-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.133.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do it by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Richard Henderson --- hw/arm/bananapi_m2u.c | 12 ++++++------ hw/arm/cubieboard.c | 12 ++++++------ hw/arm/mps2-tz.c | 20 ++++++++++++++------ hw/arm/mps2.c | 25 +++++++++++++++++++------ hw/arm/msf2-som.c | 12 ++++++------ hw/arm/musca.c | 13 ++++++------- hw/arm/npcm7xx_boards.c | 13 ++++++------- hw/arm/orangepi.c | 12 ++++++------ 8 files changed, 69 insertions(+), 50 deletions(-) diff --git a/hw/arm/bananapi_m2u.c b/hw/arm/bananapi_m2u.c index 8f24b18d8c..5eed11fe03 100644 --- a/hw/arm/bananapi_m2u.c +++ b/hw/arm/bananapi_m2u.c @@ -30,6 +30,11 @@ static struct arm_boot_info bpim2u_binfo; +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a7"), + NULL +}; + /* * R40 can boot from mmc0 and mmc2, and bpim2u has two mmc interface, one is * connected to sdcard and another mount an emmc media. @@ -71,12 +76,6 @@ static void bpim2u_init(MachineState *machine) exit(1); } - /* Only allow Cortex-A7 for this board */ - if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) { - error_report("This board can only be used with cortex-a7 CPU"); - exit(1); - } - r40 = AW_R40(object_new(TYPE_AW_R40)); object_property_add_child(OBJECT(machine), "soc", OBJECT(r40)); object_unref(OBJECT(r40)); @@ -139,6 +138,7 @@ static void bpim2u_machine_init(MachineClass *mc) mc->max_cpus = AW_R40_NUM_CPUS; mc->default_cpus = AW_R40_NUM_CPUS; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_ram_id = "bpim2u.ram"; } diff --git a/hw/arm/cubieboard.c b/hw/arm/cubieboard.c index 29146f5018..7d9bb6c837 100644 --- a/hw/arm/cubieboard.c +++ b/hw/arm/cubieboard.c @@ -29,6 +29,11 @@ static struct arm_boot_info cubieboard_binfo = { .board_id = 0x1008, }; +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a8"), + NULL +}; + static void cubieboard_init(MachineState *machine) { AwA10State *a10; @@ -52,12 +57,6 @@ static void cubieboard_init(MachineState *machine) exit(1); } - /* Only allow Cortex-A8 for this board */ - if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a8")) != 0) { - error_report("This board can only be used with cortex-a8 CPU"); - exit(1); - } - a10 = AW_A10(object_new(TYPE_AW_A10)); object_property_add_child(OBJECT(machine), "soc", OBJECT(a10)); object_unref(OBJECT(a10)); @@ -116,6 +115,7 @@ static void cubieboard_machine_init(MachineClass *mc) { mc->desc = "cubietech cubieboard (Cortex-A8)"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a8"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->init = cubieboard_init; mc->block_default_type = IF_IDE; diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index eae3639da2..d7bb6d965f 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -190,6 +190,16 @@ OBJECT_DECLARE_TYPE(MPS2TZMachineState, MPS2TZMachineClass, MPS2TZ_MACHINE) /* For cpu{0,1}_mpu_{ns,s}, means "leave at SSE's default value" */ #define MPU_REGION_DEFAULT UINT32_MAX +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m33"), + NULL +}; + +static const char * const mps3tz_an547_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m55"), + NULL +}; + static const uint32_t an505_oscclk[] = { 40000000, 24580000, @@ -809,12 +819,6 @@ static void mps2tz_common_init(MachineState *machine) int num_ppcs; int i; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - if (machine->ram_size != mc->default_ram_size) { char *sz = size_to_str(mc->default_ram_size); error_report("Invalid RAM size, should be %s", sz); @@ -1321,6 +1325,7 @@ static void mps2tz_an505_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN505; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045050; mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */ mmc->apb_periph_frq = mmc->sysclk_frq; @@ -1350,6 +1355,7 @@ static void mps2tz_an521_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN521; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045210; mmc->sysclk_frq = 20 * 1000 * 1000; /* 20MHz */ mmc->apb_periph_frq = mmc->sysclk_frq; @@ -1379,6 +1385,7 @@ static void mps3tz_an524_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN524; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045240; mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */ mmc->apb_periph_frq = mmc->sysclk_frq; @@ -1413,6 +1420,7 @@ static void mps3tz_an547_class_init(ObjectClass *oc, void *data) mc->max_cpus = mc->default_cpus; mmc->fpga_type = FPGA_AN547; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m55"); + mc->valid_cpu_types = mps3tz_an547_valid_cpu_types; mmc->scc_id = 0x41055470; mmc->sysclk_frq = 32 * 1000 * 1000; /* 32MHz */ mmc->apb_periph_frq = 25 * 1000 * 1000; /* 25MHz */ diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index d92fd60684..691b0803cf 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -110,6 +110,21 @@ OBJECT_DECLARE_TYPE(MPS2MachineState, MPS2MachineClass, MPS2_MACHINE) */ #define REFCLK_FRQ (1 * 1000 * 1000) +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m3"), + NULL +}; + +static const char * const mps2_an386_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m4"), + NULL +}; + +static const char * const mps2_an500_valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m7"), + NULL +}; + /* Initialize the auxiliary RAM region @mr and map it into * the memory map at @base. */ @@ -140,12 +155,6 @@ static void mps2_common_init(MachineState *machine) DeviceState *armv7m, *sccdev; int i; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - if (machine->ram_size != mc->default_ram_size) { char *sz = size_to_str(mc->default_ram_size); error_report("Invalid RAM size, should be %s", sz); @@ -484,6 +493,7 @@ static void mps2_an385_class_init(ObjectClass *oc, void *data) mc->desc = "ARM MPS2 with AN385 FPGA image for Cortex-M3"; mmc->fpga_type = FPGA_AN385; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41043850; mmc->psram_base = 0x21000000; mmc->ethernet_base = 0x40200000; @@ -498,6 +508,7 @@ static void mps2_an386_class_init(ObjectClass *oc, void *data) mc->desc = "ARM MPS2 with AN386 FPGA image for Cortex-M4"; mmc->fpga_type = FPGA_AN386; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); + mc->valid_cpu_types = mps2_an386_valid_cpu_types; mmc->scc_id = 0x41043860; mmc->psram_base = 0x21000000; mmc->ethernet_base = 0x40200000; @@ -512,6 +523,7 @@ static void mps2_an500_class_init(ObjectClass *oc, void *data) mc->desc = "ARM MPS2 with AN500 FPGA image for Cortex-M7"; mmc->fpga_type = FPGA_AN500; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m7"); + mc->valid_cpu_types = mps2_an500_valid_cpu_types; mmc->scc_id = 0x41045000; mmc->psram_base = 0x60000000; mmc->ethernet_base = 0xa0000000; @@ -526,6 +538,7 @@ static void mps2_an511_class_init(ObjectClass *oc, void *data) mc->desc = "ARM MPS2 with AN511 DesignStart FPGA image for Cortex-M3"; mmc->fpga_type = FPGA_AN511; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); + mc->valid_cpu_types = valid_cpu_types; mmc->scc_id = 0x41045110; mmc->psram_base = 0x21000000; mmc->ethernet_base = 0x40200000; diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c index 7b3106c790..470951a006 100644 --- a/hw/arm/msf2-som.c +++ b/hw/arm/msf2-som.c @@ -42,6 +42,11 @@ #define M2S010_ENVM_SIZE (256 * KiB) #define M2S010_ESRAM_SIZE (64 * KiB) +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m3"), + NULL +}; + static void emcraft_sf2_s2s010_init(MachineState *machine) { DeviceState *dev; @@ -55,12 +60,6 @@ static void emcraft_sf2_s2s010_init(MachineState *machine) MemoryRegion *ddr = g_new(MemoryRegion, 1); Clock *m3clk; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE, &error_fatal); memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr); @@ -109,6 +108,7 @@ static void emcraft_sf2_machine_init(MachineClass *mc) mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)"; mc->init = emcraft_sf2_s2s010_init; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3"); + mc->valid_cpu_types = valid_cpu_types; } DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init) diff --git a/hw/arm/musca.c b/hw/arm/musca.c index 6eeee57c9d..9bd78fd531 100644 --- a/hw/arm/musca.c +++ b/hw/arm/musca.c @@ -102,6 +102,11 @@ OBJECT_DECLARE_TYPE(MuscaMachineState, MuscaMachineClass, MUSCA_MACHINE) /* Slow 32Khz S32KCLK frequency in Hz */ #define S32KCLK_FRQ (32 * 1000) +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-m33"), + NULL +}; + static qemu_irq get_sse_irq_in(MuscaMachineState *mms, int irqno) { /* Return a qemu_irq which will signal IRQ n to all CPUs in the SSE. */ @@ -355,7 +360,6 @@ static void musca_init(MachineState *machine) { MuscaMachineState *mms = MUSCA_MACHINE(machine); MuscaMachineClass *mmc = MUSCA_MACHINE_GET_CLASS(mms); - MachineClass *mc = MACHINE_GET_CLASS(machine); MemoryRegion *system_memory = get_system_memory(); DeviceState *ssedev; DeviceState *dev_splitter; @@ -366,12 +370,6 @@ static void musca_init(MachineState *machine) assert(mmc->num_irqs <= MUSCA_NUMIRQ_MAX); assert(mmc->num_mpcs <= MUSCA_MPC_MAX); - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with CPU %s", - mc->default_cpu_type); - exit(1); - } - mms->sysclk = clock_new(OBJECT(machine), "SYSCLK"); clock_set_hz(mms->sysclk, SYSCLK_FRQ); mms->s32kclk = clock_new(OBJECT(machine), "S32KCLK"); @@ -609,6 +607,7 @@ static void musca_class_init(ObjectClass *oc, void *data) mc->min_cpus = mc->default_cpus; mc->max_cpus = mc->default_cpus; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m33"); + mc->valid_cpu_types = valid_cpu_types; mc->init = musca_init; } diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c index 2aef579aac..ca37c893b4 100644 --- a/hw/arm/npcm7xx_boards.c +++ b/hw/arm/npcm7xx_boards.c @@ -55,6 +55,11 @@ static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin"; +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL +}; + static void npcm7xx_load_bootrom(MachineState *machine, NPCM7xxState *soc) { const char *bios_name = machine->firmware ?: npcm7xx_default_bootrom; @@ -121,15 +126,8 @@ static NPCM7xxState *npcm7xx_create_soc(MachineState *machine, uint32_t hw_straps) { NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_GET_CLASS(machine); - MachineClass *mc = MACHINE_CLASS(nmc); Object *obj; - if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) { - error_report("This board can only be used with %s", - mc->default_cpu_type); - exit(1); - } - obj = object_new_with_props(nmc->soc_type, OBJECT(machine), "soc", &error_abort, NULL); object_property_set_uint(obj, "power-on-straps", hw_straps, &error_abort); @@ -469,6 +467,7 @@ static void npcm7xx_machine_class_init(ObjectClass *oc, void *data) mc->no_parallel = 1; mc->default_ram_id = "ram"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); + mc->valid_cpu_types = valid_cpu_types; } /* diff --git a/hw/arm/orangepi.c b/hw/arm/orangepi.c index f3784d45ca..4e8a43978d 100644 --- a/hw/arm/orangepi.c +++ b/hw/arm/orangepi.c @@ -29,6 +29,11 @@ static struct arm_boot_info orangepi_binfo; +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a7"), + NULL +}; + static void orangepi_init(MachineState *machine) { AwH3State *h3; @@ -49,12 +54,6 @@ static void orangepi_init(MachineState *machine) exit(1); } - /* Only allow Cortex-A7 for this board */ - if (strcmp(machine->cpu_type, ARM_CPU_TYPE_NAME("cortex-a7")) != 0) { - error_report("This board can only be used with cortex-a7 CPU"); - exit(1); - } - h3 = AW_H3(object_new(TYPE_AW_H3)); object_property_add_child(OBJECT(machine), "soc", OBJECT(h3)); object_unref(OBJECT(h3)); @@ -119,6 +118,7 @@ static void orangepi_machine_init(MachineClass *mc) mc->max_cpus = AW_H3_NUM_CPUS; mc->default_cpus = AW_H3_NUM_CPUS; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_size = 1 * GiB; mc->default_ram_id = "orangepi.ram"; } From patchwork Thu Nov 2 00:25:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 13443203 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1619EC41535 for ; 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Thu, 2 Nov 2023 00:34:07 +0000 (UTC) From: Gavin Shan To: qemu-arm@nongnu.org Cc: qemu-devel@nongnu.org, qemu-riscv@nongnu.org, qemu-ppc@nongnu.org, qemu-s390x@nongnu.org, philmd@linaro.org, clg@kaod.org, imammedo@redhat.com, imp@bsdimp.com, kevans@freebsd.org, richard.henderson@linaro.org, pbonzini@redhat.com, peter.maydell@linaro.org, b.galvani@gmail.com, strahinja.p.jankovic@gmail.com, sundeep.lkml@gmail.com, kfting@nuvoton.com, wuhaotsh@google.com, nieklinnenbank@gmail.com, rad@semihalf.com, quic_llindhol@quicinc.com, marcin.juszkiewicz@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, wangyanan55@huawei.com, laurent@vivier.eu, vijai@behindbytes.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, liweiwei@iscas.ac.cn, dbarboza@ventanamicro.com, zhiwei_liu@linux.alibaba.com, mrolnik@gmail.com, edgar.iglesias@gmail.com, bcain@quicinc.com, gaosong@loongson.cn, aurelien@aurel32.net, jiaxun.yang@flygoat.com, aleksandar.rikalo@syrmia.com, chenhuacai@kernel.org, crwulff@gmail.com, marex@denx.de, shorne@gmail.com, npiggin@gmail.com, ysato@users.sourceforge.jp, david@redhat.com, thuth@redhat.com, iii@linux.ibm.com, kbastian@mail.uni-paderborn.de, jcmvbkbc@gmail.com, shan.gavin@gmail.com Subject: [PATCH v4 33/33] hw/riscv/shakti_c: Check CPU type in machine_run_board_init() Date: Thu, 2 Nov 2023 10:25:00 +1000 Message-ID: <20231102002500.1750692-34-gshan@redhat.com> In-Reply-To: <20231102002500.1750692-1-gshan@redhat.com> References: <20231102002500.1750692-1-gshan@redhat.com> MIME-Version: 1.0 MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.8 Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.393, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Set mc->valid_cpu_types so that the user specified CPU type can be validated in machine_run_board_init(). We needn't to do it by ourselves. Signed-off-by: Gavin Shan Reviewed-by: Philippe Mathieu-Daudé --- hw/riscv/shakti_c.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/riscv/shakti_c.c b/hw/riscv/shakti_c.c index 12ea74b032..fc83ed4db4 100644 --- a/hw/riscv/shakti_c.c +++ b/hw/riscv/shakti_c.c @@ -28,6 +28,10 @@ #include "exec/address-spaces.h" #include "hw/riscv/boot.h" +static const char * const valid_cpu_types[] = { + RISCV_CPU_TYPE_NAME("shakti-c"), + NULL +}; static const struct MemmapEntry { hwaddr base; @@ -47,12 +51,6 @@ static void shakti_c_machine_state_init(MachineState *mstate) ShaktiCMachineState *sms = RISCV_SHAKTI_MACHINE(mstate); MemoryRegion *system_memory = get_system_memory(); - /* Allow only Shakti C CPU for this platform */ - if (strcmp(mstate->cpu_type, TYPE_RISCV_CPU_SHAKTI_C) != 0) { - error_report("This board can only be used with Shakti C CPU"); - exit(1); - } - /* Initialize SoC */ object_initialize_child(OBJECT(mstate), "soc", &sms->soc, TYPE_RISCV_SHAKTI_SOC); @@ -85,6 +83,7 @@ static void shakti_c_machine_class_init(ObjectClass *klass, void *data) mc->desc = "RISC-V Board compatible with Shakti SDK"; mc->init = shakti_c_machine_state_init; mc->default_cpu_type = TYPE_RISCV_CPU_SHAKTI_C; + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_id = "riscv.shakti.c.ram"; }