From patchwork Thu Nov 2 12:26:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 13443703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 14C7AC4332F for ; Thu, 2 Nov 2023 12:27:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234898AbjKBM1q (ORCPT ); Thu, 2 Nov 2023 08:27:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60560 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234681AbjKBM1p (ORCPT ); Thu, 2 Nov 2023 08:27:45 -0400 Received: from esa6.hc3370-68.iphmx.com (esa6.hc3370-68.iphmx.com [216.71.155.175]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3B3E125; Thu, 2 Nov 2023 05:27:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1698928059; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=rOPa6SsJffV8///cKRLOi92k77I71pT8DvN4OZJMNAE=; b=a5Y5KekoHD/4OMuutGEnFqRa/P3Wsy/q+S4m9sikc3uQ52XWixpAO1Bz Z/0X4OELsvG+AEed6aURtpR5kLlyFO/RvUeiWg2zhROVrdQ0o+x6nk9nz z6sDyXlcstFG7sKRkYiwvtJub+Rdi+r2Uq0Ulr5njwUr+/rEeUk14IfCr g=; X-CSE-ConnectionGUID: pNIzOpSTTbaXx/hvRfdv1w== X-CSE-MsgGUID: LKATxiLzTwO33wT25b6a+g== Authentication-Results: esa6.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none X-SBRS: 4.0 X-MesageID: 126596382 X-Ironport-Server: esa6.hc3370-68.iphmx.com X-Remote-IP: 162.221.159.70 X-Policy: $RELAYED X-ThreatScanner-Verdict: Negative IronPort-Data: A9a23:rdfd7KwIbs2uzHGBV7F6t+dQwCrEfRIJ4+MujC+fZmUNrF6WrkUPy jQWXmiObquCNDb3L49wOYni8kgF78ODzdA2TFRqpCAxQypGp/SeCIXCJC8cHc8wwu7rFxs7s ppEOrEsCOhuExcwcz/0auCJQUFUjPzOHvykTrecZkidfCc8IA85kxVvhuUltYBhhNm9Emult Mj75sbSIzdJ4RYtWo4vw/zF8EgHUMja4mtC5QVnPaoT4DcyqlFOZH4hDfDpR5fHatE88t6SH 47r0Ly/92XFyBYhYvvNfmHTKxBirhb6ZGBiu1IOM0SQqkEqSh8ai87XAME0e0ZP4whlqvgqo Dl7WT5cfi9yVkHEsLx1vxC1iEiSN4UekFPMCSDXXcB+UyQq2pYjqhljJBheAGEWxgp4KXlo1 O4/MAsxUhqKt/LxwKyBROVy39t2eaEHPKtH0p1h5TTQDPJgSpHfWaTao9Rf2V/chOgXQ6yYP ZBAL2MyPVKfO3WjOX9OYH46tM6uimPybHtzr1WNqLBsy2PS0BZwwP7mN9+9ltmiHJ8LwxfG/ TKcl4j/KjU5HeCPyB6Xzm2L3bTQoXmmUtwbV7Lto5aGh3XMnzdOWXX6T2CTouaRjk+4RsIZI EsRkgI0qqIy3E+mVN/wW1u/unHslhoEWtdKGuk78wClyafO5QudQG8eQVZpaNUnpcYwSi4C0 16ChdTyAjJz9raSTBq19aaPhTazMjISNmgMeWkPSg5ty9Xuq5wyphfORcxkC6m7kpv+HjSY6 yuWoTYzwaoajcoj1722u1vAhlqEpYnNQ0gw6xTaREql9g4/b4mgD6Sk6F3a8exBap2YUFCHv XMEs8iG4aYFCpTlvDaQW/5LFbel6uyeNzv0gUZiWZIm8lyF+WO4YYFWpjxkIlx1GsYcdHniZ 0q7kRMBurdQMWGsYKsxZJi+Y+wyyaH8G9P/U7XYdNtQb4I0ZF/Z1D9haFTW3G33lkUo16YlN v+zdceqEGZfEa9m5CS5Sv1b0rIxwC06g2TJSvjTyxWhzKrbZG+NRK0bGEWBY/p/766epgjRt dFFOKOiwQ13Wen/by+Ht4IeRXgGJGY2Q5D/rddacMaHIwx7CCcgDePcxfUqfIkNt6RNn8/a7 226QAlTz1+XrXjGLwqNQmpuZLPmQdB0qndTFSYsMFKn0nE4SYmo66gbet08erxP3PBsye5cS /gDZtmaBfJOWnLL9lw1YYf9pZZ+XBWtixiHMyesbH44ZZEIbwXP9s7Mfw3h7iACAyO788wkr NWI0gLdXIpGRAl4CsvSQOygwkn3vnUHnu92GUzSLbF7Z0jttoxrNgTyg+UxLsVKLg/MrgZ2z C7PX01e/7OU5dZooZ+W3chosrtFDcNmOGtIOHHg0Yq8PBnKuWq9+4FMTr+XKGW1uHzPxEmyW QlE56iiYa1XzQgW7tYU/6VDl/xku4W1z1NO5kE0RC+VMg7D5qZIeyHehaFyWrtxKqi1UOdcc mmI4NBecY6RIsLjH0V5yOENNb/biqh8dtU/950IzKTGCMxfpuHvvb16ZUXktcCkBOId3HkZ6 ekgotUKzAe0lwAnNN2L5ggNqTXcfiJbDft55shKaGMOtubM4ggcCaEw9wevvcrRAzmyGhJCz sCoaFrq2O0Hmxuqn4sbHnnRx+tN7akzVORx5AZafTyhw4OV7sLbKTUNqVzbuCwJlEQYuw+yU 0A3X3BIyVKmpmcx3pAaATD2RWmsxnSxoyTM9rfAr0WBJ2HAa4AHBDRV1TqllKzBz19hQw== IronPort-HdrOrdr: A9a23:dqNQ0Ksrw7zhQbipVYk5TQ3T7skD29V00zEX/kB9WHVpmwKj9v xG+85rsyMc6QxhP03I/OrrBEDuex7hHPJOjbX5eI3SPzUPVgOTXf1fBMjZskDd8xSXzJ8j6U 4YSdkBNDSTNzhHZLfBkW2F+o0bsaC6GcmT7I+0854ud3AJV0gH1WhE422gYyhLrWd9a6bRPa Dsl/Zvln6PeWk3cs/+PXUMRe7Fzue77q7OUFopBwMH9ALLtj+j6Kf7Hx+Ety1uKA9n8PMN8X Xljwe83amos+i6xhjAk0ff4o9bgsGJ8KoxOOW8zuYUNxTxgUKTaINtV6bqhkFMnMij5Ew2kN 7FvhcnON4b0QKgQl2I X-Talos-CUID: 9a23:ZJ8ghGDrwN7Ensr6EzFB1VwzAvsZTnfU/GeXI1GCB2p3EaLAHA== X-Talos-MUID: 9a23:nGNQYAzsbmO5r+vbiagUFTc/0BKaqICNIXwdkLEUh9ajbndvB23Ahmq+AYByfw== X-IronPort-AV: E=Sophos;i="6.03,271,1694750400"; d="scan'208";a="126596382" From: Andrew Cooper Date: Thu, 2 Nov 2023 12:26:19 +0000 Subject: [PATCH 1/3] x86/apic: Drop apic::delivery_mode MIME-Version: 1.0 Message-ID: <20231102-x86-apic-v1-1-bf049a2a0ed6@citrix.com> References: <20231102-x86-apic-v1-0-bf049a2a0ed6@citrix.com> In-Reply-To: <20231102-x86-apic-v1-0-bf049a2a0ed6@citrix.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , , "H. Peter Anvin" , Steve Wahl , Justin Ernst , Kyle Meyer , Dimitri Sivanich , "Russ Anderson" , Darren Hart , "Andy Shevchenko" , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , "Dexuan Cui" , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas CC: , , , , Andrew Cooper X-Mailer: b4 0.12.4 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This field is set to APIC_DELIVERY_MODE_FIXED in all cases, and is read exactly once. Fold the constant in uv_program_mmr() and drop the field. Searching for the origin of the stale HyperV comment reveals commit a31e58e129f7 ("x86/apic: Switch all APICs to Fixed delivery mode") which notes: As a consequence of this change, the apic::irq_delivery_mode field is now pointless, but this needs to be cleaned up in a separate patch. 6 years is long enough for this technical debt to have survived. Signed-off-by: Andrew Cooper --- arch/x86/include/asm/apic.h | 2 -- arch/x86/kernel/apic/apic_flat_64.c | 2 -- arch/x86/kernel/apic/apic_noop.c | 1 - arch/x86/kernel/apic/apic_numachip.c | 2 -- arch/x86/kernel/apic/bigsmp_32.c | 1 - arch/x86/kernel/apic/probe_32.c | 1 - arch/x86/kernel/apic/x2apic_cluster.c | 1 - arch/x86/kernel/apic/x2apic_phys.c | 1 - arch/x86/kernel/apic/x2apic_uv_x.c | 1 - arch/x86/platform/uv/uv_irq.c | 2 +- drivers/pci/controller/pci-hyperv.c | 7 ------- 11 files changed, 1 insertion(+), 20 deletions(-) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 5af4ec1a0f71..841afbd7bfe7 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -272,8 +272,6 @@ struct apic { void (*send_IPI_all)(int vector); void (*send_IPI_self)(int vector); - enum apic_delivery_modes delivery_mode; - u32 disable_esr : 1, dest_mode_logical : 1, x2apic_set_max_apicid : 1; diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c index 032a84e2c3cc..e526b226910b 100644 --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c @@ -82,7 +82,6 @@ static struct apic apic_flat __ro_after_init = { .acpi_madt_oem_check = flat_acpi_madt_oem_check, .apic_id_registered = default_apic_id_registered, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, .disable_esr = 0, @@ -153,7 +152,6 @@ static struct apic apic_physflat __ro_after_init = { .acpi_madt_oem_check = physflat_acpi_madt_oem_check, .apic_id_registered = default_apic_id_registered, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, .disable_esr = 0, diff --git a/arch/x86/kernel/apic/apic_noop.c b/arch/x86/kernel/apic/apic_noop.c index 966d7cf10b95..70e7dfc3cc84 100644 --- a/arch/x86/kernel/apic/apic_noop.c +++ b/arch/x86/kernel/apic/apic_noop.c @@ -45,7 +45,6 @@ static void noop_apic_write(u32 reg, u32 val) struct apic apic_noop __ro_after_init = { .name = "noop", - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, .disable_esr = 0, diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c index 63f3d7be9dc7..8f5a42ad1f9f 100644 --- a/arch/x86/kernel/apic/apic_numachip.c +++ b/arch/x86/kernel/apic/apic_numachip.c @@ -222,7 +222,6 @@ static const struct apic apic_numachip1 __refconst = { .probe = numachip1_probe, .acpi_madt_oem_check = numachip1_acpi_madt_oem_check, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, .disable_esr = 0, @@ -259,7 +258,6 @@ static const struct apic apic_numachip2 __refconst = { .probe = numachip2_probe, .acpi_madt_oem_check = numachip2_acpi_madt_oem_check, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, .disable_esr = 0, diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c index 0e5535add4b5..863c3002a574 100644 --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c @@ -80,7 +80,6 @@ static struct apic apic_bigsmp __ro_after_init = { .name = "bigsmp", .probe = probe_bigsmp, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, .disable_esr = 1, diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c index 9a06df6cdd68..f851ccf1e14f 100644 --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -35,7 +35,6 @@ static struct apic apic_default __ro_after_init = { .probe = probe_default, .apic_id_registered = default_apic_id_registered, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, .disable_esr = 0, diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c index affbff65e497..7d15f6c3b718 100644 --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c @@ -227,7 +227,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = { .probe = x2apic_cluster_probe, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = true, .disable_esr = 0, diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c index 788cdb4ee394..8bb740e22b7d 100644 --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c @@ -145,7 +145,6 @@ static struct apic apic_x2apic_phys __ro_after_init = { .probe = x2apic_phys_probe, .acpi_madt_oem_check = x2apic_acpi_madt_oem_check, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, .disable_esr = 0, diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index 7d304ef1a7f5..ae4f0c1a7b43 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c @@ -805,7 +805,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = { .probe = uv_probe, .acpi_madt_oem_check = uv_acpi_madt_oem_check, - .delivery_mode = APIC_DELIVERY_MODE_FIXED, .dest_mode_logical = false, .disable_esr = 0, diff --git a/arch/x86/platform/uv/uv_irq.c b/arch/x86/platform/uv/uv_irq.c index 4221259a5870..a379501b7a69 100644 --- a/arch/x86/platform/uv/uv_irq.c +++ b/arch/x86/platform/uv/uv_irq.c @@ -35,7 +35,7 @@ static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info) mmr_value = 0; entry = (struct uv_IO_APIC_route_entry *)&mmr_value; entry->vector = cfg->vector; - entry->delivery_mode = apic->delivery_mode; + entry->delivery_mode = APIC_DELIVERY_MODE_FIXED; entry->dest_mode = apic->dest_mode_logical; entry->polarity = 0; entry->trigger = 0; diff --git a/drivers/pci/controller/pci-hyperv.c b/drivers/pci/controller/pci-hyperv.c index bed3cefdaf19..f5d2ef8572e7 100644 --- a/drivers/pci/controller/pci-hyperv.c +++ b/drivers/pci/controller/pci-hyperv.c @@ -650,13 +650,6 @@ static void hv_arch_irq_unmask(struct irq_data *data) PCI_FUNC(pdev->devfn); params->int_target.vector = hv_msi_get_int_vector(data); - /* - * Honoring apic->delivery_mode set to APIC_DELIVERY_MODE_FIXED by - * setting the HV_DEVICE_INTERRUPT_TARGET_MULTICAST flag results in a - * spurious interrupt storm. Not doing so does not seem to have a - * negative effect (yet?). - */ - if (hbus->protocol_version >= PCI_PROTOCOL_VERSION_1_2) { /* * PCI_PROTOCOL_VERSION_1_2 supports the VP_SET version of the From patchwork Thu Nov 2 12:26:20 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 13443705 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E070C4167D for ; Thu, 2 Nov 2023 12:27:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347348AbjKBM1u (ORCPT ); Thu, 2 Nov 2023 08:27:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50040 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346094AbjKBM1s (ORCPT ); Thu, 2 Nov 2023 08:27:48 -0400 Received: from esa6.hc3370-68.iphmx.com (esa6.hc3370-68.iphmx.com [216.71.155.175]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2E64128; Thu, 2 Nov 2023 05:27:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1698928063; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=oTEJNTw+CTtmPiz/F/xqvE9BcwMN5UZXmBpn9qQJTOg=; b=VcWBK2XVNV0MCfjhmfAPDYIOe+qcx0sbq57WdYHvSpF6k0ixUUYPf4Fd qQRy/8nl4F8EGXDuePy7ANR6upJyu99mQLmf0UXfr5YauEGJKU6LnCIax /Lvz8v8VwVz0pClIM3QMkXRJifZ98UZzm8p47uB5ZFUAU/ta4g3IMM9Nn M=; X-CSE-ConnectionGUID: pNIzOpSTTbaXx/hvRfdv1w== X-CSE-MsgGUID: mov3QMmaRyiW6eu7Auk/bw== Authentication-Results: esa6.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none X-SBRS: 4.0 X-MesageID: 126596387 X-Ironport-Server: esa6.hc3370-68.iphmx.com X-Remote-IP: 162.221.159.70 X-Policy: $RELAYED X-ThreatScanner-Verdict: Negative IronPort-Data: A9a23:IFospKCQ+WgIuBVW/07lw5YqxClBgxIJ4kV8jS/XYbTApD10hD1Tz 2UcDz/VP/yLYWr1cohwa42//UoP75WHn4VqQQY4rX1jcSlH+JHPbTi7wuUcHAvJd5GeExg3h yk6QoOdRCzhZiaE/n9BCpC48D8kk/nOH+KgYAL9EngZbRd+Tys8gg5Ulec8g4p56fC0GArIs t7pyyHlEAbNNwVcbCRMsMpvlDs15K6p4WpA5ARiDRx2lAS2e0c9Xcp3yZ6ZdxMUcqEMdsamS uDKyq2O/2+x13/B3fv8z94X2mVTKlLjFVDmZkh+AsBOsTAbzsAG6Y4pNeJ0VKtio27hc+ada jl6ncfYpQ8BZsUgkQmGOvVSO3kW0aZuoNcrLZUj2CA6IoKvn3bEmp1T4E8K0YIw4sBWE0ZWz sAkIjk9fleDmdi4zKziVbw57igjBJGD0II3v3hhyXfSDOo8QICFSKLPjTNa9G5u3IYUR6+YP pdIL2U3BPjDS0Qn1lM/IZQyhuq3wFL4dCVVsgm9rqsr+WnDigd21dABNfKMIILXFJsOzhnwS mTu+mPnWSg/MdWl2Du6rH+x2cbSnmTxR9dHfFG/3qEz2wDCroAJMzUVSnO/oP+kmgi1XNc3A 1YT8CoGrqUo8kGvCN7nUHWQpGaFswQVX9tLEsU55RuLx66S5ByWbkAERz9QYdoppuczRDcw0 USOkc+vDjtq2JWWWGm187aftzSpPiYJa2QFYEcsQQYO/tjLpYA4lBXUSdh/VqWyi7XdAi393 T3MsyE+g50TlcNN3KK+lXjEkjah4J3EXwMvzgXPUySu6QYRTIKkYo2081md9vdeJYCYRVmpv GAJ3cOZ6YgmF4yWj2qERukABqqu4d6FKDCaillqd7Ej6i+x+njlcJpW+y1WJF9kdM0DfFfBc B+NkQBc/pleOD2td6AfS5q1AtgkyrLlUNj/V+7ZdJ9eMsZZagCK5mdtaFSW0mSrl1Ij+Yk7O JGGYYO0BncyF6tq1ny1Sv0b3LttwToxrUvXRJbm31GnwKKTfmC9V7gIKh2NY/o/4afCpx/am /5VL+ODzxRSVr24biS/2YIaM11MLXE9Hp3wg8hWcPOTZAtgBGwlTfTWxNsJe5Rst7ZEiuDSu Hq6XydwzVv5inrvMwiGanl/LrjoWP5Xp3I2OSMlNE2A1H8kboKiqqwYcvMfYbYj5MRnzPhpU +MCfcSQRPhCIhzL5TQUd4XVrYpsbh2niAuCeS2/b1AXdphsViTI/NH+dwfi/SVICTC43eM6o ru9xkbYTIAFSgBKEsnbcrSswkm3sHxbn/h9N2PXL9gVfETx2ItnMSr8irkwOc5kFPnY7mLEj UDMW05e/LSc5dBtmDXUuUyah5+PMvlZBnFmI2PS3abxNTfg8Ga9mJAVBY5kYgvhuHPIFLSKP LsEn6GtbqFawD6moKImTew3k/hWC8/H4u8ClFo5Rh0nenzyUus4SkRqy/WjoUGkKlVxkgysU 0bHwcFAOLOGI6sJ+3ZKf1J6N4xvORwO8wQ+DMjZw22gv0ebBJLdDS1v0+Ck0USx1oddPoI/2 vsGs8UL8QG5gRdCGo/Y33AEqT/ScCJQCvVPWnQm7GjD01RD972/ScWBUXGeDG+nML2gzXXG0 hfL3fGf1tywN2LJcmYpFGil4Nexca8m4UgQpHdbfgThpzYwrqNvtPGn2WhtH1s9I9Qu+74bB 1WHwGUsdfzUp2421JIdN41ucikYbCCkFoXK4wNhvAXko4OADwQh8EVV1T6xwX0k IronPort-HdrOrdr: A9a23:mvDfKaDez8/EmdTlHekB55DYdb4zR+YMi2TDGXoRdfUzSL3/qy nOpoV96faQslwssR4b9OxoVJPtfZqYz+8X3WH+VY3SIDUO+1HYUb2L1OPZskLd8lTFh5BgPM VbE5SWeeeAaWSS1vyKmTVQeuxIqLK6GeKT9IXjJhFWIj2CAJsQijuRZDz0LqRefng2ObMJUL Sd++tarH6adXwMaMPTPAh+Y8Hz4/PKibP7alo8CxQm8QmDii7A0s+ALzGomjkfThJSyvMY/W LEigz04bjmm/y30RPHzQbonudrseqk5NtfJdCGzvIYLTjhkW+TFfxccrCPpi00p+mz6FAsir D30mcdA/g= X-Talos-CUID: 9a23:oB45um9KxWZ1/MXqPMqVv1YyO9ICakbh8H3ZE1//CXhTRrGLEEDFrQ== X-Talos-MUID: 9a23:xxZ64Aa7/su0CuBTsjjy3whHMc5S8qWRVk0QzrwbuI6OKnkl X-IronPort-AV: E=Sophos;i="6.03,271,1694750400"; d="scan'208";a="126596387" From: Andrew Cooper Date: Thu, 2 Nov 2023 12:26:20 +0000 Subject: [PATCH 2/3] x86/apic: Drop enum apic_delivery_modes MIME-Version: 1.0 Message-ID: <20231102-x86-apic-v1-2-bf049a2a0ed6@citrix.com> References: <20231102-x86-apic-v1-0-bf049a2a0ed6@citrix.com> In-Reply-To: <20231102-x86-apic-v1-0-bf049a2a0ed6@citrix.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , , "H. Peter Anvin" , Steve Wahl , Justin Ernst , Kyle Meyer , Dimitri Sivanich , "Russ Anderson" , Darren Hart , "Andy Shevchenko" , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , "Dexuan Cui" , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas CC: , , , , Andrew Cooper X-Mailer: b4 0.12.4 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The type is not used any more. Replace the constants with plain defines so they can live outside of an __ASSEMBLY__ block, allowing for more cleanup in subsequent changes. Signed-off-by: Andrew Cooper --- arch/x86/include/asm/apicdef.h | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h index 4b125e5b3187..ddcbf00db19d 100644 --- a/arch/x86/include/asm/apicdef.h +++ b/arch/x86/include/asm/apicdef.h @@ -20,6 +20,13 @@ */ #define IO_APIC_SLOT_SIZE 1024 +#define APIC_DELIVERY_MODE_FIXED 0 +#define APIC_DELIVERY_MODE_LOWESTPRIO 1 +#define APIC_DELIVERY_MODE_SMI 2 +#define APIC_DELIVERY_MODE_NMI 4 +#define APIC_DELIVERY_MODE_INIT 5 +#define APIC_DELIVERY_MODE_EXTINT 7 + #define APIC_ID 0x20 #define APIC_LVR 0x30 @@ -430,14 +437,5 @@ struct local_apic { #define BAD_APICID 0xFFFFu #endif -enum apic_delivery_modes { - APIC_DELIVERY_MODE_FIXED = 0, - APIC_DELIVERY_MODE_LOWESTPRIO = 1, - APIC_DELIVERY_MODE_SMI = 2, - APIC_DELIVERY_MODE_NMI = 4, - APIC_DELIVERY_MODE_INIT = 5, - APIC_DELIVERY_MODE_EXTINT = 7, -}; - #endif /* !__ASSEMBLY__ */ #endif /* _ASM_X86_APICDEF_H */ From patchwork Thu Nov 2 12:26:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Cooper X-Patchwork-Id: 13443704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DE5CC4332F for ; Thu, 2 Nov 2023 12:27:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347353AbjKBM1v (ORCPT ); Thu, 2 Nov 2023 08:27:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346859AbjKBM1t (ORCPT ); Thu, 2 Nov 2023 08:27:49 -0400 Received: from esa6.hc3370-68.iphmx.com (esa6.hc3370-68.iphmx.com [216.71.155.175]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2F628DE; Thu, 2 Nov 2023 05:27:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=citrix.com; s=securemail; t=1698928063; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=Qt98FOOlwQXNEe7TmHLKYpigU0UohpmukrdSKsAE3SY=; b=BPZck9bN89YigFykclQ+LGZnqSwJ7qUGJUlCiWrOO+zrdnBdmEmuQ3Re LW+tl499fUA83FmxVGHHhQZ+gGVlXJre/E7dYd87m4vcTgQSVIQNZiG4y Uzf1x0wTXujV75Za1RvabWjRh6OA8McGWl18vIebMnPEcQ6yny6MRJm13 A=; X-CSE-ConnectionGUID: pNIzOpSTTbaXx/hvRfdv1w== X-CSE-MsgGUID: TcvbfrE4S9OsAZL3//oPsQ== Authentication-Results: esa6.hc3370-68.iphmx.com; dkim=none (message not signed) header.i=none X-SBRS: 4.0 X-MesageID: 126596384 X-Ironport-Server: esa6.hc3370-68.iphmx.com X-Remote-IP: 162.221.159.70 X-Policy: $RELAYED X-ThreatScanner-Verdict: Negative IronPort-Data: A9a23:9S6LjKqzPLvuwfp7fBSi8xMKZDheBmJ/YxIvgKrLsJaIsI4StFCzt garIBnVbK3YNmTzL412b4+/9U8F6pPTy99gTgZp/CthF3tG85uZCYyVIHmrMnLJJKUvbq7FA +Y2MYCccZ9uHhcwgj/3b9ANeFEljfngqoLUUbOCYmYpA1Y8FE/NsDo788YhmIlknNOlNA2Ev NL2sqX3NUSsnjV5KQr40YrawP9UlKq04GhwUmAWP6gR5waHzyNNUPrzGInqR5fGatgMdgKFb 76rIIGRpgvx4xorA9W5pbf3GmVirmn6ZFXmZtJ+AsBOszAazsAA+v9T2Mk0MC+7vw6hjdFpo OihgLTrIesf0g8gr8xGO/VQO3kW0aSrY9YrK1Dn2SCY5xWun3cBX5yCpaz5VGEV0r8fPI1Ay RAXACgrTwKkn9mK/LiyevkrhtoZIsX1ZZxK7xmMzRmBZRonaZXKQqGM7t5ExjYgwMtJGJ4yZ eJAN2ApNk6ZJUQSaxFIUPrSn8/x7pX7WxRepEiYuuwc5G/LwRYq+LPsLMDUapqBQsA9ckOw/ ziYojWnWUFGXDCZ4QaO7HiinMKTpnLcQ6sgMOb/sflSm2TGkwT/DzVJDADm8JFVkHWWWM13L 00S5zpopq83nGSxSdP9dx61uniJulgbQdU4O+ki6QyXw67V+AexBWUeSDNFLts8u6ceRTUrx 1aPkMHBAD1kqrqOTnyBsLyTqFuaOjkOBWoDbjUDVgwL/5/op4Rbph7CRctiOKu0hcfyAjb+3 3aBqy1Wr64PgNAGkbqy/VTvgyqh4JPOS2Yd5RTTUySg4xJ0fqalf4Hu4l/ehd5MLYOYUkOA+ mMFhcGY7esOJZGVmWqGR+BlNKu0/O3DOTvQjER0GJ8J9yygvXWkeOh44ixlOEZvdMsefyT1S E/LtEVa45o7FGv6M4d0bpi3BsBsyrLvffz9UvnIYN1UZ919bg6Z8TsrdR7O937inVJqkqwlP 5qfN8G2Ah4yDaVh0SrzX+wc+aEkyzp4xm7JQ53/iRO93tK2YH+TVKdAMEqWY/onxL2LrR+T8 NtFMcaOjRJFX4XWaDH/+IoSIFZaa3Q2bbj6otJaMO6KJBFrHkklCvnM0fUgfZBom+JekeKg1 nGlU2dK2Ub4nzvMLgDiQnVibrzodYxyoXIyIWonOlPA83IjbIKg5a4EX5QwerYj+apoyvscZ +UKf9WoBvVJVyjd/DIcfd/xoeRKeAqrjBiSFyujbiI2c5NpS0rO4NCMVgLp+DgmDyy5r8Iyr rSskATBTvIrQwVkEdaTa/+1yV61lWYSlfg0XEbSJNRXPkL2/+BCNCHwyPs2PukPJA/Fyz/c0 ByZaSr0vsGU/dVzqoOQw/nZ/sH2S4OSA3a2AUHDy5ekEjHhwlapyL9QF+aWRz7RSjrrrfDKi fpu8x3sDBEWtA8U4tosQug3kP5WC8jH/eEAklo+dJnfRxH7Uuk+fyPuMdxn7/UVntdkVR2Kt lVjEzWwEZ6OIsrhWGUJPgsjYf/rORo8wWKKsq1dzKkX/kZKEFu7vaZ6ZULkZNR1ducdDW/c6 b5JVDQqwwK+kAE2Fd2NkzpZ8W+BRlRZDfR35s9BXtG12lN7or2nXXA7InaoiKxjlv0VbxJ0S tNqrPGqa0tgKrrqLCNoSCmlMRt1jpUSohFapGI/y6CysoOd3JcfhUQBmQnbuywJln2rJcovY Dk0X6C0TI3SlwpVaD9rBjD1QVkYWk3DpCQcCTIhzQXkcqVhbUSVREVVBApH1BlxH750FtSDw Iyl9Q== IronPort-HdrOrdr: A9a23:aWN29a+FdqhaJVFNY0Nuk+B1I+orL9Y04lQ7vn2ZhyY1TiX+rb HJoB17726StN91YhsdcL+7VZVoLUmxyXcx2/hzAV9NNDOWxFdAb7sSkLcL+lXbalLDH5dmpN ldmspFaOEYfGIK6foSuzPIaurIqePvmMuVbKXlvhVQpGdRBJ2IhD0JbzpzfHcZeOBuP+tJKL OsouRGuhu9cjAtYsygAH5tZZm4m/T70LznfD8bDFod5AOPlDOl76OSKWni4j4uFx1O3JY/+i z/nwb4/6WutOz+4hLQzGPI9f1t6ajc4+oGKsyQq9Qfbg/hjQulf+1aKsW/lT04uvyu7142kN /KuX4bTrRO108= X-Talos-CUID: 9a23:uxNYUmNbRDlVHe5DQA9G5mkMIfwZeHTt3DDQPXW2BXgwV+jA X-Talos-MUID: 9a23:a9s5vg7jLNLcXFC0q5hRT2xLxoxU6LqkBlogza5XnNKtBwgrfHCatC+OF9o= X-IronPort-AV: E=Sophos;i="6.03,271,1694750400"; d="scan'208";a="126596384" From: Andrew Cooper Date: Thu, 2 Nov 2023 12:26:21 +0000 Subject: [PATCH 3/3] x86/apic: Drop struct local_apic MIME-Version: 1.0 Message-ID: <20231102-x86-apic-v1-3-bf049a2a0ed6@citrix.com> References: <20231102-x86-apic-v1-0-bf049a2a0ed6@citrix.com> In-Reply-To: <20231102-x86-apic-v1-0-bf049a2a0ed6@citrix.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , , "H. Peter Anvin" , Steve Wahl , Justin Ernst , Kyle Meyer , Dimitri Sivanich , "Russ Anderson" , Darren Hart , "Andy Shevchenko" , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , "Dexuan Cui" , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Bjorn Helgaas CC: , , , , Andrew Cooper X-Mailer: b4 0.12.4 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This type predates recorded history in tglx/history.git, making it older than Feb 5th 2002. This structure is literally old enough to drink in most juristictions in the world, and has not been used once in that time. Lay it to rest in /dev/null. Signed-off-by: Andrew Cooper --- There is perhaps something to be said for the longevity of the comment. "Not terribly well tested" certainly hasn't bitrotted in all this time. --- arch/x86/include/asm/apicdef.h | 260 ----------------------------------------- 1 file changed, 260 deletions(-) diff --git a/arch/x86/include/asm/apicdef.h b/arch/x86/include/asm/apicdef.h index ddcbf00db19d..094106b6a538 100644 --- a/arch/x86/include/asm/apicdef.h +++ b/arch/x86/include/asm/apicdef.h @@ -172,270 +172,10 @@ #define APIC_CPUID(apicid) ((apicid) & XAPIC_DEST_CPUS_MASK) #define NUM_APIC_CLUSTERS ((BAD_APICID + 1) >> XAPIC_DEST_CPUS_SHIFT) -#ifndef __ASSEMBLY__ -/* - * the local APIC register structure, memory mapped. Not terribly well - * tested, but we might eventually use this one in the future - the - * problem why we cannot use it right now is the P5 APIC, it has an - * errata which cannot take 8-bit reads and writes, only 32-bit ones ... - */ -#define u32 unsigned int - -struct local_apic { - -/*000*/ struct { u32 __reserved[4]; } __reserved_01; - -/*010*/ struct { u32 __reserved[4]; } __reserved_02; - -/*020*/ struct { /* APIC ID Register */ - u32 __reserved_1 : 24, - phys_apic_id : 4, - __reserved_2 : 4; - u32 __reserved[3]; - } id; - -/*030*/ const - struct { /* APIC Version Register */ - u32 version : 8, - __reserved_1 : 8, - max_lvt : 8, - __reserved_2 : 8; - u32 __reserved[3]; - } version; - -/*040*/ struct { u32 __reserved[4]; } __reserved_03; - -/*050*/ struct { u32 __reserved[4]; } __reserved_04; - -/*060*/ struct { u32 __reserved[4]; } __reserved_05; - -/*070*/ struct { u32 __reserved[4]; } __reserved_06; - -/*080*/ struct { /* Task Priority Register */ - u32 priority : 8, - __reserved_1 : 24; - u32 __reserved_2[3]; - } tpr; - -/*090*/ const - struct { /* Arbitration Priority Register */ - u32 priority : 8, - __reserved_1 : 24; - u32 __reserved_2[3]; - } apr; - -/*0A0*/ const - struct { /* Processor Priority Register */ - u32 priority : 8, - __reserved_1 : 24; - u32 __reserved_2[3]; - } ppr; - -/*0B0*/ struct { /* End Of Interrupt Register */ - u32 eoi; - u32 __reserved[3]; - } eoi; - -/*0C0*/ struct { u32 __reserved[4]; } __reserved_07; - -/*0D0*/ struct { /* Logical Destination Register */ - u32 __reserved_1 : 24, - logical_dest : 8; - u32 __reserved_2[3]; - } ldr; - -/*0E0*/ struct { /* Destination Format Register */ - u32 __reserved_1 : 28, - model : 4; - u32 __reserved_2[3]; - } dfr; - -/*0F0*/ struct { /* Spurious Interrupt Vector Register */ - u32 spurious_vector : 8, - apic_enabled : 1, - focus_cpu : 1, - __reserved_2 : 22; - u32 __reserved_3[3]; - } svr; - -/*100*/ struct { /* In Service Register */ -/*170*/ u32 bitfield; - u32 __reserved[3]; - } isr [8]; - -/*180*/ struct { /* Trigger Mode Register */ -/*1F0*/ u32 bitfield; - u32 __reserved[3]; - } tmr [8]; - -/*200*/ struct { /* Interrupt Request Register */ -/*270*/ u32 bitfield; - u32 __reserved[3]; - } irr [8]; - -/*280*/ union { /* Error Status Register */ - struct { - u32 send_cs_error : 1, - receive_cs_error : 1, - send_accept_error : 1, - receive_accept_error : 1, - __reserved_1 : 1, - send_illegal_vector : 1, - receive_illegal_vector : 1, - illegal_register_address : 1, - __reserved_2 : 24; - u32 __reserved_3[3]; - } error_bits; - struct { - u32 errors; - u32 __reserved_3[3]; - } all_errors; - } esr; - -/*290*/ struct { u32 __reserved[4]; } __reserved_08; - -/*2A0*/ struct { u32 __reserved[4]; } __reserved_09; - -/*2B0*/ struct { u32 __reserved[4]; } __reserved_10; - -/*2C0*/ struct { u32 __reserved[4]; } __reserved_11; - -/*2D0*/ struct { u32 __reserved[4]; } __reserved_12; - -/*2E0*/ struct { u32 __reserved[4]; } __reserved_13; - -/*2F0*/ struct { u32 __reserved[4]; } __reserved_14; - -/*300*/ struct { /* Interrupt Command Register 1 */ - u32 vector : 8, - delivery_mode : 3, - destination_mode : 1, - delivery_status : 1, - __reserved_1 : 1, - level : 1, - trigger : 1, - __reserved_2 : 2, - shorthand : 2, - __reserved_3 : 12; - u32 __reserved_4[3]; - } icr1; - -/*310*/ struct { /* Interrupt Command Register 2 */ - union { - u32 __reserved_1 : 24, - phys_dest : 4, - __reserved_2 : 4; - u32 __reserved_3 : 24, - logical_dest : 8; - } dest; - u32 __reserved_4[3]; - } icr2; - -/*320*/ struct { /* LVT - Timer */ - u32 vector : 8, - __reserved_1 : 4, - delivery_status : 1, - __reserved_2 : 3, - mask : 1, - timer_mode : 1, - __reserved_3 : 14; - u32 __reserved_4[3]; - } lvt_timer; - -/*330*/ struct { /* LVT - Thermal Sensor */ - u32 vector : 8, - delivery_mode : 3, - __reserved_1 : 1, - delivery_status : 1, - __reserved_2 : 3, - mask : 1, - __reserved_3 : 15; - u32 __reserved_4[3]; - } lvt_thermal; - -/*340*/ struct { /* LVT - Performance Counter */ - u32 vector : 8, - delivery_mode : 3, - __reserved_1 : 1, - delivery_status : 1, - __reserved_2 : 3, - mask : 1, - __reserved_3 : 15; - u32 __reserved_4[3]; - } lvt_pc; - -/*350*/ struct { /* LVT - LINT0 */ - u32 vector : 8, - delivery_mode : 3, - __reserved_1 : 1, - delivery_status : 1, - polarity : 1, - remote_irr : 1, - trigger : 1, - mask : 1, - __reserved_2 : 15; - u32 __reserved_3[3]; - } lvt_lint0; - -/*360*/ struct { /* LVT - LINT1 */ - u32 vector : 8, - delivery_mode : 3, - __reserved_1 : 1, - delivery_status : 1, - polarity : 1, - remote_irr : 1, - trigger : 1, - mask : 1, - __reserved_2 : 15; - u32 __reserved_3[3]; - } lvt_lint1; - -/*370*/ struct { /* LVT - Error */ - u32 vector : 8, - __reserved_1 : 4, - delivery_status : 1, - __reserved_2 : 3, - mask : 1, - __reserved_3 : 15; - u32 __reserved_4[3]; - } lvt_error; - -/*380*/ struct { /* Timer Initial Count Register */ - u32 initial_count; - u32 __reserved_2[3]; - } timer_icr; - -/*390*/ const - struct { /* Timer Current Count Register */ - u32 curr_count; - u32 __reserved_2[3]; - } timer_ccr; - -/*3A0*/ struct { u32 __reserved[4]; } __reserved_16; - -/*3B0*/ struct { u32 __reserved[4]; } __reserved_17; - -/*3C0*/ struct { u32 __reserved[4]; } __reserved_18; - -/*3D0*/ struct { u32 __reserved[4]; } __reserved_19; - -/*3E0*/ struct { /* Timer Divide Configuration Register */ - u32 divisor : 4, - __reserved_1 : 28; - u32 __reserved_2[3]; - } timer_dcr; - -/*3F0*/ struct { u32 __reserved[4]; } __reserved_20; - -} __attribute__ ((packed)); - -#undef u32 - #ifdef CONFIG_X86_32 #define BAD_APICID 0xFFu #else #define BAD_APICID 0xFFFFu #endif -#endif /* !__ASSEMBLY__ */ #endif /* _ASM_X86_APICDEF_H */