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pr=C From: Ayan Kumar Halder To: CC: , , , , , , Ayan Kumar Halder Subject: [XEN v4] xen/arm32: head: Replace load_paddr with adr_l when they are equivalent Date: Thu, 2 Nov 2023 19:46:49 +0000 Message-ID: <20231102194649.3385653-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF00017096:EE_|IA1PR12MB8285:EE_ X-MS-Office365-Filtering-Correlation-Id: e679e545-ce70-415b-7deb-08dbdbdc7a13 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: w6NmNmwMLbP8rOUe8PgopovY6AlL0uLma6sHyYew+eneoaSEGnxbwKyExmnqFxGF048lTbL5NTxva3WolvkuglgNNcIxL35d8pxoChTmUBlx7taTrjcPgp2MDtnPppvYcFZFnP0EeRkBt4/Sdu0wf9btonRPGubqopP5f7PKKkkZK4I0Mt5xryEB2/Ia7zFY2wI6VwgAYRd54MigajVwl7jPaZEhBZdHpR4N0A4joYkzLMOjiWftMMCNDtvdfwn7uUdJbMD3kdJ/oNbauILsriqT+fVyo0NEoGudzGDIVCnjL2oHFazedsMjXnRccEyy1rw6lYXLe1/RP4Cw/zwuwhcD07vcLx+aDHIAq4QKLw38kNK6RbU92Mexay7vTP6RksoU7Aod/UmtfSdL9eP/FTAFRe08X1FxO1Ye7kIXfFhi1QJjZ1b0dIMrumQBfCe3wFj0QdYL7mQQJgu6PyJ2edCr5wXbfg3qRwPB/NGDP1RcQ3A43tbJYxHXfyhYFk3dxhMSpxHwp10cehsuc0XBQlA6msDIeUkpFVvQlAO9hDfLP/yB2Ot8qMT30ElLeiTJszfCbKiyjBvSV3NLlhTaAM3KkEd1BP+fOT3oXCIxcq+J2Opxo1XWc3C6DCiVwW4nA6SbUQ04iwVePK/dwFXXZB0vSxOK9GZ7WWA9Zc/s1Fyjz3Nuqsx6n6gKxPbq/W/60wQIJhJ3qJGMCJZVKxFS1MjRiA8QsPGw1lZO2zYl4O2kwr7deZCFsZL6McnDPHK9dGiN4bN9KTCI+Lf+CVRJxA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(39860400002)(396003)(346002)(376002)(230922051799003)(451199024)(82310400011)(186009)(1800799009)(64100799003)(46966006)(36840700001)(40470700004)(6666004)(478600001)(40460700003)(40480700001)(1076003)(2616005)(426003)(86362001)(26005)(336012)(82740400003)(966005)(83380400001)(47076005)(81166007)(36756003)(356005)(103116003)(36860700001)(41300700001)(70586007)(70206006)(54906003)(316002)(6916009)(5660300002)(8936002)(4326008)(8676002)(2906002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Nov 2023 19:46:58.7786 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e679e545-ce70-415b-7deb-08dbdbdc7a13 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF00017096.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8285 Before the MMU is turned on, PC uses physical address. Thus, one can use adr_l instead of load_paddr to obtain the physical address of a symbol. The only exception (for this replacement) is create_table_entry() which is called before and after MMU is turned on. Also, in lookup_processor_type() "r10" is no longer used. The reason being __lookup_processor_type uses adr_l (thus r10 is no longer used to obtain the physical address offset). Consequently, there is no need to save/restore r10. Signed-off-by: Ayan Kumar Halder Reviewed-by: Michal Orzel --- Refer https://lists.archive.carbon60.com/xen/devel/682900 for details. Changes from :- v1 :- 1. No need to modify create_table_entry(). 2. Remove "mov r10, #0 " in lookup_processor_type(). v2 :- 1. No need to save/restore r10 in lookup_processor_type(). 2. Update the commit message title. v3 :- 1. In __lookup_processor_type(), update the comment. Add Michal's R-b. xen/arch/arm/arm32/head.S | 23 +++++++++-------------- 1 file changed, 9 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 33b038e7e0..20e92bdb61 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -171,7 +171,7 @@ past_zImage: /* Using the DTB in the .dtb section? */ .ifnes CONFIG_DTB_FILE,"" - load_paddr r8, _sdtb + adr_l r8, _sdtb .endif /* Initialize the UART if earlyprintk has been enabled. */ @@ -213,7 +213,7 @@ GLOBAL(init_secondary) mrc CP32(r1, MPIDR) bic r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID */ - load_paddr r0, smp_up_cpu + adr_l r0, smp_up_cpu dsb 2: ldr r1, [r0] cmp r1, r7 @@ -479,7 +479,7 @@ create_page_tables: * create_table_entry_paddr() will clobber the register storing * the physical address of the table to point to. */ - load_paddr r5, boot_third + adr_l r5, boot_third mov_w r4, XEN_VIRT_START .rept XEN_NR_ENTRIES(2) mov r0, r5 /* r0 := paddr(l3 table) */ @@ -578,7 +578,7 @@ enable_mmu: flush_xen_tlb_local r0 /* Write Xen's PT's paddr into the HTTBR */ - load_paddr r0, boot_pgtable + adr_l r0, boot_pgtable mov r1, #0 /* r0:r1 is paddr (boot_pagetable) */ mcrr CP64(r0, r1, HTTBR) isb @@ -876,19 +876,14 @@ putn: mov pc, lr /* This provides a C-API version of __lookup_processor_type */ ENTRY(lookup_processor_type) - stmfd sp!, {r4, r10, lr} - mov r10, #0 /* r10 := offset between virt&phys */ + stmfd sp!, {r4, lr} bl __lookup_processor_type mov r0, r1 - ldmfd sp!, {r4, r10, pc} + ldmfd sp!, {r4, pc} /* * Read processor ID register (CP#15, CR0), and Look up in the linker-built - * supported processor list. Note that we can't use the absolute addresses for - * the __proc_info lists since we aren't running with the MMU on (and therefore, - * we are not in correct address space). We have to calculate the offset. - * - * r10: offset between virt&phys + * supported processor list. * * Returns: * r0: CPUID @@ -897,8 +892,8 @@ ENTRY(lookup_processor_type) */ __lookup_processor_type: mrc CP32(r0, MIDR) /* r0 := our cpu id */ - load_paddr r1, __proc_info_start - load_paddr r2, __proc_info_end + adr_l r1, __proc_info_start + adr_l r2, __proc_info_end 1: ldr r3, [r1, #PROCINFO_cpu_mask] and r4, r0, r3 /* r4 := our cpu id with mask */ ldr r3, [r1, #PROCINFO_cpu_val] /* r3 := cpu val in current proc info */