From patchwork Mon Nov 13 23:35:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454590 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C9A73D99D for ; Mon, 13 Nov 2023 23:36:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ZWk9YWnA" Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD5DFD6D for ; Mon, 13 Nov 2023 15:36:00 -0800 (PST) Received: by mail-lj1-x229.google.com with SMTP id 38308e7fff4ca-2c4fdf94666so66662681fa.2 for ; Mon, 13 Nov 2023 15:36:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1699918559; x=1700523359; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=VuNdy95VNpWQjRKNnpzeQQ54Hlq4tpuG2i9HfgCgKck=; b=ZWk9YWnAIILC5S/hmsCw/pV/GPcrxB4VbupyLbglHBtUkXGtEJiJp2K7MC8P7e1Eq4 ZifiLlUgoDrm+byqiQCFGi4APAzigOsPqLer9i26xrkKs9rx5IdkkuteSQhHwtq1YYf5 ISIiK40dBqbzMrMpHXJ71WJnCdDzLwnkrGuteyw8FnlQpPadma591KgjXLrR8Ncrpkww 4m59XyJpMJo6GO5oO9Zmk+GBZQ7g/hfZiGbTLdmUzHt4UH+33R9a6ZtVuT5cNgiS0tqc 8CImP9eJ0CNeAssYb8vWYqedxE6319UZlj4pYbt0y66/ilTU7lG6E39y+qvRqsqmmcTs PDbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699918559; x=1700523359; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VuNdy95VNpWQjRKNnpzeQQ54Hlq4tpuG2i9HfgCgKck=; b=VgkDlbqiul+6eTM5i58VSFFnnUefqd3h65WpO6YMAcCEoYzxQIMSm9yB7cPY7fUEul x0fUTJZLYVhblyytW0jYCFRTIRnH56q+dZKZ1mDaIpzSwCrZO1o9CGOj68wGTjSXlHRD V50Ch5uKSqC5Z4PbUix4Tlb3POuE7vbA7YSn97Ncpvbc97ugQxYPOCf9NwHiD4O4GKEb bCjN3lZyi1gOswJRixa3c+CNd1dhliSgzTc9ddoyaZAEpjvzRiUPpgvGnt8dKuTB0LQL Z0DxNbo/NPmctMMk8bApat8q0QUYiq1n8mMwvaVe42TQzCtYz/zMJS0+5tIjZpwJauZR BdAQ== X-Gm-Message-State: AOJu0Yzbm5b8ZVkbmlL9ANb7plqXX5oCpLd3hwIBM4n474yRtNxw9r6v /5O/YOyfMPqEXdtQKRzVefnsOA== X-Google-Smtp-Source: AGHT+IH+vpWSTfI+TqOPfDKq76GtSXfLBIVn7t5E38cxEXvkov/kjCBQrBt7VVuzFvyFnuIoPT3IzA== X-Received: by 2002:a2e:1659:0:b0:2c5:169f:ff03 with SMTP id 25-20020a2e1659000000b002c5169fff03mr475738ljw.5.1699918558910; Mon, 13 Nov 2023 15:35:58 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id 17-20020a2e0611000000b002b70a8478ddsm1202859ljg.44.2023.11.13.15.35.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 15:35:58 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:35:56 +0100 Subject: [PATCH net-next v8 1/9] dt-bindings: net: dsa: Require ports or ethernet-ports Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-1-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij , Rob Herring , Florian Fainelli , Krzysztof Kozlowski X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org Bindings using dsa.yaml#/$defs/ethernet-ports specify that a DSA switch node need to have a ports or ethernet-ports subnode, and that is actually required, so add requirements using oneOf. Suggested-by: Rob Herring Acked-by: Florian Fainelli Reviewed-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/net/dsa/dsa.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.yaml b/Documentation/devicetree/bindings/net/dsa/dsa.yaml index 6107189d276a..2abd036578d1 100644 --- a/Documentation/devicetree/bindings/net/dsa/dsa.yaml +++ b/Documentation/devicetree/bindings/net/dsa/dsa.yaml @@ -46,4 +46,10 @@ $defs: $ref: dsa-port.yaml# unevaluatedProperties: false +oneOf: + - required: + - ports + - required: + - ethernet-ports + ... From patchwork Mon Nov 13 23:35:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454591 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 61E2F3E463 for ; Mon, 13 Nov 2023 23:36:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="U9ImV95l" Received: from mail-lj1-x230.google.com (mail-lj1-x230.google.com [IPv6:2a00:1450:4864:20::230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C12B08F for ; Mon, 13 Nov 2023 15:36:01 -0800 (PST) Received: by mail-lj1-x230.google.com with SMTP id 38308e7fff4ca-2c7420d5a83so63254791fa.0 for ; Mon, 13 Nov 2023 15:36:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1699918560; x=1700523360; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=h0VwY6TaHpxI3borUCq3aH1TpiyNiMcQ1rckV7olnsw=; b=U9ImV95lJRVZr6lVFdXEKaSXFGkCDZ218h6yhSrox3gLbV0bWUOruvU4RwaAxTd+k0 348VFN6XDluKPw+FPSzxfmUkVZ5SDbFHVq6TnhPrzL2rvDgqC3Yk8uIMmSGJt4yY+ZjS qFHH2kqgiB2icbDWNWzNCWAHKyazXcA3Ov0AZqOqJTr7EpiF9GIdd0W9JgyakUkLtVpk akWgv8kY7FxI6P39GgRxxtxAUGcEykLIZopolppVm2hbd828Vt6xey58qIymt+9r2BCo aEJhgXUsuMpy3Z7TSM186tZS2TzxblsK46m2NPWH2o8esTbfy/H4P9pvQ6Lk4gCfJl41 wg6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699918560; x=1700523360; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=h0VwY6TaHpxI3borUCq3aH1TpiyNiMcQ1rckV7olnsw=; b=ClDwXa1jQ5MRvqdFbq3TwKe9ZiLel9B0CQz7TZ9Yx5Bd8FLHtfL2O7vJQOYkSvubwt MLzm29sJkfK6NJHjhUjgKu62l4NGZN5PzDQ9x1RrCbdsmN/yTuS0DECKpJPpHZPmweWa IOTVmK+o5LZR+krPOOv7VeN+bj4478pzg9cdZHyJH57Mtm5ot6EAoyhQZ1QoQjdftcZS NkDwo1J3FxIDOVx3Ke00tq3fiS3fWeAdTmFRWSd9iX9CZrQ67fTZ443p/JlUp/OhnS+J 95cmQRGG/6IF79hCUhLOVFbIaf2u3U0NJNPbgk6fkJsUvj8QcurBVUC9YbHbZ+GEsIeH 4tXw== X-Gm-Message-State: AOJu0YxYN9lQTLaMYxzWisR5TX0+N2YwbJeHpJ4rjUxlEiMdfYkIcRPH dSgnth/RwGWr/8qf2v8RK8hbhw== X-Google-Smtp-Source: AGHT+IE6N7o4JJ2tj/eDgllrzti0scb8e37t/wSl6LTid0qJhAUkHyoCVWNBKRdo9x/Ix//9+Gy9cQ== X-Received: by 2002:a05:651c:120a:b0:2c8:3b99:7f09 with SMTP id i10-20020a05651c120a00b002c83b997f09mr471644lja.0.1699918560053; Mon, 13 Nov 2023 15:36:00 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id 17-20020a2e0611000000b002b70a8478ddsm1202859ljg.44.2023.11.13.15.35.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 15:35:59 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:35:57 +0100 Subject: [PATCH net-next v8 2/9] dt-bindings: net: mvusb: Fix up DSA example Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-2-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij , Vladimir Oltean , Rob Herring , Florian Fainelli X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org When adding a proper schema for the Marvell mx88e6xxx switch, the scripts start complaining about this embedded example: dtschema/dtc warnings/errors: net/marvell,mvusb.example.dtb: switch@0: ports: '#address-cells' is a required property from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# net/marvell,mvusb.example.dtb: switch@0: ports: '#size-cells' is a required property from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# Fix this up by extending the example with those properties in the ports node. While we are at it, rename "ports" to "ethernet-ports" and rename "switch" to "ethernet-switch" as this is recommended practice. Reviewed-by: Andrew Lunn Reviewed-by: Vladimir Oltean Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli Signed-off-by: Linus Walleij --- Documentation/devicetree/bindings/net/marvell,mvusb.yaml | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml index 3a3325168048..ab838c1ffeed 100644 --- a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml +++ b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml @@ -50,11 +50,14 @@ examples: #address-cells = <1>; #size-cells = <0>; - switch@0 { + ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0x0>; - ports { + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + /* Port definitions */ }; From patchwork Mon Nov 13 23:35:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454594 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 877DD3D99D for ; Mon, 13 Nov 2023 23:36:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="cfIh0ft/" Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD07DD7A for ; Mon, 13 Nov 2023 15:36:02 -0800 (PST) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2c503dbe50dso69712241fa.1 for ; Mon, 13 Nov 2023 15:36:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1699918561; x=1700523361; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=fFEG72dBWYWsZUqmejoV0kt4Aj1zmT269T2kGi/rvFE=; b=cfIh0ft/c4RPIUf7lgrEzH37Qs67Hx/J/InZB114j91YjRzS2hcKz6GG6h/Qv/80jv JlpacTJOsmWeg5GC5dvaGB3ksAe0EHBEoPG1398VWYLbCBGf0bw8Rjc7hWn27zWDP9dB ytJrmEAx2qeQunna53u8Yk6CAeAZHiBUCTKM6qhbYhrE4Rkv+cnGfiiAQbrLtRvEaMmx H86p+oirK6/xOG20lpu81i72fCRLl+RAHRj6eMJoxAKGMeozof+0FQ2+e3djHGpfL1qg 6pMk+7HjouVIwI8pSqVz6DLkK67UE+DjOzbm2m5KJn+lYRSQlfqmFlDN3PYVy/io+XrK 4cgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699918561; x=1700523361; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fFEG72dBWYWsZUqmejoV0kt4Aj1zmT269T2kGi/rvFE=; b=br2LrFDUWCkHgEk7pcOKXHN3geUNHfhDAJFk/ZCQsfLuH4xAuIgn0Lvj2KnNkBdRnt eKXuS3UwCK1xFIPilxLmOYH8RiHGpeJwKxopcVaDbkzBg+MfOyeIL9G6GudkECUYeT1t yczFeNXza6anjV0OzUBeFhaNAMgcKkcX69GJb++nzRP++QWuzPM67cc78GsYN55BEv8U N2MTRPz46iEE7ChLcrDb678sjFhMU5aay/VdwDFkkkohi3pZueN8mzzd+rXRXirWLxMl Rp1/tLAVFiaAhuQJPTQaxMz3mvul2M8HryS17hF5KTtclbcYlvTqsQYMm4FvbJyjd4th sO6Q== X-Gm-Message-State: AOJu0YymB+w74kIY+JJie8sRPrs7S0zPK9IdcPdpI0g2L9ZHb8wtRH22 v2SpNW3pPppHNujtMkpVFfeSQA== X-Google-Smtp-Source: AGHT+IHsxpzN1LwX0uHjACVOlXRRCh/qdwpBLxQITo7fbX1vKxySCKj4NH7WuHYVQ64JZUrQjBbUMA== X-Received: by 2002:a2e:8849:0:b0:2c8:2e3a:e974 with SMTP id z9-20020a2e8849000000b002c82e3ae974mr563412ljj.44.1699918561110; Mon, 13 Nov 2023 15:36:01 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id 17-20020a2e0611000000b002b70a8478ddsm1202859ljg.44.2023.11.13.15.36.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 15:36:00 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:35:58 +0100 Subject: [PATCH net-next v8 3/9] ARM: dts: marvell: Fix some common switch mistakes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-3-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij , Florian Fainelli X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be ethernet-switch@0. - The ports node should be named ethernet-ports - The ethernet-ports node should have port@0 etc children, no plural "ports" in the children. - Ports should be named ethernet-port@0 etc - PHYs should be named ethernet-phy@0 etc This serves as an example of fixes needed for introducing a schema for the bindings, but the patch can simply be applied. Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli Signed-off-by: Linus Walleij Reviewed-by: Vladimir Oltean --- arch/arm/boot/dts/marvell/armada-370-rd.dts | 24 ++++++------ .../dts/marvell/armada-381-netgear-gs110emx.dts | 44 +++++++++++----------- .../dts/marvell/armada-385-clearfog-gtr-l8.dts | 38 +++++++++---------- .../dts/marvell/armada-385-clearfog-gtr-s4.dts | 22 +++++------ arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 18 ++++----- .../boot/dts/marvell/armada-385-turris-omnia.dts | 20 +++++----- arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 20 +++++----- .../boot/dts/marvell/armada-xp-linksys-mamba.dts | 18 ++++----- 8 files changed, 96 insertions(+), 108 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-370-rd.dts b/arch/arm/boot/dts/marvell/armada-370-rd.dts index b459a670f615..1b241da11e94 100644 --- a/arch/arm/boot/dts/marvell/armada-370-rd.dts +++ b/arch/arm/boot/dts/marvell/armada-370-rd.dts @@ -149,39 +149,37 @@ led@0 { }; }; - switch: switch@10 { + switch: ethernet-switch@10 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x10>; interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; label = "lan0"; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "lan1"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan3"; }; - port@5 { + ethernet-port@5 { reg = <5>; ethernet = <ð1>; phy-mode = "rgmii-id"; @@ -196,25 +194,25 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switchphy0: switchphy@0 { + switchphy0: ethernet-phy@0 { reg = <0>; interrupt-parent = <&switch>; interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; }; - switchphy1: switchphy@1 { + switchphy1: ethernet-phy@1 { reg = <1>; interrupt-parent = <&switch>; interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; }; - switchphy2: switchphy@2 { + switchphy2: ethernet-phy@2 { reg = <2>; interrupt-parent = <&switch>; interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; }; - switchphy3: switchphy@3 { + switchphy3: ethernet-phy@3 { reg = <3>; interrupt-parent = <&switch>; interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; diff --git a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts index f4c4b213ef4e..5baf83e5253d 100644 --- a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts +++ b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts @@ -77,51 +77,49 @@ &mdio { pinctrl-0 = <&mdio_pins>; status = "okay"; - switch@0 { + ethernet-switch@0 { compatible = "marvell,mv88e6190"; - #address-cells = <1>; #interrupt-cells = <2>; interrupt-controller; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&switch_interrupt_pins>; pinctrl-names = "default"; - #size-cells = <0>; reg = <0>; mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy1: switch0phy1@1 { + switch0phy1: ethernet-phy@1 { reg = <0x1>; }; - switch0phy2: switch0phy2@2 { + switch0phy2: ethernet-phy@2 { reg = <0x2>; }; - switch0phy3: switch0phy3@3 { + switch0phy3: ethernet-phy@3 { reg = <0x3>; }; - switch0phy4: switch0phy4@4 { + switch0phy4: ethernet-phy@4 { reg = <0x4>; }; - switch0phy5: switch0phy5@5 { + switch0phy5: ethernet-phy@5 { reg = <0x5>; }; - switch0phy6: switch0phy6@6 { + switch0phy6: ethernet-phy@6 { reg = <0x6>; }; - switch0phy7: switch0phy7@7 { + switch0phy7: ethernet-phy@7 { reg = <0x7>; }; - switch0phy8: switch0phy8@8 { + switch0phy8: ethernet-phy@8 { reg = <0x8>; }; }; @@ -142,11 +140,11 @@ phy2: ethernet-phy@c { }; }; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { ethernet = <ð0>; phy-mode = "rgmii"; reg = <0>; @@ -158,55 +156,55 @@ fixed-link { }; }; - port@1 { + ethernet-port@1 { label = "lan1"; phy-handle = <&switch0phy1>; reg = <1>; }; - port@2 { + ethernet-port@2 { label = "lan2"; phy-handle = <&switch0phy2>; reg = <2>; }; - port@3 { + ethernet-port@3 { label = "lan3"; phy-handle = <&switch0phy3>; reg = <3>; }; - port@4 { + ethernet-port@4 { label = "lan4"; phy-handle = <&switch0phy4>; reg = <4>; }; - port@5 { + ethernet-port@5 { label = "lan5"; phy-handle = <&switch0phy5>; reg = <5>; }; - port@6 { + ethernet-port@6 { label = "lan6"; phy-handle = <&switch0phy6>; reg = <6>; }; - port@7 { + ethernet-port@7 { label = "lan7"; phy-handle = <&switch0phy7>; reg = <7>; }; - port@8 { + ethernet-port@8 { label = "lan8"; phy-handle = <&switch0phy8>; reg = <8>; }; - port@9 { + ethernet-port@9 { /* 88X3310P external phy */ label = "lan9"; phy-handle = <&phy1>; @@ -214,7 +212,7 @@ port@9 { reg = <9>; }; - port@a { + ethernet-port@a { /* 88X3310P external phy */ label = "lan10"; phy-handle = <&phy2>; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 1990f7d0cc79..1707d1b01545 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -7,66 +7,66 @@ / { }; &mdio { - switch0: switch0@4 { + switch0: ethernet-switch@4 { compatible = "marvell,mv88e6190"; reg = <4>; pinctrl-names = "default"; pinctrl-0 = <&cf_gtr_switch_reset_pins>; reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@1 { + ethernet-port@1 { reg = <1>; label = "lan8"; phy-handle = <&switch0phy0>; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan7"; phy-handle = <&switch0phy1>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan6"; phy-handle = <&switch0phy2>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "lan5"; phy-handle = <&switch0phy3>; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "lan4"; phy-handle = <&switch0phy4>; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "lan3"; phy-handle = <&switch0phy5>; }; - port@7 { + ethernet-port@7 { reg = <7>; label = "lan2"; phy-handle = <&switch0phy6>; }; - port@8 { + ethernet-port@8 { reg = <8>; label = "lan1"; phy-handle = <&switch0phy7>; }; - port@10 { + ethernet-port@10 { reg = <10>; phy-mode = "2500base-x"; @@ -83,35 +83,35 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy0: switch0phy0@1 { + switch0phy0: ethernet-phy@1 { reg = <0x1>; }; - switch0phy1: switch0phy1@2 { + switch0phy1: ethernet-phy@2 { reg = <0x2>; }; - switch0phy2: switch0phy2@3 { + switch0phy2: ethernet-phy@3 { reg = <0x3>; }; - switch0phy3: switch0phy3@4 { + switch0phy3: ethernet-phy@4 { reg = <0x4>; }; - switch0phy4: switch0phy4@5 { + switch0phy4: ethernet-phy@5 { reg = <0x5>; }; - switch0phy5: switch0phy5@6 { + switch0phy5: ethernet-phy@6 { reg = <0x6>; }; - switch0phy6: switch0phy6@7 { + switch0phy6: ethernet-phy@7 { reg = <0x7>; }; - switch0phy7: switch0phy7@8 { + switch0phy7: ethernet-phy@8 { reg = <0x8>; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts index b795ad573891..a7678a784c18 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts @@ -11,42 +11,42 @@ &sfp0 { }; &mdio { - switch0: switch0@4 { + switch0: ethernet-switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; pinctrl-0 = <&cf_gtr_switch_reset_pins>; reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@1 { + ethernet-port@1 { reg = <1>; label = "lan2"; phy-handle = <&switch0phy0>; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan1"; phy-handle = <&switch0phy1>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan4"; phy-handle = <&switch0phy2>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "lan3"; phy-handle = <&switch0phy3>; }; - port@5 { + ethernet-port@5 { reg = <5>; phy-mode = "2500base-x"; ethernet = <ð1>; @@ -63,19 +63,19 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy0: switch0phy0@11 { + switch0phy0: ethernet-phy@11 { reg = <0x11>; }; - switch0phy1: switch0phy1@12 { + switch0phy1: ethernet-phy@12 { reg = <0x12>; }; - switch0phy2: switch0phy2@13 { + switch0phy2: ethernet-phy@13 { reg = <0x13>; }; - switch0phy3: switch0phy3@14 { + switch0phy3: ethernet-phy@14 { reg = <0x14>; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi index fc8216fd9f60..4116ed60f709 100644 --- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi @@ -158,42 +158,40 @@ nand: nand@0 { &mdio { status = "okay"; - switch@0 { + ethernet-switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; label = "lan4"; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "lan3"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan1"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "wan"; }; - port@5 { + ethernet-port@5 { reg = <5>; phy-mode = "sgmii"; ethernet = <ð2>; diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 2d8d319bec83..7b755bb4e4e7 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -435,12 +435,10 @@ phy1: ethernet-phy@1 { }; /* Switch MV88E6176 at address 0x10 */ - switch@10 { + ethernet-switch@10 { pinctrl-names = "default"; pinctrl-0 = <&swint_pins>; compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; dsa,member = <0 0>; reg = <0x10>; @@ -448,36 +446,36 @@ switch@10 { interrupt-parent = <&gpio1>; interrupts = <13 IRQ_TYPE_LEVEL_LOW>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - ports@0 { + ethernet-port@0 { reg = <0>; label = "lan0"; }; - ports@1 { + ethernet-port@1 { reg = <1>; label = "lan1"; }; - ports@2 { + ethernet-port@2 { reg = <2>; label = "lan2"; }; - ports@3 { + ethernet-port@3 { reg = <3>; label = "lan3"; }; - ports@4 { + ethernet-port@4 { reg = <4>; label = "lan4"; }; - ports@5 { + ethernet-port@5 { reg = <5>; ethernet = <ð1>; phy-mode = "rgmii-id"; @@ -488,7 +486,7 @@ fixed-link { }; }; - ports@6 { + ethernet-port@6 { reg = <6>; ethernet = <ð0>; phy-mode = "rgmii-id"; diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts index 32c569df142f..3290ccad2374 100644 --- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts @@ -92,44 +92,42 @@ pcie2-0-w-disable-hog { &mdio { status = "okay"; - switch@4 { + ethernet-switch@4 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <4>; pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; pinctrl-names = "default"; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; label = "lan5"; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "lan4"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan3"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan2"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "lan1"; }; - port@5 { + ethernet-port@5 { reg = <5>; ethernet = <ð1>; phy-mode = "1000base-x"; @@ -140,7 +138,7 @@ fixed-link { }; }; - port@6 { + ethernet-port@6 { /* 88E1512 external phy */ reg = <6>; label = "lan6"; diff --git a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts index 7a0614fd0c93..ea859f7ea042 100644 --- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts @@ -265,42 +265,40 @@ flash@0 { &mdio { status = "okay"; - switch@0 { + ethernet-switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; label = "lan4"; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "lan3"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan1"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "internet"; }; - port@5 { + ethernet-port@5 { reg = <5>; phy-mode = "rgmii-id"; ethernet = <ð0>; From patchwork Mon Nov 13 23:35:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454592 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 609AE3FB00 for ; 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Mon, 13 Nov 2023 15:36:01 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:35:59 +0100 Subject: [PATCH net-next v8 4/9] ARM: dts: nxp: Fix some common switch mistakes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-4-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij , Florian Fainelli X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org Fix some errors in the Marvell MV88E6xxx switch descriptions: - switch0@0 is not OK, should be ethernet-switch@0 - ports should be ethernet-ports - port should be ethernet-port - phy should be ethernet-phy Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli Signed-off-by: Linus Walleij Reviewed-by: Vladimir Oltean --- arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts | 14 ++--- arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts | 70 ++++++++++++------------ arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts | 18 +++--- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts | 20 +++---- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts | 18 +++--- 5 files changed, 70 insertions(+), 70 deletions(-) diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts index 1a19aec8957b..7e72f860c3c5 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts @@ -162,7 +162,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6085"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_switch>; @@ -173,26 +173,26 @@ switch0: switch0@0 { interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; label = "eth_cu_1000_1"; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_2"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_1000_3"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_fc_1000_1"; phy-mode = "1000base-x"; @@ -200,7 +200,7 @@ port@5 { sfp = <&sff>; }; - port@6 { + ethernet-port@6 { reg = <6>; phy-mode = "rmii"; ethernet = <&fec1>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts index df1335492a19..77492eeea450 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts @@ -47,17 +47,17 @@ mdio_mux_1: mdio@1 { #address-cells = <1>; #size-cells = <0>; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 0>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -68,37 +68,37 @@ fixed-link { }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "aib2main_1"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "aib2main_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_1000_5"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_cu_1000_6"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_4"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_7"; }; - port@7 { + ethernet-port@7 { reg = <7>; label = "modem_pic"; @@ -108,7 +108,7 @@ fixed-link { }; }; - switch0port10: port@10 { + switch0port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "xgmii"; @@ -130,32 +130,32 @@ mdio_mux_2: mdio@2 { #address-cells = <1>; #size-cells = <0>; - switch1: switch1@0 { + switch1: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 1>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_3"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_100_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_100_3"; }; - switch1port9: port@9 { + switch1port9: ethernet-port@9 { reg = <9>; label = "dsa"; phy-mode = "xgmii"; @@ -168,7 +168,7 @@ fixed-link { }; }; - switch1port10: port@10 { + switch1port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "xgmii"; @@ -188,17 +188,17 @@ mdio_mux_4: mdio@4 { #address-cells = <1>; #size-cells = <0>; - switch2: switch2@0 { + switch2: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 2>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_fc_1000_2"; phy-mode = "1000base-x"; @@ -206,7 +206,7 @@ port@2 { sfp = <&sff1>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_fc_1000_3"; phy-mode = "1000base-x"; @@ -214,7 +214,7 @@ port@3 { sfp = <&sff2>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_fc_1000_4"; phy-mode = "1000base-x"; @@ -222,7 +222,7 @@ port@4 { sfp = <&sff3>; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_fc_1000_5"; phy-mode = "1000base-x"; @@ -230,7 +230,7 @@ port@5 { sfp = <&sff4>; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_fc_1000_6"; phy-mode = "1000base-x"; @@ -238,7 +238,7 @@ port@6 { sfp = <&sff5>; }; - port@7 { + ethernet-port@7 { reg = <7>; label = "eth_fc_1000_7"; phy-mode = "1000base-x"; @@ -246,7 +246,7 @@ port@7 { sfp = <&sff6>; }; - port@9 { + ethernet-port@9 { reg = <9>; label = "eth_fc_1000_1"; phy-mode = "1000base-x"; @@ -254,7 +254,7 @@ port@9 { sfp = <&sff0>; }; - switch2port10: port@10 { + switch2port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "2500base-x"; @@ -276,17 +276,17 @@ mdio_mux_8: mdio@8 { #address-cells = <1>; #size-cells = <0>; - switch3: switch3@0 { + switch3: ethernet-switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 3>; eeprom-length = <65536>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_fc_1000_8"; phy-mode = "1000base-x"; @@ -294,7 +294,7 @@ port@2 { sfp = <&sff7>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_fc_1000_9"; phy-mode = "1000base-x"; @@ -302,7 +302,7 @@ port@3 { sfp = <&sff8>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_fc_1000_10"; phy-mode = "1000base-x"; @@ -310,7 +310,7 @@ port@4 { sfp = <&sff9>; }; - switch3port9: port@9 { + switch3port9: ethernet-port@9 { reg = <9>; label = "dsa"; phy-mode = "2500base-x"; @@ -322,7 +322,7 @@ fixed-link { }; }; - switch3port10: port@10 { + switch3port10: ethernet-port@10 { reg = <10>; label = "dsa"; phy-mode = "xgmii"; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts index 1461804ecaea..2a490464660c 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts @@ -123,7 +123,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -134,11 +134,11 @@ switch0: switch0@0 { interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -149,32 +149,32 @@ fixed-link { }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_1"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_1000_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_1000_3"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_cu_1000_4"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_5"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_6"; }; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts index 463c2452b9b7..078d8699e16d 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts @@ -112,7 +112,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -123,11 +123,11 @@ switch0: switch0@0 { interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -138,27 +138,27 @@ fixed-link { }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_100_3"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_4"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_5"; }; - port@8 { + ethernet-port@8 { reg = <8>; label = "eth_cu_1000_1"; }; - port@9 { + ethernet-port@9 { reg = <9>; label = "eth_cu_1000_2"; phy-handle = <&phy9>; @@ -167,12 +167,12 @@ port@9 { }; }; - mdio1 { + mdio-external { compatible = "marvell,mv88e6xxx-mdio-external"; #address-cells = <1>; #size-cells = <0>; - phy9: phy9@0 { + phy9: ethernet-phy@0 { compatible = "ethernet-phy-ieee802.3-c45"; pinctrl-0 = <&pinctrl_gpio_phy9>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts index f5ae0d5de315..22c8f44390a9 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts @@ -137,7 +137,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: ethernet-switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -148,11 +148,11 @@ switch0: switch0@0 { interrupt-controller; #interrupt-cells = <2>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; phy-mode = "rmii"; ethernet = <&fec1>; @@ -163,32 +163,32 @@ fixed-link { }; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "eth_cu_1000_1"; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "eth_cu_1000_2"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "eth_cu_1000_3"; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "eth_cu_1000_4"; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "eth_cu_1000_5"; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "eth_cu_1000_6"; }; From patchwork Mon Nov 13 23:36:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454595 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1D3853E476 for ; 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Mon, 13 Nov 2023 15:36:02 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:36:00 +0100 Subject: [PATCH net-next v8 5/9] ARM64: dts: marvell: Fix some common switch mistakes Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-5-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij , Florian Fainelli X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be ethernet-switch@0. - ports should be ethernet-ports - port@0 should be ethernet-port@0 - PHYs should be named ethernet-phy@ Reviewed-by: Andrew Lunn Reviewed-by: Florian Fainelli Signed-off-by: Linus Walleij --- .../dts/marvell/armada-3720-espressobin-ultra.dts | 14 ++-- .../boot/dts/marvell/armada-3720-espressobin.dtsi | 20 +++-- .../boot/dts/marvell/armada-3720-gl-mv1000.dts | 20 +++-- .../boot/dts/marvell/armada-3720-turris-mox.dts | 85 ++++++++++++---------- .../boot/dts/marvell/armada-7040-mochabin.dts | 24 +++--- .../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 +++--- arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 42 +++++------ 7 files changed, 115 insertions(+), 112 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts index f9abef8dcc94..870bb380a40a 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts @@ -126,32 +126,32 @@ &switch0 { reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>; - ports { - switch0port1: port@1 { + ethernet-ports { + switch0port1: ethernet-port@1 { reg = <1>; label = "lan0"; phy-handle = <&switch0phy0>; }; - switch0port2: port@2 { + switch0port2: ethernet-port@2 { reg = <2>; label = "lan1"; phy-handle = <&switch0phy1>; }; - switch0port3: port@3 { + switch0port3: ethernet-port@3 { reg = <3>; label = "lan2"; phy-handle = <&switch0phy2>; }; - switch0port4: port@4 { + switch0port4: ethernet-port@4 { reg = <4>; label = "lan3"; phy-handle = <&switch0phy3>; }; - switch0port5: port@5 { + switch0port5: ethernet-port@5 { reg = <5>; label = "wan"; phy-handle = <&extphy>; @@ -160,7 +160,7 @@ switch0port5: port@5 { }; mdio { - switch0phy3: switch0phy3@14 { + switch0phy3: ethernet-phy@14 { reg = <0x14>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi index 5fc613d24151..86ec0df1c676 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi @@ -145,19 +145,17 @@ &usb2 { }; &mdio { - switch0: switch0@1 { + switch0: ethernet-switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - switch0port0: port@0 { + switch0port0: ethernet-port@0 { reg = <0>; label = "cpu"; ethernet = <ð0>; @@ -168,19 +166,19 @@ fixed-link { }; }; - switch0port1: port@1 { + switch0port1: ethernet-port@1 { reg = <1>; label = "wan"; phy-handle = <&switch0phy0>; }; - switch0port2: port@2 { + switch0port2: ethernet-port@2 { reg = <2>; label = "lan0"; phy-handle = <&switch0phy1>; }; - switch0port3: port@3 { + switch0port3: ethernet-port@3 { reg = <3>; label = "lan1"; phy-handle = <&switch0phy2>; @@ -192,13 +190,13 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy0: switch0phy0@11 { + switch0phy0: ethernet-phy@11 { reg = <0x11>; }; - switch0phy1: switch0phy1@12 { + switch0phy1: ethernet-phy@12 { reg = <0x12>; }; - switch0phy2: switch0phy2@13 { + switch0phy2: ethernet-phy@13 { reg = <0x13>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index b1b45b4fa9d4..63fbc8352161 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -152,31 +152,29 @@ &uart0 { }; &mdio { - switch0: switch0@1 { + switch0: ethernet-switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; - ports: ports { + ports: ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@0 { + ethernet-port@0 { reg = <0>; label = "cpu"; ethernet = <ð0>; }; - port@1 { + ethernet-port@1 { reg = <1>; label = "wan"; phy-handle = <&switch0phy0>; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan0"; phy-handle = <&switch0phy1>; @@ -185,7 +183,7 @@ port@2 { nvmem-cell-names = "mac-address"; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan1"; phy-handle = <&switch0phy2>; @@ -199,13 +197,13 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy0: switch0phy0@11 { + switch0phy0: ethernet-phy@11 { reg = <0x11>; }; - switch0phy1: switch0phy1@12 { + switch0phy1: ethernet-phy@12 { reg = <0x12>; }; - switch0phy2: switch0phy2@13 { + switch0phy2: ethernet-phy@13 { reg = <0x13>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index 9eab2bb22134..66cd98b67744 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -304,7 +304,13 @@ phy1: ethernet-phy@1 { reg = <1>; }; - /* switch nodes are enabled by U-Boot if modules are present */ + /* + * NOTE: switch nodes are enabled by U-Boot if modules are present + * DO NOT change this node name (switch0@10) even if it is not following + * conventions! Deployed U-Boot binaries are explicitly looking for + * this node in order to augment the device tree! + * Also do not touch the "ports" or "port@n" nodes. These are also ABI. + */ switch0@10 { compatible = "marvell,mv88e6190"; reg = <0x10>; @@ -317,35 +323,35 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy1: switch0phy1@1 { + switch0phy1: ethernet-phy@1 { reg = <0x1>; }; - switch0phy2: switch0phy2@2 { + switch0phy2: ethernet-phy@2 { reg = <0x2>; }; - switch0phy3: switch0phy3@3 { + switch0phy3: ethernet-phy@3 { reg = <0x3>; }; - switch0phy4: switch0phy4@4 { + switch0phy4: ethernet-phy@4 { reg = <0x4>; }; - switch0phy5: switch0phy5@5 { + switch0phy5: ethernet-phy@5 { reg = <0x5>; }; - switch0phy6: switch0phy6@6 { + switch0phy6: ethernet-phy@6 { reg = <0x6>; }; - switch0phy7: switch0phy7@7 { + switch0phy7: ethernet-phy@7 { reg = <0x7>; }; - switch0phy8: switch0phy8@8 { + switch0phy8: ethernet-phy@8 { reg = <0x8>; }; }; @@ -430,6 +436,7 @@ port-sfp@a { }; }; + /* NOTE: this node name is ABI, don't change it! */ switch0@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; @@ -442,19 +449,19 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy1_topaz: switch0phy1@11 { + switch0phy1_topaz: ethernet-phy@11 { reg = <0x11>; }; - switch0phy2_topaz: switch0phy2@12 { + switch0phy2_topaz: ethernet-phy@12 { reg = <0x12>; }; - switch0phy3_topaz: switch0phy3@13 { + switch0phy3_topaz: ethernet-phy@13 { reg = <0x13>; }; - switch0phy4_topaz: switch0phy4@14 { + switch0phy4_topaz: ethernet-phy@14 { reg = <0x14>; }; }; @@ -497,6 +504,7 @@ port@5 { }; }; + /* NOTE: this node name is ABI, don't change it! */ switch1@11 { compatible = "marvell,mv88e6190"; reg = <0x11>; @@ -509,35 +517,35 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch1phy1: switch1phy1@1 { + switch1phy1: ethernet-phy@1 { reg = <0x1>; }; - switch1phy2: switch1phy2@2 { + switch1phy2: ethernet-phy@2 { reg = <0x2>; }; - switch1phy3: switch1phy3@3 { + switch1phy3: ethernet-phy@3 { reg = <0x3>; }; - switch1phy4: switch1phy4@4 { + switch1phy4: ethernet-phy@4 { reg = <0x4>; }; - switch1phy5: switch1phy5@5 { + switch1phy5: ethernet-phy@5 { reg = <0x5>; }; - switch1phy6: switch1phy6@6 { + switch1phy6: ethernet-phy@6 { reg = <0x6>; }; - switch1phy7: switch1phy7@7 { + switch1phy7: ethernet-phy@7 { reg = <0x7>; }; - switch1phy8: switch1phy8@8 { + switch1phy8: ethernet-phy@8 { reg = <0x8>; }; }; @@ -622,6 +630,7 @@ port-sfp@a { }; }; + /* NOTE: this node name is ABI, don't change it! */ switch1@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; @@ -634,19 +643,19 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch1phy1_topaz: switch1phy1@11 { + switch1phy1_topaz: ethernet-phy@11 { reg = <0x11>; }; - switch1phy2_topaz: switch1phy2@12 { + switch1phy2_topaz: ethernet-phy@12 { reg = <0x12>; }; - switch1phy3_topaz: switch1phy3@13 { + switch1phy3_topaz: ethernet-phy@13 { reg = <0x13>; }; - switch1phy4_topaz: switch1phy4@14 { + switch1phy4_topaz: ethernet-phy@14 { reg = <0x14>; }; }; @@ -689,6 +698,7 @@ port@5 { }; }; + /* NOTE: this node name is ABI, don't change it! */ switch2@12 { compatible = "marvell,mv88e6190"; reg = <0x12>; @@ -701,35 +711,35 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch2phy1: switch2phy1@1 { + switch2phy1: ethernet-phy@1 { reg = <0x1>; }; - switch2phy2: switch2phy2@2 { + switch2phy2: ethernet-phy@2 { reg = <0x2>; }; - switch2phy3: switch2phy3@3 { + switch2phy3: ethernet-phy@3 { reg = <0x3>; }; - switch2phy4: switch2phy4@4 { + switch2phy4: ethernet-phy@4 { reg = <0x4>; }; - switch2phy5: switch2phy5@5 { + switch2phy5: ethernet-phy@5 { reg = <0x5>; }; - switch2phy6: switch2phy6@6 { + switch2phy6: ethernet-phy@6 { reg = <0x6>; }; - switch2phy7: switch2phy7@7 { + switch2phy7: ethernet-phy@7 { reg = <0x7>; }; - switch2phy8: switch2phy8@8 { + switch2phy8: ethernet-phy@8 { reg = <0x8>; }; }; @@ -805,6 +815,7 @@ port-sfp@a { }; }; + /* NOTE: this node name is ABI, don't change it! */ switch2@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; @@ -817,19 +828,19 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch2phy1_topaz: switch2phy1@11 { + switch2phy1_topaz: ethernet-phy@11 { reg = <0x11>; }; - switch2phy2_topaz: switch2phy2@12 { + switch2phy2_topaz: ethernet-phy@12 { reg = <0x12>; }; - switch2phy3_topaz: switch2phy3@13 { + switch2phy3_topaz: ethernet-phy@13 { reg = <0x13>; }; - switch2phy4_topaz: switch2phy4@14 { + switch2phy4_topaz: ethernet-phy@14 { reg = <0x14>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts index 48202810bf78..40b7ee7ead72 100644 --- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts +++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts @@ -301,10 +301,8 @@ eth2phy: ethernet-phy@1 { }; /* 88E6141 Topaz switch */ - switch: switch@3 { + switch: ethernet-switch@3 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <3>; pinctrl-names = "default"; @@ -314,35 +312,35 @@ switch: switch@3 { interrupt-parent = <&cp0_gpio1>; interrupts = <1 IRQ_TYPE_LEVEL_LOW>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - swport1: port@1 { + swport1: ethernet-port@1 { reg = <1>; label = "lan0"; phy-handle = <&swphy1>; }; - swport2: port@2 { + swport2: ethernet-port@2 { reg = <2>; label = "lan1"; phy-handle = <&swphy2>; }; - swport3: port@3 { + swport3: ethernet-port@3 { reg = <3>; label = "lan2"; phy-handle = <&swphy3>; }; - swport4: port@4 { + swport4: ethernet-port@4 { reg = <4>; label = "lan3"; phy-handle = <&swphy4>; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "cpu"; ethernet = <&cp0_eth1>; @@ -355,19 +353,19 @@ mdio { #address-cells = <1>; #size-cells = <0>; - swphy1: swphy1@17 { + swphy1: ethernet-phy@17 { reg = <17>; }; - swphy2: swphy2@18 { + swphy2: ethernet-phy@18 { reg = <18>; }; - swphy3: swphy3@19 { + swphy3: ethernet-phy@19 { reg = <19>; }; - swphy4: swphy4@20 { + swphy4: ethernet-phy@20 { reg = <20>; }; }; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index 4125202028c8..67892f0d2863 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -497,42 +497,42 @@ ge_phy: ethernet-phy@0 { reset-deassert-us = <10000>; }; - switch0: switch0@4 { + switch0: ethernet-switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; pinctrl-0 = <&cp1_switch_reset_pins>; reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@1 { + ethernet-port@1 { reg = <1>; label = "lan2"; phy-handle = <&switch0phy0>; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "lan1"; phy-handle = <&switch0phy1>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "lan4"; phy-handle = <&switch0phy2>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "lan3"; phy-handle = <&switch0phy3>; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "cpu"; ethernet = <&cp1_eth2>; @@ -545,19 +545,19 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy0: switch0phy0@11 { + switch0phy0: ethernet-phy@11 { reg = <0x11>; }; - switch0phy1: switch0phy1@12 { + switch0phy1: ethernet-phy@12 { reg = <0x12>; }; - switch0phy2: switch0phy2@13 { + switch0phy2: ethernet-phy@13 { reg = <0x13>; }; - switch0phy3: switch0phy3@14 { + switch0phy3: ethernet-phy@14 { reg = <0x14>; }; }; diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi index 32cfb3e2efc3..7538ed56053b 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi @@ -207,11 +207,9 @@ phy0: ethernet-phy@0 { reg = <0>; }; - switch6: switch0@6 { + switch6: ethernet-switch@6 { /* Actual device is MV88E6393X */ compatible = "marvell,mv88e6190"; - #address-cells = <1>; - #size-cells = <0>; reg = <6>; interrupt-parent = <&cp0_gpio1>; interrupts = <28 IRQ_TYPE_LEVEL_LOW>; @@ -220,59 +218,59 @@ switch6: switch0@6 { dsa,member = <0 0>; - ports { + ethernet-ports { #address-cells = <1>; #size-cells = <0>; - port@1 { + ethernet-port@1 { reg = <1>; label = "p1"; phy-handle = <&switch0phy1>; }; - port@2 { + ethernet-port@2 { reg = <2>; label = "p2"; phy-handle = <&switch0phy2>; }; - port@3 { + ethernet-port@3 { reg = <3>; label = "p3"; phy-handle = <&switch0phy3>; }; - port@4 { + ethernet-port@4 { reg = <4>; label = "p4"; phy-handle = <&switch0phy4>; }; - port@5 { + ethernet-port@5 { reg = <5>; label = "p5"; phy-handle = <&switch0phy5>; }; - port@6 { + ethernet-port@6 { reg = <6>; label = "p6"; phy-handle = <&switch0phy6>; }; - port@7 { + ethernet-port@7 { reg = <7>; label = "p7"; phy-handle = <&switch0phy7>; }; - port@8 { + ethernet-port@8 { reg = <8>; label = "p8"; phy-handle = <&switch0phy8>; }; - port@9 { + ethernet-port@9 { reg = <9>; label = "p9"; phy-mode = "10gbase-r"; @@ -280,7 +278,7 @@ port@9 { managed = "in-band-status"; }; - port@a { + ethernet-port@a { reg = <10>; ethernet = <&cp0_eth0>; phy-mode = "10gbase-r"; @@ -293,35 +291,35 @@ mdio { #address-cells = <1>; #size-cells = <0>; - switch0phy1: switch0phy1@1 { + switch0phy1: ethernet-phy@1 { reg = <0x1>; }; - switch0phy2: switch0phy2@2 { + switch0phy2: ethernet-phy@2 { reg = <0x2>; }; - switch0phy3: switch0phy3@3 { + switch0phy3: ethernet-phy@3 { reg = <0x3>; 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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org Accept special node naming variants for Marvell switches with special node names as ABI. This is maybe not the prettiest but it avoids special-casing the Marvell MV88E6xxx bindings by copying a lot of generic binding code down into that one binding just to special-case these unfixable nodes. Signed-off-by: Linus Walleij Reviewed-by: Andrew Lunn Reviewed-by: Rob Herring --- .../devicetree/bindings/net/ethernet-switch.yaml | 23 +++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/net/ethernet-switch.yaml b/Documentation/devicetree/bindings/net/ethernet-switch.yaml index 72ac67ca3415..b3b7e1a1b127 100644 --- a/Documentation/devicetree/bindings/net/ethernet-switch.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-switch.yaml @@ -20,9 +20,26 @@ description: select: false -properties: - $nodename: - pattern: "^(ethernet-)?switch(@.*)?$" +allOf: + # This condition is here to satisfy the case where certain device + # nodes have to preserve non-standard names because of + # backward-compatibility with boot loaders inspecting certain + # node names. + - if: + properties: + compatible: + contains: + enum: + - marvell,turris-mox-mv88e6085 + - marvell,turris-mox-mv88e6190 + then: + properties: + $nodename: + pattern: "switch[0-3]@[0-3]+$" + else: + properties: + $nodename: + pattern: "^(ethernet-)?switch(@.*)?$" patternProperties: "^(ethernet-)?ports$": From patchwork Mon Nov 13 23:36:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454596 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C24BA3D988 for ; Mon, 13 Nov 2023 23:36:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="C8bdZCJc" Received: from mail-lj1-x234.google.com (mail-lj1-x234.google.com [IPv6:2a00:1450:4864:20::234]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B3AFD10F4 for ; Mon, 13 Nov 2023 15:36:07 -0800 (PST) Received: by mail-lj1-x234.google.com with SMTP id 38308e7fff4ca-2c6b5841f61so55003551fa.0 for ; Mon, 13 Nov 2023 15:36:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1699918566; x=1700523366; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Wc+Wq7sqd6cor2r5WAdGrmvNaWx96k7C6JDLjLbdJqE=; b=C8bdZCJcexlqB4ZQ5RjViELydZYyJRb0q5C2ONuZ7Vn/22FGgI4cHZNDzhYGCozT1i MgYXsoPl01vdXeN1xyZmEzXa6EIIwbCZTgyViY9Bb/yB7fCXnP6TAvZsKdyvI9TvxYH3 wJWaxZvDeylVRcvCQBesFrIv7EOMh0C7/GhDquMxM+Bi4tNe/525IHiIbN4McC8rX13b m1AKhFZg6ku+5tKGQReTfvpscasQVR4hyMBIcBle1RNqN90HXjwBdZ6xOzy++4zt/H1W RXnGpuvqspKV6YqRCKSKJHv0ndEkVT2UQNb5Ha1ffmYj3/BSESJIiJV3iILQVqO/l/vO hRFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699918566; x=1700523366; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Wc+Wq7sqd6cor2r5WAdGrmvNaWx96k7C6JDLjLbdJqE=; b=rpkJ+wW7fZdDijgvgwwXkOZQTxHrRAB52L6SBe7DDTLVsEqYnuVVoKyB6lVDDxMtkk MzFwAEFINw8qZfbj56WWfQB315PHLvHqlU+LMuamlokIuEMHyQfKuXE0ftYn2WuqT637 aSQDbEWXDBTeyvyuhIFPeRh6KPSHIUFJ9GILg2+oY7XbznfRd5WzoHkfw/h9S2eUXZoa Rfx1uPyVqkUU0XlN/t8V05/P4KFkcl2miDVAL4K487Wa0nwjiXSYkBZCWqVZpbWm0/rI DBKVSRLDSNyGuS5I9L5o86vNxU144xWNOxixM0pyBr/yfKe7prnL+ukn5uF28rGnL9ku fVKA== X-Gm-Message-State: AOJu0YwvkfzCSrvptcS5I2BHNQmxhROgNGhZ1vAKKFJmhYPaPJi63QHu ZxelCyRSWayh9T8hwCQyv9X6HA== X-Google-Smtp-Source: AGHT+IG4Cj5m1hC6xB7TsQYZze+Ywj04f7LA/6FAjfEo+HYtHB1lh+d3McvkWwQMVejVkOZu0H07IQ== X-Received: by 2002:a2e:9042:0:b0:2c3:c4b8:19ec with SMTP id n2-20020a2e9042000000b002c3c4b819ecmr192115ljg.18.1699918565731; Mon, 13 Nov 2023 15:36:05 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id 17-20020a2e0611000000b002b70a8478ddsm1202859ljg.44.2023.11.13.15.36.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 15:36:05 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:36:02 +0100 Subject: [PATCH net-next v8 7/9] dt-bindings: marvell: Rewrite MV88E6xxx in schema Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-7-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij , Rob Herring , Florian Fainelli X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org This is an attempt to rewrite the Marvell MV88E6xxx switch bindings in YAML schema. The current text binding says: WARNING: This binding is currently unstable. Do not program it into a FLASH never to be changed again. Once this binding is stable, this warning will be removed. Well that never happened before we switched to YAML markup, we can't have it like this, what about fixing the mess? Reviewed-by: Andrew Lunn Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6xxx.yaml | 337 +++++++++++++++++++++ .../devicetree/bindings/net/dsa/marvell.txt | 109 ------- MAINTAINERS | 2 +- 3 files changed, 338 insertions(+), 110 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml new file mode 100644 index 000000000000..19f15bdd1c97 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml @@ -0,0 +1,337 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6xxx DSA switch family + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6xxx switch series has been produced and sold + by Marvell since at least 2008. The switch has a few compatibles which + just indicate the base address of the switch, then operating systems + can investigate switch ID registers to find out which actual version + of the switch it is dealing with. + +properties: + compatible: + oneOf: + - enum: + - marvell,mv88e6085 + - marvell,mv88e6190 + - marvell,mv88e6250 + description: | + marvell,mv88e6085: This switch uses base address 0x10. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6085" should be + specified. This includes the following list of MV88Exxxx switches: + 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176, + 6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352 + marvell,mv88e6190: This switch uses base address 0x00. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6190" should be + specified. This includes the following list of MV88Exxxx switches: + 6190, 6190X, 6191, 6290, 6361, 6390, 6390X + marvell,mv88e6250: This switch uses base address 0x08 or 0x18. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6250" should be + specified. This includes the following list of MV88Exxxx switches: + 6220, 6250 + - items: + - const: marvell,turris-mox-mv88e6085 + - const: marvell,mv88e6085 + - items: + - const: marvell,turris-mox-mv88e6190 + - const: marvell,mv88e6190 + + reg: + maxItems: 1 + + eeprom-length: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Set to the length of an EEPROM connected to the switch. Must be + set if the switch can not detect the presence and/or size of a connected + EEPROM, otherwise optional. + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + + interrupts: + description: The switch provides an external interrupt line, but it is + not always used by target systems. + maxItems: 1 + + interrupt-controller: + description: The switch has an internal interrupt controller used by + the different sub-blocks. + + '#interrupt-cells': + description: The internal interrupt controller only supports triggering + on active high level interrupts so the second cell must alway be set to + IRQ_TYPE_LEVEL_HIGH. + const: 2 + + mdio: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an varying combination of + internal and external MDIO buses, in some cases a combined bus that + can be used both internally and externally. This node is for the + primary bus, used internally and sometimes also externally. + + mdio-external: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches that have a separate external + MDIO bus use this port to access external components on the MDIO bus. + + properties: + compatible: + const: marvell,mv88e6xxx-mdio-external + + required: + - compatible + +allOf: + - $ref: dsa.yaml#/$defs/ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-switch@0 { + compatible = "marvell,mv88e6085"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + sw_phy0: ethernet-phy@0 { + reg = <0x0>; + }; + + sw_phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + sw_phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + sw_phy3: ethernet-phy@3 { + reg = <0x3>; + }; + }; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-port@0 { + reg = <0>; + label = "lan4"; + phy-handle = <&sw_phy0>; + phy-mode = "internal"; + }; + + ethernet-port@1 { + reg = <1>; + label = "lan3"; + phy-handle = <&sw_phy1>; + phy-mode = "internal"; + }; + + ethernet-port@2 { + reg = <2>; + label = "lan2"; + phy-handle = <&sw_phy2>; + phy-mode = "internal"; + }; + + ethernet-port@3 { + reg = <3>; + label = "lan1"; + phy-handle = <&sw_phy3>; + phy-mode = "internal"; + }; + + ethernet-port@5 { + reg = <5>; + ethernet = <&fec>; + phy-mode = "rgmii-id"; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + }; + }; + - | + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-switch@0 { + compatible = "marvell,mv88e6190"; + #interrupt-cells = <2>; + interrupt-controller; + interrupt-parent = <&gpio1>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + pinctrl-0 = <&switch_interrupt_pins>; + pinctrl-names = "default"; + reg = <0>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0phy1: ethernet-phy@1 { + reg = <0x1>; + }; + + switch0phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + switch0phy3: ethernet-phy@3 { + reg = <0x3>; + }; + + switch0phy4: ethernet-phy@4 { + reg = <0x4>; + }; + + switch0phy5: ethernet-phy@5 { + reg = <0x5>; + }; + + switch0phy6: ethernet-phy@6 { + reg = <0x6>; + }; + + switch0phy7: ethernet-phy@7 { + reg = <0x7>; + }; + + switch0phy8: ethernet-phy@8 { + reg = <0x8>; + }; + }; + + mdio-external { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + + phy1: ethernet-phy@b { + reg = <0xb>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + phy2: ethernet-phy@c { + reg = <0xc>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + }; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-port@0 { + ethernet = <ð0>; + phy-mode = "rgmii"; + reg = <0>; + + fixed-link { + full-duplex; + pause; + speed = <1000>; + }; + }; + + ethernet-port@1 { + label = "lan1"; + phy-handle = <&switch0phy1>; + reg = <1>; + }; + + ethernet-port@2 { + label = "lan2"; + phy-handle = <&switch0phy2>; + reg = <2>; + }; + + ethernet-port@3 { + label = "lan3"; + phy-handle = <&switch0phy3>; + reg = <3>; + }; + + ethernet-port@4 { + label = "lan4"; + phy-handle = <&switch0phy4>; + reg = <4>; + }; + + ethernet-port@5 { + label = "lan5"; + phy-handle = <&switch0phy5>; + reg = <5>; + }; + + ethernet-port@6 { + label = "lan6"; + phy-handle = <&switch0phy6>; + reg = <6>; + }; + + ethernet-port@7 { + label = "lan7"; + phy-handle = <&switch0phy7>; + reg = <7>; + }; + + ethernet-port@8 { + label = "lan8"; + phy-handle = <&switch0phy8>; + reg = <8>; + }; + + ethernet-port@9 { + /* 88X3310P external phy */ + label = "lan9"; + phy-handle = <&phy1>; + phy-mode = "xaui"; + reg = <9>; + }; + + ethernet-port@a { + /* 88X3310P external phy */ + label = "lan10"; + phy-handle = <&phy2>; + phy-mode = "xaui"; + reg = <0xa>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt deleted file mode 100644 index 6ec0c181b6db..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt +++ /dev/null @@ -1,109 +0,0 @@ -Marvell DSA Switch Device Tree Bindings ---------------------------------------- - -WARNING: This binding is currently unstable. Do not program it into a -FLASH never to be changed again. Once this binding is stable, this -warning will be removed. - -If you need a stable binding, use the old dsa.txt binding. - -Marvell Switches are MDIO devices. The following properties should be -placed as a child node of an mdio device. - -The properties described here are those specific to Marvell devices. -Additional required and optional properties can be found in dsa.txt. - -The compatibility string is used only to find an identification register, -which is at a different MDIO base address in different switch families. -- "marvell,mv88e6085" : Switch has base address 0x10. Use with models: - 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, - 6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321, - 6341, 6350, 6351, 6352 -- "marvell,mv88e6190" : Switch has base address 0x00. Use with models: - 6190, 6190X, 6191, 6290, 6361, 6390, 6390X -- "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model: - 6220, 6250 - -Required properties: -- compatible : Should be one of "marvell,mv88e6085", - "marvell,mv88e6190" or "marvell,mv88e6250" as - indicated above -- reg : Address on the MII bus for the switch. - -Optional properties: - -- reset-gpios : Should be a gpio specifier for a reset line -- interrupts : Interrupt from the switch -- interrupt-controller : Indicates the switch is itself an interrupt - controller. This is used for the PHY interrupts. -#interrupt-cells = <2> : Controller uses two cells, number and flag -- eeprom-length : Set to the length of an EEPROM connected to the - switch. Must be set if the switch can not detect - the presence and/or size of a connected EEPROM, - otherwise optional. -- mdio : Container of PHY and devices on the switches MDIO - bus. -- mdio? : Container of PHYs and devices on the external MDIO - bus. The node must contains a compatible string of - "marvell,mv88e6xxx-mdio-external" - -Example: - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6085"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6190"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - mdio1 { - compatible = "marvell,mv88e6xxx-mdio-external"; - #address-cells = <1>; - #size-cells = <0>; - switch1phy9: switch1phy0@9 { - reg = <9>; - }; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 90f13281d297..1b4475254d27 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,7 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/dsa/marvell.txt +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ F: include/linux/dsa/mv88e6xxx.h From patchwork Mon Nov 13 23:36:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454597 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 710733FB2A for ; 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Mon, 13 Nov 2023 15:36:06 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:36:03 +0100 Subject: [PATCH net-next v8 8/9] ARM64: dts: Add special compatibles for the Turris Mox Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-8-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org These special compatibles are added to the Marvell Armada 3720 Turris Mox in order to be able to special-case and avoid warnings on the non-standard nodenames that are ABI on this one board due to being used in deployed versions of U-Boot. Signed-off-by: Linus Walleij --- arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index 66cd98b67744..a89747d2a600 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -312,7 +312,7 @@ phy1: ethernet-phy@1 { * Also do not touch the "ports" or "port@n" nodes. These are also ABI. */ switch0@10 { - compatible = "marvell,mv88e6190"; + compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190"; reg = <0x10>; dsa,member = <0 0>; interrupt-parent = <&moxtet>; @@ -438,7 +438,7 @@ port-sfp@a { /* NOTE: this node name is ABI, don't change it! */ switch0@2 { - compatible = "marvell,mv88e6085"; + compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 0>; interrupt-parent = <&moxtet>; @@ -506,7 +506,7 @@ port@5 { /* NOTE: this node name is ABI, don't change it! */ switch1@11 { - compatible = "marvell,mv88e6190"; + compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190"; reg = <0x11>; dsa,member = <0 1>; interrupt-parent = <&moxtet>; @@ -632,7 +632,7 @@ port-sfp@a { /* NOTE: this node name is ABI, don't change it! */ switch1@2 { - compatible = "marvell,mv88e6085"; + compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 1>; interrupt-parent = <&moxtet>; @@ -700,7 +700,7 @@ port@5 { /* NOTE: this node name is ABI, don't change it! */ switch2@12 { - compatible = "marvell,mv88e6190"; + compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190"; reg = <0x12>; dsa,member = <0 2>; interrupt-parent = <&moxtet>; @@ -817,7 +817,7 @@ port-sfp@a { /* NOTE: this node name is ABI, don't change it! */ switch2@2 { - compatible = "marvell,mv88e6085"; + compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 2>; interrupt-parent = <&moxtet>; From patchwork Mon Nov 13 23:36:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 13454598 X-Patchwork-Delegate: kuba@kernel.org Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6F723FB3F for ; Mon, 13 Nov 2023 23:36:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="OdgI0zWm" Received: from mail-lj1-x22b.google.com (mail-lj1-x22b.google.com [IPv6:2a00:1450:4864:20::22b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AAA66173A for ; Mon, 13 Nov 2023 15:36:09 -0800 (PST) Received: by mail-lj1-x22b.google.com with SMTP id 38308e7fff4ca-2c595f5dc84so65419841fa.0 for ; Mon, 13 Nov 2023 15:36:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1699918568; x=1700523368; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=lIz/GtmN1t9bIiyorUy96/+eOLVRUGVLvuVaAhEDkG8=; b=OdgI0zWmy9KTh8RatOScq/MmE9nEeSB7fThpWdc4w7s68S0HWOOS9Ufcyn87JiUFH3 30cMbwkZnE1h9RTkgP0NMjpbg/GZfSESdT9xhEWrwMYlGkvDQhm9cbYnDBYYbAMR0eBx QglxdpHS/iPrhyE0vNTHl6rgPlOga1UiyVz5nu5c3mhO/XHHhUFUdGlskuQ2NcffSYCb 0N1QESSM/K7CyOfi5b9GjrmVJS5wvuo9hdgKM96kuNRwp1YeyWgx5qOFHDe5u1efQBvz 2aIoaOuyQticBmGL4YbVKBhEfhKxRCQeEV7UG33g+W4/6Xppf8QHze1ZbXI8wIkt9jAa Vy6A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699918568; x=1700523368; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=lIz/GtmN1t9bIiyorUy96/+eOLVRUGVLvuVaAhEDkG8=; b=E44aJjm2vjoksLlhPe1HygAa5kuoiec6Ji+aaCHvZuksXQECTjSnwGqmlD/CczXSVg UjJYmwOGP7kULwVMZZLFsu4jEL9FEKOdc6Plky9C15tDlKYWsW+/TY76nSDCqvY+qrxI 4+Ag65cUtOUBcLdQ1CjUt02egZoUu+CyDIz/YLcwJCpWabK28VGZx86xj589qGWhrOpz /3LRUHrGmxk7m3R3yM6HZXC/Zjp0B0sT3Ts1avVktiF4fU9yDelb2zALE2f7Q1e18E5n brISi96wvoTa4YmgckaJ4FLcGnJgP0p4hsnLAnD4BzXE9kzXcQ5Qt3lz5u85tlOegnOR UC+w== X-Gm-Message-State: AOJu0YwJJimGFY9RI5oxeNFVoub+iX2K5daCMQiD2rEHfDDWeaEVkxTn XZDTIaIy0W6pIRPVFESMSSOlTw== X-Google-Smtp-Source: AGHT+IFxSldNF2UOlvgvflSNOcHswJutVDAUwO0Tw9t/H8g7uE54ZPrkfTELcjw4bqAhmaVslya7Cg== X-Received: by 2002:a2e:99ce:0:b0:2c3:e35d:13d with SMTP id l14-20020a2e99ce000000b002c3e35d013dmr183482ljj.5.1699918567898; Mon, 13 Nov 2023 15:36:07 -0800 (PST) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id 17-20020a2e0611000000b002b70a8478ddsm1202859ljg.44.2023.11.13.15.36.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 15:36:07 -0800 (PST) From: Linus Walleij Date: Tue, 14 Nov 2023 00:36:04 +0100 Subject: [PATCH net-next v8 9/9] dt-bindings: marvell: Add Marvell MV88E6060 DSA schema Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231114-marvell-88e6152-wan-led-v8-9-50688741691b@linaro.org> References: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> In-Reply-To: <20231114-marvell-88e6152-wan-led-v8-0-50688741691b@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij , Vladimir Oltean , Rob Herring , Florian Fainelli X-Mailer: b4 0.12.4 X-Patchwork-Delegate: kuba@kernel.org The Marvell MV88E6060 is one of the oldest DSA switches from Marvell, and it has DT bindings used in the wild. Let's define them properly. It is different enough from the rest of the MV88E6xxx switches that it deserves its own binding. Reviewed-by: Andrew Lunn Reviewed-by: Vladimir Oltean Reviewed-by: Rob Herring Reviewed-by: Florian Fainelli Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6060.yaml | 88 ++++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 89 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml new file mode 100644 index 000000000000..4f1adf00431a --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6060.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6060 DSA switch + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6060 switch has been produced and sold by Marvell + since at least 2008. The switch has one pin ADDR4 that controls the + MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus + connected to the switch, the PHYs inside the switch appear as + independent devices on address 0x00-0x04 or 0x10-0x14, so in difference + from many other DSA switches this switch does not have an internal + MDIO bus for the PHY devices. + +properties: + compatible: + const: marvell,mv88e6060 + description: + The MV88E6060 is the oldest Marvell DSA switch product, and + as such a bit limited in features compared to later hardware. + + reg: + maxItems: 1 + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + +allOf: + - $ref: dsa.yaml#/$defs/ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-switch@16 { + compatible = "marvell,mv88e6060"; + reg = <16>; + + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-port@0 { + reg = <0>; + label = "lan1"; + }; + ethernet-port@1 { + reg = <1>; + label = "lan2"; + }; + ethernet-port@2 { + reg = <2>; + label = "lan3"; + }; + ethernet-port@3 { + reg = <3>; + label = "lan4"; + }; + ethernet-port@5 { + reg = <5>; + phy-mode = "rev-mii"; + ethernet = <ðc>; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 1b4475254d27..4c933a2a56ad 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,6 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/