From patchwork Tue Nov 21 12:34:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13462988 X-Patchwork-Delegate: kuba@kernel.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="foBXaPCg" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2E6281BB; Tue, 21 Nov 2023 04:34:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700570094; x=1732106094; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=zQpj7OaTDonluY2E3OGQf5kVh3FqltWnatkxOc0duHk=; b=foBXaPCgyskUKZVugWfEhtAg6wv9tvOnNXr/q/YjPP41K3AnvgVYq7JF aceOQ4ZqHkw08XbBkCrNREgxHODCaczubNY9JVQdQS7udH9yIWTMq26Rf I2Nvw5CIuhlwZXeh4DyzOLiXjiX7X5mL7E411mvORE5OAf/Nx5kEHwEM4 HuydYME0RL0LGkTY5hlilc0wKHjldNY60nAT1nAQvQsWl0nnOrINHuK92 FICoiqbdmpGRz8cosGDCm2TvgYmATatpsHA76GZTP+u83mDXvwQx0k+AW yv0D6rvAww7tCWwdvxXh9tjszdUokKlsCXY9wWTqJNvBpDLrIl/1SN1aO w==; X-IronPort-AV: E=McAfee;i="6600,9927,10900"; a="10496056" X-IronPort-AV: E=Sophos;i="6.04,215,1695711600"; d="scan'208";a="10496056" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 04:34:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,215,1695711600"; d="scan'208";a="14496367" Received: from wpastern-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.57.17]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 04:34:50 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: "David S. Miller" , Eric Dumazet , intel-wired-lan@lists.osuosl.org, Jakub Kicinski , Jesse Brandeburg , Jonathan Cameron , netdev@vger.kernel.org, Paolo Abeni , Tony Nguyen , linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v4 1/3] igb: Use FIELD_GET() to extract Link Width Date: Tue, 21 Nov 2023 14:34:26 +0200 Message-Id: <20231121123428.20907-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231121123428.20907-1-ilpo.jarvinen@linux.intel.com> References: <20231121123428.20907-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Use FIELD_GET() to extract PCIe Negotiated Link Width field instead of custom masking and shifting. Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron Reviewed-by: Simon Horman Tested-by: Pucha Himasekhar Reddy (A Contingent worker at Intel) --- drivers/net/ethernet/intel/igb/e1000_mac.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/intel/igb/e1000_mac.c b/drivers/net/ethernet/intel/igb/e1000_mac.c index caf91c6f52b4..5a23b9cfec6c 100644 --- a/drivers/net/ethernet/intel/igb/e1000_mac.c +++ b/drivers/net/ethernet/intel/igb/e1000_mac.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 2007 - 2018 Intel Corporation. */ +#include #include #include #include @@ -50,9 +51,8 @@ s32 igb_get_bus_info_pcie(struct e1000_hw *hw) break; } - bus->width = (enum e1000_bus_width)((pcie_link_status & - PCI_EXP_LNKSTA_NLW) >> - PCI_EXP_LNKSTA_NLW_SHIFT); + bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW, + pcie_link_status); } reg = rd32(E1000_STATUS); From patchwork Tue Nov 21 12:34:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13462989 X-Patchwork-Delegate: kuba@kernel.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="NDMrL6u0" Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0FB8A192; Tue, 21 Nov 2023 04:35:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700570106; x=1732106106; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=HMH5KEeZn7aezfXFMh9Smzjm5lwAV6MHWZcT0k35UEI=; b=NDMrL6u0A19a4BQN7FwVKiBagSxC6K90L+TAke/huAwlnLWOq+6FG/eb ElWMdOcuJNJRvoXHIfXPMk7hSpvP1XricaqS4EYY6Elz1yBkKNLPzgADw 4yI5rKoSGRjlxyKN/ygbau90HVAaprERO1nitMigObYz/5SZYqsq/g4jB KSRP4GveBPYV3Y+ytO4ceCzv1qNVzOMTZPsDt1Kt8rPo3IRLy8oEUDvfP IS1PwaPiJ0TJR2LV+1UEy8tiC78u/O5KdnOFv50jQ0Mn5eTQzBwNKBgdZ V91dYypSOXimqahZ1dmC9hQgNc8podD20zEXc2ScLcGGxbRonHBtaZ/I/ g==; X-IronPort-AV: E=McAfee;i="6600,9927,10900"; a="10496099" X-IronPort-AV: E=Sophos;i="6.04,215,1695711600"; d="scan'208";a="10496099" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 04:35:05 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.04,215,1695711600"; d="scan'208";a="14496390" Received: from wpastern-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.57.17]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 04:35:01 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: "David S. Miller" , Eric Dumazet , intel-wired-lan@lists.osuosl.org, Jakub Kicinski , Jesse Brandeburg , Jonathan Cameron , netdev@vger.kernel.org, Paolo Abeni , Tony Nguyen , linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v4 2/3] e1000e: Use PCI_EXP_LNKSTA_NLW & FIELD_GET() instead of custom defines/code Date: Tue, 21 Nov 2023 14:34:27 +0200 Message-Id: <20231121123428.20907-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231121123428.20907-1-ilpo.jarvinen@linux.intel.com> References: <20231121123428.20907-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org e1000e has own copy of PCI Negotiated Link Width field defines. Use the ones from include/uapi/linux/pci_regs.h instead of the custom ones and remove the custom ones and convert to FIELD_GET(). Suggested-by: Jonathan Cameron Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron Reviewed-by: Simon Horman Tested-by: Naama Meir --- drivers/net/ethernet/intel/e1000e/defines.h | 2 -- drivers/net/ethernet/intel/e1000e/mac.c | 7 ++++--- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h index 63c3c79380a1..a4d29c9e03a6 100644 --- a/drivers/net/ethernet/intel/e1000e/defines.h +++ b/drivers/net/ethernet/intel/e1000e/defines.h @@ -681,8 +681,6 @@ #define PCIE_LINK_STATUS 0x12 #define PCI_HEADER_TYPE_MULTIFUNC 0x80 -#define PCIE_LINK_WIDTH_MASK 0x3F0 -#define PCIE_LINK_WIDTH_SHIFT 4 #define PHY_REVISION_MASK 0xFFFFFFF0 #define MAX_PHY_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */ diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c index 5df7ad93f3d7..5340cf73778d 100644 --- a/drivers/net/ethernet/intel/e1000e/mac.c +++ b/drivers/net/ethernet/intel/e1000e/mac.c @@ -1,6 +1,8 @@ // SPDX-License-Identifier: GPL-2.0 /* Copyright(c) 1999 - 2018 Intel Corporation. */ +#include + #include "e1000.h" /** @@ -25,9 +27,8 @@ s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw) pci_read_config_word(adapter->pdev, cap_offset + PCIE_LINK_STATUS, &pcie_link_status); - bus->width = (enum e1000_bus_width)((pcie_link_status & - PCIE_LINK_WIDTH_MASK) >> - PCIE_LINK_WIDTH_SHIFT); + bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW, + pcie_link_status); } mac->ops.set_lan_id(hw); From patchwork Tue Nov 21 12:34:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 13462990 X-Patchwork-Delegate: kuba@kernel.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="D1D9DF/l" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5900CD65; Tue, 21 Nov 2023 04:35:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700570118; x=1732106118; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nivaZQ+9P0ZV/opmlAd8c2iOR56SU+o3ql7tnZt2R+U=; b=D1D9DF/l34RN+o4MhIIZvE1SAi13aICV6oWBa48iBCMBGm23hWQrmP6s uEhOGywmxtlqe+LnBE8YkifDTUI3ebqZh1r2Mr7go4q+r01oe7DLCEc5E 08uZl947mLlAIwL1+ItJzh4uRu1vemyWtfdYjZfOou80tDO4gR02isduV 23h8BCW6LayfdJNYYVs+dJI02YqxiJJNeFd8PHkVLbI1VNM4KuecguNCF w02XkpRkKwck2wNTi1gOH4KawTSZyvwwOKNxzZ+xK0sLMp7FG8RPrrJAQ mhfkMRAq1KktgtV2ya3+U7Z4xEoA0CfSYFkDbZkX6z7mh+3igwnmuq+tG w==; X-IronPort-AV: E=McAfee;i="6600,9927,10900"; a="458327794" X-IronPort-AV: E=Sophos;i="6.04,215,1695711600"; d="scan'208";a="458327794" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 04:35:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10900"; a="837044350" X-IronPort-AV: E=Sophos;i="6.04,215,1695711600"; d="scan'208";a="837044350" Received: from wpastern-mobl1.ger.corp.intel.com (HELO localhost) ([10.252.57.17]) by fmsmga004-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 04:35:13 -0800 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: "David S. Miller" , Eric Dumazet , intel-wired-lan@lists.osuosl.org, Jakub Kicinski , Jesse Brandeburg , Jonathan Cameron , netdev@vger.kernel.org, Paolo Abeni , Tony Nguyen , linux-kernel@vger.kernel.org Cc: =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH v4 3/3] e1000e: Use pcie_capability_read_word() for reading LNKSTA Date: Tue, 21 Nov 2023 14:34:28 +0200 Message-Id: <20231121123428.20907-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231121123428.20907-1-ilpo.jarvinen@linux.intel.com> References: <20231121123428.20907-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Use pcie_capability_read_word() for reading LNKSTA and remove the custom define that matches to PCI_EXP_LNKSTA. As only single user for cap_offset remains, replace it with a call to pci_pcie_cap(). Instead of e1000_adapter, make local variable out of pci_dev because both users are interested in it. Signed-off-by: Ilpo Järvinen Reviewed-by: Jonathan Cameron Reviewed-by: Simon Horman Tested-by: Naama Meir --- drivers/net/ethernet/intel/e1000e/defines.h | 1 - drivers/net/ethernet/intel/e1000e/mac.c | 11 ++++------- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/intel/e1000e/defines.h b/drivers/net/ethernet/intel/e1000e/defines.h index a4d29c9e03a6..23a58cada43a 100644 --- a/drivers/net/ethernet/intel/e1000e/defines.h +++ b/drivers/net/ethernet/intel/e1000e/defines.h @@ -678,7 +678,6 @@ /* PCI/PCI-X/PCI-EX Config space */ #define PCI_HEADER_TYPE_REGISTER 0x0E -#define PCIE_LINK_STATUS 0x12 #define PCI_HEADER_TYPE_MULTIFUNC 0x80 diff --git a/drivers/net/ethernet/intel/e1000e/mac.c b/drivers/net/ethernet/intel/e1000e/mac.c index 5340cf73778d..694a779e718d 100644 --- a/drivers/net/ethernet/intel/e1000e/mac.c +++ b/drivers/net/ethernet/intel/e1000e/mac.c @@ -17,16 +17,13 @@ s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw) { struct e1000_mac_info *mac = &hw->mac; struct e1000_bus_info *bus = &hw->bus; - struct e1000_adapter *adapter = hw->adapter; - u16 pcie_link_status, cap_offset; + struct pci_dev *pdev = hw->adapter->pdev; + u16 pcie_link_status; - cap_offset = adapter->pdev->pcie_cap; - if (!cap_offset) { + if (!pci_pcie_cap(pdev)) { bus->width = e1000_bus_width_unknown; } else { - pci_read_config_word(adapter->pdev, - cap_offset + PCIE_LINK_STATUS, - &pcie_link_status); + pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &pcie_link_status); bus->width = (enum e1000_bus_width)FIELD_GET(PCI_EXP_LNKSTA_NLW, pcie_link_status); }