From patchwork Wed Nov 22 02:57:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alison Schofield X-Patchwork-Id: 13463879 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FsfItV3C" Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D48DF90 for ; Tue, 21 Nov 2023 18:57:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1700621875; x=1732157875; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=V/hPdxx4+FPFMl4D2SHJgoI/pplpCvVod2LAgTQbFZM=; b=FsfItV3CjFshQcgeuG+dUfdijviE4udb6h/7+vjvSkef+ykflrVbZIsc /4XfpO4I9dlcgm03DbN5awphqW3S5xmWK5SnvLDH3Hx+mEbbq5zuWJETR DiYSBww7XPaTYKQ5KhBdB0KEipxtnemNDTGv7hHPn+ALQ3fSpSy0bIXT8 3sUqXcKRmtGPV6uBvmC6O0Y/hB+M6QPr/b6kKq1HvyP3kY70eSu/QPx1N 8s4nY+fKgZpGpqqwlEXVhfaMN5YOvLsrIBmRqi/5r3HVSncg7xsGRs0lA zqW8Jxi67tJUAROGUNYOeBRI28FzSP05of0wbSQmdl6k4XuYKu+pJi07I g==; X-IronPort-AV: E=McAfee;i="6600,9927,10901"; a="394806591" X-IronPort-AV: E=Sophos;i="6.04,217,1695711600"; d="scan'208";a="394806591" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 18:57:55 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10901"; a="1098247105" X-IronPort-AV: E=Sophos;i="6.04,217,1695711600"; d="scan'208";a="1098247105" Received: from aschofie-mobl2.amr.corp.intel.com (HELO localhost) ([10.209.90.75]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Nov 2023 18:57:54 -0800 From: alison.schofield@intel.com To: Vishal Verma Cc: Alison Schofield , nvdimm@lists.linux.dev, linux-cxl@vger.kernel.org Subject: [ndctl PATCH] cxl/test: replace a bad root decoder usage in cxl-xor-region.sh Date: Tue, 21 Nov 2023 18:57:53 -0800 Message-Id: <20231122025753.1209527-1-alison.schofield@intel.com> X-Mailer: git-send-email 2.40.1 Precedence: bulk X-Mailing-List: linux-cxl@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Alison Schofield The 4-way XOR region as defined in this test uses a root decoder that is created using an improperly defined CFMWS. The problem with the CFMWS is that Host Bridges repeat in the target list like this: { 0, 1, 0, 1 }. Stop using that root decoder and create a 4-way XOR region using an x2 root decoder that supports XOR arithmetic. The test passes prior to this patch but there is an interleave check [1] introduced in the CXL region driver that will expose the bad interleave this test creates via dev_dbg() messages like this: [ ] cxl_core:cxl_region_attach:1808: cxl decoder17.0: Test cxl_calc_interleave_pos(): fail test_pos:4 cxled->pos:2 [ ] cxl_core:cxl_region_attach:1808: cxl decoder18.0: Test cxl_calc_interleave_pos(): fail test_pos:5 cxled->pos:3 Note that the CFMWS's are defined in the kernel cxl-test module, so a kernel patch removing the bad CFMWS will also need to be merged, but that cleanup can follow this patch. Also note that the bad CFMWS is not used in the default cxl-test environment. It is only visible when the cxl-test module is loaded using the param interleave_arithmetic=1. It is a special config that provides the XOR math CFMWS's for this test. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=a3e00c964fb943934af916f48f0dd43b5110c866 Signed-off-by: Alison Schofield --- Vishal - I'm hoping you will merge this in ndctl v79 even though the exposure with the kernel doesn't happen until kernel 6.7. This way users of cxl-test are not learning to ignore the interleave calc warnings. Also, hopefully I have not introduced any new shell issues, but I know this unit test has existing warnings. Can we do a shell cleanup in a follow-on patchset across the CXL tests? (and not last minute for your ndctl release) test/cxl-xor-region.sh | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) base-commit: a871e6153b11fe63780b37cdcb1eb347b296095c diff --git a/test/cxl-xor-region.sh b/test/cxl-xor-region.sh index 1962327bd00a..117e7a4bba61 100644 --- a/test/cxl-xor-region.sh +++ b/test/cxl-xor-region.sh @@ -68,10 +68,10 @@ setup_x2() setup_x4() { - # find x4 decoder + # find an x2 decoder decoder=$($CXL list -b cxl_test -D -d root | jq -r ".[] | select(.pmem_capable == true) | - select(.nr_targets == 4) | + select(.nr_targets == 2) | .decoder") # Find a memdev for each host-bridge interleave position @@ -79,14 +79,10 @@ setup_x4() .targets | .[] | select(.position == 0) | .target") port_dev1=$($CXL list -T -d $decoder | jq -r ".[] | .targets | .[] | select(.position == 1) | .target") - port_dev2=$($CXL list -T -d $decoder | jq -r ".[] | - .targets | .[] | select(.position == 2) | .target") - port_dev3=$($CXL list -T -d $decoder | jq -r ".[] | - .targets | .[] | select(.position == 3) | .target") mem0=$($CXL list -M -p $port_dev0 | jq -r ".[0].memdev") - mem1=$($CXL list -M -p $port_dev1 | jq -r ".[1].memdev") - mem2=$($CXL list -M -p $port_dev2 | jq -r ".[2].memdev") - mem3=$($CXL list -M -p $port_dev3 | jq -r ".[3].memdev") + mem1=$($CXL list -M -p $port_dev1 | jq -r ".[0].memdev") + mem2=$($CXL list -M -p $port_dev0 | jq -r ".[1].memdev") + mem3=$($CXL list -M -p $port_dev1 | jq -r ".[1].memdev") memdevs="$mem0 $mem1 $mem2 $mem3" }