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Message-ID: <7c70aa15-213b-41ae-bc1d-ddd4cfcf7165@suse.com> Date: Fri, 24 Nov 2023 09:36:41 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 01/15] VMX: drop vmx_virt_exception and make vmx_vmfunc static Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Kevin Tian , Jun Nakajima References: Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: X-ClientProxiedBy: FR4P281CA0408.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:d0::6) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|PAXPR04MB8526:EE_ X-MS-Office365-Filtering-Correlation-Id: feb77f49-2252-4b2d-7bc1-08dbecc87c22 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Since no use has appeared, drop it. For vmx_vmfunc the situation is similar, but not identical: It at least has one use. Convert it to be static (and make style adjustments while there). Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- In how far the sole vmx_vmfunc use is actually meaningful (on its own) I'm not really sure. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -167,8 +167,7 @@ u32 vmx_secondary_exec_control __read_mo u32 vmx_vmexit_control __read_mostly; u32 vmx_vmentry_control __read_mostly; u64 vmx_ept_vpid_cap __read_mostly; -u64 vmx_vmfunc __read_mostly; -bool vmx_virt_exception __read_mostly; +static uint64_t __read_mostly vmx_vmfunc; static DEFINE_PER_CPU_READ_MOSTLY(paddr_t, vmxon_region); static DEFINE_PER_CPU(paddr_t, current_vmcs); @@ -475,8 +474,7 @@ static int vmx_init_vmcs_config(bool bsp vmx_basic_msr = ((u64)vmx_basic_msr_high << 32) | vmx_basic_msr_low; vmx_vmfunc = _vmx_vmfunc; - vmx_virt_exception = !!(_vmx_secondary_exec_control & - SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS); + vmx_display_features(); /* IA-32 SDM Vol 3B: VMCS size is never greater than 4kB. */ From patchwork Fri Nov 24 08:37:20 2023 Content-Type: text/plain; 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Message-ID: <254ac524-4217-4bd4-9664-a340bf92db0b@suse.com> Date: Fri, 24 Nov 2023 09:37:20 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 02/15] x86/HVM: hide SVM/VMX when their enabling is prohibited by firmware Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Kevin Tian , Jun Nakajima References: Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: X-ClientProxiedBy: FR4P281CA0408.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:d0::6) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|PAXPR04MB8526:EE_ X-MS-Office365-Filtering-Correlation-Id: 9fd54dde-d634-4210-1cf0-08dbecc8937e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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The only place where hardware announcing the feature is recorded is the raw CPU policy/featureset. Inspired by https://lore.kernel.org/all/20230921114940.957141-1-pbonzini@redhat.com/. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2543,6 +2543,7 @@ const struct hvm_function_table * __init if ( _svm_cpu_up(true) ) { + setup_clear_cpu_cap(X86_FEATURE_SVM); printk("SVM: failed to initialise.\n"); return NULL; } --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -2162,6 +2162,23 @@ int __init vmx_vmcs_init(void) if ( !ret ) register_keyhandler('v', vmcs_dump, "dump VT-x VMCSs", 1); + else + { + setup_clear_cpu_cap(X86_FEATURE_VMX); + + /* + * _vmx_vcpu_up() may have made it past feature identification. + * Make sure all dependent features are off as well. + */ + vmx_basic_msr = 0; + vmx_pin_based_exec_control = 0; + vmx_cpu_based_exec_control = 0; + vmx_secondary_exec_control = 0; + vmx_vmexit_control = 0; + vmx_vmentry_control = 0; + vmx_ept_vpid_cap = 0; + vmx_vmfunc = 0; + } return ret; } From patchwork Fri Nov 24 08:37:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 13467168 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 97896C61D97 for ; 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Signed-off-by: Jan Beulich --- Using set_in_cr4() seems favorable over updating mmu_cr4_features despite the resulting redundant CR4 update. But I certainly could be talked into going the alternative route. --- v2: Actually clear CR4.VMXE for the BSP on the error path. --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -2959,14 +2959,18 @@ static bool __init has_if_pschange_mc(vo const struct hvm_function_table * __init start_vmx(void) { - set_in_cr4(X86_CR4_VMXE); + write_cr4(read_cr4() | X86_CR4_VMXE); if ( vmx_vmcs_init() ) { + write_cr4(read_cr4() & ~X86_CR4_VMXE); printk("VMX: failed to initialise.\n"); return NULL; } + /* Arrange for APs to have CR4.VMXE set early on. */ + set_in_cr4(X86_CR4_VMXE); + vmx_function_table.singlestep_supported = cpu_has_monitor_trap_flag; if ( cpu_has_vmx_dt_exiting ) From patchwork Fri Nov 24 08:38:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 13467169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9D569C61D97 for ; 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Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1086,9 +1086,6 @@ static int cf_check hvm_load_cpu_ctxt(st v->arch.hvm.guest_cr[2] = ctxt.cr2; hvm_update_guest_cr(v, 2); - if ( hvm_funcs.tsc_scaling.setup ) - alternative_vcall(hvm_funcs.tsc_scaling.setup, v); - v->arch.msrs->tsc_aux = ctxt.msr_tsc_aux; hvm_set_guest_tsc_fixed(v, ctxt.tsc, d->arch.hvm.sync_tsc); @@ -4033,9 +4030,6 @@ void hvm_vcpu_reset_state(struct vcpu *v hvm_set_segment_register(v, x86_seg_gdtr, ®); hvm_set_segment_register(v, x86_seg_idtr, ®); - if ( hvm_funcs.tsc_scaling.setup ) - alternative_vcall(hvm_funcs.tsc_scaling.setup, v); - /* Sync AP's TSC with BSP's. */ v->arch.hvm.cache_tsc_offset = v->domain->vcpu[0]->arch.hvm.cache_tsc_offset; --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1454,20 +1454,13 @@ static void cf_check vmx_handle_cd(struc } } -static void cf_check vmx_setup_tsc_scaling(struct vcpu *v) -{ - if ( v->domain->arch.vtsc ) - return; - - vmx_vmcs_enter(v); - __vmwrite(TSC_MULTIPLIER, hvm_tsc_scaling_ratio(v->domain)); - vmx_vmcs_exit(v); -} - static void cf_check vmx_set_tsc_offset(struct vcpu *v, u64 offset, u64 at_tsc) { vmx_vmcs_enter(v); + if ( !v->domain->arch.vtsc && cpu_has_vmx_tsc_scaling ) + __vmwrite(TSC_MULTIPLIER, hvm_tsc_scaling_ratio(v->domain)); + if ( nestedhvm_vcpu_in_guestmode(v) ) offset += nvmx_get_tsc_offset(v); @@ -3031,10 +3024,7 @@ const struct hvm_function_table * __init } if ( cpu_has_vmx_tsc_scaling ) - { vmx_function_table.tsc_scaling.ratio_frac_bits = 48; - vmx_function_table.tsc_scaling.setup = vmx_setup_tsc_scaling; - } model_specific_lbr = get_model_specific_lbr(); lbr_tsx_fixup_check(); --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -240,9 +240,6 @@ struct hvm_function_table { uint8_t ratio_frac_bits; /* maximum-allowed TSC scaling ratio */ uint64_t max_ratio; - - /* Architecture function to setup TSC scaling ratio */ - void (*setup)(struct vcpu *v); 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Message-ID: <8f9c3db0-bedb-4b8d-9560-3e5526288b5f@suse.com> Date: Fri, 24 Nov 2023 09:38:55 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 05/15] x86: amend cpu_has_xen_[ibt,shstk} Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= References: Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: X-ClientProxiedBy: FR4P281CA0408.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:d0::6) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|PA4PR04MB9438:EE_ X-MS-Office365-Filtering-Correlation-Id: 6b668637-8777-4989-a6bc-08dbecc8cbf5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Jan Beulich Acked-by: Andrew Cooper --- v2: New. --- a/xen/arch/x86/include/asm/cpufeature.h +++ b/xen/arch/x86/include/asm/cpufeature.h @@ -215,8 +215,10 @@ static inline bool boot_cpu_has(unsigned #define cpu_has_lfence_dispatch boot_cpu_has(X86_FEATURE_LFENCE_DISPATCH) #define cpu_has_nscb boot_cpu_has(X86_FEATURE_NSCB) #define cpu_has_xen_lbr boot_cpu_has(X86_FEATURE_XEN_LBR) -#define cpu_has_xen_shstk boot_cpu_has(X86_FEATURE_XEN_SHSTK) -#define cpu_has_xen_ibt boot_cpu_has(X86_FEATURE_XEN_IBT) +#define cpu_has_xen_shstk (IS_ENABLED(CONFIG_XEN_SHSTK) && \ + boot_cpu_has(X86_FEATURE_XEN_SHSTK)) +#define cpu_has_xen_ibt (IS_ENABLED(CONFIG_XEN_IBT) && \ + boot_cpu_has(X86_FEATURE_XEN_IBT)) #define cpu_has_msr_tsc_aux (cpu_has_rdtscp || cpu_has_rdpid) From patchwork Fri Nov 24 08:39:19 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 13467171 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F73DC61DF4 for ; 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b=i4W3Ph32tFpdqw91bKFiERkj/Iga084exAWcPGiXbdNWuExdfd+v4EGo1yOfVT6c4rzvd6TxMRj585s3y0jJXC9xFUduHGONab28GgErR6yOSM7Ufz6fKhaVL5Arw+/PD9M9hlAZeLbvTiOretStmMlHPNPoDJDzoXUsUHewMcwIpggj8Jr4DYbyA7Ijpx8ZDCa/Q4d1vlKSMPV5+tnDrPv/PgD7kYard1sVkuYKGVs5T44caLs9Z1Fy36+j/jBGKoL91myF9QXSiLKlrd0nRGgx7j1zNFSHWc/3bMrbOVhQFmDejmv1HAcO9jvnei68c9D8Mv4xj71pH+txnrYEKA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=suse.com; Message-ID: <8112f1f9-3e3a-4839-9124-9adb87f82c29@suse.com> Date: Fri, 24 Nov 2023 09:39:19 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 06/15] x86/HVM: improve CET-IBT pruning of ENDBR Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Kevin Tian , Jun Nakajima References: Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: X-ClientProxiedBy: FR4P281CA0408.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:d0::6) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|AS8PR04MB8326:EE_ X-MS-Office365-Filtering-Correlation-Id: 9925fe6a-9bfa-48aa-d25b-08dbecc8da24 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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While not the case for SVM right now, VMX installs a number of pointers only under certain conditions. Hence the respective functions would have their ENDBR purged only when those conditions are met. Invoke "pruning" functions after having copied the respective tables, for them to install any "missing" pointers. Signed-off-by: Jan Beulich --- This is largely cosmetic for present hardware, which when supporting CET-IBT likely also supports all of the advanced VMX features for which hook pointers are installed conditionally. The only case this would make a difference there is when use of respective features was suppressed via command line option (where available). For future hooks it may end up relevant even by default, and it also would be if AMD started supporting CET-IBT; right now it matters only for .pi_update_irte, as iommu_intpost continues to default to off. Originally I had meant to put the SVM and VMX functions in presmp- initcalls, but hvm/{svm,vmx}/built_in.o are linked into hvm/built_in.o before hvm/hvm.o. And I don't think I want to fiddle with link order here. --- v2: Use cpu_has_xen_ibt in prune_{svm,vmx}(). --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -161,10 +161,15 @@ static int __init cf_check hvm_enable(vo else if ( cpu_has_svm ) fns = start_svm(); + if ( fns ) + hvm_funcs = *fns; + + prune_vmx(); + prune_svm(); + if ( fns == NULL ) return 0; - hvm_funcs = *fns; hvm_enabled = 1; printk("HVM: %s enabled\n", fns->name); --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2587,6 +2587,19 @@ const struct hvm_function_table * __init return &svm_function_table; } +void __init prune_svm(void) +{ + /* + * Now that svm_function_table was copied, populate all function pointers + * which may have been left at NULL, for __initdata_cf_clobber to have as + * much of an effect as possible. + */ + if ( !cpu_has_xen_ibt ) + return; + + /* Nothing at present. */ +} + void asmlinkage svm_vmexit_handler(void) { struct cpu_user_regs *regs = guest_cpu_user_regs(); --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -3033,6 +3033,30 @@ const struct hvm_function_table * __init return &vmx_function_table; } +void __init prune_vmx(void) +{ + /* + * Now that vmx_function_table was copied, populate all function pointers + * which may have been left at NULL, for __initdata_cf_clobber to have as + * much of an effect as possible. + */ + if ( !cpu_has_xen_ibt ) + return; + + vmx_function_table.set_descriptor_access_exiting = + vmx_set_descriptor_access_exiting; + + vmx_function_table.update_eoi_exit_bitmap = vmx_update_eoi_exit_bitmap; + vmx_function_table.process_isr = vmx_process_isr; + vmx_function_table.handle_eoi = vmx_handle_eoi; + + vmx_function_table.pi_update_irte = vmx_pi_update_irte; + + vmx_function_table.deliver_posted_intr = vmx_deliver_posted_intr; + vmx_function_table.sync_pir_to_irr = vmx_sync_pir_to_irr; + vmx_function_table.test_pir = vmx_test_pir; +} + /* * Not all cases receive valid value in the VM-exit instruction length field. * Callers must know what they're doing! --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -250,6 +250,9 @@ extern s8 hvm_port80_allowed; extern const struct hvm_function_table *start_svm(void); extern const struct hvm_function_table *start_vmx(void); +void prune_svm(void); +void prune_vmx(void); + int hvm_domain_initialise(struct domain *d, const struct xen_domctl_createdomain *config); void hvm_domain_relinquish_resources(struct domain *d); From patchwork Fri Nov 24 08:40:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 13467172 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C01D1C61DF4 for ; Fri, 24 Nov 2023 08:40:39 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.640238.998203 (Exim 4.92) (envelope-from ) id 1r6Rjg-0000VA-4O; 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For the #define replacement to work, struct vmcs_struct's respective field name also needs to change: Drop the not really meaningful "vmcs_" prefix from it. Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -174,7 +174,7 @@ static DEFINE_PER_CPU(paddr_t, current_v static DEFINE_PER_CPU(struct list_head, active_vmcs_list); DEFINE_PER_CPU(bool, vmxon); -static u32 vmcs_revision_id __read_mostly; +#define vmcs_revision_id (vmx_basic_msr & VMX_BASIC_REVISION_MASK) u64 __read_mostly vmx_basic_msr; static void __init vmx_display_features(void) @@ -464,7 +464,6 @@ static int vmx_init_vmcs_config(bool bsp if ( !vmx_pin_based_exec_control ) { /* First time through. */ - vmcs_revision_id = vmx_basic_msr_low & VMX_BASIC_REVISION_MASK; vmx_pin_based_exec_control = _vmx_pin_based_exec_control; vmx_cpu_based_exec_control = _vmx_cpu_based_exec_control; vmx_secondary_exec_control = _vmx_secondary_exec_control; @@ -572,7 +571,7 @@ static paddr_t vmx_alloc_vmcs(void) vmcs = __map_domain_page(pg); clear_page(vmcs); - vmcs->vmcs_revision_id = vmcs_revision_id; + vmcs->revision_id = vmcs_revision_id; unmap_domain_page(vmcs); return page_to_maddr(pg); --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1163,7 +1163,7 @@ static void nvmx_set_vmcs_pointer(struct paddr_t vvmcs_maddr = v->arch.hvm.vmx.vmcs_shadow_maddr; __vmpclear(vvmcs_maddr); - vvmcs->vmcs_revision_id |= VMCS_RID_TYPE_MASK; + vvmcs->revision_id |= VMCS_RID_TYPE_MASK; v->arch.hvm.vmx.secondary_exec_control |= SECONDARY_EXEC_ENABLE_VMCS_SHADOWING; __vmwrite(SECONDARY_VM_EXEC_CONTROL, @@ -1178,7 +1178,7 @@ static void nvmx_clear_vmcs_pointer(stru paddr_t vvmcs_maddr = v->arch.hvm.vmx.vmcs_shadow_maddr; __vmpclear(vvmcs_maddr); - vvmcs->vmcs_revision_id &= ~VMCS_RID_TYPE_MASK; + vvmcs->revision_id &= ~VMCS_RID_TYPE_MASK; v->arch.hvm.vmx.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VMCS_SHADOWING; __vmwrite(SECONDARY_VM_EXEC_CONTROL, @@ -1794,10 +1794,10 @@ static int nvmx_handle_vmptrld(struct cp { struct vmcs_struct *vvmcs = vvmcx; - if ( ((vvmcs->vmcs_revision_id ^ vmx_basic_msr) & - VMX_BASIC_REVISION_MASK) || + if ( ((vvmcs->revision_id ^ vmx_basic_msr) & + VMX_BASIC_REVISION_MASK) || (!cpu_has_vmx_vmcs_shadowing && - (vvmcs->vmcs_revision_id & ~VMX_BASIC_REVISION_MASK)) ) + (vvmcs->revision_id & ~VMX_BASIC_REVISION_MASK)) ) { hvm_unmap_guest_frame(vvmcx, 1); vmfail(regs, VMX_INSN_VMPTRLD_INCORRECT_VMCS_ID); @@ -2209,7 +2209,7 @@ int nvmx_msr_read_intercept(unsigned int map_domain_page(_mfn(PFN_DOWN(v->arch.hvm.vmx.vmcs_pa))); data = (host_data & (~0ul << 32)) | - (vmcs->vmcs_revision_id & 0x7fffffff); + (vmcs->revision_id & 0x7fffffff); unmap_domain_page(vmcs); if ( !cpu_has_vmx_vmcs_shadowing ) --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -17,7 +17,7 @@ int cf_check vmx_cpu_up(void); void cf_check vmx_cpu_down(void); struct vmcs_struct { - u32 vmcs_revision_id; + uint32_t revision_id; unsigned char data [0]; /* vmcs size is read from MSR */ }; From patchwork Fri Nov 24 08:41:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 13467173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5F17BC61D97 for ; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?l6r+DD9IwG2bjUZm7kyxoS/PAxyh?= =?utf-8?q?Q3bNwKngAeqHW714R4NOaLG+9Rz2adz34sPaqAa1JCkZCJXBvIcEGk/z3cwQmJwR3?= =?utf-8?q?IeAjq6qsOPrTxfPqiSxKlP4uq4LkKCZGxkuw+p/GqqiZOusL674yLnif7Oy3FjZP2?= =?utf-8?q?sik3MPwgcLtVe7dqneOlS2L41SFPhzTwXBGtDWxoyOnPlpYcablAuOdZ4YCYrbBnI?= =?utf-8?q?TZ481U+yHlZM3I/NHbH/g0Cy6t30ew6catfKFSblhOME/IlNeR7aO49pJqJYOiQX+?= =?utf-8?q?kUmRWUJaTBaCQ93pbNiveciQhI+mUPJid+B6p403v3kpi++cxvuVmB49VDBdaQmdt?= =?utf-8?q?2wcVZtlwmnqYKOoggzQVIiimsMcPuLNOkEnf194oyKIGNNV7SpZPn++iZc87YaB+Y?= =?utf-8?q?AlODjWRDQLQhT1Tgc1dD1QOgemWuGmaI+6oO4DKviaU8Sr/Zwv3cXCFFKr0BNzEmI?= =?utf-8?q?o2qUtojQYqVq/yBGsz4oMbaXjlWKXOSGa/bV7++1r3U5R20aI0xSIn9JEc9PO2IbI?= =?utf-8?q?nVPFvpw7sqgugEiXZKbtSo/WJdzMLfHYxVwjnDEtRTbnCiY6zbwGHyg9tik3a8ubp?= =?utf-8?q?5cXqNXc/9jdx3b3B9skLt4iy9qTGlrfnRGPOt1v2scZh7ksWxMMeviOLMlN4HJAtk?= =?utf-8?q?tCda+4YkkCrHQTw0DDf6dTHoP+QX16GcuC+J1+l1SXy0+rv7iJNjAaLZLWnC+TEXz?= =?utf-8?q?1uyskQpC9jpdsJlhyb9m1D0Jkoo25c1YdmKY5c7cdMpNdI2lwlHVeh8bUPohnskeQ?= =?utf-8?q?zHw7xJ2/F8/zofBDLpZn1ztcH6PGFrP7qhkqurJXWipXJ2OKNIa73uqeeT9rKXXil?= =?utf-8?q?C+QP3On51WtntPjAnKRLDJfR4qfgKPTP6MUqsh/4bCIXWRr+Qj1lt6Z3veW3YEV+A?= =?utf-8?q?qhDCTAtm9ev0l8VvQ4f4Iw2OrT6IHSlrG80h87ZncNm6+8JYm2w8EkfT/ldd0vQFZ?= =?utf-8?q?SMWaz74JmZsrF4OnxrnwQSYxoMoK3nArNNPn+Ye+gVdRcC25+71BCvFJWWNZ6bOr7?= =?utf-8?q?CWBlfapY31fWlEG3OVKayc1gMIt8g4gavp6OPtq06GfX+MXBJYA3Y5f3lBq9xJGVF?= =?utf-8?q?lssCniJZHepG8I+i+FkoiGXcFUhdPInMMt5Cx8GzxSOAlLe7F8iL1DdOQvgCBQbm0?= =?utf-8?q?V2uHv4cvr2KOBIuywg8vSA0fbSEzKx+fAYix6j2P8FtzoznpVjaUX/aOQoaM5UUA6?= =?utf-8?q?ldXKPCaIzVg98cv4u1VFdMCbZwqEnDDymb1Fd5cO3Ljn4afa2dKpxG/pPI5p+j3l2?= =?utf-8?q?NempSDzgdtFvti9AfwwPTqvZbDO1g17r/m+v38TFXaZPkU5VuPvOryPjuGORLM25E?= =?utf-8?q?30/gawQmMP1XzCK2jXRg04zi+LzCc3B6R/N2KQkUHbkgtZqENkZBCdrSb+HP7wB9P?= =?utf-8?q?SauQ7J+lo1vSCq76eywjGoB3CH/X/Nxx4GDfEvbEbNw0B9D3Kfze47XL2nb/TqYL9?= =?utf-8?q?YLjdgmXb7t8GxitdIf7S9KGcoPfLfIQVjUMIJWN7iMv/YZ/BM4xNRCtSsOuRStHiM?= =?utf-8?q?lpfcbTXYweHb?= X-OriginatorOrg: suse.com X-MS-Exchange-CrossTenant-Network-Message-Id: 935eef31-ed9b-4576-38c7-08dbecc9196b X-MS-Exchange-CrossTenant-AuthSource: DU2PR04MB8790.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Nov 2023 08:41:06.2992 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: f7a17af6-1c5c-4a36-aa8b-f5be247aa4ba X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zuoUYtDUYONARDDkFzcZO71nEp6WmTSZYegvyIo6RvjLAid/V0N2oHo79gNFTNGqvVJ3bFNwrdH8P6ByiThxDQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR04MB8326 ... to a struct field, which is then going to be accompanied by other capability/control data presently living in individual variables. As this structure isn't supposed to be altered post-boot, put it in .data.ro_after_init right away. Suggested-by: Roger Pau Monné Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -161,6 +161,7 @@ static int cf_check parse_ept_param_runt #endif /* Dynamic (run-time adjusted) execution control flags. */ +struct vmx_caps __ro_after_init vmx_caps; u32 vmx_pin_based_exec_control __read_mostly; u32 vmx_cpu_based_exec_control __read_mostly; u32 vmx_secondary_exec_control __read_mostly; @@ -174,8 +175,7 @@ static DEFINE_PER_CPU(paddr_t, current_v static DEFINE_PER_CPU(struct list_head, active_vmcs_list); DEFINE_PER_CPU(bool, vmxon); -#define vmcs_revision_id (vmx_basic_msr & VMX_BASIC_REVISION_MASK) -u64 __read_mostly vmx_basic_msr; +#define vmcs_revision_id (vmx_caps.basic_msr & VMX_BASIC_REVISION_MASK) static void __init vmx_display_features(void) { @@ -470,8 +470,8 @@ static int vmx_init_vmcs_config(bool bsp vmx_ept_vpid_cap = _vmx_ept_vpid_cap; vmx_vmexit_control = _vmx_vmexit_control; vmx_vmentry_control = _vmx_vmentry_control; - vmx_basic_msr = ((u64)vmx_basic_msr_high << 32) | - vmx_basic_msr_low; + vmx_caps.basic_msr = ((uint64_t)vmx_basic_msr_high << 32) | + vmx_basic_msr_low; vmx_vmfunc = _vmx_vmfunc; vmx_display_features(); @@ -522,7 +522,7 @@ static int vmx_init_vmcs_config(bool bsp mismatch = 1; } if ( (vmx_basic_msr_high & (VMX_BASIC_VMCS_SIZE_MASK >> 32)) != - ((vmx_basic_msr & VMX_BASIC_VMCS_SIZE_MASK) >> 32) ) + ((vmx_caps.basic_msr & VMX_BASIC_VMCS_SIZE_MASK) >> 32) ) { printk("VMX: CPU%d unexpected VMCS size %Lu\n", smp_processor_id(), @@ -2169,7 +2169,7 @@ int __init vmx_vmcs_init(void) * _vmx_vcpu_up() may have made it past feature identification. * Make sure all dependent features are off as well. */ - vmx_basic_msr = 0; + memset(&vmx_caps, 0, sizeof(vmx_caps)); vmx_pin_based_exec_control = 0; vmx_cpu_based_exec_control = 0; vmx_secondary_exec_control = 0; --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -283,6 +283,12 @@ extern u64 vmx_ept_vpid_cap; #define VMX_TSC_MULTIPLIER_MAX 0xffffffffffffffffULL +/* Capabilities and dynamic (run-time adjusted) execution control flags. */ +struct vmx_caps { + uint64_t basic_msr; +}; +extern struct vmx_caps vmx_caps; + #define cpu_has_wbinvd_exiting \ (vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING) #define cpu_has_vmx_virtualize_apic_accesses \ @@ -366,9 +372,8 @@ extern u64 vmx_ept_vpid_cap; */ #define VMX_BASIC_DEFAULT1_ZERO (1ULL << 55) -extern u64 vmx_basic_msr; #define cpu_has_vmx_ins_outs_instr_info \ - (!!(vmx_basic_msr & VMX_BASIC_INS_OUT_INFO)) + (!!(vmx_caps.basic_msr & VMX_BASIC_INS_OUT_INFO)) /* Guest interrupt status */ #define VMX_GUEST_INTR_STATUS_SUBFIELD_BITMASK 0x0FF --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1556,7 +1556,7 @@ static int nvmx_handle_vmxon(struct cpu_ rc = hvm_copy_from_guest_phys(&nvmcs_revid, gpa, sizeof(nvmcs_revid)); if ( rc != HVMTRANS_okay || (nvmcs_revid & ~VMX_BASIC_REVISION_MASK) || - ((nvmcs_revid ^ vmx_basic_msr) & VMX_BASIC_REVISION_MASK) ) + ((nvmcs_revid ^ vmx_caps.basic_msr) & VMX_BASIC_REVISION_MASK) ) { vmfail_invalid(regs); return X86EMUL_OKAY; @@ -1794,7 +1794,7 @@ static int nvmx_handle_vmptrld(struct cp { struct vmcs_struct *vvmcs = vvmcx; - if ( ((vvmcs->revision_id ^ vmx_basic_msr) & + if ( ((vvmcs->revision_id ^ vmx_caps.basic_msr) & VMX_BASIC_REVISION_MASK) || (!cpu_has_vmx_vmcs_shadowing && (vvmcs->revision_id & ~VMX_BASIC_REVISION_MASK)) ) @@ -2187,7 +2187,7 @@ int nvmx_msr_read_intercept(unsigned int case MSR_IA32_VMX_TRUE_PROCBASED_CTLS: case MSR_IA32_VMX_TRUE_EXIT_CTLS: case MSR_IA32_VMX_TRUE_ENTRY_CTLS: - if ( !(vmx_basic_msr & VMX_BASIC_DEFAULT1_ZERO) ) + if ( !(vmx_caps.basic_msr & VMX_BASIC_DEFAULT1_ZERO) ) return 0; break; From patchwork Fri Nov 24 08:41:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 13467175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5953C636D0 for ; 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Use an instance of that struct also in vmx_init_vmcs_config(). Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt /* Dynamic (run-time adjusted) execution control flags. */ struct vmx_caps __ro_after_init vmx_caps; -u32 vmx_pin_based_exec_control __read_mostly; u32 vmx_cpu_based_exec_control __read_mostly; u32 vmx_secondary_exec_control __read_mostly; u32 vmx_vmexit_control __read_mostly; @@ -238,7 +237,7 @@ static bool cap_check(const char *name, static int vmx_init_vmcs_config(bool bsp) { u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt; - u32 _vmx_pin_based_exec_control; + struct vmx_caps caps; u32 _vmx_cpu_based_exec_control; u32 _vmx_secondary_exec_control = 0; u64 _vmx_ept_vpid_cap = 0; @@ -254,7 +253,7 @@ static int vmx_init_vmcs_config(bool bsp PIN_BASED_NMI_EXITING); opt = (PIN_BASED_VIRTUAL_NMIS | PIN_BASED_POSTED_INTERRUPT); - _vmx_pin_based_exec_control = adjust_vmx_controls( + caps.pin_based_exec_control = adjust_vmx_controls( "Pin-Based Exec Control", min, opt, MSR_IA32_VMX_PINBASED_CTLS, &mismatch); @@ -406,7 +405,7 @@ static int vmx_init_vmcs_config(bool bsp if ( (_vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) && ple_gap == 0 ) { - if ( !vmx_pin_based_exec_control ) + if ( !vmx_caps.pin_based_exec_control ) printk(XENLOG_INFO "Disable Pause-Loop Exiting.\n"); _vmx_secondary_exec_control &= ~ SECONDARY_EXEC_PAUSE_LOOP_EXITING; } @@ -424,10 +423,10 @@ static int vmx_init_vmcs_config(bool bsp * is a minimal requirement, only check the former, which is optional. */ if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) ) - _vmx_pin_based_exec_control &= ~PIN_BASED_POSTED_INTERRUPT; + caps.pin_based_exec_control &= ~PIN_BASED_POSTED_INTERRUPT; if ( iommu_intpost && - !(_vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) + !(caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) { printk("Intel VT-d Posted Interrupt is disabled for CPU-side Posted " "Interrupt is not enabled\n"); @@ -461,10 +460,10 @@ static int vmx_init_vmcs_config(bool bsp if ( mismatch ) return -EINVAL; - if ( !vmx_pin_based_exec_control ) + if ( !vmx_caps.pin_based_exec_control ) { /* First time through. */ - vmx_pin_based_exec_control = _vmx_pin_based_exec_control; + vmx_caps = caps; vmx_cpu_based_exec_control = _vmx_cpu_based_exec_control; vmx_secondary_exec_control = _vmx_secondary_exec_control; vmx_ept_vpid_cap = _vmx_ept_vpid_cap; @@ -494,7 +493,7 @@ static int vmx_init_vmcs_config(bool bsp vmcs_revision_id, vmx_basic_msr_low & VMX_BASIC_REVISION_MASK); mismatch |= cap_check( "Pin-Based Exec Control", - vmx_pin_based_exec_control, _vmx_pin_based_exec_control); + vmx_caps.pin_based_exec_control, caps.pin_based_exec_control); mismatch |= cap_check( "CPU-Based Exec Control", vmx_cpu_based_exec_control, _vmx_cpu_based_exec_control); @@ -1072,7 +1071,7 @@ static int construct_vmcs(struct vcpu *v vmx_vmcs_enter(v); /* VMCS controls. */ - __vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_pin_based_exec_control); + __vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_caps.pin_based_exec_control); v->arch.hvm.vmx.exec_control = vmx_cpu_based_exec_control; if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling ) @@ -2091,7 +2090,7 @@ void vmcs_dump_vcpu(struct vcpu *v) printk("TSC Offset = 0x%016lx TSC Multiplier = 0x%016lx\n", vmr(TSC_OFFSET), vmr(TSC_MULTIPLIER)); if ( (v->arch.hvm.vmx.exec_control & CPU_BASED_TPR_SHADOW) || - (vmx_pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) + (vmx_caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) ) printk("TPR Threshold = 0x%02x PostedIntrVec = 0x%02x\n", vmr32(TPR_THRESHOLD), vmr16(POSTED_INTR_NOTIFICATION_VECTOR)); if ( (v->arch.hvm.vmx.secondary_exec_control & @@ -2170,7 +2169,6 @@ int __init vmx_vmcs_init(void) * Make sure all dependent features are off as well. */ memset(&vmx_caps, 0, sizeof(vmx_caps)); - vmx_pin_based_exec_control = 0; vmx_cpu_based_exec_control = 0; vmx_secondary_exec_control = 0; vmx_vmexit_control = 0; --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1054,7 +1054,7 @@ static void load_shadow_control(struct v * and EXCEPTION * Enforce the removed features */ - nvmx_update_pin_control(v, vmx_pin_based_exec_control); + nvmx_update_pin_control(v, vmx_caps.pin_based_exec_control); vmx_update_cpu_exec_control(v); vmx_update_secondary_exec_control(v); nvmx_update_exit_control(v, vmx_vmexit_control); --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -215,7 +215,6 @@ extern u32 vmx_cpu_based_exec_control; #define PIN_BASED_VIRTUAL_NMIS 0x00000020 #define PIN_BASED_PREEMPT_TIMER 0x00000040 #define PIN_BASED_POSTED_INTERRUPT 0x00000080 -extern u32 vmx_pin_based_exec_control; #define VM_EXIT_SAVE_DEBUG_CNTRLS 0x00000004 #define VM_EXIT_IA32E_MODE 0x00000200 @@ -286,6 +285,7 @@ extern u64 vmx_ept_vpid_cap; /* Capabilities and dynamic (run-time adjusted) execution control flags. */ struct vmx_caps { uint64_t basic_msr; + uint32_t pin_based_exec_control; }; extern struct vmx_caps vmx_caps; @@ -296,7 +296,7 @@ extern struct vmx_caps vmx_caps; #define cpu_has_vmx_tpr_shadow \ (vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW) #define cpu_has_vmx_vnmi \ - (vmx_pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS) + (vmx_caps.pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS) #define cpu_has_vmx_msr_bitmap \ (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP) #define cpu_has_vmx_secondary_exec_control \ @@ -331,7 +331,7 @@ extern struct vmx_caps vmx_caps; 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Message-ID: <15d8e4cf-449f-4792-b235-f5ee218e2e0e@suse.com> Date: Fri, 24 Nov 2023 09:41:45 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 10/15] VMX: convert vmx_cpu_based_exec_control Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Kevin Tian , Jun Nakajima References: Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: X-ClientProxiedBy: FR4P281CA0408.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:d0::6) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|AS8PR04MB8326:EE_ X-MS-Office365-Filtering-Correlation-Id: 8ce5cf1e-d9d3-472c-243a-08dbecc93113 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt /* Dynamic (run-time adjusted) execution control flags. */ struct vmx_caps __ro_after_init vmx_caps; -u32 vmx_cpu_based_exec_control __read_mostly; u32 vmx_secondary_exec_control __read_mostly; u32 vmx_vmexit_control __read_mostly; u32 vmx_vmentry_control __read_mostly; @@ -238,7 +237,6 @@ static int vmx_init_vmcs_config(bool bsp { u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt; struct vmx_caps caps; - u32 _vmx_cpu_based_exec_control; u32 _vmx_secondary_exec_control = 0; u64 _vmx_ept_vpid_cap = 0; u64 _vmx_misc_cap = 0; @@ -274,12 +272,12 @@ static int vmx_init_vmcs_config(bool bsp CPU_BASED_TPR_SHADOW | CPU_BASED_MONITOR_TRAP_FLAG | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS); - _vmx_cpu_based_exec_control = adjust_vmx_controls( + caps.cpu_based_exec_control = adjust_vmx_controls( "CPU-Based Exec Control", min, opt, MSR_IA32_VMX_PROCBASED_CTLS, &mismatch); - _vmx_cpu_based_exec_control &= ~CPU_BASED_RDTSC_EXITING; - if ( _vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW ) - _vmx_cpu_based_exec_control &= + caps.cpu_based_exec_control &= ~CPU_BASED_RDTSC_EXITING; + if ( caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW ) + caps.cpu_based_exec_control &= ~(CPU_BASED_CR8_LOAD_EXITING | CPU_BASED_CR8_STORE_EXITING); rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap); @@ -296,7 +294,7 @@ static int vmx_init_vmcs_config(bool bsp return -EINVAL; } - if ( _vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS ) + if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS ) { min = 0; opt = (SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | @@ -326,7 +324,7 @@ static int vmx_init_vmcs_config(bool bsp * "APIC Register Virtualization" and "Virtual Interrupt Delivery" * can be set only when "use TPR shadow" is set */ - if ( (_vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW) && + if ( (caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW) && opt_apicv_enabled ) opt |= SECONDARY_EXEC_APIC_REGISTER_VIRT | SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | @@ -464,7 +462,6 @@ static int vmx_init_vmcs_config(bool bsp { /* First time through. */ vmx_caps = caps; - vmx_cpu_based_exec_control = _vmx_cpu_based_exec_control; vmx_secondary_exec_control = _vmx_secondary_exec_control; vmx_ept_vpid_cap = _vmx_ept_vpid_cap; vmx_vmexit_control = _vmx_vmexit_control; @@ -496,7 +493,7 @@ static int vmx_init_vmcs_config(bool bsp vmx_caps.pin_based_exec_control, caps.pin_based_exec_control); mismatch |= cap_check( "CPU-Based Exec Control", - vmx_cpu_based_exec_control, _vmx_cpu_based_exec_control); + vmx_caps.cpu_based_exec_control, caps.cpu_based_exec_control); mismatch |= cap_check( "Secondary Exec Control", vmx_secondary_exec_control, _vmx_secondary_exec_control); @@ -1073,7 +1070,7 @@ static int construct_vmcs(struct vcpu *v /* VMCS controls. */ __vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_caps.pin_based_exec_control); - v->arch.hvm.vmx.exec_control = vmx_cpu_based_exec_control; + v->arch.hvm.vmx.exec_control = vmx_caps.cpu_based_exec_control; if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling ) v->arch.hvm.vmx.exec_control |= CPU_BASED_RDTSC_EXITING; @@ -2169,7 +2166,6 @@ int __init vmx_vmcs_init(void) * Make sure all dependent features are off as well. */ memset(&vmx_caps, 0, sizeof(vmx_caps)); - vmx_cpu_based_exec_control = 0; vmx_secondary_exec_control = 0; vmx_vmexit_control = 0; vmx_vmentry_control = 0; --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -208,7 +208,6 @@ void vmx_vmcs_reload(struct vcpu *v); #define CPU_BASED_MONITOR_EXITING 0x20000000U #define CPU_BASED_PAUSE_EXITING 0x40000000U #define CPU_BASED_ACTIVATE_SECONDARY_CONTROLS 0x80000000U -extern u32 vmx_cpu_based_exec_control; #define PIN_BASED_EXT_INTR_MASK 0x00000001 #define PIN_BASED_NMI_EXITING 0x00000008 @@ -286,6 +285,7 @@ extern u64 vmx_ept_vpid_cap; struct vmx_caps { uint64_t basic_msr; uint32_t pin_based_exec_control; + uint32_t cpu_based_exec_control; }; extern struct vmx_caps vmx_caps; @@ -294,13 +294,13 @@ extern struct vmx_caps vmx_caps; #define cpu_has_vmx_virtualize_apic_accesses \ (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) #define cpu_has_vmx_tpr_shadow \ - (vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW) + (vmx_caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW) #define cpu_has_vmx_vnmi \ (vmx_caps.pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS) #define cpu_has_vmx_msr_bitmap \ - (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP) + (vmx_caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP) #define cpu_has_vmx_secondary_exec_control \ - (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) + (vmx_caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) #define cpu_has_vmx_ept \ (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) #define cpu_has_vmx_dt_exiting \ @@ -310,7 +310,7 @@ extern struct vmx_caps vmx_caps; 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Message-ID: <192d3c2d-6eb7-40e9-9eb0-484e57dd44bf@suse.com> Date: Fri, 24 Nov 2023 09:42:04 +0100 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 11/15] VMX: convert vmx_secondary_exec_control Content-Language: en-US From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Wei Liu , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Kevin Tian , Jun Nakajima References: Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: X-ClientProxiedBy: FR4P281CA0408.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:d0::6) To DU2PR04MB8790.eurprd04.prod.outlook.com (2603:10a6:10:2e1::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU2PR04MB8790:EE_|AS8PR04MB8326:EE_ X-MS-Office365-Filtering-Correlation-Id: 9a9b1755-4a9e-4a04-57bd-08dbecc93ca4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt /* Dynamic (run-time adjusted) execution control flags. */ struct vmx_caps __ro_after_init vmx_caps; -u32 vmx_secondary_exec_control __read_mostly; u32 vmx_vmexit_control __read_mostly; u32 vmx_vmentry_control __read_mostly; u64 vmx_ept_vpid_cap __read_mostly; @@ -237,7 +236,6 @@ static int vmx_init_vmcs_config(bool bsp { u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt; struct vmx_caps caps; - u32 _vmx_secondary_exec_control = 0; u64 _vmx_ept_vpid_cap = 0; u64 _vmx_misc_cap = 0; u32 _vmx_vmexit_control; @@ -330,13 +328,13 @@ static int vmx_init_vmcs_config(bool bsp SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE; - _vmx_secondary_exec_control = adjust_vmx_controls( + caps.secondary_exec_control = adjust_vmx_controls( "Secondary Exec Control", min, opt, MSR_IA32_VMX_PROCBASED_CTLS2, &mismatch); } /* The IA32_VMX_EPT_VPID_CAP MSR exists only when EPT or VPID available */ - if ( _vmx_secondary_exec_control & (SECONDARY_EXEC_ENABLE_EPT | + if ( caps.secondary_exec_control & (SECONDARY_EXEC_ENABLE_EPT | SECONDARY_EXEC_ENABLE_VPID) ) { rdmsrl(MSR_IA32_VMX_EPT_VPID_CAP, _vmx_ept_vpid_cap); @@ -358,7 +356,7 @@ static int vmx_init_vmcs_config(bool bsp if ( !(_vmx_ept_vpid_cap & VMX_EPT_MEMORY_TYPE_WB) || !(_vmx_ept_vpid_cap & VMX_EPT_WALK_LENGTH_4_SUPPORTED) || !(_vmx_ept_vpid_cap & VMX_EPT_INVEPT_ALL_CONTEXT) ) - _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_EPT; + caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_EPT; /* * the CPU must support INVVPID all context invalidation, because we @@ -367,14 +365,14 @@ static int vmx_init_vmcs_config(bool bsp * Or we just don't use VPID. */ if ( !(_vmx_ept_vpid_cap & VMX_VPID_INVVPID_ALL_CONTEXT) ) - _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VPID; + caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VPID; /* EPT A/D bits is required for PML */ if ( !(_vmx_ept_vpid_cap & VMX_EPT_AD_BIT) ) - _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML; + caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML; } - if ( _vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT ) + if ( caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT ) { /* * To use EPT we expect to be able to clear certain intercepts. @@ -387,25 +385,25 @@ static int vmx_init_vmcs_config(bool bsp if ( must_be_one & (CPU_BASED_INVLPG_EXITING | CPU_BASED_CR3_LOAD_EXITING | CPU_BASED_CR3_STORE_EXITING) ) - _vmx_secondary_exec_control &= + caps.secondary_exec_control &= ~(SECONDARY_EXEC_ENABLE_EPT | SECONDARY_EXEC_UNRESTRICTED_GUEST); } /* PML cannot be supported if EPT is not used */ - if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) ) - _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML; + if ( !(caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) ) + caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_PML; /* Turn off opt_ept_pml if PML feature is not present. */ - if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_PML) ) + if ( !(caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_PML) ) opt_ept_pml = false; - if ( (_vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) && + if ( (caps.secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) && ple_gap == 0 ) { if ( !vmx_caps.pin_based_exec_control ) printk(XENLOG_INFO "Disable Pause-Loop Exiting.\n"); - _vmx_secondary_exec_control &= ~ SECONDARY_EXEC_PAUSE_LOOP_EXITING; + caps.secondary_exec_control &= ~ SECONDARY_EXEC_PAUSE_LOOP_EXITING; } min = VM_EXIT_ACK_INTR_ON_EXIT; @@ -420,7 +418,7 @@ static int vmx_init_vmcs_config(bool bsp * delivery" and "acknowledge interrupt on exit" is set. For the latter * is a minimal requirement, only check the former, which is optional. */ - if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) ) + if ( !(caps.secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) ) caps.pin_based_exec_control &= ~PIN_BASED_POSTED_INTERRUPT; if ( iommu_intpost && @@ -432,7 +430,7 @@ static int vmx_init_vmcs_config(bool bsp } /* The IA32_VMX_VMFUNC MSR exists only when VMFUNC is available */ - if ( _vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS ) + if ( caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS ) { rdmsrl(MSR_IA32_VMX_VMFUNC, _vmx_vmfunc); @@ -442,12 +440,12 @@ static int vmx_init_vmcs_config(bool bsp * Or we just don't use VMFUNC. */ if ( !(_vmx_vmfunc & VMX_VMFUNC_EPTP_SWITCHING) ) - _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VM_FUNCTIONS; + caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VM_FUNCTIONS; } /* Virtualization exceptions are only enabled if VMFUNC is enabled */ - if ( !(_vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) ) - _vmx_secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS; + if ( !(caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) ) + caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS; min = 0; opt = (VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_GUEST_EFER | @@ -462,7 +460,6 @@ static int vmx_init_vmcs_config(bool bsp { /* First time through. */ vmx_caps = caps; - vmx_secondary_exec_control = _vmx_secondary_exec_control; vmx_ept_vpid_cap = _vmx_ept_vpid_cap; vmx_vmexit_control = _vmx_vmexit_control; vmx_vmentry_control = _vmx_vmentry_control; @@ -496,7 +493,7 @@ static int vmx_init_vmcs_config(bool bsp vmx_caps.cpu_based_exec_control, caps.cpu_based_exec_control); mismatch |= cap_check( "Secondary Exec Control", - vmx_secondary_exec_control, _vmx_secondary_exec_control); + vmx_caps.secondary_exec_control, caps.secondary_exec_control); mismatch |= cap_check( "VMExit Control", vmx_vmexit_control, _vmx_vmexit_control); @@ -1074,7 +1071,7 @@ static int construct_vmcs(struct vcpu *v if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling ) v->arch.hvm.vmx.exec_control |= CPU_BASED_RDTSC_EXITING; - v->arch.hvm.vmx.secondary_exec_control = vmx_secondary_exec_control; + v->arch.hvm.vmx.secondary_exec_control = vmx_caps.secondary_exec_control; /* * Disable features which we don't want active by default: @@ -2166,7 +2163,6 @@ int __init vmx_vmcs_init(void) * Make sure all dependent features are off as well. */ memset(&vmx_caps, 0, sizeof(vmx_caps)); - vmx_secondary_exec_control = 0; vmx_vmexit_control = 0; vmx_vmentry_control = 0; vmx_ept_vpid_cap = 0; --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -256,7 +256,6 @@ extern u32 vmx_vmentry_control; #define SECONDARY_EXEC_TSC_SCALING 0x02000000U #define SECONDARY_EXEC_BUS_LOCK_DETECTION 0x40000000U #define SECONDARY_EXEC_NOTIFY_VM_EXITING 0x80000000U -extern u32 vmx_secondary_exec_control; #define VMX_EPT_EXEC_ONLY_SUPPORTED 0x00000001 #define VMX_EPT_WALK_LENGTH_4_SUPPORTED 0x00000040 @@ -286,13 +285,14 @@ struct vmx_caps { uint64_t basic_msr; uint32_t pin_based_exec_control; uint32_t cpu_based_exec_control; + uint32_t secondary_exec_control; }; extern struct vmx_caps vmx_caps; #define cpu_has_wbinvd_exiting \ - (vmx_secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_WBINVD_EXITING) #define cpu_has_vmx_virtualize_apic_accesses \ - (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES) #define cpu_has_vmx_tpr_shadow \ (vmx_caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW) #define cpu_has_vmx_vnmi \ @@ -302,13 +302,13 @@ extern struct vmx_caps vmx_caps; #define cpu_has_vmx_secondary_exec_control \ (vmx_caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS) #define cpu_has_vmx_ept \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT) #define cpu_has_vmx_dt_exiting \ - (vmx_secondary_exec_control & SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING) #define cpu_has_vmx_rdtscp \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_RDTSCP) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_RDTSCP) #define cpu_has_vmx_vpid \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID) #define cpu_has_monitor_trap_flag \ (vmx_caps.cpu_based_exec_control & CPU_BASED_MONITOR_TRAP_FLAG) #define cpu_has_vmx_pat \ @@ -316,41 +316,41 @@ extern struct vmx_caps vmx_caps; #define cpu_has_vmx_efer \ (vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_EFER) #define cpu_has_vmx_unrestricted_guest \ - (vmx_secondary_exec_control & SECONDARY_EXEC_UNRESTRICTED_GUEST) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_UNRESTRICTED_GUEST) #define vmx_unrestricted_guest(v) \ ((v)->arch.hvm.vmx.secondary_exec_control & \ SECONDARY_EXEC_UNRESTRICTED_GUEST) #define cpu_has_vmx_ple \ - (vmx_secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_PAUSE_LOOP_EXITING) #define cpu_has_vmx_invpcid \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_INVPCID) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_INVPCID) #define cpu_has_vmx_apic_reg_virt \ - (vmx_secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_APIC_REGISTER_VIRT) #define cpu_has_vmx_virtual_intr_delivery \ - (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY) #define cpu_has_vmx_virtualize_x2apic_mode \ - (vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE) #define cpu_has_vmx_posted_intr_processing \ (vmx_caps.pin_based_exec_control & PIN_BASED_POSTED_INTERRUPT) #define cpu_has_vmx_vmcs_shadowing \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VMCS_SHADOWING) #define cpu_has_vmx_vmfunc \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS) #define cpu_has_vmx_virt_exceptions \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VIRT_EXCEPTIONS) #define cpu_has_vmx_pml \ - (vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_PML) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_PML) #define cpu_has_vmx_mpx \ ((vmx_vmexit_control & VM_EXIT_CLEAR_BNDCFGS) && \ (vmx_vmentry_control & VM_ENTRY_LOAD_BNDCFGS)) #define cpu_has_vmx_xsaves \ - (vmx_secondary_exec_control & SECONDARY_EXEC_XSAVES) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_XSAVES) #define cpu_has_vmx_tsc_scaling \ - (vmx_secondary_exec_control & SECONDARY_EXEC_TSC_SCALING) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_TSC_SCALING) #define cpu_has_vmx_bus_lock_detection \ - (vmx_secondary_exec_control & SECONDARY_EXEC_BUS_LOCK_DETECTION) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_BUS_LOCK_DETECTION) #define cpu_has_vmx_notify_vm_exiting \ - (vmx_secondary_exec_control & SECONDARY_EXEC_NOTIFY_VM_EXITING) + (vmx_caps.secondary_exec_control & SECONDARY_EXEC_NOTIFY_VM_EXITING) #define VMCS_RID_TYPE_MASK 0x80000000U From patchwork Fri Nov 24 08:42:25 2023 Content-Type: text/plain; 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Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt /* Dynamic (run-time adjusted) execution control flags. */ struct vmx_caps __ro_after_init vmx_caps; -u32 vmx_vmexit_control __read_mostly; u32 vmx_vmentry_control __read_mostly; u64 vmx_ept_vpid_cap __read_mostly; static uint64_t __read_mostly vmx_vmfunc; @@ -238,7 +237,6 @@ static int vmx_init_vmcs_config(bool bsp struct vmx_caps caps; u64 _vmx_ept_vpid_cap = 0; u64 _vmx_misc_cap = 0; - u32 _vmx_vmexit_control; u32 _vmx_vmentry_control; u64 _vmx_vmfunc = 0; bool mismatch = false; @@ -410,7 +408,7 @@ static int vmx_init_vmcs_config(bool bsp opt = (VM_EXIT_SAVE_GUEST_PAT | VM_EXIT_LOAD_HOST_PAT | VM_EXIT_LOAD_HOST_EFER | VM_EXIT_CLEAR_BNDCFGS); min |= VM_EXIT_IA32E_MODE; - _vmx_vmexit_control = adjust_vmx_controls( + caps.vmexit_control = adjust_vmx_controls( "VMExit Control", min, opt, MSR_IA32_VMX_EXIT_CTLS, &mismatch); /* @@ -461,7 +459,6 @@ static int vmx_init_vmcs_config(bool bsp /* First time through. */ vmx_caps = caps; vmx_ept_vpid_cap = _vmx_ept_vpid_cap; - vmx_vmexit_control = _vmx_vmexit_control; vmx_vmentry_control = _vmx_vmentry_control; vmx_caps.basic_msr = ((uint64_t)vmx_basic_msr_high << 32) | vmx_basic_msr_low; @@ -496,7 +493,7 @@ static int vmx_init_vmcs_config(bool bsp vmx_caps.secondary_exec_control, caps.secondary_exec_control); mismatch |= cap_check( "VMExit Control", - vmx_vmexit_control, _vmx_vmexit_control); + vmx_caps.vmexit_control, caps.vmexit_control); mismatch |= cap_check( "VMEntry Control", vmx_vmentry_control, _vmx_vmentry_control); @@ -1058,7 +1055,7 @@ void nocall vmx_asm_vmexit_handler(void) static int construct_vmcs(struct vcpu *v) { struct domain *d = v->domain; - u32 vmexit_ctl = vmx_vmexit_control; + uint32_t vmexit_ctl = vmx_caps.vmexit_control; u32 vmentry_ctl = vmx_vmentry_control; int rc = 0; @@ -2163,7 +2160,6 @@ int __init vmx_vmcs_init(void) * Make sure all dependent features are off as well. */ memset(&vmx_caps, 0, sizeof(vmx_caps)); - vmx_vmexit_control = 0; vmx_vmentry_control = 0; vmx_ept_vpid_cap = 0; vmx_vmfunc = 0; --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1057,7 +1057,7 @@ static void load_shadow_control(struct v nvmx_update_pin_control(v, vmx_caps.pin_based_exec_control); vmx_update_cpu_exec_control(v); vmx_update_secondary_exec_control(v); - nvmx_update_exit_control(v, vmx_vmexit_control); + nvmx_update_exit_control(v, vmx_caps.vmexit_control); nvmx_update_entry_control(v); vmx_update_exception_bitmap(v); nvmx_update_apic_access_address(v); --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -225,7 +225,6 @@ void vmx_vmcs_reload(struct vcpu *v); #define VM_EXIT_LOAD_HOST_EFER 0x00200000 #define VM_EXIT_SAVE_PREEMPT_TIMER 0x00400000 #define VM_EXIT_CLEAR_BNDCFGS 0x00800000 -extern u32 vmx_vmexit_control; #define VM_ENTRY_IA32E_MODE 0x00000200 #define VM_ENTRY_SMM 0x00000400 @@ -286,6 +285,7 @@ struct vmx_caps { uint32_t pin_based_exec_control; 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Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt /* Dynamic (run-time adjusted) execution control flags. */ struct vmx_caps __ro_after_init vmx_caps; -u32 vmx_vmentry_control __read_mostly; u64 vmx_ept_vpid_cap __read_mostly; static uint64_t __read_mostly vmx_vmfunc; @@ -237,7 +236,6 @@ static int vmx_init_vmcs_config(bool bsp struct vmx_caps caps; u64 _vmx_ept_vpid_cap = 0; u64 _vmx_misc_cap = 0; - u32 _vmx_vmentry_control; u64 _vmx_vmfunc = 0; bool mismatch = false; @@ -448,7 +446,7 @@ static int vmx_init_vmcs_config(bool bsp min = 0; opt = (VM_ENTRY_LOAD_GUEST_PAT | VM_ENTRY_LOAD_GUEST_EFER | VM_ENTRY_LOAD_BNDCFGS); - _vmx_vmentry_control = adjust_vmx_controls( + caps.vmentry_control = adjust_vmx_controls( "VMEntry Control", min, opt, MSR_IA32_VMX_ENTRY_CTLS, &mismatch); if ( mismatch ) @@ -459,7 +457,6 @@ static int vmx_init_vmcs_config(bool bsp /* First time through. */ vmx_caps = caps; vmx_ept_vpid_cap = _vmx_ept_vpid_cap; - vmx_vmentry_control = _vmx_vmentry_control; vmx_caps.basic_msr = ((uint64_t)vmx_basic_msr_high << 32) | vmx_basic_msr_low; vmx_vmfunc = _vmx_vmfunc; @@ -496,7 +493,7 @@ static int vmx_init_vmcs_config(bool bsp vmx_caps.vmexit_control, caps.vmexit_control); mismatch |= cap_check( "VMEntry Control", - vmx_vmentry_control, _vmx_vmentry_control); + vmx_caps.vmentry_control, caps.vmentry_control); mismatch |= cap_check( "EPT and VPID Capability", vmx_ept_vpid_cap, _vmx_ept_vpid_cap); @@ -1056,7 +1053,7 @@ static int construct_vmcs(struct vcpu *v { struct domain *d = v->domain; uint32_t vmexit_ctl = vmx_caps.vmexit_control; - u32 vmentry_ctl = vmx_vmentry_control; + u32 vmentry_ctl = vmx_caps.vmentry_control; int rc = 0; vmx_vmcs_enter(v); @@ -2160,7 +2157,6 @@ int __init vmx_vmcs_init(void) * Make sure all dependent features are off as well. */ memset(&vmx_caps, 0, sizeof(vmx_caps)); - vmx_vmentry_control = 0; vmx_ept_vpid_cap = 0; vmx_vmfunc = 0; } --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -233,7 +233,6 @@ void vmx_vmcs_reload(struct vcpu *v); #define VM_ENTRY_LOAD_GUEST_PAT 0x00004000 #define VM_ENTRY_LOAD_GUEST_EFER 0x00008000 #define VM_ENTRY_LOAD_BNDCFGS 0x00010000 -extern u32 vmx_vmentry_control; #define SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES 0x00000001U #define SECONDARY_EXEC_ENABLE_EPT 0x00000002U @@ -286,6 +285,7 @@ struct vmx_caps { uint32_t cpu_based_exec_control; uint32_t secondary_exec_control; uint32_t vmexit_control; + uint32_t vmentry_control; }; extern struct vmx_caps vmx_caps; @@ -312,9 +312,9 @@ extern struct vmx_caps vmx_caps; #define cpu_has_monitor_trap_flag \ (vmx_caps.cpu_based_exec_control & CPU_BASED_MONITOR_TRAP_FLAG) #define cpu_has_vmx_pat \ - (vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_PAT) + (vmx_caps.vmentry_control & VM_ENTRY_LOAD_GUEST_PAT) #define cpu_has_vmx_efer \ - (vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_EFER) + (vmx_caps.vmentry_control & VM_ENTRY_LOAD_GUEST_EFER) #define cpu_has_vmx_unrestricted_guest \ (vmx_caps.secondary_exec_control & SECONDARY_EXEC_UNRESTRICTED_GUEST) #define vmx_unrestricted_guest(v) \ @@ -342,7 +342,7 @@ extern struct vmx_caps vmx_caps; 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Signed-off-by: Jan Beulich --- v2: New. --- a/xen/arch/x86/hvm/vmx/vmcs.c +++ b/xen/arch/x86/hvm/vmx/vmcs.c @@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt /* Dynamic (run-time adjusted) execution control flags. */ struct vmx_caps __ro_after_init vmx_caps; -static uint64_t __read_mostly vmx_vmfunc; static DEFINE_PER_CPU_READ_MOSTLY(paddr_t, vmxon_region); static DEFINE_PER_CPU(paddr_t, current_vmcs); @@ -234,7 +233,6 @@ static int vmx_init_vmcs_config(bool bsp u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt; struct vmx_caps caps; u64 _vmx_misc_cap = 0; - u64 _vmx_vmfunc = 0; bool mismatch = false; rdmsr(MSR_IA32_VMX_BASIC, vmx_basic_msr_low, vmx_basic_msr_high); @@ -426,14 +424,14 @@ static int vmx_init_vmcs_config(bool bsp /* The IA32_VMX_VMFUNC MSR exists only when VMFUNC is available */ if ( caps.secondary_exec_control & SECONDARY_EXEC_ENABLE_VM_FUNCTIONS ) { - rdmsrl(MSR_IA32_VMX_VMFUNC, _vmx_vmfunc); + rdmsrl(MSR_IA32_VMX_VMFUNC, caps.vmfunc); /* * VMFUNC leaf 0 (EPTP switching) must be supported. * * Or we just don't use VMFUNC. */ - if ( !(_vmx_vmfunc & VMX_VMFUNC_EPTP_SWITCHING) ) + if ( !(caps.vmfunc & VMX_VMFUNC_EPTP_SWITCHING) ) caps.secondary_exec_control &= ~SECONDARY_EXEC_ENABLE_VM_FUNCTIONS; } @@ -456,7 +454,6 @@ static int vmx_init_vmcs_config(bool bsp vmx_caps = caps; vmx_caps.basic_msr = ((uint64_t)vmx_basic_msr_high << 32) | vmx_basic_msr_low; - vmx_vmfunc = _vmx_vmfunc; vmx_display_features(); @@ -495,7 +492,7 @@ static int vmx_init_vmcs_config(bool bsp mismatch |= cap_check("VPID Capability", vmx_caps.vpid, caps.vpid); mismatch |= cap_check( "VMFUNC Capability", - vmx_vmfunc, _vmx_vmfunc); + vmx_caps.vmfunc, caps.vmfunc); if ( cpu_has_vmx_ins_outs_instr_info != !!(vmx_basic_msr_high & (VMX_BASIC_INS_OUT_INFO >> 32)) ) { @@ -2153,7 +2150,6 @@ int __init vmx_vmcs_init(void) * Make sure all dependent features are off as well. */ memset(&vmx_caps, 0, sizeof(vmx_caps)); - vmx_vmfunc = 0; } return ret; --- a/xen/arch/x86/include/asm/hvm/vmx/vmcs.h +++ b/xen/arch/x86/include/asm/hvm/vmx/vmcs.h @@ -287,6 +287,7 @@ struct vmx_caps { uint32_t vmentry_control; uint32_t ept; uint32_t vpid; + uint64_t vmfunc; }; extern struct vmx_caps vmx_caps;