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Fri, 24 Nov 2023 08:35:22 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 01/25] arm64/sysreg: add system register POR_EL{0,1} Date: Fri, 24 Nov 2023 16:34:46 +0000 Message-Id: <20231124163510.1835740-2-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 29360140005 X-Stat-Signature: tx5c4jyj94ys9rhtrcx9njbeft8bezs9 X-HE-Tag: 1700843725-873070 X-HE-Meta: U2FsdGVkX19LHHHNzhjl8zfAUqtTY9G3O/bDTD20pfmTHImNdA5TDVySzpMA4+0NajLj3b666E+YsJQRxRIKoBc/zFzR02+2uHE6Tv3h3lWQ9gkZJ2vjmzrYc5zXlTyj+uSMcv4NgAC2AJxmvX+fwK3LixLiJYUrYl9CUSNkSKH6/S8BMUruHuVDDu4AG63r6zwGPwXjl1bW8FXBoF6lvLG6mNijNjQPOG+uMhYLwBl0VV9aDqrgv12RVuAkUe+ETTRoeGgUBYPFD9zhP8eMFAwHJVR0Cl22HQFoYptD2TfMfio8B5/2HauUoj90Nk3Kcm8hAR3YDFBl83lDa3/xwYqmTxZamO5QarYIslMkQD9vGPj49KZY8/OQo9jRCsgYWXazBhySR6AoXY9RTbiFsNW9+vmF0A6pnQKf+THg1NiXvmoY37x/mJdc6EK8ZhGIH0yh/ta/VkZo0c/ggb9Y8DNe4TerFaNHKl3pdIfCh+JTlMIox3iVTpKFv3V+KPX/ngi3/C6OutRxJusu2qqz3BoHbuTTzWW379MdWmF7fBBFQVUPDqW5dKytbgCAqTNnC6t8I2yFSSqLKIgfHrzUi5VqMc6HRIPnTITw2JRy+bgRSAXZUIw71VjJkMh8s9kcxlwcPkPKS1xbvCOopNKTbpb5QiuB+Xm+rQXnTOvRbHWdQ4KTrjjtJPSJNyP0sxK79LM5schJ9o6nKfG8esZNUl3c/VG8lNCc9oXLweionWLKqNkvGJwQ/hUFgJwKS+F4hPR0qK3vidAnVCRiyPszYrDSQcblcLAStZ7J42ZvanrKz+N3Sp9vbpXXPrxWH6umhh4XzYCCNxq4OcCUeppP/Dj9fEuVtcvQQAWypUf7uxLvw0RHJg3TBnWDrgjIgqCHWZoITbrBsE2VhnBWIP1KhyorpGzJDl9HuHjirU36dPmV9b4/1yFXosZacO6/EAUHYc1u4FWK/mfG2lJsUkm z/XN6+by UkGlkpkaz4PvbGFydpSHo01IYybBX1cTKjjmAdLAG8yjyhxeQ7l/i365y8T3gZ161pDTLOzd8mr2kDQTB6bAxsuVaa9CDri4Yod4c9dOQxcGehq7Tre7FPtP8BD4LK+qv1x57oI22dk+YvgQMgikexSF+wdof25yjvA6gU+3CpEE2ZM8wZRYambnbw4U67/tMFVDFfipEvaEdXBpil3IjnciWn7lj2//AS0nydBqFoJMznuO3k9acZdp0bRPeKgMauEsFiPrfuRCikRU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add POR_EL{0,1} according to DDI0601 2023-03. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Mark Brown Acked-by: Catalin Marinas --- arch/arm64/include/asm/sysreg.h | 13 +++++++++++++ arch/arm64/tools/sysreg | 12 ++++++++++++ 2 files changed, 25 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 5e65f51c10d2..9c2caf0efdc7 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1039,6 +1039,19 @@ #define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4)) +/* + * Permission Overlay Extension (POE) permission encodings. + */ +#define POE_NONE UL(0x0) +#define POE_R UL(0x1) +#define POE_X UL(0x2) +#define POE_RX UL(0x3) +#define POE_W UL(0x4) +#define POE_RW UL(0x5) +#define POE_XW UL(0x6) +#define POE_RXW UL(0x7) +#define POE_MASK UL(0xf) + #define ARM64_FEATURE_FIELD_BITS 4 /* Defined for compatibility only, do not add new users. */ diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 96cbeeab4eec..940040e82399 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2510,6 +2510,18 @@ Sysreg PIR_EL2 3 4 10 2 3 Fields PIRx_ELx EndSysreg +Sysreg POR_EL0 3 3 10 2 4 +Fields PIRx_ELx +EndSysreg + +Sysreg POR_EL1 3 0 10 2 4 +Fields PIRx_ELx +EndSysreg + +Sysreg POR_EL12 3 5 10 2 4 +Fields PIRx_ELx +EndSysreg + Sysreg LORSA_EL1 3 0 10 4 0 Res0 63:52 Field 51:16 SA From patchwork Fri Nov 24 16:34:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467917 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 02821C636BD for ; Fri, 24 Nov 2023 16:35:30 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 80C646B028C; Fri, 24 Nov 2023 11:35:30 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 7BBD26B0290; Fri, 24 Nov 2023 11:35:30 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 684AA6B0297; Fri, 24 Nov 2023 11:35:30 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0016.hostedemail.com [216.40.44.16]) by kanga.kvack.org (Postfix) with ESMTP id 53C746B028C for ; Fri, 24 Nov 2023 11:35:30 -0500 (EST) Received: from smtpin30.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 2412D1607A9 for ; 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imf03.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf03.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1700843728; a=rsa-sha256; cv=none; b=3unvIZ6Mo4crfd3g/fl1tu3cgR3EnCMZUUCbpQnwxqLL0oJfkJsKvc57QZs+0SBTQj7KUQ 8QnlN3X+aauoH6Frxc2dcZJpotpqUuOrKByQjF7mgzR4SqE6h7hs2Rgw7rc8Lb0deoLM8/ 66dgNqFi5Y5qFxCoGuSjDqMCi/WJJBU= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1586D1BA8; Fri, 24 Nov 2023 08:36:14 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 65D723F73F; Fri, 24 Nov 2023 08:35:25 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 02/25] arm64/sysreg: update CPACR_EL1 register Date: Fri, 24 Nov 2023 16:34:47 +0000 Message-Id: <20231124163510.1835740-3-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Stat-Signature: u7k89f4m1his6hf9ugk48xcegj4xu994 X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: 698662000F X-HE-Tag: 1700843728-378905 X-HE-Meta: U2FsdGVkX1/v8JWJKXNjOhZsvpYZerdtGD8Gg8RR4khtuNQ8xnUyaqFvEVLB8EgTK34XSzjp2vH0bguoEv6mjP3mRjl/37OOHzVV6PeZvljikBl6ldfezB1O2crYEs27jlhh5XZTuI2NVb7940+yIPjY8QnBCD0YVfOC8oCKH3fXN/D7tZCCecUevUiEhcCgw1gYHf9iWcQFHIJSYqib17eBJRcrsX0sb8JmzS4ESC35BfDvjhTawvn3X3AfSpzkPnrg5s4vlHpsbOA/hcSe0gssmaM4tmI6B2wzOx0ywmpK8ef3o1tnEY5PHg66mrB2IuyuVMucNeTsPB/wHyAiGthF3gzYl5aAl8j9YsFZm7urRauMjYspD167dv9ZywlUBEpvIeqRHiP4CxbgvDyILn8y1TXyCy/8rkXfnlphuTDbLu3yHQjhZkLFEpU20gWymQT29T+BTCDNfYahbExOQAj2xyAydPw5kc7dDm59uWxP1m811LxZeQHW4XyNJSnU/2vgNIduDQUsGoPxgdmtny6BiY/TRDbjh+IivWjzibiW0BwQjaCqRu+B9FcIWGjVgUbn7sCq/s2E5ceAFbCRgrou6/7+sYNo2+Tcl9HQL2W9f4JEvoBGfRgyOyGT+lp5+KSXH0C/DoJvc1sgEalCSpwcCgpfA/2+mHUFJv9qqX6RQgm5aVrW8qkY3nS0FCqw25yF7E0LCWHJKrngbJmjvBchx6+A8yJnt7eMouxmCU4TH3KZx814df/wrKa+b41yR0Kj/InT0DCHQRTYzIuO45RCxZ9+Lv1n30S/qoSLDyA31Cacm2TEDspbC29ZtiMj5su839/0ZqzautOLS+3MgreW1NU4mgI7bdUTiTu4romU+5q61IR3q79rh2Wb/t6i3Ph5ftW5QB4gjTOWCI5zDeAMWhOUXU6H2wA/3oPZ8Ak6fLR9aKzvIgirVew/XwTFZDjC+gxE7C5Zqsm3Foc cPqbzKuL 89GIkGKRUm1L72+ROjfsxd7KLsKH4qgBG7waUbBEo2JY6G7lq/3snaWdVwXTsKYtAz89Q3LLhr2jt4H/zlZejfQJDy6wmNHJ2Jyr4b9ZoGxMkguoB2trN9vJqJyJ5qD04P6LQyiVLmeYnmT+ie1yZPBT3cAOrQeEUP3cAx43JvyzncNDI96DePLs2lYQ9vgTPiIfU+Nr2BDtPnChIgqwIsrTLDRh2iwV9s2Fq53EmaUia0sz5fZCh3VUzcZczfiQWWc/GWPPV13h6qpKw/g3L2qRGhfJhEFx03Kdu X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add E0POE bit that traps accesses to POR_EL0 from EL0. Updated according to DDI0601 2023-03. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Mark Brown Acked-by: Catalin Marinas --- arch/arm64/tools/sysreg | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index 940040e82399..5209693239e9 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -1747,7 +1747,8 @@ Field 0 M EndSysreg SysregFields CPACR_ELx -Res0 63:29 +Res0 63:30 +Field 29 E0POE Field 28 TTA Res0 27:26 Field 25:24 SMEN From patchwork Fri Nov 24 16:34:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467918 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEAD6C61DF4 for ; Fri, 24 Nov 2023 16:35:33 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id A57AD6B0297; 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dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7EA2E1BC0; Fri, 24 Nov 2023 08:36:16 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CF49E3F73F; Fri, 24 Nov 2023 08:35:27 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 03/25] arm64: cpufeature: add Permission Overlay Extension cpucap Date: Fri, 24 Nov 2023 16:34:48 +0000 Message-Id: <20231124163510.1835740-4-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: AD42320024 X-Rspam-User: X-Stat-Signature: jsdbsuaneckkptn3fpn81ja3zztirgzs X-Rspamd-Server: rspam03 X-HE-Tag: 1700843730-616157 X-HE-Meta: U2FsdGVkX19VykZqd2/2mJ/twCVtQtLuvmOGLIrgHqWcP523SxQeytMmDME444F1pRwpytC5M/PwgfNquvlnSvHRDwbnme6W/HJn6NgCgqYkfBdab4F+YUg4LH4jOS+KnKQaaIVHR95/+Un7Sfmr4146x9ZG6Me3Sb/YPUvETK/ro+H3cTN/oUwv7+1d+WIo1OpFHFTgM2manonjO84A95aUibI5j8Lq927Ko0wqpSAQi1VaNfc+TJ3S+vN6T3BDdeWERg0nFr+bgg1IXiUXCe4wdR2redTaEvdAbIS9s9dzDa5eh2hVZvFnG16u7poirLmYPagyonY+Q9oTiBAzs0tSNwu4HckMtoTY3JyeJAuC3vLMjKqTBSc3kdF5/YxuYW+xLDcd1IdIOklNamh2KUH0fG9YTH9ksVgBckwfiSIFNLCpTgkOwTtfx0wsBQdDNlivIWe8loEZTq6CF5Bg1IcbJ5uzVMj83+cHC9f9eGC96O0o3mLzxu21pS9IYXQWgyM7ymE6qD5IbF+UDvTkFC4oqkv7IUjrfsPJ775BSLwDBhfQdqqbqZYkNcRN/rpwVjdcxD2QRqt2UiSrgysyxEd3jrF7hMhqGjae4Z9wB970OKuVZqlhSBMsKrbyfdZu3n2o2fvt7ZiMilIXS1l1MEnMbF7g9peCnFMOVp6bsYjK0ZTwlUH0MNhzhxVa6GA+s4v4VdQGhoOFHjAaQWfNflH2Y/9TzZKMWHrkVztoUH/WI/zdDpc3oKDbcuBaBD+rTdszcXIdmSwrxGQCrIT2mMMISHwVYiBfCMQI120DKtHEpRTH7kZ1D7dhHQKF/PkhM1S/EcNBMVAodOJEtIOlVbyQdSMxyKDzBFrI1eykOu+fOxdTS+ajfDm+IUw5rdFCBtUQIjR0xJNl2rSPtdQf66ZTJeEgkHecxy1VGb6R4im+k9XQQyGuJPKC13KY70ly1pt7AwdgvhgITYrQ6qZ 0DpKXkbg uSar1ywLbImI7lPutIMwBb22SmUMbKh50uienubGT14lF50i8yv5dg2G3fLL7QN4WlZrjyCua61mPiTP5NJaHMIy/QVpGFp7TVNdU3m8SfZ5Z2RIoPQcRZs0x3Szm3BbkQX+pAf6xpF7VSwsTuGfPDRFEanbC1A702kcQ1Eh0lElR1qEbdF2L2Ck8ypFVbKIp4DNRz8gKOZXwy/otmv21M88wKQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: This indicates if the system supports POE. This is a CPUCAP_BOOT_CPU_FEATURE as the boot CPU will enable POE if it has it, so secondary CPUs must also have this feature. Add a new config option: ARM64_POE Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/Kconfig | 16 ++++++++++++++++ arch/arm64/kernel/cpufeature.c | 9 +++++++++ arch/arm64/tools/cpucaps | 1 + 3 files changed, 26 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 7b071a00425d..d7df6c603190 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2078,6 +2078,22 @@ config ARM64_EPAN if the cpu does not implement the feature. endmenu # "ARMv8.7 architectural features" +menu "ARMv8.9 architectural features" +config ARM64_POE + prompt "Permission Overlay Extension" + def_bool y + help + The Permission Overlay Extension is used to implement Memory + Protection Keys. Memory Protection Keys provides a mechanism for + enforcing page-based protections, but without requiring modification + of the page tables when an application changes protection domains. + + For details, see Documentation/core-api/protection-keys.rst + + If unsure, say y. + +endmenu # "ARMv8.9 architectural features" + config ARM64_SVE bool "ARM Scalable Vector Extension support" default y diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 646591c67e7a..00b6d516ed3f 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2731,6 +2731,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64MMFR2_EL1, EVT, IMP) }, +#ifdef CONFIG_ARM64_POE + { + .desc = "Stage-1 Permission Overlay Extension (S1POE)", + .capability = ARM64_HAS_S1POE, + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) + }, +#endif {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index b98c38288a9d..bbd2fac9345a 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -43,6 +43,7 @@ HAS_NESTED_VIRT HAS_NO_HW_PREFETCH HAS_PAN HAS_S1PIE +HAS_S1POE HAS_RAS_EXTN HAS_RNG HAS_SB From patchwork Fri Nov 24 16:34:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467919 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F377C61D97 for ; Fri, 24 Nov 2023 16:35:36 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 1F1196B0298; Fri, 24 Nov 2023 11:35:35 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 1A2326B029A; Fri, 24 Nov 2023 11:35:35 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 069596B02A1; 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Fri, 24 Nov 2023 08:35:30 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 04/25] arm64: disable trapping of POR_EL0 to EL2 Date: Fri, 24 Nov 2023 16:34:49 +0000 Message-Id: <20231124163510.1835740-5-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 2299710001B X-Stat-Signature: ccurfkb6saq1pkgyogxjkhjfxqf4ormy X-HE-Tag: 1700843732-742338 X-HE-Meta: U2FsdGVkX19ESpnOglJjq8uZ26nq5raFcb7H/rC26eY02eQyGkC/IAkLwbE+Y5D3djKaYkn03HiUuardjmHyZWt0LUNUGuwV0NW/Oyeyz4qz3PEWAPZFFhhlels0sx6BPuMPoBk9zgCiSpbZA8xYHQRfKiLre29+/6r3+zGv3cxBMWO27t1KhVkGO9BzXYiIXHN8HtxSqFxw1PvsH8AwLz50h8/w5IoY9nkcjZqTyhi2eFWdXaYLFvLCKdp6p6gjAfvjDHvZDaVa8vhXOpj1dM0JzuBrgGvIUS3w0z8LToVJwiFmVkEbZxjiOOxWRS3FDJXGldthie/GxUu62E1TLduvp9cYdTsU1OlNYK/6fHlj4GozCGPSLpIcwHLf+AFB+/aObjeRL9EExOcpN/dc7SloqHxDDZSbSYwo/vWIDGrzUTolyVb2zhBXGAESUk/zXX4y6iFMZb5LRfL+yKaWEKJ+Ui1+myYeYnVrlbsLLbPOhVIGnIDR1+DjMLPFj+0oFmCtF5kwbS3/cG5Fa6RNwZEaiW6sCmHA9taroMNNNKsLMUtovv+Oaj1HDDb16WASdjoFhvyg5tjpEBpm63HUmfR6FjARybZ4bOtiE9CJX+HsPGoF0bNOZlNP/WAZWBpvNdvlGwFFYd6y8xs9eJEnAjpYviuJ2N4RK3rXkErcroLuRyhI2sfDFXJFt/X+3Tu1YB+sEqEb/kpPvWPDXQE583+utUzJ5u5RTq2fv2mg2FEYSaHaWCDI9Lr24i3bzBVG3Yy1k4eJFyDD/QMeAXrtzcVHwOtOyGMY8dUd4FjKKtnS4/PCippGpPMKkHTkL87Ris8nRz/oYetfCMf7rPKnn1nCrV4DUeR6KjzJi6NviTW17hWpXPT3sP6yK53eiQb7zYBxLIznij5YKfCLmoXIItSLEUJDLpc/1gwtj7O1iS/VfTQmzR0f00KLlnvlmIWHXGMpuWECxXT/QJMjH45 6yaorfzK FevadMYDoYmLa/MsjuMnacjjC+XOLAQOIrraD30p0h9akO3eiNDt9qvofUV3JeY5mnpGaoUfZeOVCBO48QgMIajH35oyL3DElEeTCltl/cDiZfHlnRN+4BAAs1Yvd/MqzkOaSD1srAoLwJ2q7L0dTWoJDCrDxDWbGcZ+Ji0PckJKAbBGuutzi+7jXBNkvw6Ske1BB7+WA1vFmkkUlmQ3f1IzikJiWS2r34+ePW6S7Rs8E6DhhBBTyKLxJxgMOegPZpuBBRJzO65opV7k= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Allow EL0 or EL1 to access POR_EL0 without being trapped to EL2. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Acked-by: Catalin Marinas --- arch/arm64/include/asm/el2_setup.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h index b7afaa026842..df5614be4b70 100644 --- a/arch/arm64/include/asm/el2_setup.h +++ b/arch/arm64/include/asm/el2_setup.h @@ -184,12 +184,20 @@ .Lset_pie_fgt_\@: mrs_s x1, SYS_ID_AA64MMFR3_EL1 ubfx x1, x1, #ID_AA64MMFR3_EL1_S1PIE_SHIFT, #4 - cbz x1, .Lset_fgt_\@ + cbz x1, .Lset_poe_fgt_\@ /* Disable trapping of PIR_EL1 / PIRE0_EL1 */ orr x0, x0, #HFGxTR_EL2_nPIR_EL1 orr x0, x0, #HFGxTR_EL2_nPIRE0_EL1 +.Lset_poe_fgt_\@: + mrs_s x1, SYS_ID_AA64MMFR3_EL1 + ubfx x1, x1, #ID_AA64MMFR3_EL1_S1POE_SHIFT, #4 + cbz x1, .Lset_fgt_\@ + + /* Disable trapping of POR_EL0 */ + orr x0, x0, #HFGxTR_EL2_nPOR_EL0 + .Lset_fgt_\@: msr_s SYS_HFGRTR_EL2, x0 msr_s SYS_HFGWTR_EL2, x0 From patchwork Fri Nov 24 16:34:50 2023 Content-Type: text/plain; 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a=rsa-sha256; c=relaxed/relaxed; d=hostedemail.com; s=arc-20220608; t=1700843736; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=+/V2DhDdOUNGu2LVBZcNgVrXs2fIvsaw6cBdbj+wY14=; b=xluI8XpUYoMnZ/ONjdydcDCaR4xzytw3ZKB1gJCmEtPkFksLS9v6A8SkD+7rPWGUyPucO6 2DaSv+CLYgVSsFleS8E+tGS9Jyz3LsWifdbSJpZtl4PigTvVmZmT39FufGvdqvBgXnJ7eG 2T5/hY22yhOqvV35f5t7snVtK12QZVw= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5D8C81BD0; Fri, 24 Nov 2023 08:36:21 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id AE04C3F73F; Fri, 24 Nov 2023 08:35:32 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 05/25] arm64: context switch POR_EL0 register Date: Fri, 24 Nov 2023 16:34:50 +0000 Message-Id: <20231124163510.1835740-6-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: E66B840003 X-Stat-Signature: xkhpu347r75uz5qat8wb1a6uywn3rkik X-Rspam-User: X-HE-Tag: 1700843735-935988 X-HE-Meta: U2FsdGVkX1+80DtXGDui9TZ8otnMtsC37vKigkT5hDxyYiqUCPmM8poJhZonJy/+I5VF+Dhp93ERBqE0kDwbXkyWdG6SkMLaktQwGM9LeiLsEZ9holIe1+egd/M+5uosiWbYfQoQo6CuzPHoRBTu+LuCiWIB+6ZBbkhvsodlZxCIZzCxHQ/cdNpOi9nUVHciEHmyNsRQb1I/KVCzhKpDT5B13UqDUyF7mfCBgUV/B0/Vg0D7gZbj4dv+d6imif8dD3SdXkiUfw1b4ZGPoBaYhRs6WvEnLIYp67WpW95r9Ul5vof+xlFmIAcBGIyE0M87Zkr8ESMcC0wo8CVz+9KqlmTUTKEVKWuvfs714QVhVLh2T+H7/NpSKM6szlGjM1SUEg84kEAYnYLaQpnr9NOpxKSTuljwJeFCFtMjv92daE+eKZgGirI0OtEobOzYWi575UWLQgynj4414WATiNdZ601nRURi7RSbYXoZeXUOeQ6zxIZ9Sbnu/Pt1g5HXFmhMr7VG4rinXK0Apc9qJuhMYykI8Vssq4BRz+rPRooY9NfeQr8+rnT7XNAS5A86jACk7ZqcNEn2U29mCiWL2q2kiC+qrWBzw0uJYuZeD6hVM8+RrvfsS2dkvg1WmF043JCIshfjb/kbSAruK2ezlxmZnmpDqC/rtwFo6jXNHNN4dKBiluy3Xj4bZWLgRfSWwz1LKtWqPEzzL4EKYuh5qO1gnbFlhb8tk2b8qMf9rYJYAJCybK/nLpBqpyUXv2MgG/4VonU1+wg8v9pQgaAUom3s39BQaLd3eZtH0WrMqIQv3LUajUqvxrHWZmVXl9qy7y0/cUlzxTre90YhARR+lOkczlh0ZCb2gyeVBfxYLeqWlvGuZJnEpOYoDHOkG2WE7j1osvNxZxiuiqn8YvZ0VjDaFjmlU5IOMU8OE7fLXiSm+ViEqpc2mjUa5iWYR5C3aweIedp7+Y2GYBFmeaQqkQ1 /ouxx2hU 1NYBbTMWtqiMjGZKszzlq0awr5jNCbELgzeBnG55qiA4q2Gb+O8bBgwV7V/Es3G5KI3EW5NOMu6A5jYk6/tbGl03rVWg4MGsnccgBJH1CnVl1rVD5iOAV0yfd6HAjKTMriA04GTWAGj8antiB16eVNmczN81Z5eW0dxgGuIjBFI00RjqHckjf1y92oTLw18ClaYwsPVGc5KFConV5o/PPB29VZDSEqojGwk1xmohdQ0snVJtcnfqYN4W/pw3BD1tUbytPHQL1NBR/+Dc= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: POR_EL0 is a register that can be modified by userspace directly, so it must be context switched. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/cpufeature.h | 6 ++++++ arch/arm64/include/asm/processor.h | 1 + arch/arm64/include/asm/sysreg.h | 3 +++ arch/arm64/kernel/process.c | 22 ++++++++++++++++++++++ 4 files changed, 32 insertions(+) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index f6d416fe49b0..6870e4d46334 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -819,6 +819,12 @@ static inline bool system_supports_tlb_range(void) return alternative_has_cap_unlikely(ARM64_HAS_TLB_RANGE); } +static inline bool system_supports_poe(void) +{ + return IS_ENABLED(CONFIG_ARM64_POE) && + alternative_has_cap_unlikely(ARM64_HAS_S1POE); +} + int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt); bool try_emulate_mrs(struct pt_regs *regs, u32 isn); diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h index e5bc54522e71..b3ad719c2d0c 100644 --- a/arch/arm64/include/asm/processor.h +++ b/arch/arm64/include/asm/processor.h @@ -179,6 +179,7 @@ struct thread_struct { u64 sctlr_user; u64 svcr; u64 tpidr2_el0; + u64 por_el0; }; static inline unsigned int thread_get_vl(struct thread_struct *thread, diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 9c2caf0efdc7..77a4797d0d54 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1052,6 +1052,9 @@ #define POE_RXW UL(0x7) #define POE_MASK UL(0xf) +/* Initial value for Permission Overlay Extension for EL0 */ +#define POR_EL0_INIT POE_RXW + #define ARM64_FEATURE_FIELD_BITS 4 /* Defined for compatibility only, do not add new users. */ diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 7387b68c745b..fc899c12d759 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -271,12 +271,19 @@ static void flush_tagged_addr_state(void) clear_thread_flag(TIF_TAGGED_ADDR); } +static void flush_poe(void) +{ + if (system_supports_poe()) + write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0); +} + void flush_thread(void) { fpsimd_flush_thread(); tls_thread_flush(); flush_ptrace_hw_breakpoint(current); flush_tagged_addr_state(); + flush_poe(); } void arch_release_task_struct(struct task_struct *tsk) @@ -374,6 +381,9 @@ int copy_thread(struct task_struct *p, const struct kernel_clone_args *args) if (system_supports_tpidr2()) p->thread.tpidr2_el0 = read_sysreg_s(SYS_TPIDR2_EL0); + if (system_supports_poe()) + p->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); + if (stack_start) { if (is_compat_thread(task_thread_info(p))) childregs->compat_sp = stack_start; @@ -498,6 +508,17 @@ static void erratum_1418040_new_exec(void) preempt_enable(); } +static void permission_overlay_switch(struct task_struct *next) +{ + if (system_supports_poe()) { + current->thread.por_el0 = read_sysreg_s(SYS_POR_EL0); + if (current->thread.por_el0 != next->thread.por_el0) { + write_sysreg_s(next->thread.por_el0, SYS_POR_EL0); + isb(); + } + } +} + /* * __switch_to() checks current->thread.sctlr_user as an optimisation. Therefore * this function must be called with preemption disabled and the update to @@ -533,6 +554,7 @@ struct task_struct *__switch_to(struct task_struct *prev, ssbs_thread_switch(next); erratum_1418040_thread_switch(next); ptrauth_thread_switch_user(next); + permission_overlay_switch(next); /* * Complete any pending TLB or cache maintenance on this CPU in case From patchwork Fri Nov 24 16:34:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467923 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4AC35C61DF4 for ; Fri, 24 Nov 2023 16:35:47 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 39FCD6B02AB; Fri, 24 Nov 2023 11:35:45 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 329D06B02AD; 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Fri, 24 Nov 2023 08:36:28 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 236AC3F73F; Fri, 24 Nov 2023 08:35:35 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 06/25] KVM: arm64: Save/restore POE registers Date: Fri, 24 Nov 2023 16:34:51 +0000 Message-Id: <20231124163510.1835740-7-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 186C1140013 X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: ckzgz5zerrky47y6tgcphe7tumagew1h X-HE-Tag: 1700843742-140302 X-HE-Meta: U2FsdGVkX19Vb6wxft92GFNL6FCcg9mK5E9luVNXdhxsYkv//2JPv6Fg5vZb2LHB7tMFAnpAqQeFYfgES4Ee6uQInGE7vL+87sfPoNwKTirn3GomlaA6gwbaY02bvMpUYW5zqZ2xkkX3UXx2X2umqgSD9p4RqcmxgQpg2Ng2SSS81QDTsRBQbUEo/nXHHZYn1DTO5E/GqGBIjT2Gn1LDiD4T4dwsyH/VumvRL92BEN2CAVZ+z2TqWp6fAOqm2QT8hA0R5rEYW8G2PQ6i5T+J4WWVAsIb+peU5ZNNELbCr263c4laC2cEqJR1IZG8W6nnf7H9x8rLjf+0Uxsue3bs44HEa0z2gQZszvkx+Z5eTdbdsRet2LD/ZMvkcu23/Bq8z0Z0CdQppX4gVKqDqd3DQBQvwBo6ONoPXOO/VBO5FkyESDnLhy3kjxBvtxxE4fgJD4SHSeNRUM8orT9hg/tmOpNjlQmYBpCivJjv2RfYvg923y9qDjfgwhc4i33b6lAS43BvCITnUAYX7FIAwtxpcNTSc1sV2jZXb0SuJOIcFAZmHUqGK+MSHClC1/cd4CX/8x0dQMqw0OMLLMn9SXtTDmu/Ki2PaVfH+xzucXsN8+VAZslcOFSAJDWk2HSPl6hdMYWe6smBDN3PqAv8ioABRJs2Zw0b8FhYhYbbZG/hbQTwlHJOaiqXT/BLX7w6oP89I10x2DlA6gL6DvvWKJshyWJpVeXKQrXJjwMzLjEF5P4g2osLswR+4U88Zvjp5vSh7iXZLgbVcum6MTrltVJKpmDMtB8hvsxkAZiWuONB/FA2iIIK0cmEQjK07jd5w4oO758K0MxjEasyzxe8O3cGKAkG8tIgDP20tC3VZsmA/r0l2EPamF17asbewKTjU8q3Ymy7iqK9GAPnXWFtbeKl8l5eY5DsgI/heQnzKWDTlE14rO6i8WwR1EzDL3S5OokBzjT+8XcFdhEGA/8DS/D odDdccMp XuxWblhls2kX29tPIQWERi5Jdkmn8atdif43CVnMzzPLKkcp70I4WbKfnUM/0PZPZrO6+spjtWmaKRtJK8PpnSi9O4k8k5wrNV6bAzer+p1V/XyUOSVKSf8Va+4YzrPGubIHNi8GrESjPFc1v2uRMYO5A5N0E6+c9PwLG8b1zL+lYwXI+U80s5IUdIeNBIWFqWsc5bo2tMoq6KaEMvhWCBVWBy+idmSB5HTmk X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Define the new system registers that POE introduces and context switch them. Signed-off-by: Joey Gouly Cc: Marc Zyngier Cc: Oliver Upton Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/kvm_arm.h | 4 ++-- arch/arm64/include/asm/kvm_host.h | 4 ++++ arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 10 ++++++++++ arch/arm64/kvm/sys_regs.c | 2 ++ 4 files changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index b85f46a73e21..597470e0b87b 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h @@ -346,14 +346,14 @@ */ #define __HFGRTR_EL2_RES0 (GENMASK(63, 56) | GENMASK(53, 51)) #define __HFGRTR_EL2_MASK GENMASK(49, 0) -#define __HFGRTR_EL2_nMASK (GENMASK(58, 57) | GENMASK(55, 54) | BIT(50)) +#define __HFGRTR_EL2_nMASK (GENMASK(60, 57) | GENMASK(55, 54) | BIT(50)) #define __HFGWTR_EL2_RES0 (GENMASK(63, 56) | GENMASK(53, 51) | \ BIT(46) | BIT(42) | BIT(40) | BIT(28) | \ GENMASK(26, 25) | BIT(21) | BIT(18) | \ GENMASK(15, 14) | GENMASK(10, 9) | BIT(2)) #define __HFGWTR_EL2_MASK GENMASK(49, 0) -#define __HFGWTR_EL2_nMASK (GENMASK(58, 57) | GENMASK(55, 54) | BIT(50)) +#define __HFGWTR_EL2_nMASK (GENMASK(60, 57) | GENMASK(55, 54) | BIT(50)) #define __HFGITR_EL2_RES0 GENMASK(63, 57) #define __HFGITR_EL2_MASK GENMASK(54, 0) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 824f29f04916..fa9ebd8fce40 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -401,6 +401,10 @@ enum vcpu_sysreg { PIR_EL1, /* Permission Indirection Register 1 (EL1) */ PIRE0_EL1, /* Permission Indirection Register 0 (EL1) */ + /* Permission Overlay Extension registers */ + POR_EL1, /* Permission Overlay Register 1 (EL1) */ + POR_EL0, /* Permission Overlay Register 0 (EL0) */ + /* 32bit specific registers. */ DACR32_EL2, /* Domain Access Control Register */ IFSR32_EL2, /* Instruction Fault Status Register */ diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h index bb6b571ec627..22f07ee43e7e 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -19,6 +19,9 @@ static inline void __sysreg_save_common_state(struct kvm_cpu_context *ctxt) { ctxt_sys_reg(ctxt, MDSCR_EL1) = read_sysreg(mdscr_el1); + + if (system_supports_poe()) + ctxt_sys_reg(ctxt, POR_EL0) = read_sysreg_s(SYS_POR_EL0); } static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt) @@ -59,6 +62,8 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) ctxt_sys_reg(ctxt, PIR_EL1) = read_sysreg_el1(SYS_PIR); ctxt_sys_reg(ctxt, PIRE0_EL1) = read_sysreg_el1(SYS_PIRE0); } + if (system_supports_poe()) + ctxt_sys_reg(ctxt, POR_EL1) = read_sysreg_el1(SYS_POR); ctxt_sys_reg(ctxt, PAR_EL1) = read_sysreg_par(); ctxt_sys_reg(ctxt, TPIDR_EL1) = read_sysreg(tpidr_el1); @@ -89,6 +94,9 @@ static inline void __sysreg_save_el2_return_state(struct kvm_cpu_context *ctxt) static inline void __sysreg_restore_common_state(struct kvm_cpu_context *ctxt) { write_sysreg(ctxt_sys_reg(ctxt, MDSCR_EL1), mdscr_el1); + + if (system_supports_poe()) + write_sysreg_s(ctxt_sys_reg(ctxt, POR_EL0), SYS_POR_EL0); } static inline void __sysreg_restore_user_state(struct kvm_cpu_context *ctxt) @@ -135,6 +143,8 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) write_sysreg_el1(ctxt_sys_reg(ctxt, PIR_EL1), SYS_PIR); write_sysreg_el1(ctxt_sys_reg(ctxt, PIRE0_EL1), SYS_PIRE0); } + if (system_supports_poe()) + write_sysreg_el1(ctxt_sys_reg(ctxt, POR_EL1), SYS_POR); write_sysreg(ctxt_sys_reg(ctxt, PAR_EL1), par_el1); write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL1), tpidr_el1); diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 4735e1b37fb3..a54e5eadbf29 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -2269,6 +2269,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_MAIR_EL1), access_vm_reg, reset_unknown, MAIR_EL1 }, { SYS_DESC(SYS_PIRE0_EL1), NULL, reset_unknown, PIRE0_EL1 }, { SYS_DESC(SYS_PIR_EL1), NULL, reset_unknown, PIR_EL1 }, + { SYS_DESC(SYS_POR_EL1), NULL, reset_unknown, POR_EL1 }, { SYS_DESC(SYS_AMAIR_EL1), access_vm_reg, reset_amair_el1, AMAIR_EL1 }, { SYS_DESC(SYS_LORSA_EL1), trap_loregion }, @@ -2352,6 +2353,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { .access = access_pmovs, .reg = PMOVSSET_EL0, .get_user = get_pmreg, .set_user = set_pmreg }, + { SYS_DESC(SYS_POR_EL0), NULL, reset_unknown, POR_EL0 }, { SYS_DESC(SYS_TPIDR_EL0), NULL, reset_unknown, TPIDR_EL0 }, { SYS_DESC(SYS_TPIDRRO_EL0), NULL, reset_unknown, TPIDRRO_EL0 }, { SYS_DESC(SYS_TPIDR2_EL0), undef_access }, From patchwork Fri Nov 24 16:34:52 2023 Content-Type: text/plain; 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s=arc-20220608; d=hostedemail.com; t=1700843740; a=rsa-sha256; cv=none; b=7z8LPkchS17IU40VYwESOjg8R/v7HpypT0t06VZ+xwhbeXOwUCzfWFqWS3PbG5GQOMsTzD eFTNju+qbeI9LZzcAQui1ujsBcxd8XXiWyZKdYfCLvC+pU+0l2yyvKkUUwNf/++fXzw+wU Isf2Spk2E/3Xr6J0MRhXqbMkXwH1WO4= ARC-Authentication-Results: i=1; imf27.hostedemail.com; dkim=none; spf=pass (imf27.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com; dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3D9A31063; Fri, 24 Nov 2023 08:36:26 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 8CF433F7F5; Fri, 24 Nov 2023 08:35:37 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 07/25] arm64: enable the Permission Overlay Extension for EL0 Date: Fri, 24 Nov 2023 16:34:52 +0000 Message-Id: <20231124163510.1835740-8-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 7ED8140027 X-Rspam-User: X-Stat-Signature: nbzenr6ih4sqoutzd7oadah6dn57x7ek X-Rspamd-Server: rspam03 X-HE-Tag: 1700843740-11245 X-HE-Meta: U2FsdGVkX1/90hby0UmZKBOme5D/KDogJxe1S2NL2M0qPof0VyWn+zh/VqiVpiBcsYFt7stLNqFoWmw5nOzzmc4JAba4Qf4dtLsRloMt7NT4coG+I/DYGN+5JWDF0Ikg6mw86pUUshx46Nfbht/VcGKoL+qULonf8ORGUcpz64D2hTTcrLEBH79dovZCls3uM2ipL71DmyOVD/qYSgUK///TtkcJzt/XfBgvpWReBgtO62rxJyV76SZUCthNXqCg3FXfscsnZdzlGXsxmf+6pLt3Su6gWiKJ2SXJtg3F7ZGu/qHixUR9zz2AK3YSy/v95p38Cv8RWJlpRI/4UdboLL+eTkwuc5sB+a8NVfKMC3Ahx5CplIjVtvF1m35pRPrPl1jc8cvry6sIIAvRiEifwZojYlc5jpJhm1M3x9PTfGb0jcFqwdA2k3Lf9f11bQHzP+gITXT/aBNYhMLU917DGrI+2Vk6FB196uQRSxM7k8d89d33BlxPYBVIJ6e4onKeN6bNDepaSyJkiCH07iCH8MvWhmhZ4cMRsjdWankuAf8bahy+jYhRPD8rjOScIDFuO1SQpezQbmwIZ/TM55GNr1fzaApNUPexhW6OO8/fBehkFDW6W8zqDGng8AtcQO0tpqLGITxBJ/qe3RY03BGqNTliddc7Ae64NVy9BZQe6n3T/zpsn+dt/YJlO8HQQ4N1EbOTD6GWshY2Ouu1t+kb/fgKl+yPUd5Gpvhwin5/onJDADtb2a5pw7MRGXznaZvi9aoB4jS4dGe8OOdBC++K+0f72lGH6yJciH0m48BXRl9w32gZeLX/o2BnMTAHlvAtSxkmRPTAdse9iWPBPgPW6+/tpF71thnTrVMB4VSIb5FENRgsu64NMJKuBT7CPj8ss8uS/UgmIUSvcaUhMebVkOBJlmJJSeg3wWli8vMP39WtXAoaqPH2u+wMvPPIsk+PHdIavv9uqYdlcIN8ES4 8Ye08Ix2 tPM6fSThcHZh8AO7DpMK40iMLedn7D+aMxbSgzlnZTZbG8D0SMTTWhwIhtqqo02bmrh2vJp78UPXYQRs3SsHmLmUByDP02VN6VEOoYkwrs9mG7FTd7PDhiY+NdUqZxYqJhuho16vBqWEAICydEncmJiu+uu6QmYgaC5jkSz5AI5w/YWtneRojKeiX0DHXfxYZz9hm2Zrjcj4NPABs32T/XBtxjHWr+c5+ylBy X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Expose a HWCAP and ID_AA64MMFR3_EL1_S1POE to userspace, so they can be used to check if the CPU supports the feature. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- Documentation/arch/arm64/elf_hwcaps.rst | 3 +++ arch/arm64/include/asm/hwcap.h | 1 + arch/arm64/include/uapi/asm/hwcap.h | 1 + arch/arm64/kernel/cpufeature.c | 14 ++++++++++++++ arch/arm64/kernel/cpuinfo.c | 1 + 5 files changed, 20 insertions(+) diff --git a/Documentation/arch/arm64/elf_hwcaps.rst b/Documentation/arch/arm64/elf_hwcaps.rst index ced7b335e2e0..fe7350a66cea 100644 --- a/Documentation/arch/arm64/elf_hwcaps.rst +++ b/Documentation/arch/arm64/elf_hwcaps.rst @@ -317,6 +317,9 @@ HWCAP2_LRCPC3 HWCAP2_LSE128 Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0011. +HWCAP2_POE + Functionality implied by ID_AA64MMFR3_EL1.S1POE == 0b0001. + 4. Unused AT_HWCAP bits ----------------------- diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h index cd71e09ea14d..9a1aa1e5e25c 100644 --- a/arch/arm64/include/asm/hwcap.h +++ b/arch/arm64/include/asm/hwcap.h @@ -142,6 +142,7 @@ #define KERNEL_HWCAP_SVE_B16B16 __khwcap2_feature(SVE_B16B16) #define KERNEL_HWCAP_LRCPC3 __khwcap2_feature(LRCPC3) #define KERNEL_HWCAP_LSE128 __khwcap2_feature(LSE128) +#define KERNEL_HWCAP_POE __khwcap2_feature(POE) /* * This yields a mask that user programs can use to figure out what diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h index 5023599fa278..69f09521b553 100644 --- a/arch/arm64/include/uapi/asm/hwcap.h +++ b/arch/arm64/include/uapi/asm/hwcap.h @@ -107,5 +107,6 @@ #define HWCAP2_SVE_B16B16 (1UL << 45) #define HWCAP2_LRCPC3 (1UL << 46) #define HWCAP2_LSE128 (1UL << 47) +#define HWCAP2_POE (1UL << 48) #endif /* _UAPI__ASM_HWCAP_H */ diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 00b6d516ed3f..02169cb3b84b 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -402,6 +402,8 @@ static const struct arm64_ftr_bits ftr_id_aa64mmfr2[] = { }; static const struct arm64_ftr_bits ftr_id_aa64mmfr3[] = { + ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_POE), + FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_S1POE_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_S1PIE_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE, ID_AA64MMFR3_EL1_TCRX_SHIFT, 4, 0), ARM64_FTR_END, @@ -2242,6 +2244,14 @@ static void cpu_enable_mops(const struct arm64_cpu_capabilities *__unused) sysreg_clear_set(sctlr_el1, 0, SCTLR_EL1_MSCEn); } +#ifdef CONFIG_ARM64_POE +static void cpu_enable_poe(const struct arm64_cpu_capabilities *__unused) +{ + sysreg_clear_set(REG_TCR2_EL1, 0, TCR2_EL1x_E0POE); + sysreg_clear_set(CPACR_EL1, 0, CPACR_ELx_E0POE); +} +#endif + /* Internal helper functions to match cpu capability type */ static bool cpucap_late_cpu_optional(const struct arm64_cpu_capabilities *cap) @@ -2737,6 +2747,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .capability = ARM64_HAS_S1POE, .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, .matches = has_cpuid_feature, + .cpu_enable = cpu_enable_poe, ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1POE, IMP) }, #endif @@ -2889,6 +2900,9 @@ static const struct arm64_cpu_capabilities arm64_elf_hwcaps[] = { HWCAP_CAP(ID_AA64SMFR0_EL1, BI32I32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_BI32I32), HWCAP_CAP(ID_AA64SMFR0_EL1, F32F32, IMP, CAP_HWCAP, KERNEL_HWCAP_SME_F32F32), #endif /* CONFIG_ARM64_SME */ +#ifdef CONFIG_ARM64_POE + HWCAP_CAP(ID_AA64MMFR3_EL1, S1POE, IMP, CAP_HWCAP, KERNEL_HWCAP_POE), +#endif {}, }; diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index a257da7b56fe..5515c50f5219 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -130,6 +130,7 @@ static const char *const hwcap_str[] = { [KERNEL_HWCAP_SVE_B16B16] = "sveb16b16", [KERNEL_HWCAP_LRCPC3] = "lrcpc3", [KERNEL_HWCAP_LSE128] = "lse128", + [KERNEL_HWCAP_POE] = "poe", }; #ifdef CONFIG_COMPAT From patchwork Fri Nov 24 16:34:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467922 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 414BDC636BD for ; Fri, 24 Nov 2023 16:35:45 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id CEDBC6B02AA; Fri, 24 Nov 2023 11:35:44 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id C9F176B02AB; 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Fri, 24 Nov 2023 08:36:28 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 026073F7F5; Fri, 24 Nov 2023 08:35:39 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 08/25] arm64: add POIndex defines Date: Fri, 24 Nov 2023 16:34:53 +0000 Message-Id: <20231124163510.1835740-9-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam06 X-Rspamd-Queue-Id: DEE881C0007 X-Stat-Signature: nbkqcm9r56fczyycktgwoxjqmnigixxz X-HE-Tag: 1700843742-314101 X-HE-Meta: U2FsdGVkX1873owlUf94OVKgEzN8Js0RPwmTUpSeekM3IyWLszzYl02BEoUms63JH8xtyiFhe1MdIdCL4PztBW/nEzc8to57Z0BcsBdn3AXKuGiR6RGdCmFGRpRP5iBojNte0ZSEDkmzX5tLQdI0PO1th0alLVItX+El+RgVPrz/AcIWyv4mVbkVLavyCyr4DNm1NpF4gW4TdoAA+W2uCTLO6JHGDUvoHTigFvPNwCPV4mbW6aGTDffpaxrKQrD4dVGhULF3iRHR8zqNm58E8ffRoDDTRHeN5zYifg0Nmc2NG9fJ3s0wwZqYePHkFqHH7XGy33cYabL12OwhVZWqfkyGZQErWrZ1XBznwNvA9XMPHUbiJBM7Llqxrhp+jSj0muRm4alptDc6yd4floVP8Pef1ISxMViKp+v+h/bQWYbwC6WTDfYKFlfAGJjcVVnR3eQoPFQeQGuLEIBOAAtk7ttEHrhyrRPZzg/ap/lSudJ+hEIJNdwanFfHauTLmVQnSAtrCyFzP+qn0vYz6HfDcub6yorGUunRtlwO2P++i34dvspT8Lkw69LJvmbO7MX3hDNBFrhqeUJ7gWSnsVkNeoXXYQDqL4YnfHzlf6QT9n9oD/+Saeq9HWPE6Lfz8MOKAEc+rMMgOWwjrPzRfPgGteoUnTjxOSFf/YOVrR3o8zGVdy/bbZzLAxzgfDTQk5XkYJEgM35hWTX1vEjm5/uJl66yMVgP81odmLaY49VBBS/HTtvfiF82/7+lDQp68v334lXf8P6TOIvItudZIH3TqbypBYrZEkJBJLPM9OloQRwpYJ1DTSZn+msOZdsg4yGs9Q3S1KWc8Kt3YwgqWnlJDhYWTxLwKwYtpUebCHlMkCLlM/+hI5Q1Hn41rlrQi2HJjV1zdB0jNNB+szt1F94Xx5K9QreV82Y6gl3+WhnWfpud7iAobm9WtGZwmW4MW8SKpAAKVc3/5YFOUCId8pH hBGXq1WI cNb+Y8IiDhKdBQC2nne0qY6gIfIgSLqCZa9TYCzJEGLpl3SEcyUej8RMYJxYBELTxRhGohjBTmlMUyy4YRbENnSPlsv3bm05LrmvFGFEyaBasuzHc8KlgYUC6EWRERNnBFev+KNuQ/prKFfvnLHVN3T8k6dCoQv9nfeoTfZKz878AQSWdOZBKNrtAVI++CofmAEa4WC83gooDKOwghfHVnmYI4Q== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: The 3-bit POIndex is stored in the PTE at bits 60..62. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/pgtable-hwdef.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index e4944d517c99..fe270fa39110 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -178,6 +178,16 @@ #define PTE_PI_IDX_2 53 /* PXN */ #define PTE_PI_IDX_3 54 /* UXN */ +/* + * POIndex[2:0] encoding (Permission Overlay Extension) + */ +#define PTE_PO_IDX_0 (_AT(pteval_t, 1) << 60) +#define PTE_PO_IDX_1 (_AT(pteval_t, 1) << 61) +#define PTE_PO_IDX_2 (_AT(pteval_t, 1) << 62) + +#define PTE_PO_IDX_MASK GENMASK_ULL(62, 60) + + /* * Memory Attribute override for Stage-2 (MemAttr[3:0]) */ From patchwork Fri Nov 24 16:34:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467924 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8D421C636BD for ; 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s=arc-20220608; d=hostedemail.com; t=1700843745; a=rsa-sha256; cv=none; b=I7dCY4gVT5wdJu/TN3GAL7QFJbftD97xIrsz0L1yW6Gr6CFitNSVHQN5YgNN02diKmZr0Y JDmHll5M0Fv6mQ1fGlNzyHuUzi+cQv3ucruRV7mqdSVBTFtaTvY9P/P55HJ6AGqEhqumwO C75oupDEvoZCRYzn3pZWdSXmCkg5z9s= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 1DE561BC0; Fri, 24 Nov 2023 08:36:31 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6E5A13F73F; Fri, 24 Nov 2023 08:35:42 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 09/25] arm64: define VM_PKEY_BIT* for arm64 Date: Fri, 24 Nov 2023 16:34:54 +0000 Message-Id: <20231124163510.1835740-10-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam09 X-Rspamd-Queue-Id: 690D914000D X-Stat-Signature: ddccwr9daby4btwytda3k5dcuwwa569x X-Rspam-User: X-HE-Tag: 1700843745-11259 X-HE-Meta: U2FsdGVkX19gzB7esTxj2G40W+KnnzzipqK8vZtbWAO/KDcH8qFRowUAjU3JBNKZX1dKmScrf/ncAXGw8DUxrwUkfuM0JYneWVAVF//Ql/zWo5WvuY2J9+pDOuOYqCjI95fecu8HDyszwXNz977P4FCy/jPHB+Dhk0KGoxpu/teP3gMDicMwuhcvsu69yt/koLU59mbToJcMh56BHShxg85pXSofQDD6IApWnK/Bmm70AyP/v4GkhTG7R2b+oGO5FcGnR98S4FNWCjIiPWzyyLhI9aIGSyo1HCif+j0B1vl5ytihzMAjNsZd3fI2J0m3Z9aEQCkYYiifoqJsNvvK8/sTNxeEmlqf4xVPeZfK4+sDQ7iF7R4t8ESrT5JLuKBIWbGjM4Rc0SIP2AN7D2YBusrUgOckfXH8aS18XF+XFswcQ8OW81hu/r+rL2vTyU75DQL6ISlz9o5rnRn/jQXjZNNeBbTDjF8wBRKbFGm/rVHvViJhActqKnoXB+xTbcobGqYs8NbTnauCByU0PBi6tQ0XXaXDBVih7LSLsSx9U/C/EshYJo0q567DIiupNc4ip9BByuqXkPJgpg1xwgI3dUkenrBCeYRwSLXH0S6Z7Is/oHvfWw7ljqDeSleqvLjvvfYPrqmKm+zG6sDZGIx99py4wjOzYT/Eb/7fZwtDIh+PMOgyDd8/I4ZYEC4NOuyzTzSsBtpVs87vcUYtiGyokH60XDwwSOQ9u1FN6OEVVrou+N0lAQ1sujIh/sG8sTtTsxtHT8NQ83TV4zQQUSKPbzeulklonDb44jg+WEVqM0Yw051SOZLEM2gNjouTzlPkc4ey0Xr4Vx7wtejlt72EnuRh3RkN8/gbYLh4fz9ektwsSV4c3pz/m/nsf89HZcCHdXMCCeNlKgILqf8BL//PrNpi0Mru/7WyMjgq0SklUMSdwjIn4bD+E2SGQ9m7TmAYOipEnycK0W16Jih1wE4 jwSjsBEj LfHr8qJ77hOSPoJlwzG/syaduOXkWHV/rU0rkv+YKtN3O1hV35IsiNz6pLgs6mkC1gTqNuqPyY/8FEtkVLjbQAG3F4E+S7C9+P/MD6olU7dY02mw+xCPIPiESDLDQTEOTryN+lXeNR7wKublaPDEjKMnU1aaTyg+2uKxTrwOVH76XMwpuEHlW0o9bI7hg1B2GUzc9OwStakkXjnsHpJnBGQoBFZQ6H1mjr2HbeKoSbPPUXD/ea5yND4nKRSqNEC0/nxuLbX6OQDF7qxk= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Define the VM_PKEY_BIT* values for arm64, and convert them into the arm64 specific pgprot values. Move the current values for x86 and PPC into arch/*. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/mman.h | 8 +++++++- arch/arm64/include/asm/page.h | 10 ++++++++++ arch/arm64/mm/mmap.c | 9 +++++++++ arch/powerpc/include/asm/page.h | 11 +++++++++++ arch/x86/include/asm/page.h | 10 ++++++++++ fs/proc/task_mmu.c | 2 ++ include/linux/mm.h | 13 ------------- 7 files changed, 49 insertions(+), 14 deletions(-) diff --git a/arch/arm64/include/asm/mman.h b/arch/arm64/include/asm/mman.h index 5966ee4a6154..ecb2d18dc4d7 100644 --- a/arch/arm64/include/asm/mman.h +++ b/arch/arm64/include/asm/mman.h @@ -7,7 +7,7 @@ #include static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot, - unsigned long pkey __always_unused) + unsigned long pkey) { unsigned long ret = 0; @@ -17,6 +17,12 @@ static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot, if (system_supports_mte() && (prot & PROT_MTE)) ret |= VM_MTE; +#if defined(CONFIG_ARCH_HAS_PKEYS) + ret |= pkey & 0x1 ? VM_PKEY_BIT0 : 0; + ret |= pkey & 0x2 ? VM_PKEY_BIT1 : 0; + ret |= pkey & 0x4 ? VM_PKEY_BIT2 : 0; +#endif + return ret; } #define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey) diff --git a/arch/arm64/include/asm/page.h b/arch/arm64/include/asm/page.h index 2312e6ee595f..aabfda2516d2 100644 --- a/arch/arm64/include/asm/page.h +++ b/arch/arm64/include/asm/page.h @@ -49,6 +49,16 @@ int pfn_is_map_memory(unsigned long pfn); #define VM_DATA_DEFAULT_FLAGS (VM_DATA_FLAGS_TSK_EXEC | VM_MTE_ALLOWED) +#if defined(CONFIG_ARCH_HAS_PKEYS) +/* A protection key is a 3-bit value */ +# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_2 +# define VM_PKEY_BIT0 VM_HIGH_ARCH_2 +# define VM_PKEY_BIT1 VM_HIGH_ARCH_3 +# define VM_PKEY_BIT2 VM_HIGH_ARCH_4 +# define VM_PKEY_BIT3 0 +# define VM_PKEY_BIT4 0 +#endif + #include #endif diff --git a/arch/arm64/mm/mmap.c b/arch/arm64/mm/mmap.c index 645fe60d000f..2e2a5a9bcfa1 100644 --- a/arch/arm64/mm/mmap.c +++ b/arch/arm64/mm/mmap.c @@ -98,6 +98,15 @@ pgprot_t vm_get_page_prot(unsigned long vm_flags) if (vm_flags & VM_MTE) prot |= PTE_ATTRINDX(MT_NORMAL_TAGGED); +#ifdef CONFIG_ARCH_HAS_PKEYS + if (vm_flags & VM_PKEY_BIT0) + prot |= PTE_PO_IDX_0; + if (vm_flags & VM_PKEY_BIT1) + prot |= PTE_PO_IDX_1; + if (vm_flags & VM_PKEY_BIT2) + prot |= PTE_PO_IDX_2; +#endif + return __pgprot(prot); } EXPORT_SYMBOL(vm_get_page_prot); diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h index e5fcc79b5bfb..a5e75ec333ad 100644 --- a/arch/powerpc/include/asm/page.h +++ b/arch/powerpc/include/asm/page.h @@ -330,6 +330,17 @@ static inline unsigned long kaslr_offset(void) } #include + +#if defined(CONFIG_ARCH_HAS_PKEYS) +# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_0 +/* A protection key is a 5-bit value */ +# define VM_PKEY_BIT0 VM_HIGH_ARCH_0 +# define VM_PKEY_BIT1 VM_HIGH_ARCH_1 +# define VM_PKEY_BIT2 VM_HIGH_ARCH_2 +# define VM_PKEY_BIT3 VM_HIGH_ARCH_3 +# define VM_PKEY_BIT4 VM_HIGH_ARCH_4 +#endif /* CONFIG_ARCH_HAS_PKEYS */ + #endif /* __ASSEMBLY__ */ #endif /* _ASM_POWERPC_PAGE_H */ diff --git a/arch/x86/include/asm/page.h b/arch/x86/include/asm/page.h index d18e5c332cb9..b770db1a21e7 100644 --- a/arch/x86/include/asm/page.h +++ b/arch/x86/include/asm/page.h @@ -87,5 +87,15 @@ static __always_inline u64 __is_canonical_address(u64 vaddr, u8 vaddr_bits) #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA +#if defined(CONFIG_ARCH_HAS_PKEYS) +# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_0 +/* A protection key is a 4-bit value */ +# define VM_PKEY_BIT0 VM_HIGH_ARCH_0 +# define VM_PKEY_BIT1 VM_HIGH_ARCH_1 +# define VM_PKEY_BIT2 VM_HIGH_ARCH_2 +# define VM_PKEY_BIT3 VM_HIGH_ARCH_3 +# define VM_PKEY_BIT4 0 +#endif /* CONFIG_ARCH_HAS_PKEYS */ + #endif /* __KERNEL__ */ #endif /* _ASM_X86_PAGE_H */ diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c index ef2eb12906da..8c2790abeffb 100644 --- a/fs/proc/task_mmu.c +++ b/fs/proc/task_mmu.c @@ -691,7 +691,9 @@ static void show_smap_vma_flags(struct seq_file *m, struct vm_area_struct *vma) [ilog2(VM_PKEY_BIT0)] = "", [ilog2(VM_PKEY_BIT1)] = "", [ilog2(VM_PKEY_BIT2)] = "", +#if VM_PKEY_BIT3 [ilog2(VM_PKEY_BIT3)] = "", +#endif #if VM_PKEY_BIT4 [ilog2(VM_PKEY_BIT4)] = "", #endif diff --git a/include/linux/mm.h b/include/linux/mm.h index 418d26608ece..47f42d9893fe 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h @@ -328,19 +328,6 @@ extern unsigned int kobjsize(const void *objp); #define VM_HIGH_ARCH_5 BIT(VM_HIGH_ARCH_BIT_5) #endif /* CONFIG_ARCH_USES_HIGH_VMA_FLAGS */ -#ifdef CONFIG_ARCH_HAS_PKEYS -# define VM_PKEY_SHIFT VM_HIGH_ARCH_BIT_0 -# define VM_PKEY_BIT0 VM_HIGH_ARCH_0 /* A protection key is a 4-bit value */ -# define VM_PKEY_BIT1 VM_HIGH_ARCH_1 /* on x86 and 5-bit value on ppc64 */ -# define VM_PKEY_BIT2 VM_HIGH_ARCH_2 -# define VM_PKEY_BIT3 VM_HIGH_ARCH_3 -#ifdef CONFIG_PPC -# define VM_PKEY_BIT4 VM_HIGH_ARCH_4 -#else -# define VM_PKEY_BIT4 0 -#endif -#endif /* CONFIG_ARCH_HAS_PKEYS */ - #ifdef CONFIG_X86_USER_SHADOW_STACK /* * VM_SHADOW_STACK should not be set with VM_SHARED because of lack of From patchwork Fri Nov 24 16:34:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467925 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C900EC61D97 for ; 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imf07.hostedemail.com; dkim=none; spf=pass (imf07.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com; dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 894A41BCA; Fri, 24 Nov 2023 08:36:33 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DA01D3F73F; Fri, 24 Nov 2023 08:35:44 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 10/25] arm64: mask out POIndex when modifying a PTE Date: Fri, 24 Nov 2023 16:34:55 +0000 Message-Id: <20231124163510.1835740-11-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: C614340002 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: pj6y3yjcfcdjt4ukyjqp11ryjbc7h6p1 X-HE-Tag: 1700843747-205113 X-HE-Meta: U2FsdGVkX1/YYCMf6TezFH+GhZriuvXcxMH4UncWkK4BmzG0/BvBCY6/GvOrHviszb3f1ZYqVzR/Y85r0MVduaquQckaeS26hgatCboxnFP8547h2xTnDTTBQRwdjZm/ctkV8PMmrRPiJeCy0T7pZONe3uQQlhWr3ghCYDPp/qouVWF1MsqzKpL3ohg5r/AxV47k1cGAZueqVSY9IQFKf2jfkTDWCi98UNM7gncEqcyYfKMpQyNJ7LXX69ktC3+enB5to/3LMB2wCT5SzmwJ5BC627zrd5bCqNeaCfe8hBvOtaGdUK6NEUuMs3NgFcn0u/9OyPJ+aPyrd0n6BjxjDqQ6WPk3g5RRhKX5mw6/axpWPUdmHjeQfUYJOWKqSzsZP76V3MIBgeic+txSavJUYM9CglY1bAvo/Csl3Q02WO7Y90fC/HKOvtlKxgZG5lfRHqc24ypWxGXYnInh3zA/O38D0Z95H/ffdR2ng36t6Ptnyy7dpVuaBchZRkrxYnMST+JmnBAPUQHtiFuFVuAhgmrkRDQz4ZYm/kSrlKN+OaUnsY9krQGvRTHJ9Xd1wao/ikjwr0jr3GCqrswPiz1Uz6vp/JiH2D/ETvTMFux0lL4a/vxP/PGfSDioq94D7u/ksumUmibQufecQCFHOPcMmTZU9sbzB/4z9DoHFvjk0mPU/9WGD+QMnbZTzFf+QbZzTltEAbuxNtwGWJr6kCGlIvjtZiAx8WTtf0szelMVLOg4pfsq+syltdTDxTQ1okSXwQ8PsoEUiXYJOzOPkbx/KPqXoM1brHh/sgBuHKSPxzEpfRNV45MSwldOLUdSX6gFYYcJfwfkfoiZLi+oHYRbKpL8oBZbuseLMDuTLP3KAGsYJn+inF+IunXRzYbjH5oeRZyFd0TZpCyiheeojJNLxVh+hRKVwflJYM6wZwLaYWRjBCz+svnxJFzqz66OvBq+V4jXk0K1EVJssJ5y/lE TXkoGDSj /WuL4sqN5gleICnEJmYENKgTRMGQTuLYk3tQGEiwqihkqNNTYEzOKej+r7AT+NYSChyD6hLls3TZszHFgWSQG33AF0t8E/CycfBvM9kqu/L36iPlJEx0m1gtUnpU+w2RhyU+QljEaj3zSekluSsSnKTLloIlVC+zkeO9pn7kFrUklXCLaNT5nmY2cp4F+Fx8kf4D3yMkKr7G9qVkzlZliqzXLdA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: When a PTE is modified, the POIndex must be masked off so that it can be modified. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Catalin Marinas --- arch/arm64/include/asm/pgtable.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index b19a8aee684c..e45105336ca0 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -828,7 +828,8 @@ static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) */ const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | PTE_PROT_NONE | PTE_VALID | PTE_WRITE | PTE_GP | - PTE_ATTRINDX_MASK; + PTE_ATTRINDX_MASK | PTE_PO_IDX_MASK; + /* preserve the hardware dirty information */ if (pte_hw_dirty(pte)) pte = set_pte_bit(pte, __pgprot(PTE_DIRTY)); From patchwork Fri Nov 24 16:34:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467926 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 62223C61D97 for ; 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imf01.hostedemail.com; dkim=none; spf=pass (imf01.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com; dmarc=pass (policy=none) header.from=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F250B1063; Fri, 24 Nov 2023 08:36:35 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4F11B3F73F; Fri, 24 Nov 2023 08:35:47 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 11/25] arm64: enable ARCH_HAS_PKEYS on arm64 Date: Fri, 24 Nov 2023 16:34:56 +0000 Message-Id: <20231124163510.1835740-12-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Stat-Signature: mj7er699o5hgxjnf3xqa165ftyd4yy3e X-Rspamd-Server: rspam10 X-Rspamd-Queue-Id: 387BA4000C X-Rspam-User: X-HE-Tag: 1700843750-48607 X-HE-Meta: U2FsdGVkX19QdAeTlyCyCZawt9Rfehq8yQNbF9pFhCo5kuoOMHsQvaCXGqZx8a7/+cQ1LRPpAnv13MU6PzvUFig7nFNtugKyduDGs5k1E+x2OX+9Pu+Vgod3Zpg7N4/2Pm3Xy5AXOBkglDX04Lof7sr6KUnyt7AOHTcKsqXgKNRSQ+VoEhnPzBHU2gelNBmYmcRwcmxRbJOPIko5/bsoL6XIouTULvw/JAjuX2Q0ECtk5TMbQur2BMf0+CD/jgGvREr7YRlIyGPIKO8/2M8zZ5NjYz4d2dY3f777sV0Ie49egsTGtE9h+ReAvdFxF2zMOy+ZgmtbKqvw3IgXRdU/9I6auMxO7fyir9x1ipRejZi0786iI22D9laRA+PrLeDtHfU0cHAo7chm0D6TTWp0Eodn8yeT0t+WA9dcTPsppxNP53ir99IDp7y495+E3Y1J+Y04Z5wZzrQvHDOd23sHCWqbnXynbLpn52ZhzM3t72Fft7Rnx0CMyMylbcV2utYCcLVUiCj+kkErq33LoNh6p4+kR7WQPw1aZtVBNirX6Yq4BiXTrNJ2kupX20Ni51VgJX6thQGulViLUqysC+n5firaoxMlpsGOW1cKBGqoEk8FKgVb2s+7s/xFlokIRDRzzEnEFLymQunbEBsMYKIayOVr5tdjUIp9A8X/K6mBFWBAIhLfOJDsBd8Zs1ywEqSWp84Ed8OglVl6YKvwBoTmkeY2sG7gXMUp9wamAjudTi4gOesnpyU7BedRxu+OTf3ZFPGK1g5Jv9UoJ59S1vvlF9eXPKXSyxi4FtrCn03zShNFcCvdceeExknIsA9P7J1Tl63FWHlQULoB0J7wufcnnai4crYlnTZR/oCeODfMdmFgAfSdHt2zDs922xkQ2JBk/uIEhbUwZ8OIwsp61dR4Xucbi83RD91En1+P7o/+5eWIE6KG2kM0kOGsltBu4ghw3NMpi6oka5aYRptI+Zg hyuGScG1 n8i5KSmlmb61UThqnbFxYcIbp8aRenLvjKin0t3CVsxE7aRsFM5m9C3U4GMPUh5PaWX2im84RhvgUEB+77beNZAo4S42iPghO0fBZ07qVGabLc9o73lW5y7eN1H6QJV70M8JpDLfjnHK8yCPBoytnuszLd45dmII9vRBNKPdMhlGkaURTuy82SjtjQ5vhvA8d731z5kYfNBkjozjzGla2LaFdgzfBH5z0HdTJ81euCSWTOHuJSRccHuhNvf9cppg8/xK0G4PbsFlsCgY= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Enable the ARCH_HAS_PKEYS config, but provide dummy functions for the entire interface. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/Kconfig | 2 ++ arch/arm64/include/asm/pkeys.h | 54 ++++++++++++++++++++++++++++++++++ arch/arm64/mm/mmu.c | 7 +++++ 3 files changed, 63 insertions(+) create mode 100644 arch/arm64/include/asm/pkeys.h diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index d7df6c603190..72a71a9834dd 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2082,6 +2082,8 @@ menu "ARMv8.9 architectural features" config ARM64_POE prompt "Permission Overlay Extension" def_bool y + select ARCH_USES_HIGH_VMA_FLAGS + select ARCH_HAS_PKEYS help The Permission Overlay Extension is used to implement Memory Protection Keys. Memory Protection Keys provides a mechanism for diff --git a/arch/arm64/include/asm/pkeys.h b/arch/arm64/include/asm/pkeys.h new file mode 100644 index 000000000000..5761fb48fd53 --- /dev/null +++ b/arch/arm64/include/asm/pkeys.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Arm Ltd. + * + * Based on arch/x86/include/asm/pkeys.h +*/ + +#ifndef _ASM_ARM64_PKEYS_H +#define _ASM_ARM64_PKEYS_H + +#define ARCH_VM_PKEY_FLAGS (VM_PKEY_BIT0 | VM_PKEY_BIT1 | VM_PKEY_BIT2) + +#define arch_max_pkey() 0 + +int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, + unsigned long init_val); + +static inline bool arch_pkeys_enabled(void) +{ + return false; +} + +static inline int vma_pkey(struct vm_area_struct *vma) +{ + return -1; +} + +static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma, + int prot, int pkey) +{ + return -1; +} + +static inline int execute_only_pkey(struct mm_struct *mm) +{ + return -1; +} + +static inline bool mm_pkey_is_allocated(struct mm_struct *mm, int pkey) +{ + return false; +} + +static inline int mm_pkey_alloc(struct mm_struct *mm) +{ + return -1; +} + +static inline int mm_pkey_free(struct mm_struct *mm, int pkey) +{ + return -EINVAL; +} + +#endif /* _ASM_ARM64_PKEYS_H */ diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 15f6347d23b6..f7bf41eae904 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -1486,3 +1486,10 @@ void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte { set_pte_at(vma->vm_mm, addr, ptep, pte); } + +#ifdef CONFIG_ARCH_HAS_PKEYS +int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val) +{ + return -ENOSPC; +} +#endif From patchwork Fri Nov 24 16:34:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13D67C61D97 for ; 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s=arc-20220608; d=hostedemail.com; t=1700843752; a=rsa-sha256; cv=none; b=t27bWqBZLW6PTAji3702hOy3XIt3xGyXAhRVu3D9a/hIjNEE4DThBH/9W5l8R5VhL+XjQY Mssk7fYCO1Xjxcnu1tl592vKFM44QryGEXITG9XMsh9/7+iJ09BpBfOsG69N0KYOytvbZW a/tODNlH9oMmTgimXTt5xT2sGx9iKIU= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6891B1BD0; Fri, 24 Nov 2023 08:36:38 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B89F93F73F; Fri, 24 Nov 2023 08:35:49 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 12/25] arm64: handle PKEY/POE faults Date: Fri, 24 Nov 2023 16:34:57 +0000 Message-Id: <20231124163510.1835740-13-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 9908D180011 X-Stat-Signature: 5ezsh3h4sk9nwn8fdf374re8cop7xajs X-HE-Tag: 1700843752-713673 X-HE-Meta: U2FsdGVkX18C+R5iKva4B4mSV1IOw2/kqqE2dJTul4Sb2ut3y8dozafxTtZqS9+PYxxLw+BgB9T8NA+hjazae90S1rinlByjA3VWyk7/OB+W8Zbz29GRetal0UjAqMsNaK5jNTiYe9JnzdW05IX5FT5tMEYOLeAJszTAWuZVwxr8vxpvRWcIS1z8pwhji+6w6VrRwVefU9LbfC2ObftDPw5d1mbUFn5+aqNsGVL2ZPYKgBkPe9LuJ/rKf1sHwZAEo9l81PRl1IfXiJTgQ8wiTJ4opi2nuj7y80J57HpZj/tweg/IKVQ/Gucdaf+cfgH+UVXWbqmLA2PBuS5hSESyg4Lfkhbo417Iu+3K65TF9mmzSuHLJWMt1oe9pFHT0N5qjtgUuW7kyn6pfdtQzDttKqb5hR3U+MiSzb7Qe8nzfRsdbc2iusnstEBjRMD1C1iJw+eQZWFGmINqE4vOe84HrMZAIIC0Q+A8gThv5TUX4XOr9k0RUxbwK0usKwdMH6uwT/d92WifxCbwrN6vtEr5dZ0Q0AzKO+UiR2Vpk1aJO0GSsTs+czOMP4fIS7JlFfM2GOYTsNVW9xRZZqGgT6oSlHTIXaWJ6wXbWP1F0hx9+ctGNpHPcgvPcNFeYe1q1RcrRDFzEsbfvuGm27qztGca1yWKvHJbFgvxOzk5D0ob8m/Sgqt8ryHR3C9u1+dHfQIJPQWkqEnTpJ8g/sIvKKA04LnENQF9I9SsC9iISJWd1W/Nl8BN9CToMIKRE+bM8eajRmSezgTogYJF8DgwvK6qT+xTIlNPwcrcFHjdNzi5bPbr/xSufQhKaTJ23R28kzEqzHhxkr4DJK7cXnxPQ8BORdpgjBqcqMjm2SPs7KIyNCEqnvNvv9DR6jtD4vESB+wy8jwQepXwdOGheSrlMgbBFt2R5sSqkKZlbjVv9GpPee/xb+szeSznl3M7wKw+D2zMzo94JL5TUz6yQn0PyOw K1XhIgl4 Cl9gYAeZ/sJzPHbr2vlTOVt+HpEnhLlHXpE3jpN9Xfjci4NTkI5Mu73a8PDwm6DMIykIJ5nOq0XPUmGkB9WpMlUxKboifOXHBjbGRRZmx2f1CsY91U3yjbc9cwD7wcjgV6TGGcHUMUEW8FlrCe7hy3FxUA3TrA7kGO1wL8X9X9NK2RjEa6zgY/3O7PvL5KiM5sr+m3yEydglgl/AlXi0SRH/uDp41XpgKAM9F X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: If a memory fault occurs that is due to an overlay/pkey fault, report that to userspace with a SEGV_PKUERR. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/traps.h | 1 + arch/arm64/kernel/traps.c | 12 ++++++++-- arch/arm64/mm/fault.c | 44 +++++++++++++++++++++++++++++++--- 3 files changed, 52 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/traps.h b/arch/arm64/include/asm/traps.h index eefe766d6161..f6f6f2cb7f10 100644 --- a/arch/arm64/include/asm/traps.h +++ b/arch/arm64/include/asm/traps.h @@ -25,6 +25,7 @@ try_emulate_armv8_deprecated(struct pt_regs *regs, u32 insn) void force_signal_inject(int signal, int code, unsigned long address, unsigned long err); void arm64_notify_segfault(unsigned long addr); void arm64_force_sig_fault(int signo, int code, unsigned long far, const char *str); +void arm64_force_sig_fault_pkey(int signo, int code, unsigned long far, const char *str, int pkey); void arm64_force_sig_mceerr(int code, unsigned long far, short lsb, const char *str); void arm64_force_sig_ptrace_errno_trap(int errno, unsigned long far, const char *str); diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 215e6d7f2df8..1bac6c84d3f5 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -263,16 +263,24 @@ static void arm64_show_signal(int signo, const char *str) __show_regs(regs); } -void arm64_force_sig_fault(int signo, int code, unsigned long far, - const char *str) +void arm64_force_sig_fault_pkey(int signo, int code, unsigned long far, + const char *str, int pkey) { arm64_show_signal(signo, str); if (signo == SIGKILL) force_sig(SIGKILL); + else if (code == SEGV_PKUERR) + force_sig_pkuerr((void __user *)far, pkey); else force_sig_fault(signo, code, (void __user *)far); } +void arm64_force_sig_fault(int signo, int code, unsigned long far, + const char *str) +{ + arm64_force_sig_fault_pkey(signo, code, far, str, 0); +} + void arm64_force_sig_mceerr(int code, unsigned long far, short lsb, const char *str) { diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 460d799e1296..efd263f56da7 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include @@ -497,6 +498,23 @@ static void do_bad_area(unsigned long far, unsigned long esr, #define VM_FAULT_BADMAP ((__force vm_fault_t)0x010000) #define VM_FAULT_BADACCESS ((__force vm_fault_t)0x020000) +static bool fault_from_pkey(unsigned long esr, struct vm_area_struct *vma, + unsigned int mm_flags) +{ + unsigned long iss2 = ESR_ELx_ISS2(esr); + + if (!arch_pkeys_enabled()) + return false; + + if (iss2 & ESR_ELx_Overlay) + return true; + + return !arch_vma_access_permitted(vma, + mm_flags & FAULT_FLAG_WRITE, + mm_flags & FAULT_FLAG_INSTRUCTION, + mm_flags & FAULT_FLAG_REMOTE); +} + static vm_fault_t __do_page_fault(struct mm_struct *mm, struct vm_area_struct *vma, unsigned long addr, unsigned int mm_flags, unsigned long vm_flags, @@ -688,9 +706,29 @@ static int __kprobes do_page_fault(unsigned long far, unsigned long esr, * Something tried to access memory that isn't in our memory * map. */ - arm64_force_sig_fault(SIGSEGV, - fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR, - far, inf->name); + int fault_kind; + /* + * The pkey value that we return to userspace can be different + * from the pkey that caused the fault. + * + * 1. T1 : mprotect_key(foo, PAGE_SIZE, pkey=4); + * 2. T1 : set AMR to deny access to pkey=4, touches, page + * 3. T1 : faults... + * 4. T2: mprotect_key(foo, PAGE_SIZE, pkey=5); + * 5. T1 : enters fault handler, takes mmap_lock, etc... + * 6. T1 : reaches here, sees vma_pkey(vma)=5, when we really + * faulted on a pte with its pkey=4. + */ + int pkey = vma_pkey(vma); + + if (fault_from_pkey(esr, vma, mm_flags)) + fault_kind = SEGV_PKUERR; + else + fault_kind = fault == VM_FAULT_BADACCESS ? SEGV_ACCERR : SEGV_MAPERR; + + arm64_force_sig_fault_pkey(SIGSEGV, + fault_kind, + far, inf->name, pkey); } return 0; From patchwork Fri Nov 24 16:34:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467928 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C88D2C61D97 for ; Fri, 24 Nov 2023 16:35:59 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 1D3A86B02BE; Fri, 24 Nov 2023 11:35:57 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 06E466B02C3; Fri, 24 Nov 2023 11:35:56 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id DD9136B02C5; Fri, 24 Nov 2023 11:35:56 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0014.hostedemail.com [216.40.44.14]) by kanga.kvack.org (Postfix) with ESMTP id CB0456B02BE for ; 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Fri, 24 Nov 2023 08:35:52 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 13/25] arm64: stop using generic mm_hooks.h Date: Fri, 24 Nov 2023 16:34:58 +0000 Message-Id: <20231124163510.1835740-14-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 005BF4000C X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: mq91jnhjed1bju8oiwq964iirtgs84me X-HE-Tag: 1700843754-945663 X-HE-Meta: U2FsdGVkX1/+fO3Nd3SGXCmLNFxxzCdBcIg9ydXMoD2OP2IV/DGLz+LKUvzJjk/5AL8p8/T45hP27PoOmjD+i3d0vlSskY0YvsflWGsgKfy9yOO4mjdVoBZwf/QOe79zg3IxadKleiZxeaDJylAY5l02VRJWH45WWV/t9ND4DKhHexSapSu4C0J6w1JqX8MRAUGfIXzAXzKKr7XjcvalgEagn9sP1u3ILQK1aVeuqxF0Zpax6ht6sOS41txXxuSCvG0VKKTC3SDjFti05mCBTGlyYs21sLSE+uGl6vav0kMIMfYdQfBH+M/8zL/mZMvU7pV1rau9dCrQJp24TEYmewofVKnP+FjlvZQNyPZuWG/Ft6Yxz2V5fvqAKbykFOalzCw5DNizRyN8+EoY88QlHUH078x1MR9XxJUHwc97acBOktaRUldwjeLIUMaygO8zAWI8JyLdoh0TmvKULkWi3blCLv+b/eejpJK20Zz5FnDQD43HTkRX9ZLSk/JwBPq1RuACwULTEBNIhV3GGeCPqaQWjHpHgIT1IHrnt0ZocjuMLs3atlkiH6cgHhQni4bUAG897CIuAzQE8R1RZu58zIrraFDcPk/A4rryPnFuOF2DWEEyZWxzX6pjQ3srmVwUOzezan6OjObFwt8518YNWeUvGi6tBOKk9p5kA1o4NtylWIxuKrBaA/zgW+jt+R2nZLwjCYf08MKBqud/dGXmb5Dt2GsbN7LXGASPUMkLfkBgbSl1IvLx6t8HLLIBK2wFGwoaRV1NRq8vnROSweorQdtJxaA2Dsou92841+aROTQ+naQLMMw4jPr1DpNFVt0ECgA9h5dARqO87D5mlBX6j20FI9vmuxNoE8irwFIXxDlAzcKwSlsThvkCWlC9OSZ5PwxD7D7Ho5zVsWJsuUaSgN/xW74Na/I5jirXqbu1rEFFV86S6BUIPm0cBbWX65d3qi0vKapThIEKlcBzghV GontRikE qG78spXRsn/PKDxKOEbMNJw7THNZQVeG5r5qrn2qMfQFHRUy9Cg8EW873b7DEqWGElPHBnlZl+a2FJYJAYthtbGHr5DGTb3bZc3uCVzgW3JOHFezP3PwQOCQVe9QNg/HSI6WOlTarx4jyVb5jXda7HjSFjJioTf2oRXPOPUiJVWA5oBFUsW3JdVXuEpPA3f+ohctvRppQ2LJhc9Zd7gnOZbgEHMJbz98iUsuMvkgAbJ8K73e1DS3yBG5XkHKd6HzclwKZXXIeujPHQR0= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: These functions will be extended to support pkeys. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/mmu_context.h | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 9ce4200508b1..16b48fe9353f 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include @@ -215,6 +214,20 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm) return 0; } +static inline int arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) +{ + return 0; +} + +static inline void arch_exit_mmap(struct mm_struct *mm) +{ +} + +static inline void arch_unmap(struct mm_struct *mm, + unsigned long start, unsigned long end) +{ +} + #ifdef CONFIG_ARM64_SW_TTBR0_PAN static inline void update_saved_ttbr0(struct task_struct *tsk, struct mm_struct *mm) @@ -304,6 +317,12 @@ static inline unsigned long mm_untag_mask(struct mm_struct *mm) return -1UL >> 8; } +static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, + bool write, bool execute, bool foreign) +{ + return true; +} + #include #endif /* !__ASSEMBLY__ */ From patchwork Fri Nov 24 16:34:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467929 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22442C61D97 for ; Fri, 24 Nov 2023 16:36:02 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id B412D6B02CC; Fri, 24 Nov 2023 11:35:59 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id AF22A6B02CE; Fri, 24 Nov 2023 11:35:59 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 945D16B02D1; Fri, 24 Nov 2023 11:35:59 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 7C02F6B02CC for ; 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Fri, 24 Nov 2023 08:35:54 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 14/25] arm64: implement PKEYS support Date: Fri, 24 Nov 2023 16:34:59 +0000 Message-Id: <20231124163510.1835740-15-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: 8689E4000C X-Stat-Signature: rkq4wud33jc95gspu5t57bt8jwof41ut X-Rspam-User: X-HE-Tag: 1700843757-432739 X-HE-Meta: U2FsdGVkX1869lP2dQkP/DusD5CYRTbkMvL584OPL2pfUWP64D4614VWv6M4TpIMsQgRhy/hPqVcK8NockoUAaGInlPhWMpFGxkZv+WBFDbM+Xhky6iwx/ztk0hFH2Jg2aSZ15eug/YC5HvGGX+mjIBOoguNuHMBjqoSJsAvknH9OPUgJLtv22uvSd+2P7ywfvDiipFB3wKcaSNs8P3/QELJ+cxeLbDttI3TlMMILcH0oqD3aAAnmQ6PmH5D+ESrXP11pWadB3ydwEAksG9g5LmDvI35dLG+ZHR5c6JeQXomXE0eTn0DypVeKO8VowXSENPl/IMrBiHGx597fm0DSkaby+bo4HOL0qsXSaGoV9nHG2UIsOJVmPopeKVwoPK3CeQwTXSQgR7mS0YNBfdvIFLTdIsyo2cZk+LU7d5v7tuTnqM/GS6DLiKs8se4bGIMJqxjSp4yb2J+TUs1HP8dqwaUYHBR060HsvVi8vYjHuLIBXouMSKJaSHD7Yx6OefjpoAGsehYt6UES2pPd0YexqzHqzHS2l3VvvUJvjgkdSa4vH5egVUgkPnD3MxpOs84nZfWEm9o5xQhbPvz9U/Sw4K+mCg05QCR2bjdNuKImlLyStEHiDCmv1PMfOLwDCaTXG5RWcBh6qXyy8yMQ/RRYMaqhc/r5sHGi9rboXMRut5ORWfeaeGNvSMjNHNABTZDhdu7rGqHs36eO+t67KXbvLoo0tHOs1JekUkQ3AXgDvGHP9DWdsbsJiKqYNk0nANQWN5bB+0fCIevMydi/PKGs+/jadXUqqp4ULaIhE9ljzL3HQE6Puz3nloE5IS0M7Xgzopb4oQbMAW2OCtJpOR/HN+7LGqd1ArelyrNt5ztHioislnOOyw/1qoHTT8zO7vM5veuVB+/y/xrn9bPoMKyp6CNL+xOlgfsb3eclcFABtjCP+vCu4yFvOVCgUGUNgY4GlE+vVyqawRHKNoxVGE kVqdHjtM e3oyM3jdx3GFGUNKAZR5LJOmMwNExXPdrabOm3d0kB/fOR1vI1y3Ln3OeP2Xuxb5psaq1ShgU15EJ7NTidZEUeM3ugog4jVB0WYjJYWyYuLb6CONOFpCyMRMQaZEE/H7mZ/wrYhtUBgqhSHO4i+PyGxisN8KpEhHZrLzvXTbFQ23OWkmZkWOYc/uQ6ucnNIp2ZkIw7mftsG0gMHfRBoT9AAFS+wZEnkdDY2no X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Implement the PKEYS interface, using the Permission Overlay Extension. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/mmu.h | 2 + arch/arm64/include/asm/mmu_context.h | 32 ++++++++++++- arch/arm64/include/asm/pgtable.h | 23 +++++++++- arch/arm64/include/asm/pkeys.h | 68 +++++++++++++++++++++++++--- arch/arm64/include/asm/por.h | 33 ++++++++++++++ arch/arm64/mm/mmu.c | 35 +++++++++++++- 6 files changed, 184 insertions(+), 9 deletions(-) create mode 100644 arch/arm64/include/asm/por.h diff --git a/arch/arm64/include/asm/mmu.h b/arch/arm64/include/asm/mmu.h index 2fcf51231d6e..55338b14b453 100644 --- a/arch/arm64/include/asm/mmu.h +++ b/arch/arm64/include/asm/mmu.h @@ -25,6 +25,8 @@ typedef struct { refcount_t pinned; void *vdso; unsigned long flags; + + u8 pkey_allocation_map; } mm_context_t; /* diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 16b48fe9353f..3fc739fb831c 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -211,11 +212,24 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm) { atomic64_set(&mm->context.id, 0); refcount_set(&mm->context.pinned, 0); + + // pkey 0 is the default, so always reserve it. + mm->context.pkey_allocation_map = 0x1; + return 0; } +static inline void arch_dup_pkeys(struct mm_struct *oldmm, + struct mm_struct *mm) +{ + /* Duplicate the oldmm pkey state in mm: */ + mm->context.pkey_allocation_map = oldmm->context.pkey_allocation_map; +} + static inline int arch_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm) { + arch_dup_pkeys(oldmm, mm); + return 0; } @@ -317,10 +331,26 @@ static inline unsigned long mm_untag_mask(struct mm_struct *mm) return -1UL >> 8; } +/* + * We only want to enforce protection keys on the current process + * because we effectively have no access to POR_EL0 for other + * processes or any way to tell *which * POR_EL0 in a threaded + * process we could use. + * + * So do not enforce things if the VMA is not from the current + * mm, or if we are in a kernel thread. + */ static inline bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write, bool execute, bool foreign) { - return true; + if (!arch_pkeys_enabled()) + return true; + + /* allow access if the VMA is not one from this process */ + if (foreign || vma_is_foreign(vma)) + return true; + + return por_el0_allows_pkey(vma_pkey(vma), write, execute); } #include diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index e45105336ca0..789c88b138f5 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -143,6 +144,24 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys) #define pte_accessible(mm, pte) \ (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid(pte)) +static inline bool por_el0_allows_pkey(u8 pkey, bool write, bool execute) +{ + u64 por; + + if (!system_supports_poe()) + return true; + + por = read_sysreg_s(SYS_POR_EL0); + + if (write) + return por_elx_allows_write(por, pkey); + + if (execute) + return por_elx_allows_exec(por, pkey); + + return por_elx_allows_read(por, pkey); +} + /* * p??_access_permitted() is true for valid user mappings (PTE_USER * bit set, subject to the write permission check). For execute-only @@ -151,7 +170,9 @@ static inline pteval_t __phys_to_pte_val(phys_addr_t phys) * PTE_VALID bit set. */ #define pte_access_permitted(pte, write) \ - (((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) && (!(write) || pte_write(pte))) + (((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER)) && \ + (!(write) || pte_write(pte)) && \ + por_el0_allows_pkey(FIELD_GET(PTE_PO_IDX_MASK, pte_val(pte)), write, false)) #define pmd_access_permitted(pmd, write) \ (pte_access_permitted(pmd_pte(pmd), (write))) #define pud_access_permitted(pud, write) \ diff --git a/arch/arm64/include/asm/pkeys.h b/arch/arm64/include/asm/pkeys.h index 5761fb48fd53..a80c654da93d 100644 --- a/arch/arm64/include/asm/pkeys.h +++ b/arch/arm64/include/asm/pkeys.h @@ -10,7 +10,7 @@ #define ARCH_VM_PKEY_FLAGS (VM_PKEY_BIT0 | VM_PKEY_BIT1 | VM_PKEY_BIT2) -#define arch_max_pkey() 0 +#define arch_max_pkey() 7 int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val); @@ -22,33 +22,89 @@ static inline bool arch_pkeys_enabled(void) static inline int vma_pkey(struct vm_area_struct *vma) { - return -1; + return (vma->vm_flags & ARCH_VM_PKEY_FLAGS) >> VM_PKEY_SHIFT; } static inline int arch_override_mprotect_pkey(struct vm_area_struct *vma, int prot, int pkey) { - return -1; + if (pkey != -1) + return pkey; + + return vma_pkey(vma); } static inline int execute_only_pkey(struct mm_struct *mm) { + // Execute-only mappings are handled by EPAN/FEAT_PAN3. + WARN_ON_ONCE(!cpus_have_final_cap(ARM64_HAS_EPAN)); + return -1; } +#define mm_pkey_allocation_map(mm) (mm->context.pkey_allocation_map) +#define mm_set_pkey_allocated(mm, pkey) do { \ + mm_pkey_allocation_map(mm) |= (1U << pkey); \ +} while (0) +#define mm_set_pkey_free(mm, pkey) do { \ + mm_pkey_allocation_map(mm) &= ~(1U << pkey); \ +} while (0) + static inline bool mm_pkey_is_allocated(struct mm_struct *mm, int pkey) { - return false; + /* + * "Allocated" pkeys are those that have been returned + * from pkey_alloc() or pkey 0 which is allocated + * implicitly when the mm is created. + */ + if (pkey < 0) + return false; + if (pkey >= arch_max_pkey()) + return false; + + return mm_pkey_allocation_map(mm) & (1U << pkey); } +/* + * Returns a positive, 3-bit key on success, or -1 on failure. + */ static inline int mm_pkey_alloc(struct mm_struct *mm) { - return -1; + /* + * Note: this is the one and only place we make sure + * that the pkey is valid as far as the hardware is + * concerned. The rest of the kernel trusts that + * only good, valid pkeys come out of here. + */ + u8 all_pkeys_mask = ((1U << arch_max_pkey()) - 1); + int ret; + + if (!arch_pkeys_enabled()) + return -1; + + /* + * Are we out of pkeys? We must handle this specially + * because ffz() behavior is undefined if there are no + * zeros. + */ + if (mm_pkey_allocation_map(mm) == all_pkeys_mask) + return -1; + + ret = ffz(mm_pkey_allocation_map(mm)); + + mm_set_pkey_allocated(mm, ret); + + return ret; } static inline int mm_pkey_free(struct mm_struct *mm, int pkey) { - return -EINVAL; + if (!mm_pkey_is_allocated(mm, pkey)) + return -EINVAL; + + mm_set_pkey_free(mm, pkey); + + return 0; } #endif /* _ASM_ARM64_PKEYS_H */ diff --git a/arch/arm64/include/asm/por.h b/arch/arm64/include/asm/por.h new file mode 100644 index 000000000000..90484dae9920 --- /dev/null +++ b/arch/arm64/include/asm/por.h @@ -0,0 +1,33 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Arm Ltd. +*/ + +#ifndef _ASM_ARM64_POR_H +#define _ASM_ARM64_POR_H + +#define POR_BITS_PER_PKEY 4 +#define POR_ELx_IDX(por_elx, idx) (((por_elx) >> (idx * POR_BITS_PER_PKEY)) & 0xf) + +static inline bool por_elx_allows_read(u64 por, u8 pkey) +{ + u8 perm = POR_ELx_IDX(por, pkey); + + return perm & POE_R; +} + +static inline bool por_elx_allows_write(u64 por, u8 pkey) +{ + u8 perm = POR_ELx_IDX(por, pkey); + + return perm & POE_W; +} + +static inline bool por_elx_allows_exec(u64 por, u8 pkey) +{ + u8 perm = POR_ELx_IDX(por, pkey); + + return perm & POE_X; +} + +#endif /* _ASM_ARM64_POR_H */ diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index f7bf41eae904..c255345e6a6a 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include @@ -1490,6 +1491,38 @@ void ptep_modify_prot_commit(struct vm_area_struct *vma, unsigned long addr, pte #ifdef CONFIG_ARCH_HAS_PKEYS int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, unsigned long init_val) { - return -ENOSPC; + u64 new_por = POE_RXW; + u64 old_por; + u64 pkey_shift; + + if (!arch_pkeys_enabled()) + return -ENOSPC; + + /* + * This code should only be called with valid 'pkey' + * values originating from in-kernel users. Complain + * if a bad value is observed. + */ + if (WARN_ON_ONCE(pkey >= arch_max_pkey())) + return -EINVAL; + + /* Set the bits we need in POR: */ + if (init_val & PKEY_DISABLE_ACCESS) + new_por = POE_X; + else if (init_val & PKEY_DISABLE_WRITE) + new_por = POE_RX; + + /* Shift the bits in to the correct place in POR for pkey: */ + pkey_shift = pkey * POR_BITS_PER_PKEY; + new_por <<= pkey_shift; + + /* Get old POR and mask off any old bits in place: */ + old_por = read_sysreg_s(SYS_POR_EL0); + old_por &= ~(POE_MASK << pkey_shift); + + /* Write old part along with new part: */ + write_sysreg_s(old_por | new_por, SYS_POR_EL0); + + return 0; } #endif From patchwork Fri Nov 24 16:35:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467930 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE53AC61DF4 for ; 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s=arc-20220608; d=hostedemail.com; t=1700843760; a=rsa-sha256; cv=none; b=3MGez2EX9ckrp4twoW2T3OJrlOU9gOUcZMumST0zai9uZNzH7dR+q7qLu1PXw485Wtdn7w saJMQC22kDHtLcqqN6HY7Ab2Bov/w6TrXmVSSkQvn2ls1QaB70GeAGkdrozWj8wtIcK9L7 MaVyKfL915aX1ME1wjpjbiEDrGZNdhI= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CCD391BF7; Fri, 24 Nov 2023 08:36:45 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 28CEF3F73F; Fri, 24 Nov 2023 08:35:57 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 15/25] arm64: add POE signal support Date: Fri, 24 Nov 2023 16:35:00 +0000 Message-Id: <20231124163510.1835740-16-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Stat-Signature: psj8pke6k35dne1gd7zphxkgz5igeui7 X-Rspamd-Server: rspam07 X-Rspamd-Queue-Id: 0CF44C0024 X-HE-Tag: 1700843759-921534 X-HE-Meta: U2FsdGVkX19cvqPFhJLOT82a8OJD/EsevLwzOlU1SZTfqtsmnYqUa09zjsx9jM4rApJ+AgSGz2fimJfvr36nOIUSI2503LhpuEmvcRT42u9lymoHUr4ziip6i66/32KGKBwgKNT3yBY+uDCaZj1k3xIDikThBCKBQyWF6jtKWjiEuzAC8fkDGf+Jv+XnxG8lZALdth/r5bLvscdrXwtAOXRNElbgpl4GfVwcwoD2Fhn2+K00EIvvQB05x1u5DpOk//SJLXoWItUuNHWEP0QXADKDYzrSdy+zIPaobBQX1Iq2jZdRZRwx2q4XV3dIpS9yh9ymuAWpv/8YBR6VjioYOWNM7PoHpB89a9sVlrj4Zm1gWUralxmPVvBGbDERp6TnfkJdJSM93pSSWYkk6qLEUH4u02pjkS4o8ta4XyMvVLRD6xSa4bKlKfiZ2Y645A9vZ1GFqF3Lqsv70sgiu2Xgk0f+bZEDFfoVu01g8OhHUuzFz1Zu4Ay5O7HCN5G9bGlhXcwG0A07cL/rgL2gfytKvOgCFMqWxqmBKIsPrTN/J3Ir26KNweteeqkGVaDxXyGQvfszsmD7P4PGNho3zOOkpWZ87XwN6b2bGuSJJfYKDe/yQXzzyBG62I93iQi0bkJqgRVYf5rc2IeRCIH8LcjO2c+iprhEOuTblGGMHnsQSPa5n5NH8n7rdk3zoRZ2LVWgm9kaHaNheRgrUKNvkia4uaPCzhzdljmPJOAPsE2APXD7nZkJJL7Y1zmLfnoPv22qTpMJcZjgWHEZxdeWe+qTp0cunU2sLZ6OBDjYZBqu76+ryK8zdJPvoqSyrRoVwGfogij9uIDH2JCTQVsDBRUCVTLitNp7MCiqti0ROYDqzTvdBHV6wnraoT6QmkzBGBe0KUA3I/FvyPagc+Giz5KpKnpoNvkjQZsOCr3aMufW7tcR/W4OUfLZw2nm344e+VJbcobnjPF/W27S+d8s6H9 +iKEOX4e AZBej0QHjBE/el02SLagfT7HVvV/rm84a/MmmHWn8qJZ3aQtBELhyg+m28AMG66FvC2BWZa+s4QYeP+HIwKrMW3IKt+vXWKx+WoaQFxyFycX5jyfNUJUxr4qEJm6eBL4kdcY6OS7W6QQ+L5tPgmuQkyn4pie/xdzwoyjLXN7ux6icEyE8rLZ0kyvJUaqLPYix2hewhuNyShszI2Iozv2rricfjA0bZr6iG8Ma X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add PKEY support to signals, by saving and restoring POR_EL0 from the stackframe. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Mark Brown Acked-by: Szabolcs Nagy --- arch/arm64/include/uapi/asm/sigcontext.h | 7 ++++ arch/arm64/kernel/signal.c | 51 ++++++++++++++++++++++++ 2 files changed, 58 insertions(+) diff --git a/arch/arm64/include/uapi/asm/sigcontext.h b/arch/arm64/include/uapi/asm/sigcontext.h index f23c1dc3f002..cef85eeaf541 100644 --- a/arch/arm64/include/uapi/asm/sigcontext.h +++ b/arch/arm64/include/uapi/asm/sigcontext.h @@ -98,6 +98,13 @@ struct esr_context { __u64 esr; }; +#define POE_MAGIC 0x504f4530 + +struct poe_context { + struct _aarch64_ctx head; + __u64 por_el0; +}; + /* * extra_context: describes extra space in the signal frame for * additional structures that don't fit in sigcontext.__reserved[]. diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 0e8beb3349ea..379f364005bf 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -62,6 +62,7 @@ struct rt_sigframe_user_layout { unsigned long zt_offset; unsigned long extra_offset; unsigned long end_offset; + unsigned long poe_offset; }; #define BASE_SIGFRAME_SIZE round_up(sizeof(struct rt_sigframe), 16) @@ -182,6 +183,8 @@ struct user_ctxs { u32 za_size; struct zt_context __user *zt; u32 zt_size; + struct poe_context __user *poe; + u32 poe_size; }; static int preserve_fpsimd_context(struct fpsimd_context __user *ctx) @@ -227,6 +230,20 @@ static int restore_fpsimd_context(struct user_ctxs *user) return err ? -EFAULT : 0; } +static int restore_poe_context(struct user_ctxs *user) +{ + u64 por_el0; + int err = 0; + + if (user->poe_size != sizeof(*user->poe)) + return -EINVAL; + + __get_user_error(por_el0, &(user->poe->por_el0), err); + if (!err) + write_sysreg_s(por_el0, SYS_POR_EL0); + + return err; +} #ifdef CONFIG_ARM64_SVE @@ -590,6 +607,7 @@ static int parse_user_sigframe(struct user_ctxs *user, user->tpidr2 = NULL; user->za = NULL; user->zt = NULL; + user->poe = NULL; if (!IS_ALIGNED((unsigned long)base, 16)) goto invalid; @@ -640,6 +658,17 @@ static int parse_user_sigframe(struct user_ctxs *user, /* ignore */ break; + case POE_MAGIC: + if (!system_supports_poe()) + goto invalid; + + if (user->poe) + goto invalid; + + user->poe = (struct poe_context __user *)head; + user->poe_size = size; + break; + case SVE_MAGIC: if (!system_supports_sve() && !system_supports_sme()) goto invalid; @@ -812,6 +841,9 @@ static int restore_sigframe(struct pt_regs *regs, if (err == 0 && system_supports_sme2() && user.zt) err = restore_zt_context(&user); + if (err == 0 && system_supports_poe() && user.poe) + err = restore_poe_context(&user); + return err; } @@ -928,6 +960,13 @@ static int setup_sigframe_layout(struct rt_sigframe_user_layout *user, } } + if (system_supports_poe()) { + err = sigframe_alloc(user, &user->poe_offset, + sizeof(struct poe_context)); + if (err) + return err; + } + return sigframe_alloc_end(user); } @@ -968,6 +1007,15 @@ static int setup_sigframe(struct rt_sigframe_user_layout *user, __put_user_error(current->thread.fault_code, &esr_ctx->esr, err); } + if (system_supports_poe() && err == 0 && user->poe_offset) { + struct poe_context __user *poe_ctx = + apply_user_offset(user, user->poe_offset); + + __put_user_error(POE_MAGIC, &poe_ctx->head.magic, err); + __put_user_error(sizeof(*poe_ctx), &poe_ctx->head.size, err); + __put_user_error(read_sysreg_s(SYS_POR_EL0), &poe_ctx->por_el0, err); + } + /* Scalable Vector Extension state (including streaming), if present */ if ((system_supports_sve() || system_supports_sme()) && err == 0 && user->sve_offset) { @@ -1119,6 +1167,9 @@ static void setup_return(struct pt_regs *regs, struct k_sigaction *ka, sme_smstop(); } + if (system_supports_poe()) + write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0); + if (ka->sa.sa_flags & SA_RESTORER) sigtramp = ka->sa.sa_restorer; else From patchwork Fri Nov 24 16:35:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467931 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85331C61D97 for ; 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s=arc-20220608; d=hostedemail.com; t=1700843762; a=rsa-sha256; cv=none; b=V0AWsFkUjOzJy9KprLDs32fCxIuRAu2A8rjwZULwAD34pgkVJ5o7bk7aGOLgbvsV4Fhd7Q XjXH5wVZ6npXAzsl6Pf+P+CXriwYWXRtqjpxyg4WeWIvCZjyYYIPTdXaDnx995MzUFkWmq QvpC+6KVLUwBA8LdIpAedU9c9GSQAog= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 41DD81BC0; Fri, 24 Nov 2023 08:36:48 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 923813F73F; Fri, 24 Nov 2023 08:35:59 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 16/25] arm64: enable PKEY support for CPUs with S1POE Date: Fri, 24 Nov 2023 16:35:01 +0000 Message-Id: <20231124163510.1835740-17-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 5DA8340016 X-Stat-Signature: gf9kdjxftieau6kyempsjzpcndejzooj X-HE-Tag: 1700843762-161082 X-HE-Meta: U2FsdGVkX1/VJC5Ceh+YEE2ZPpICrwEeLALIdqaeoEYYmy2KCOzEbsUl5fJgSn3nC9fO9Ms8sT18+CFvhKpyrnuiHvg85JYQDTym9IdxxgU9GcSyVOXiOY6lXvjBu34eXwvYXnw7gal6pRH0d24eEBKjRALg2BIkGwegoMFatnEwk1XdxCXsVwfwfYYb6PbFahTntM2y4JUy00Q6LPW0IITr67/6Gjro/XHu82OVvnKiIp1hky3CFqyz0TsGHBVkLlSeOOps3fGQMZoBHrMpxe+nSwhrrgsv/h6anF8XOEMb3A8Z6pvk+N7zQa6F5Y7/bn9PL/BKnJXDbmyUKqTPve1SgFVMf3X7nGIDmIRAYSdd/Y99bVXe2seoRjR5XOjnuAkYEg55wuyoVCvRzLq9lf2Mt7vIrpK78sdKc7Du4v3JMu/9ywsnDEKeZl6TGuUoTCTYAOOlGAXy2oIUPx2qFRbrNOL4FuK/Up3cSpUKWhm6IvnX7XZMESJBclI9WjXnSJvyDm+iILYLrU6eFbvim4Jb/TvTFSOeIJqWNtwWkxbVCjChKY5RcnNPiHO3fv9qVnorpPb39zQ2Ye8ahsavj0QgZ2YCmnB6k9a3euEksh7h6IgADTAsEJ/NrxpJYcBUNnszFsDf2/ThUyrWzfgwqdrHm/umkGIkBvbtjoqJTcA8P+ApEzChVuItrxuRbqXSU0RycLRVuX+PzCapDwKoBIFE/rSTP89fiPzSl+6VO6137NmBIAY6NRT97ZRpH9wBe2smfk1NQ6RlhwsdZ5/UkHtpst8a4IQYXawDS1AEPJKnR0jLhph1JyFaqY8DH3qm/H9K8oMsN2+gQkVJHPxgFBOka784MgE+ZiAYQKojhl05KX7pF08c1NbJ041AQH0ByMGLTBY3RIvkENdg4STJVvh7BQ1RVgil2LEkwDTB8g1LyZubgNLNpBL1zue+t+Bh2pPAi3m4m/FmL1suB+4 OL0k/Pbo 3FuuIXyTYD1iq7YB+lwDl3FXlBqTzbRTcn0ihiIHc61AA70tiI9+8dMkdEgwCgyLR70l+WAjVjtcf/x/CX4W/yTCTsougN9N2YQqdlq1tRgRQISxWbk7mVebCTHEpitfSPWwaMpW1Llqjhv/mQOUXzff6906Ps+ie5Fh1TEC8Dxbq/1ydbS8tMCS/a/XAw8BhdsOrn9/8AY4A6XBtMduN9LZQgrioL1y0DEP9SAXAaMmckQYZ9Yhf2ZdQUA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Now that PKEYs support has been implemented, enable it for CPUs that support S1POE. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Acked-by: Catalin Marinas --- arch/arm64/include/asm/pkeys.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pkeys.h b/arch/arm64/include/asm/pkeys.h index a80c654da93d..23c473300058 100644 --- a/arch/arm64/include/asm/pkeys.h +++ b/arch/arm64/include/asm/pkeys.h @@ -17,7 +17,7 @@ int arch_set_user_pkey_access(struct task_struct *tsk, int pkey, static inline bool arch_pkeys_enabled(void) { - return false; + return system_supports_poe(); } static inline int vma_pkey(struct vm_area_struct *vma) From patchwork Fri Nov 24 16:35:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467932 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 237ACC61DF4 for ; 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s=arc-20220608; d=hostedemail.com; t=1700843765; a=rsa-sha256; cv=none; b=Z1ZpKGcoYWuH4cIBLpoa4IKLEpI4IzTbJBiKCe2ckvI79hqS4AY0QRbLlbYBqFPjnIT5XC 72o0LjQtyeXIwQYKksDreyO/Q5/StrHsLrgM4q9Gh5msAJ2gYQxV3Cr0zU3J1J06RzgJ5a wAjVh9L02+4rfj8QQh+htu3MWCsIj/c= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id ABDAD1C01; Fri, 24 Nov 2023 08:36:50 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 07E683F73F; Fri, 24 Nov 2023 08:36:01 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 17/25] arm64: enable POE and PIE to coexist Date: Fri, 24 Nov 2023 16:35:02 +0000 Message-Id: <20231124163510.1835740-18-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: F02F6160009 X-Rspam-User: X-Rspamd-Server: rspam04 X-Stat-Signature: jk1ao5554aqsknj317hg65jbhr3msg16 X-HE-Tag: 1700843764-503644 X-HE-Meta: U2FsdGVkX1+mNs9H2FW2w+rRstohZqdvggVsdW27Go1bXzzZcfGD0COcENyF8Wb2qLGtIjKj/W14g7pwNhG4/QhxOl5d0G0yfcrL1gj1C9GwwJfaP3YWO0vNSaKzaCOLx4+cyiiK7ABFNqMHYP5FrSe385PwbaRAIVkDtd1iY/vR8L04NYzOEQ7QVosuncyN65A3dH748UbcZRab+3JwBBXDAi8ODiB9iFKqwgLFblQR4STajKNh8woB3DyqKHrwdo6X9oywSEDjvWOXVU0pkrk8y891m6ISN3Exy4abgzpDKRkli+2USwE/wPm084wuAuvtMX7LXnsu7Kgs6Y//Bt+LLN3VOsgEL9GVPV6j5I624eiHcWQmR7femJrmEjid+wiBh+22vNQnCs3N4xWynj5mSMjY9PxFDPjIdox/lS9xN4Rg2s/nqt9IO1bsgocOQHYC8BreOXgugxSJ2GgAcfdTIIHHUdYZKbCWt+ITGscWCOi/TWnnGVb5y5MNDjRQU74jbMFLHBPR7av1fEa5ZCFKgFkeB/anvLsQyXPw/hjg5qUWR6rR49vur4IpFDfhwOZ+54vZhWlZ4yB7HoM7WVUpqQwfrYjafo4A3aXg5+mTxcxUgKJvIBo5QuVrklMUxLTqQjC5N3KXlN4p+lbZUkclm4nsPiUL91kc+K/2mHuOmJj7P2CiRRnXSMWOwW/34cOg45blomfq4vLwgpCJjXRorWjcAI78BLXwCMdWF8vcxVqQXvzAdFDJ91hDM8e3adQBeIzG2eZMbVq2NCrjXgGVXOfP+HsKsdy1yZeOmj4QfBJKHINzULbDk8zMm060nMMi9cIBQN7mjFVmqKY/0+VLgStqt59abE23sV5O7F/ePwHDAF7zWZKFPcnGCxI4Z8eXmXkCvJ0rKw7N6OGblCHdpQQ8ThyiziCybvDmCBqfsk3ZKTORkGyL5oc+TSKzkb7Ia6KfVdwHEJTncD6 AY0GFSPg 9mE+P6mO80LcZRKmLTmBQa3XjgyH4RNqkcrRCV98gjyKZHO+9zlU1IQPsu+93BvwK8hvrkvMXI6vbU7bGaru6s7eCdEnmToADTHwz8rz5kzEdRqwJU09QiknxOwMWpI6z7bjgHDq0pUi5SFIRkOsmNpqSFhQ1oAH19lQ2pSzKjshWW0+phGP6Bcs0GQihLtF+A5IkAekGdO2F2vpBnJ/HcAz3Kg== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Set the EL0/userspace indirection encodings to be the overlay enabled variants of the permissions. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon --- arch/arm64/include/asm/pgtable-prot.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/pgtable-prot.h b/arch/arm64/include/asm/pgtable-prot.h index e9624f6326dd..3007208e04aa 100644 --- a/arch/arm64/include/asm/pgtable-prot.h +++ b/arch/arm64/include/asm/pgtable-prot.h @@ -137,10 +137,10 @@ extern bool arm64_use_ng_mappings; #define PIE_E0 ( \ PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_X_O) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R) | \ - PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW)) + PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY_EXEC), PIE_RX_O) | \ + PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED_EXEC), PIE_RWX_O) | \ + PIRx_ELx_PERM(pte_pi_index(_PAGE_READONLY), PIE_R_O) | \ + PIRx_ELx_PERM(pte_pi_index(_PAGE_SHARED), PIE_RW_O)) #define PIE_E1 ( \ PIRx_ELx_PERM(pte_pi_index(_PAGE_EXECONLY), PIE_NONE_O) | \ From patchwork Fri Nov 24 16:35:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467933 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFFF8C61DF4 for ; Fri, 24 Nov 2023 16:36:12 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 7E8156B030A; Fri, 24 Nov 2023 11:36:09 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 798A96B030B; Fri, 24 Nov 2023 11:36:09 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 5C3B46B030C; Fri, 24 Nov 2023 11:36:09 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 46D986B030A for ; Fri, 24 Nov 2023 11:36:09 -0500 (EST) Received: from smtpin18.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 2CB9516081A for ; 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imf24.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf24.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1700843767; a=rsa-sha256; cv=none; b=1zlsIaObZ1+pUw+OSlX9WtDyQiNozz3h0p9BJSv2U+UvQMJtc2ChOFaAXk5jkXwB9QReBu VjCWWb978xnVpx+QhepltlA/8/ytCX+EerkGh/2/9Pqf7KGMXb/dyh3q8Wy5jz/okNNafu YYsrXNVTYLOUfQnjqgcEGouVvTvI9wc= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 213D01BCA; Fri, 24 Nov 2023 08:36:53 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 718883F73F; Fri, 24 Nov 2023 08:36:04 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 18/25] arm64/ptrace: add support for FEAT_POE Date: Fri, 24 Nov 2023 16:35:03 +0000 Message-Id: <20231124163510.1835740-19-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 73DB4180020 X-Stat-Signature: 1pa6ta8ggm6mmbs4r85r8yibdrhaen6r X-HE-Tag: 1700843767-501274 X-HE-Meta: U2FsdGVkX1+k8HJNda8u/Qzo+1KQM9htgRITOCmEgdazVM8DhFJUgXdb0uN0GRIiEdX/hzpDvWsaJI31beyduxMikjEVcgDFEGfMLHC5wrRPNhDueFYu1P4G/S6wKQFSYRauD14Xr+Xs+GG2zQlbKiPebUyDPHZjjMoGno8w9CPv7n30QEK6CJK0YZHlsbJw4+pswPIHTFqo0JssHNDyBhvqacNu3vb4IpjwnxXXzGY1JeYYSRGG4BVA/XaEjfXxsVFIYxIZejxvAw9VMej90O6OSEpVcw87aX6WDR/6YlvyJ+QAcEFQ8++FVWByyvj4JeoqDeV3s7Ka4t7mj31GzZZ9eAYw5whPIpp5vdkGaS07zCRCiASfFLLnWUEK9vhUe3GqQWHRiYiMYKYDaVlIfiwSQKLUfr+O1SFSZBOvVuNA7v13JCVMdOwOv833DYGPPJOjK74PO/ulICjog9ZXVgU7PFR4aWye+qH01ruxp/JNyNUE+BCYoaCfOJDj1X0Wvdw03YEaztcj5/of0mJwzZz1LIVHf/bwYLpSlYUckqi7Xi10h8K/DMwpjmsWTyysRrklGN6c4Hs5s6WasGqT9v0kfKo77EIsf0JqyeGzfRLoRQDuF/2dnoBoGzFuDdOoN/6TOAC5o9wRH+cJkp6j4HBSrmZ7s/z0vinfAnAyP+BeYLrGOyhqMJqLr2KTWXFTOzz+pfaul219sg9xR7xP2AavPLv3Nov/FFbJXyti73I6lUELhCh23LBefHWqiFQBx+Va1TSICD2e7Prxs+MibHE5jQYGwaNLxu8IxKgjL9caATRl9chxcoHHYCT4KR5n3iOv8OUP2d64aMOuNOlI/E2XlQpzY1zhTfYyPJTmSyFiWqDy6r8/aHROwJl3Y8yKM4tizUugyCm/Sxn0ns+WvUYUaF7/iUXgmiVkQTpNdWiHEtG+CTohe7hakxqmGvZbeGxi3dHFFRfOdI058A2 AyOOWlrj LUgM8mNXOUijGaLAbahA1aYnRziQI1t9D6yuPt3cfadgZ6TqG/f7NdHhQBsfMnn9bJ1Ekj/+AmCp7CTwoN/vKQUcV/E/wgzBYVpoHoaB5h1tShjfDpEP2FEgwtt9LQzp5yMI/8a/DRD8asAiRE/566EvnncPR0erySfmDhExSb1w047B6NNfojHwl2QkKdcoUdaHoYMwU43TwPVdmIpAKFsxDTVtRQxY1ie7b1pS7UurI5PkK9EgvxjOUc1cD2Sn1uxlahF6ixmFhpsk= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add a regset for POE containing POR_EL0. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Mark Brown Reviewed-by: Catalin Marinas --- arch/arm64/kernel/ptrace.c | 46 ++++++++++++++++++++++++++++++++++++++ include/uapi/linux/elf.h | 1 + 2 files changed, 47 insertions(+) diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c index 20d7ef82de90..c3257a5c97f1 100644 --- a/arch/arm64/kernel/ptrace.c +++ b/arch/arm64/kernel/ptrace.c @@ -1409,6 +1409,39 @@ static int tagged_addr_ctrl_set(struct task_struct *target, const struct } #endif +#ifdef CONFIG_ARM64_POE +static int poe_get(struct task_struct *target, + const struct user_regset *regset, + struct membuf to) +{ + if (!system_supports_poe()) + return -EINVAL; + + return membuf_write(&to, &target->thread.por_el0, + sizeof(target->thread.por_el0)); +} + +static int poe_set(struct task_struct *target, const struct + user_regset *regset, unsigned int pos, + unsigned int count, const void *kbuf, const + void __user *ubuf) +{ + int ret; + long ctrl; + + if (!system_supports_poe()) + return -EINVAL; + + ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl, 0, -1); + if (ret) + return ret; + + target->thread.por_el0 = ctrl; + + return 0; +} +#endif + enum aarch64_regset { REGSET_GPR, REGSET_FPR, @@ -1437,6 +1470,9 @@ enum aarch64_regset { #ifdef CONFIG_ARM64_TAGGED_ADDR_ABI REGSET_TAGGED_ADDR_CTRL, #endif +#ifdef CONFIG_ARM64_POE + REGSET_POE +#endif }; static const struct user_regset aarch64_regsets[] = { @@ -1587,6 +1623,16 @@ static const struct user_regset aarch64_regsets[] = { .set = tagged_addr_ctrl_set, }, #endif +#ifdef CONFIG_ARM64_POE + [REGSET_POE] = { + .core_note_type = NT_ARM_POE, + .n = 1, + .size = sizeof(long), + .align = sizeof(long), + .regset_get = poe_get, + .set = poe_set, + }, +#endif }; static const struct user_regset_view user_aarch64_view = { diff --git a/include/uapi/linux/elf.h b/include/uapi/linux/elf.h index 9417309b7230..f2713efcd81b 100644 --- a/include/uapi/linux/elf.h +++ b/include/uapi/linux/elf.h @@ -440,6 +440,7 @@ typedef struct elf64_shdr { #define NT_ARM_SSVE 0x40b /* ARM Streaming SVE registers */ #define NT_ARM_ZA 0x40c /* ARM SME ZA registers */ #define NT_ARM_ZT 0x40d /* ARM SME ZT registers */ +#define NT_ARM_POE 0x40f /* ARM POE registers */ #define NT_ARC_V2 0x600 /* ARCv2 accumulator/extra registers */ #define NT_VMCOREDD 0x700 /* Vmcore Device Dump Note */ #define NT_MIPS_DSP 0x800 /* MIPS DSP ASE registers */ From patchwork Fri Nov 24 16:35:04 2023 Content-Type: text/plain; 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Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Andrew Morton Cc: Shuah Khan Cc: Dave Hansen Cc: Aneesh Kumar K.V Reviewed-by: Mark Brown --- .../arm64/signal/testcases/testcases.c | 23 ----------------- .../arm64/signal/testcases/testcases.h | 25 +++++++++++++++++-- 2 files changed, 23 insertions(+), 25 deletions(-) diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.c b/tools/testing/selftests/arm64/signal/testcases/testcases.c index 9f580b55b388..fe950b6bca6b 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.c +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.c @@ -6,29 +6,6 @@ #include "testcases.h" -struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic, - size_t resv_sz, size_t *offset) -{ - size_t offs = 0; - struct _aarch64_ctx *found = NULL; - - if (!head || resv_sz < HDR_SZ) - return found; - - while (offs <= resv_sz - HDR_SZ && - head->magic != magic && head->magic) { - offs += head->size; - head = GET_RESV_NEXT_HEAD(head); - } - if (head->magic == magic) { - found = head; - if (offset) - *offset = offs; - } - - return found; -} - bool validate_extra_context(struct extra_context *extra, char **err, void **extra_data, size_t *extra_size) { diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.h b/tools/testing/selftests/arm64/signal/testcases/testcases.h index a08ab0d6207a..d33154c9a4bd 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.h +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.h @@ -87,8 +87,29 @@ struct fake_sigframe { bool validate_reserved(ucontext_t *uc, size_t resv_sz, char **err); -struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic, - size_t resv_sz, size_t *offset); +static inline struct _aarch64_ctx *get_header(struct _aarch64_ctx *head, uint32_t magic, + size_t resv_sz, size_t *offset) +{ + size_t offs = 0; + struct _aarch64_ctx *found = NULL; + + if (!head || resv_sz < HDR_SZ) + return found; + + while (offs <= resv_sz - HDR_SZ && + head->magic != magic && head->magic) { + offs += head->size; + head = GET_RESV_NEXT_HEAD(head); + } + if (head->magic == magic) { + found = head; + if (offset) + *offset = offs; + } + + return found; +} + static inline struct _aarch64_ctx *get_terminator(struct _aarch64_ctx *head, size_t resv_sz, From patchwork Fri Nov 24 16:35:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8404C61DF4 for ; Fri, 24 Nov 2023 16:36:17 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 10A646B0328; Fri, 24 Nov 2023 11:36:14 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 092616B032E; Fri, 24 Nov 2023 11:36:14 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id E75186B0332; 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Fri, 24 Nov 2023 08:36:09 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 20/25] selftests: mm: move fpregs printing Date: Fri, 24 Nov 2023 16:35:05 +0000 Message-Id: <20231124163510.1835740-21-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Server: rspam08 X-Rspamd-Queue-Id: 1CA004002B X-Stat-Signature: wn73341e7prrcnr7kgto8aguy34hdkbh X-Rspam-User: X-HE-Tag: 1700843771-422929 X-HE-Meta: U2FsdGVkX192sJD3z83gkefdtKQXfeVwR1I5kOvt2txl3MFzj+aQVsxWlLxYs2rRXbUY1zKcaybY34Eo/waSedrDrtfsiz8qz4EEcMPrUqH12xqa169QkxVeUo3hp3lXh5HBJhgh2/xEVMo3hqyVySDNdYQBIr4gHFHWPiFSYDIhLhvZWaGQEpJcOhznnczYjv5O1EqVvqtoVRHCgshVR6KJvrmcBEWB1OJnC/4hxv45JxCo0HV0IerMVNqlOW1pL3QnnX2YdYcCTCf71YZYNfv1ESWOdltc3Ac7iqEliff+QjjG0lPQS9R8yJIKNLWTCkPfghzXHMi7qQqOE29VB65BYDKdJ+jZIg2wnY9ulp4ps0ix4NUrVDf/VwiXI5bcWTNIJlV/cslbV36IHUmOn1BXc/WHnHcnfYeFk71athQYo0SkPHMldAUI5XtZ2GjwjbuqApz59/2t5Px72qk9sOmlV1OdW6j4iuzYUsgCyb1AYbNpbkMXMiWN30zlF/noR58FLqIvLdZNt2m/TY9MgkupAUKCT/mzZ1xMmBbHQe2aHSB3OrUCJPuhbcoKIbWMFcCyHK+aRwfXhsCLpHKZlZHM2yWMFWZK5QO6SJxHTwFHMudwp3LCCY2HhC+0c3GEJNnwWouWhClyQEb/s3Gt/LFhbb60U1lyBkRD9QS3hRWbY/xfBoF2JYQeeVzBkT+JyNYn8YMn33PZsbvFONDGibfablmdA+dG8a6vflEw5m1fxOsym6/ZNv9J2dal8JShRfAIb7urg5nyo+1S5ugmBtQ08be9YaBY0tHOtb9Z8v8DmwMsFoKakWY0m3spbGZ5CoT4Mg9C66/QL/qSM7Lnkvi1/kcO4Px9hfvANZfXGS42EHbqV6I3y23X4s6whHs1gSmkIA72hNRRn8zkVgI+yjZBk1+TRMuwaBXLhjSbql51mkFvKVFZuM5PaFZfxBZqxMyVHycMDQZrzltSIu/ G0gZ9+/w 4Ayf/dX11YcWHM5T2GEI90Bf50Bp0zPOC9v5Jyjg/TOHjxS7+O/r1/5ktRq0vl4024yR9PgxcA+jdwSoPDVtgOb2cmhPdVfW4MKIPgjrAvsuCQsDVEjET/YEzSNJPQg8V82CY+n5TeVdHsox3rBLsZD/D9AoLhSObSVhWDMjHuc+ptd8PQQfl6YLhzEBHuBDfN9iy5EMW4efwz3kljVtw+uiNKo0cY6iW6Ht4rUtTqe2jfu/f41Vc+v6V8NS41851lJk+96FTODkgxqaFQEAh3O7jCn876W19Ts9CXPXqyXmV4TEYluRPK6LwQiFK/jsIwbzu8O2ZDdGAdFQ= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: arm64's fpregs are not at a constant offset from sigcontext. Since this is not an important part of the test, don't print the fpregs pointer on arm64. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Andrew Morton Cc: Shuah Khan Cc: Dave Hansen Cc: Aneesh Kumar K.V Acked-by: Dave Hansen --- tools/testing/selftests/mm/pkey-powerpc.h | 1 + tools/testing/selftests/mm/pkey-x86.h | 2 ++ tools/testing/selftests/mm/protection_keys.c | 6 ++++++ 3 files changed, 9 insertions(+) diff --git a/tools/testing/selftests/mm/pkey-powerpc.h b/tools/testing/selftests/mm/pkey-powerpc.h index ae5df26104e5..6275d0f474b3 100644 --- a/tools/testing/selftests/mm/pkey-powerpc.h +++ b/tools/testing/selftests/mm/pkey-powerpc.h @@ -9,6 +9,7 @@ #endif #define REG_IP_IDX PT_NIP #define REG_TRAPNO PT_TRAP +#define MCONTEXT_FPREGS #define gregs gp_regs #define fpregs fp_regs #define si_pkey_offset 0x20 diff --git a/tools/testing/selftests/mm/pkey-x86.h b/tools/testing/selftests/mm/pkey-x86.h index 814758e109c0..b9170a26bfcb 100644 --- a/tools/testing/selftests/mm/pkey-x86.h +++ b/tools/testing/selftests/mm/pkey-x86.h @@ -15,6 +15,8 @@ #endif +#define MCONTEXT_FPREGS + #ifndef PKEY_DISABLE_ACCESS # define PKEY_DISABLE_ACCESS 0x1 #endif diff --git a/tools/testing/selftests/mm/protection_keys.c b/tools/testing/selftests/mm/protection_keys.c index 48dc151f8fca..b3dbd76ea27c 100644 --- a/tools/testing/selftests/mm/protection_keys.c +++ b/tools/testing/selftests/mm/protection_keys.c @@ -314,7 +314,9 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) ucontext_t *uctxt = vucontext; int trapno; unsigned long ip; +#ifdef MCONTEXT_FPREGS char *fpregs; +#endif #if defined(__i386__) || defined(__x86_64__) /* arch */ u32 *pkey_reg_ptr; int pkey_reg_offset; @@ -330,7 +332,9 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) trapno = uctxt->uc_mcontext.gregs[REG_TRAPNO]; ip = uctxt->uc_mcontext.gregs[REG_IP_IDX]; +#ifdef MCONTEXT_FPREGS fpregs = (char *) uctxt->uc_mcontext.fpregs; +#endif dprintf2("%s() trapno: %d ip: 0x%016lx info->si_code: %s/%d\n", __func__, trapno, ip, si_code_str(si->si_code), @@ -359,7 +363,9 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) #endif /* arch */ dprintf1("siginfo: %p\n", si); +#ifdef MCONTEXT_FPREGS dprintf1(" fpregs: %p\n", fpregs); +#endif if ((si->si_code == SEGV_MAPERR) || (si->si_code == SEGV_ACCERR) || From patchwork Fri Nov 24 16:35:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467936 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A4C5C636BD for ; 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s=arc-20220608; d=hostedemail.com; t=1700843774; a=rsa-sha256; cv=none; b=iMl025HKoUSQOnePI09V/ceo0sLbsrLq0eb+wT/Lagzoah4Vn5kwiCv2H5l2omcwjvozDg Hz6kRCoq8q0nF+innMR+xDZwLn75MAN4veQ5FBSb5Cb62tjfbkXBeSzFmrL39G44JktBsh pZd10+AcZwrKIIbRm+eiukEsTXKmOwU= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 859271BD0; Fri, 24 Nov 2023 08:37:00 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BB61F3F73F; Fri, 24 Nov 2023 08:36:11 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 21/25] selftests: mm: make protection_keys test work on arm64 Date: Fri, 24 Nov 2023 16:35:06 +0000 Message-Id: <20231124163510.1835740-22-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: BE4981A000C X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: ytd5gf8nqk6uip8i4arg3icemr8oysfe X-HE-Tag: 1700843774-521403 X-HE-Meta: U2FsdGVkX18sUCBpf7WMaPjISFmdmtJynd6newh3bPrJXUEoplwLzqlOT5l41u+PCz8NTtsIMvzUB1qm51m+GN/9UDuflYaSYCZ0mCRRfLjOrPAZxv0OTQ5LoAf7TPWU7oW0O2w1cJzgRCQzp0nvPow0zdsiNH9Cf38rSFJRkQWVZzMIXdpjansqRr6pU+pDUXW2O5TDbmvXUG4ZCRYWgvtAWCB8gSPkw+ayjIm5//jHvzl4ClwFNVoSxtUD5v/ULhkyS86Wz7nvrCwN+ramoMeKFMh6INi932+LIYKMh5yk1p8k+QJZ1Nw9TI7SRVDZ1/K4KgsivGdPpfLXpoREZEvShsvp+lb2bDc4Iu7GNTPa1QrmMfdkf7DvAOP295RstCwIBY8+EYun/AxeHdaumqi2DN6Q1drQbEzHfrb5ULYraUix31gOuoKk5YusQ9gGQ4l2UZBD3afif0QSrD8VK5zBw/ltmCUhDWzqaH+n9YlSL/TQjTfNo6qD0pSruatUrxpGGIusPsqGIWLgi/ca7mJUGgZUxtw35cHHouDBPxfr+LrZlQi47/PWjDVMbvaGnHUqn40fmcyhnas+3akm+qodxy5Tk9PK1/5uHk/HWtczsYuAPf4Oapu0oCHFs+gfcDjxBhmqMno7Nn3ctEuy+TkJMX+Fg9dDazBuVts83/N+fL1JIsgMTVqqZEg4CtkMPRGCOI3ZcQMOK6Vt6xzKJ7L/rueApAqCpvmH2Q0yBDsi9U89vTyOJEg2+IR2skDl89TqNDo0cirBkZMxivY+h3l6SfGQAphLTqX6Ubz6iWDFMDFvK52M2wb8fuRFxn/hcbszTrEUBsHY51of2Qp962rX9BIf+YUlC7cgrJLXu53wTb3fmA6i7CG2oeOSnjeaPCDDeKLi9qh0j0rbY9fM1SbON9T1Ss3GzMIAt91egVqiTHT7rS3cNNWYFQzlAVLSR676pPN3nCz4jCpAZF/ Dh+C4Kpc Y9us+jD3s/eyjceZIlvQvoUWBqrQ60lDFLNCRqDoSmSWAJ9q4eXBt1qq//ksd2uwFKEiT5WdnCHgb14q/MZRlC3hWi4wi7a0w6F+pqdPQRLudB3Tq530IGIGkY/OkP7XOCSiSj/TkBigsgPLRe9VcyrzEwzibyKJPqWII6leKlt6gD67zXWYKjlUPxyvfk3zjOk8v1ztmb2vWbsxjOeWCROIDM1nhrTAJxDxHWiXf592ho15AoIMuZW4w3bkJjJIQpn69/KzinXdAaKEgEHBD/SVxvsxKAEU6/+8UTSS4A5gNH6+NWazw1mUDFBPBwM2vz8eJmHNCRAk96+jDfx2cVpvU15Ato3OYL9voSEJizU0yMHHH5Sl6/4H7vA== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: The encoding of the pkey register differs on arm64, than on x86/ppc. On those platforms, a bit in the register is used to disable permissions, for arm64, a bit enabled in the register indicates that the permission is allowed. This drops two asserts of the form: assert(read_pkey_reg() <= orig_pkey_reg); Because on arm64 this doesn't hold, due to the encoding. The pkey must be reset to both access allow and write allow in the signal handler. pkey_access_allow() works currently for PowerPC as the PKEY_DISABLE_ACCESS and PKEY_DISABLE_WRITE have overlapping bits set. Access to the uc_mcontext is abstracted, as arm64 has a different structure. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Andrew Morton Cc: Shuah Khan Cc: Dave Hansen Cc: Aneesh Kumar K.V Acked-by: Dave Hansen --- .../arm64/signal/testcases/testcases.h | 3 + tools/testing/selftests/mm/Makefile | 2 +- tools/testing/selftests/mm/pkey-arm64.h | 139 ++++++++++++++++++ tools/testing/selftests/mm/pkey-helpers.h | 8 + tools/testing/selftests/mm/pkey-powerpc.h | 2 + tools/testing/selftests/mm/pkey-x86.h | 2 + tools/testing/selftests/mm/protection_keys.c | 103 +++++++++++-- 7 files changed, 247 insertions(+), 12 deletions(-) create mode 100644 tools/testing/selftests/mm/pkey-arm64.h diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.h b/tools/testing/selftests/arm64/signal/testcases/testcases.h index d33154c9a4bd..e445027d5ec2 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.h +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.h @@ -25,6 +25,9 @@ #define HDR_SZ \ sizeof(struct _aarch64_ctx) +#define GET_UC_RESV_HEAD(uc) \ + (struct _aarch64_ctx *)(&(uc->uc_mcontext.__reserved)) + #define GET_SF_RESV_HEAD(sf) \ (struct _aarch64_ctx *)(&(sf).uc.uc_mcontext.__reserved) diff --git a/tools/testing/selftests/mm/Makefile b/tools/testing/selftests/mm/Makefile index 78dfec8bc676..33922ae4bb6e 100644 --- a/tools/testing/selftests/mm/Makefile +++ b/tools/testing/selftests/mm/Makefile @@ -97,7 +97,7 @@ TEST_GEN_FILES += $(BINARIES_64) endif else -ifneq (,$(findstring $(ARCH),ppc64)) +ifneq (,$(filter $(ARCH),arm64 ppc64)) TEST_GEN_FILES += protection_keys endif diff --git a/tools/testing/selftests/mm/pkey-arm64.h b/tools/testing/selftests/mm/pkey-arm64.h new file mode 100644 index 000000000000..2861564f6415 --- /dev/null +++ b/tools/testing/selftests/mm/pkey-arm64.h @@ -0,0 +1,139 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2023 Arm Ltd. +*/ + +#ifndef _PKEYS_ARM64_H +#define _PKEYS_ARM64_H + +#include "vm_util.h" +/* for signal frame parsing */ +#include "../arm64/signal/testcases/testcases.h" + +#ifndef SYS_mprotect_key +# define SYS_mprotect_key 288 +#endif +#ifndef SYS_pkey_alloc +# define SYS_pkey_alloc 289 +# define SYS_pkey_free 290 +#endif +#define MCONTEXT_IP(mc) mc.pc +#define MCONTEXT_TRAPNO(mc) -1 + +#define PKEY_MASK 0xf + +#define POE_NONE 0x0 +#define POE_X 0x2 +#define POE_RX 0x3 +#define POE_RWX 0x7 + +#define NR_PKEYS 7 +#define NR_RESERVED_PKEYS 1 /* pkey-0 */ + +#define PKEY_ALLOW_ALL 0x77777777 + +#define PKEY_BITS_PER_PKEY 4 +#define PAGE_SIZE sysconf(_SC_PAGESIZE) +#undef HPAGE_SIZE +#define HPAGE_SIZE default_huge_page_size() + +/* 4-byte instructions * 16384 = 64K page */ +#define __page_o_noops() asm(".rept 16384 ; nop; .endr") + +static inline u64 __read_pkey_reg(void) +{ + u64 pkey_reg = 0; + + // POR_EL0 + asm volatile("mrs %0, S3_3_c10_c2_4" : "=r" (pkey_reg)); + + return pkey_reg; +} + +static inline void __write_pkey_reg(u64 pkey_reg) +{ + u64 por = pkey_reg; + + dprintf4("%s() changing %016llx to %016llx\n", + __func__, __read_pkey_reg(), pkey_reg); + + // POR_EL0 + asm volatile("msr S3_3_c10_c2_4, %0\nisb" :: "r" (por) :); + + dprintf4("%s() pkey register after changing %016llx to %016llx\n", + __func__, __read_pkey_reg(), pkey_reg); +} + +static inline int cpu_has_pkeys(void) +{ + /* No simple way to determine this */ + return 1; +} + +static inline u32 pkey_bit_position(int pkey) +{ + return pkey * PKEY_BITS_PER_PKEY; +} + +static inline int get_arch_reserved_keys(void) +{ + return NR_RESERVED_PKEYS; +} + +void expect_fault_on_read_execonly_key(void *p1, int pkey) +{ +} + +void *malloc_pkey_with_mprotect_subpage(long size, int prot, u16 pkey) +{ + return PTR_ERR_ENOTSUP; +} + +#define set_pkey_bits set_pkey_bits +static inline u64 set_pkey_bits(u64 reg, int pkey, u64 flags) +{ + u32 shift = pkey_bit_position(pkey); + u64 new_val = POE_RWX; + + /* mask out bits from pkey in old value */ + reg &= ~((u64)PKEY_MASK << shift); + + if (flags & PKEY_DISABLE_ACCESS) + new_val = POE_X; + else if (flags & PKEY_DISABLE_WRITE) + new_val = POE_RX; + + /* OR in new bits for pkey */ + reg |= new_val << shift; + + return reg; +} + +#define get_pkey_bits get_pkey_bits +static inline u64 get_pkey_bits(u64 reg, int pkey) +{ + u32 shift = pkey_bit_position(pkey); + /* + * shift down the relevant bits to the lowest two, then + * mask off all the other higher bits + */ + u32 perm = (reg >> shift) & PKEY_MASK; + + if (perm == POE_X) + return PKEY_DISABLE_ACCESS; + if (perm == POE_RX) + return PKEY_DISABLE_WRITE; + return 0; +} + +static void aarch64_write_signal_pkey(ucontext_t *uctxt, u64 pkey) +{ + struct _aarch64_ctx *ctx = GET_UC_RESV_HEAD(uctxt); + struct poe_context *poe_ctx = + (struct poe_context *) get_header(ctx, POE_MAGIC, + sizeof(uctxt->uc_mcontext), NULL); + if (poe_ctx) + poe_ctx->por_el0 = pkey; +} + +#endif /* _PKEYS_ARM64_H */ diff --git a/tools/testing/selftests/mm/pkey-helpers.h b/tools/testing/selftests/mm/pkey-helpers.h index 1af3156a9db8..15608350fc01 100644 --- a/tools/testing/selftests/mm/pkey-helpers.h +++ b/tools/testing/selftests/mm/pkey-helpers.h @@ -91,12 +91,17 @@ void record_pkey_malloc(void *ptr, long size, int prot); #include "pkey-x86.h" #elif defined(__powerpc64__) /* arch */ #include "pkey-powerpc.h" +#elif defined(__aarch64__) /* arch */ +#include "pkey-arm64.h" #else /* arch */ #error Architecture not supported #endif /* arch */ +#ifndef PKEY_MASK #define PKEY_MASK (PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE) +#endif +#ifndef set_pkey_bits static inline u64 set_pkey_bits(u64 reg, int pkey, u64 flags) { u32 shift = pkey_bit_position(pkey); @@ -106,7 +111,9 @@ static inline u64 set_pkey_bits(u64 reg, int pkey, u64 flags) reg |= (flags & PKEY_MASK) << shift; return reg; } +#endif +#ifndef get_pkey_bits static inline u64 get_pkey_bits(u64 reg, int pkey) { u32 shift = pkey_bit_position(pkey); @@ -116,6 +123,7 @@ static inline u64 get_pkey_bits(u64 reg, int pkey) */ return ((reg >> shift) & PKEY_MASK); } +#endif extern u64 shadow_pkey_reg; diff --git a/tools/testing/selftests/mm/pkey-powerpc.h b/tools/testing/selftests/mm/pkey-powerpc.h index 6275d0f474b3..3d0c0bdae5bc 100644 --- a/tools/testing/selftests/mm/pkey-powerpc.h +++ b/tools/testing/selftests/mm/pkey-powerpc.h @@ -8,6 +8,8 @@ # define SYS_pkey_free 385 #endif #define REG_IP_IDX PT_NIP +#define MCONTEXT_IP(mc) mc.gp_regs[REG_IP_IDX] +#define MCONTEXT_TRAPNO(mc) mc.gp_regs[REG_TRAPNO] #define REG_TRAPNO PT_TRAP #define MCONTEXT_FPREGS #define gregs gp_regs diff --git a/tools/testing/selftests/mm/pkey-x86.h b/tools/testing/selftests/mm/pkey-x86.h index b9170a26bfcb..5f28e26a2511 100644 --- a/tools/testing/selftests/mm/pkey-x86.h +++ b/tools/testing/selftests/mm/pkey-x86.h @@ -15,6 +15,8 @@ #endif +#define MCONTEXT_IP(mc) mc.gregs[REG_IP_IDX] +#define MCONTEXT_TRAPNO(mc) mc.gregs[REG_TRAPNO] #define MCONTEXT_FPREGS #ifndef PKEY_DISABLE_ACCESS diff --git a/tools/testing/selftests/mm/protection_keys.c b/tools/testing/selftests/mm/protection_keys.c index b3dbd76ea27c..989fdf489e33 100644 --- a/tools/testing/selftests/mm/protection_keys.c +++ b/tools/testing/selftests/mm/protection_keys.c @@ -147,7 +147,7 @@ void abort_hooks(void) * will then fault, which makes sure that the fault code handles * execute-only memory properly. */ -#ifdef __powerpc64__ +#if defined(__powerpc64__) || defined(__aarch64__) /* This way, both 4K and 64K alignment are maintained */ __attribute__((__aligned__(65536))) #else @@ -212,7 +212,6 @@ void pkey_disable_set(int pkey, int flags) unsigned long syscall_flags = 0; int ret; int pkey_rights; - u64 orig_pkey_reg = read_pkey_reg(); dprintf1("START->%s(%d, 0x%x)\n", __func__, pkey, flags); @@ -242,8 +241,6 @@ void pkey_disable_set(int pkey, int flags) dprintf1("%s(%d) pkey_reg: 0x%016llx\n", __func__, pkey, read_pkey_reg()); - if (flags) - pkey_assert(read_pkey_reg() >= orig_pkey_reg); dprintf1("END<---%s(%d, 0x%x)\n", __func__, pkey, flags); } @@ -253,7 +250,6 @@ void pkey_disable_clear(int pkey, int flags) unsigned long syscall_flags = 0; int ret; int pkey_rights = hw_pkey_get(pkey, syscall_flags); - u64 orig_pkey_reg = read_pkey_reg(); pkey_assert(flags & (PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE)); @@ -273,8 +269,6 @@ void pkey_disable_clear(int pkey, int flags) dprintf1("%s(%d) pkey_reg: 0x%016llx\n", __func__, pkey, read_pkey_reg()); - if (flags) - assert(read_pkey_reg() <= orig_pkey_reg); } void pkey_write_allow(int pkey) @@ -330,8 +324,8 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) __func__, __LINE__, __read_pkey_reg(), shadow_pkey_reg); - trapno = uctxt->uc_mcontext.gregs[REG_TRAPNO]; - ip = uctxt->uc_mcontext.gregs[REG_IP_IDX]; + trapno = MCONTEXT_TRAPNO(uctxt->uc_mcontext); + ip = MCONTEXT_IP(uctxt->uc_mcontext); #ifdef MCONTEXT_FPREGS fpregs = (char *) uctxt->uc_mcontext.fpregs; #endif @@ -395,6 +389,8 @@ void signal_handler(int signum, siginfo_t *si, void *vucontext) #elif defined(__powerpc64__) /* arch */ /* restore access and let the faulting instruction continue */ pkey_access_allow(siginfo_pkey); +#elif defined(__aarch64__) + aarch64_write_signal_pkey(uctxt, PKEY_ALLOW_ALL); #endif /* arch */ pkey_faults++; dprintf1("<<<<==================================================\n"); @@ -908,7 +904,9 @@ void expected_pkey_fault(int pkey) * test program continue. We now have to restore it. */ if (__read_pkey_reg() != 0) -#else /* arch */ +#elif defined(__aarch64__) + if (__read_pkey_reg() != PKEY_ALLOW_ALL) +#else if (__read_pkey_reg() != shadow_pkey_reg) #endif /* arch */ pkey_assert(0); @@ -1498,6 +1496,11 @@ void test_executing_on_unreadable_memory(int *ptr, u16 pkey) lots_o_noops_around_write(&scratch); do_not_expect_pkey_fault("executing on PROT_EXEC memory"); expect_fault_on_read_execonly_key(p1, pkey); + + // Reset back to PROT_EXEC | PROT_READ for architectures that support + // non-PKEY execute-only permissions. + ret = mprotect_pkey(p1, PAGE_SIZE, PROT_EXEC | PROT_READ, (u64)pkey); + pkey_assert(!ret); } void test_implicit_mprotect_exec_only_memory(int *ptr, u16 pkey) @@ -1671,6 +1674,84 @@ void test_ptrace_modifies_pkru(int *ptr, u16 pkey) } #endif +#if defined(__aarch64__) +void test_ptrace_modifies_pkru(int *ptr, u16 pkey) +{ + pid_t child; + int status, ret; + struct iovec iov; + u64 trace_pkey; + /* Just a random pkey value.. */ + u64 new_pkey = (POE_X << PKEY_BITS_PER_PKEY * 2) | + (POE_NONE << PKEY_BITS_PER_PKEY) | + POE_RWX; + + child = fork(); + pkey_assert(child >= 0); + dprintf3("[%d] fork() ret: %d\n", getpid(), child); + if (!child) { + ptrace(PTRACE_TRACEME, 0, 0, 0); + + /* Stop and allow the tracer to modify PKRU directly */ + raise(SIGSTOP); + + /* + * need __read_pkey_reg() version so we do not do shadow_pkey_reg + * checking + */ + if (__read_pkey_reg() != new_pkey) + exit(1); + + raise(SIGSTOP); + + exit(0); + } + + pkey_assert(child == waitpid(child, &status, 0)); + dprintf3("[%d] waitpid(%d) status: %x\n", getpid(), child, status); + pkey_assert(WIFSTOPPED(status) && WSTOPSIG(status) == SIGSTOP); + + iov.iov_base = &trace_pkey; + iov.iov_len = 8; + ret = ptrace(PTRACE_GETREGSET, child, (void *)NT_ARM_POE, &iov); + pkey_assert(ret == 0); + pkey_assert(trace_pkey == read_pkey_reg()); + + trace_pkey = new_pkey; + + ret = ptrace(PTRACE_SETREGSET, child, (void *)NT_ARM_POE, &iov); + pkey_assert(ret == 0); + + /* Test that the modification is visible in ptrace before any execution */ + memset(&trace_pkey, 0, sizeof(trace_pkey)); + ret = ptrace(PTRACE_GETREGSET, child, (void *)NT_ARM_POE, &iov); + pkey_assert(ret == 0); + pkey_assert(trace_pkey == new_pkey); + + /* Execute the tracee */ + ret = ptrace(PTRACE_CONT, child, 0, 0); + pkey_assert(ret == 0); + + /* Test that the tracee saw the PKRU value change */ + pkey_assert(child == waitpid(child, &status, 0)); + dprintf3("[%d] waitpid(%d) status: %x\n", getpid(), child, status); + pkey_assert(WIFSTOPPED(status) && WSTOPSIG(status) == SIGSTOP); + + /* Test that the modification is visible in ptrace after execution */ + memset(&trace_pkey, 0, sizeof(trace_pkey)); + ret = ptrace(PTRACE_GETREGSET, child, (void *)NT_ARM_POE, &iov); + pkey_assert(ret == 0); + pkey_assert(trace_pkey == new_pkey); + + ret = ptrace(PTRACE_CONT, child, 0, 0); + pkey_assert(ret == 0); + pkey_assert(child == waitpid(child, &status, 0)); + dprintf3("[%d] waitpid(%d) status: %x\n", getpid(), child, status); + pkey_assert(WIFEXITED(status)); + pkey_assert(WEXITSTATUS(status) == 0); +} +#endif + void test_mprotect_pkey_on_unsupported_cpu(int *ptr, u16 pkey) { int size = PAGE_SIZE; @@ -1706,7 +1787,7 @@ void (*pkey_tests[])(int *ptr, u16 pkey) = { test_pkey_syscalls_bad_args, test_pkey_alloc_exhaust, test_pkey_alloc_free_attach_pkey0, -#if defined(__i386__) || defined(__x86_64__) +#if defined(__i386__) || defined(__x86_64__) || defined(__aarch64__) test_ptrace_modifies_pkru, #endif }; From patchwork Fri Nov 24 16:35:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467937 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id C651CC636D0 for ; Fri, 24 Nov 2023 16:36:23 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 48AA46B03CE; Fri, 24 Nov 2023 11:36:19 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 43B006B03DB; Fri, 24 Nov 2023 11:36:19 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 28DE36B03DE; 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Fri, 24 Nov 2023 08:36:14 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 22/25] kselftest/arm64: add HWCAP test for FEAT_S1POE Date: Fri, 24 Nov 2023 16:35:07 +0000 Message-Id: <20231124163510.1835740-23-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 3C26A80019 X-Rspam-User: X-Rspamd-Server: rspam11 X-Stat-Signature: x46odb39n364g9da6jtqqonfioj6myo7 X-HE-Tag: 1700843776-696433 X-HE-Meta: U2FsdGVkX1/RrlbSrQjii2ahqihU8o4YjJZx1WGR4kOfzCO885mvR7T4IiW5K6IUvg52k7qxM9CuluR4CKk7rzJc1qcyMFNcYDA4zV65WSQJwXVuhcYEO0fctSNPqBKEf4g/pqchvzECJqaetbSnzuDOBWVtEekS3KQ4RrO6oQQ1i+aWf/DUodGwrk4Faezz5dMYvBqi69N2x3H5debb6u4QddvF71uwpuZf6wVJtFMKTwKS4t11EkLVAd0vhL8HG9Bzf2GDovjZgL29ivAmPuPl2n5QrurvTkSyfoxlRI3xldFkEg6luEXI+ItEH5LMbkUPTULSptBozx6doom3/QIhV69pGxSCHA2+jRxFrPUjPzuGzyXo/vKb6J5JXr8bX90Zut0DxExo8C+zswxLMJvZJ4FE7A3ssFdIDyABIVJZGzXVz9PJ4Wibvr1aDlPiNLM84rN1NzbmdWZHgQEGsVtuH1KnFfSzwD6Yrmhd02OlYYCDHGWgx0EsB24OULPrcv/DUMhCBYL3AeUq10o+CEEaW77yhqkTMYySei83TO/UozSlLTO9/YbJQfoZp0S1+UDYzsIAkYETR2CQ3uShOh5gxzy363qK9yJNJbU3/Q8maJ5HVo4bn05tm9aG3SsTjbts68xGam/6hqDm3VEs8+A3fWfDJ4BEKbJoZg8LtZQIJrmLhwGRp2PmWAbhqFyG8stmYd8+qnJqVaVkoAGgabjc4RqJEDN/wyTRmQy+27+B1lR1JCjDvM0LJlVN5xAI0z3lJtOMcXk2bdexS8LN3/tiYWYGK814rmIygFx5f94MnhsWaM/+M1RaftHUxEDRVumffnRc2beYGZcfOE0Wbxit1MfGyRsQACfngxQGgRSuQZiDjiKKxN0mB9D71rcgr2/I5znPAJrQh2pChRXeIF0Vx5PjcEvuHjGY8ExPy7CuXKiPdREFt1s4sKqHiLT2sr4hiCaWmnImSQvk4+M Uvy8rBxw Ea15bcTVIiRTc1EKR/VFqY5kt670OVQcI6r6ulz3ebLFkVvMkynnxcq3+OZlYLZaTCF1ihEhLh423kD6lx79oVfUTX/rz+Z4y0C24kdHwnpq9pvAiVpvbkHK+iiUGolgXTlPoPK7TnCp0zDbUDtoP+Osau0d3/CYjzEkIJLRgIglu0XmXXe0bkAccvIjfCq2PgP6Q+eSSsxDJBqpzbzqB3nCOnmoDIspZK82IQYwAFydM+U706zJPsICl2iEb/JnBvSwKnIZIXnk936k= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Check that when POE is enabled, the POR_EL0 register is accessible. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: Shuah Khan Reviewed-by: Mark Brown --- tools/testing/selftests/arm64/abi/hwcap.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index 1189e77c8152..9ee7b04f3fbb 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -115,6 +115,12 @@ static void pmull_sigill(void) asm volatile(".inst 0x0ee0e000" : : : ); } +static void poe_sigill(void) +{ + /* mrs x0, POR_EL0 */ + asm volatile("mrs x0, S3_3_C10_C2_4" : : : "x0"); +} + static void rng_sigill(void) { asm volatile("mrs x0, S3_3_C2_C4_0" : : : "x0"); @@ -426,6 +432,14 @@ static const struct hwcap_data { .cpuinfo = "pmull", .sigill_fn = pmull_sigill, }, + { + .name = "POE", + .at_hwcap = AT_HWCAP2, + .hwcap_bit = HWCAP2_POE, + .cpuinfo = "poe", + .sigill_fn = poe_sigill, + .sigill_reliable = true, + }, { .name = "RNG", .at_hwcap = AT_HWCAP2, From patchwork Fri Nov 24 16:35:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467938 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2BA6C636BD for ; Fri, 24 Nov 2023 16:36:26 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id A0B1A6B03E6; Fri, 24 Nov 2023 11:36:21 -0500 (EST) Received: by kanga.kvack.org (Postfix, from userid 40) id 944B36B03F0; Fri, 24 Nov 2023 11:36:21 -0500 (EST) X-Delivered-To: int-list-linux-mm@kvack.org Received: by kanga.kvack.org (Postfix, from userid 63042) id 7E7F76B03F2; Fri, 24 Nov 2023 11:36:21 -0500 (EST) X-Delivered-To: linux-mm@kvack.org Received: from relay.hostedemail.com (smtprelay0015.hostedemail.com [216.40.44.15]) by kanga.kvack.org (Postfix) with ESMTP id 6B51C6B03E6 for ; Fri, 24 Nov 2023 11:36:21 -0500 (EST) Received: from smtpin26.hostedemail.com (a10.router.float.18 [10.200.18.1]) by unirelay07.hostedemail.com (Postfix) with ESMTP id 4206D160D2E for ; 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imf27.hostedemail.com; dkim=none; dmarc=pass (policy=none) header.from=arm.com; spf=pass (imf27.hostedemail.com: domain of joey.gouly@arm.com designates 217.140.110.172 as permitted sender) smtp.mailfrom=joey.gouly@arm.com ARC-Seal: i=1; s=arc-20220608; d=hostedemail.com; t=1700843779; a=rsa-sha256; cv=none; b=Ze4lUrbfEJJ+bkUirAXcYSMlPnLtVXVpJ+hxJXq/yI5comUxg0k9LKUM24babwAPA77Ht6 BqINGuMeCLEgxPpKQzde6CAL57Sbiab0EQd3wMgyzNVwmfWLxSWLOngfZj9BjOqe36L1YK eNm3oFoCugQVaNKHZg7eTVi8vcFUHDs= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6C1041063; Fri, 24 Nov 2023 08:37:05 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BC8493F73F; Fri, 24 Nov 2023 08:36:16 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 23/25] kselftest/arm64: parse POE_MAGIC in a signal frame Date: Fri, 24 Nov 2023 16:35:08 +0000 Message-Id: <20231124163510.1835740-24-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: 8E1344001C X-Stat-Signature: dqku7g1dq3n7w1z4jos93ahtp1yrd83g X-HE-Tag: 1700843779-660018 X-HE-Meta: U2FsdGVkX1+at50NYq420mAnnZUs6tSJg9+4YVJ7mfm46NzT5hHBftFU9sHbtGxsYCXMB6Lfy4NH1KKQI7tLIQPwBbKfQwVH/Ap0dJmmiHe6q2Ef/bqG8nsNcbkWg4EEzo/wgFt0feC6gmnBH1wAc38C8Bj51HqkPnJtKZA5vV9dy/rLS0gzerEBbm59JjpcQtU/a9AcPWqL7T/dXy0w1LfFI5N4ms5XYPyuaeOdaAr9wRqjktgMzHMYWED811b17TAkOmCV5KYJlOHKMnAxU9tcwD1DEz2mhfrJPV8WLx44qW0JNonGOvc8RXSyjCoV7YXCmIyRJ3cQZvDST4eW4WK6H4AS7L5dz6OHahGGoEN6/CA4yKmzcAzmauQ3Q9eG9c+qFDvnOGRicjZkgR3QQHOecriaR1Cujg8Ld9sVAzxVENyIqjkNETqL5WN/MAfCC2CSjMWbMOhqQy9i4sJZ3SRZTJRVLuEXsERHt6AU1/kKNVq0ZlDUc68ZlWrmy0zKBQS9ayi6lvM9SlL1cKxU+LzEQX4OScEQNL+WVGQft+PBSTj+ewncWWS/imBJpTAojp4/jhozEEwvDEchTrbjLcCJCcM0zIfRwfTNvUMCr1Zh+yFW6UfbJ6cc9jPJx7S5IJl44Q2rnYT0QqtmrZF69B6ahBTdmxdy6SD1ndl4Juvl0HSLfAFKXyUEtTfYAFif0TFp4okN/Iqvl24Xp1V9+Dp1Euq7VKTC3TD6esiFJU6aNtLD+1izlBKhZvmUCmYUzFZSwmxU5LEFBjajFpjOAmzHyGVpNcqOAJpYW0j3Yrs1pQjkV3HtQJKV72V7SOG+EpupPI9+LfW6Qd6+PGzG6QXloyGi8WZVz2Kn67c77QA70tEzIiFgrft7GRVyMe5BCHXNsherVAmI2IsK77VSQQudhfJieYJN/i2o7wKXJlFlEdN88azTGn1cu2PDpNk7zyzs7/i/BRoqxIEOhxi q7khJjkY wEV01FZheMw0ch/lmV4lhloPLeG/6Fx/pfTMED8Qvpi0eUA7Ef/0VoUn3n4lZm8UhFkMQ5R1Jm3I3OG8LNeUzMEmw15rzsqTUcGzdLI3Y/QgQ4gnQWmIo5ief//pfwmB4zqz7aL+uLTEprRir9qGNlT7RGGNYrkkTJVPXiuWqd9xQ+cOVsn+H4n/7rTWYFyXXcl8UbLg7j491eVJH9E04cxZv7ZUeRVUQU0HowYteWqpvXXEd6V0Y2KzH1kuGtVTfQ9dO6wh34leaGeQ= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Teach the signal frame parsing about the new POE frame, avoids warning when it is generated. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: Shuah Khan Reviewed-by: Mark Brown --- tools/testing/selftests/arm64/signal/testcases/testcases.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/tools/testing/selftests/arm64/signal/testcases/testcases.c b/tools/testing/selftests/arm64/signal/testcases/testcases.c index fe950b6bca6b..5dda753870aa 100644 --- a/tools/testing/selftests/arm64/signal/testcases/testcases.c +++ b/tools/testing/selftests/arm64/signal/testcases/testcases.c @@ -161,6 +161,10 @@ bool validate_reserved(ucontext_t *uc, size_t resv_sz, char **err) if (head->size != sizeof(struct esr_context)) *err = "Bad size for esr_context"; break; + case POE_MAGIC: + if (head->size != sizeof(struct poe_context)) + *err = "Bad size for poe_context"; + break; case TPIDR2_MAGIC: if (head->size != sizeof(struct tpidr2_context)) *err = "Bad size for tpidr2_context"; From patchwork Fri Nov 24 16:35:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467939 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id D800FC636BD for ; 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s=arc-20220608; d=hostedemail.com; t=1700843782; a=rsa-sha256; cv=none; b=ttRVOiAikjCYrLHNCrwWaEMc8ySaA8/bTobORfRCal7klGs4EghnZKnsxviQ3dqvQeLMo1 tYsG7ilnwYGy2cgLYjqbjMi51XXZeBRL3HYotOjBsNuw4DPtcRe9+2MIS4WhqYjoBN27EP x2Nbm8X80cYOPZyQrP1rb5GuUGL+cvQ= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D5AAD1BF7; Fri, 24 Nov 2023 08:37:07 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 323DC3F73F; Fri, 24 Nov 2023 08:36:19 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 24/25] kselftest/arm64: Add test case for POR_EL0 signal frame records Date: Fri, 24 Nov 2023 16:35:09 +0000 Message-Id: <20231124163510.1835740-25-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspam-User: X-Rspamd-Server: rspam12 X-Rspamd-Queue-Id: F33E5C0023 X-Stat-Signature: me91rh8siobqc8u6b8oigk6on1asos7t X-HE-Tag: 1700843781-866017 X-HE-Meta: U2FsdGVkX18OkfA+N09w8cqfO/m+DGzm2WkeQZqwOqGz/GpcBV6dELqnCfvBJerLjk7h/+4AiiTN2h6lB1VFMUI+O/t3kejbGFXAvst/CJRXfyn4AQ99mNQYOW7BZM/azNTMsKS+62hH1eFQcNCK1INSzrVJbvuVCWC34W6snRGoHBbIRJnoZHsHyBXcQ3O7+nNGPMVUH3kK2QDkt8YP2VXFDfknixEKYUJZwmzXLyUve2vNIPpiKUuWmWG6zJ+n411+JJ5qfE2xMuc0DX66LAVMTG3VTftUjzNdktTw9b5lVethOrhZq8z6I/3+Bk/3RTj1RvlmTf93iFpyZl/Ua8/Uz7upfqICVG3YNFz0MJO94rzW6cag3/FsFKHEfghu5WOvePqT6OJkWYlmFMvP2VEq+mXZoq+uJROWYrO5LPmYye+8/vAMmhpuFoyBKT7yAL6THUXXUnBJ/Y6TdRn+32h3EUupwWsx/vSsu1s4j+zgmk5ZzW5ooalMkLiWgCT51o5+GbkgDvtmMt/oJDG45mXlht9BbG1nWjVe8DX2azTt3TjFlFUYheVUvRGpfgOQnitCFLdYuuKFYZKS397AJCoonSPpGUS7mCD3aU9Y17isrPP+ZeiXbgV08ry29CYOu2vV2ePvNgFCJM+ZKEeiXsoRnD5cwIO55k2xoyiN9Z0Hus47u8OYE5QC9odyYyOKBPvWEStHLxx2K7ZAauPD/VARfAO6DP05+TL/HkuxwU3uXiT19dnwIyoy0ek+peS6dX6AjwFOpeT9K/mCf+xK5/HfEcAewkCq0ReEJaM/jTm4i3ORRgKrKtaTtXFrnXhHo3gd7janSdhFTYnJ2GejeIQ6WJHro7DIEAiOpSAzQPmMP/fvWB3Onn+CI8QVPHBkI10vh1HOMx3bFjTWsvUSMbskhX/v45oBub973eisqO3MKFys1PBeiLDSKJ3C0j+HlATC8qQDMkR59/Xt0mM 5DxOM3kr wYK5WUDuIulVYSvMcA5gY+/s0UJiTbXnAbQJtsYtoNPxMYyd783tDUVs/hvXwmA90bCcGTJMRA5h/mVqujmrQZEjhXcjFtrBBdC/LVOwrv3J94+ukX/dzxwiuMLEjx3lWQ/WsiWtuF+AJCpzpyVZ63rMN5tXaWMZzL2U+gCJ2/bQNkvuPn90GPx0HZruYDZ1kJBmcuDgeHB8p5cPK3tDb+pKLxq5mPHZKAiJbyvR3njxNS3raw9ebl67SHhf0bp7H566XUpm5fwAbLaU= X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Ensure that we get signal context for POR_EL0 if and only if POE is present on the system. Copied from the TPIDR2 test. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Brown Cc: Shuah Khan Reviewed-by: Mark Brown --- .../testing/selftests/arm64/signal/.gitignore | 1 + .../arm64/signal/testcases/poe_siginfo.c | 86 +++++++++++++++++++ 2 files changed, 87 insertions(+) create mode 100644 tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c diff --git a/tools/testing/selftests/arm64/signal/.gitignore b/tools/testing/selftests/arm64/signal/.gitignore index 839e3a252629..6bcb27bd506b 100644 --- a/tools/testing/selftests/arm64/signal/.gitignore +++ b/tools/testing/selftests/arm64/signal/.gitignore @@ -5,6 +5,7 @@ sme_* ssve_* sve_* tpidr2_* +poe_siginfo za_* zt_* !*.[ch] diff --git a/tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c b/tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c new file mode 100644 index 000000000000..d890029304c4 --- /dev/null +++ b/tools/testing/selftests/arm64/signal/testcases/poe_siginfo.c @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2023 Arm Limited + * + * Verify that the POR_EL0 register context in signal frames is set up as + * expected. + */ + +#include +#include +#include +#include +#include +#include + +#include "test_signals_utils.h" +#include "testcases.h" + +static union { + ucontext_t uc; + char buf[1024 * 128]; +} context; + +#define SYS_POR_EL0 "S3_3_C10_C2_4" + +static uint64_t get_por_el0(void) +{ + uint64_t val; + + asm volatile ( + "mrs %0, " SYS_POR_EL0 "\n" + : "=r"(val) + : + : "cc"); + + return val; +} + +int poe_present(struct tdescr *td, siginfo_t *si, ucontext_t *uc) +{ + struct _aarch64_ctx *head = GET_BUF_RESV_HEAD(context); + struct poe_context *poe_ctx; + size_t offset; + bool in_sigframe; + bool have_poe; + __u64 orig_poe; + + have_poe = getauxval(AT_HWCAP2) & HWCAP2_POE; + if (have_poe) + orig_poe = get_por_el0(); + + if (!get_current_context(td, &context.uc, sizeof(context))) + return 1; + + poe_ctx = (struct poe_context *) + get_header(head, POE_MAGIC, td->live_sz, &offset); + + in_sigframe = poe_ctx != NULL; + + fprintf(stderr, "POR_EL0 sigframe %s on system %s POE\n", + in_sigframe ? "present" : "absent", + have_poe ? "with" : "without"); + + td->pass = (in_sigframe == have_poe); + + /* + * Check that the value we read back was the one present at + * the time that the signal was triggered. + */ + if (have_poe && poe_ctx) { + if (poe_ctx->por_el0 != orig_poe) { + fprintf(stderr, "POR_EL0 in frame is %llx, was %llx\n", + poe_ctx->por_el0, orig_poe); + td->pass = false; + } + } + + return 0; +} + +struct tdescr tde = { + .name = "POR_EL0", + .descr = "Validate that POR_EL0 is present as expected", + .timeout = 3, + .run = poe_present, +}; From patchwork Fri Nov 24 16:35:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joey Gouly X-Patchwork-Id: 13467940 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from kanga.kvack.org (kanga.kvack.org [205.233.56.17]) by smtp.lore.kernel.org (Postfix) with ESMTP id B44B1C61D97 for ; Fri, 24 Nov 2023 16:36:32 +0000 (UTC) Received: by kanga.kvack.org (Postfix) id 8D42D6B066F; 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t=1700843784; a=rsa-sha256; cv=none; b=MK1dZ7Y8WOG8CgaefdU7P5wDVGCBxpl+qe1gYLpfjhGU6pjG73pfrlm7TS+Wbhkd4ZwEsQ 7qb8cbjq4MHxvJ8LdqTxBhKdxTwsJS2f+JWVFCUyFeef+bto3lbjndaA0OI3Za3EJBU2eR sXEh7fSsOxwVjozbiV3JjQjSu/H/qOA= Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4BB5B1C01; Fri, 24 Nov 2023 08:37:10 -0800 (PST) Received: from e124191.cambridge.arm.com (e124191.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9C6C93F73F; Fri, 24 Nov 2023 08:36:21 -0800 (PST) From: Joey Gouly To: linux-arm-kernel@lists.infradead.org Cc: akpm@linux-foundation.org, aneesh.kumar@linux.ibm.com, broonie@kernel.org, catalin.marinas@arm.com, dave.hansen@linux.intel.com, joey.gouly@arm.com, maz@kernel.org, oliver.upton@linux.dev, shuah@kernel.org, will@kernel.org, kvmarm@lists.linux.dev, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-kselftest@vger.kernel.org, James Morse , Suzuki K Poulose , Zenghui Yu Subject: [PATCH v3 25/25] KVM: selftests: get-reg-list: add Permission Overlay registers Date: Fri, 24 Nov 2023 16:35:10 +0000 Message-Id: <20231124163510.1835740-26-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231124163510.1835740-1-joey.gouly@arm.com> References: <20231124163510.1835740-1-joey.gouly@arm.com> MIME-Version: 1.0 X-Rspamd-Queue-Id: 8915B1C0015 X-Rspam-User: X-Rspamd-Server: rspam05 X-Stat-Signature: hg9zhepgikfqo7q9m956yexfrziheyy6 X-HE-Tag: 1700843784-767164 X-HE-Meta: U2FsdGVkX19r+BmCbpbg1CwMP7sHYK/SHmInBpIk9DQ6qG97LCBea4oos41iIs71bGiarqAVN/MeMILO4j1UpIAC6fYwUpOs1sgsFmV0jqMx0iCwrg7ixPyzYJC2gzXxx9RMe3qAFuoe9M9TteaTlNDi88Os5oUDZiO+SVvGGdw6Go98vfg2Zeee+hk2WxJnwKyMwcxAXNWvWVcMnV+7+BKWKaUiIvHNgRZZ7+y3tvMelW+TS0ta78PHS09D3QLw0LxPgxdUd6GVaQPmXjyFUIevBhrCT2gza806Jwu4IwjoL4wA5nUfDuPItTVZoj4C0pzhJme0Ap1cdmvKOc26GUOkCQx23yTr9shwXQ5lsDAN7ZoPQ7carAWV9OWzXwQUIiiSYb2qzwgVTkIAjA+nBXTqX7at9SgC9QMS4bHbu0HRTon3fwBibFaX9NRP0+35WdxkVwex36se1+b57Jrvp3TXoiqURylTjww0GlEA2o3sljOHwXkyUBb1XHyTA/g+x1I1dkfatM3VtcbdwZKXgBeLxC8+mAUxkYZXdHOOEUFsCio+2ypGsIQeXjzS3ofjSG/EUoF2Ri0PaIWeCU+ih+ckGdg3W6kw2aKXExQsyK1p2NliGaSezp2RzuutJTlyC/igFm5XvVwey6yo3rBfaFl3BTvNoX+xKFLIKxeOwVu2xHABtBMe5u4xiUL+XxoPeESb7DZwotDPQ9NhaGX66xxI5v9//rRpq9YSFPGAtdSJY+BysnVM5pwM21h9TUogVMzg6xHmf4nFu82fhP5Qdls23JLsRrglMFQce15QE7VJIljPjlp5R6U70drAqhIYJ3ySEGEYGFW3wYqQVBJQj7PT+ijpSzwuGQdYct2N04KvKNwbgjggvZrirkA1wg6oTg4BGY8VP/plNY4lERmhNM1R4bAaMLdmNrLKo0Vcm5r0aTlzDVaUTsK8vt3DdP0zTLWvdC6v+jeBftNiT+J FRjNMqyE fiUQYWGjBpGmyo2IVmbB+OUUTaL4qXhKTR99ZFoz+sfZiPAgI9U+ENLHv5p67cmJ84XjwF0jgRrffLUHReGG3nZMdhnx2QWENhKa7h/Y4B04fevW8Ju6f+vTSFIgOxnGwyfpqsv1ZAV7DzAyzmaV5XAOtNiMXn2KEPFjGXICgthanpkhYLgxwCtRzSQ== X-Bogosity: Ham, tests=bogofilter, spamicity=0.000000, version=1.2.4 Sender: owner-linux-mm@kvack.org Precedence: bulk X-Loop: owner-majordomo@kvack.org List-ID: List-Subscribe: List-Unsubscribe: Add new system registers: - POR_EL1 - POR_EL0 Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Cc: Marc Zyngier Cc: Oliver Upton Cc: Shuah Khan Reviewed-by: Mark Brown --- tools/testing/selftests/kvm/aarch64/get-reg-list.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/tools/testing/selftests/kvm/aarch64/get-reg-list.c b/tools/testing/selftests/kvm/aarch64/get-reg-list.c index 709d7d721760..ac661ebf6859 100644 --- a/tools/testing/selftests/kvm/aarch64/get-reg-list.c +++ b/tools/testing/selftests/kvm/aarch64/get-reg-list.c @@ -40,6 +40,18 @@ static struct feature_id_reg feat_id_regs[] = { ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ 4, 1 + }, + { + ARM64_SYS_REG(3, 0, 10, 2, 4), /* POR_EL1 */ + ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ + 16, + 1 + }, + { + ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */ + ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */ + 16, + 1 } }; @@ -468,6 +480,7 @@ static __u64 base_regs[] = { ARM64_SYS_REG(3, 0, 10, 2, 0), /* MAIR_EL1 */ ARM64_SYS_REG(3, 0, 10, 2, 2), /* PIRE0_EL1 */ ARM64_SYS_REG(3, 0, 10, 2, 3), /* PIR_EL1 */ + ARM64_SYS_REG(3, 0, 10, 2, 4), /* POR_EL1 */ ARM64_SYS_REG(3, 0, 10, 3, 0), /* AMAIR_EL1 */ ARM64_SYS_REG(3, 0, 12, 0, 0), /* VBAR_EL1 */ ARM64_SYS_REG(3, 0, 12, 1, 1), /* DISR_EL1 */ @@ -475,6 +488,7 @@ static __u64 base_regs[] = { ARM64_SYS_REG(3, 0, 13, 0, 4), /* TPIDR_EL1 */ ARM64_SYS_REG(3, 0, 14, 1, 0), /* CNTKCTL_EL1 */ ARM64_SYS_REG(3, 2, 0, 0, 0), /* CSSELR_EL1 */ + ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */ ARM64_SYS_REG(3, 3, 13, 0, 2), /* TPIDR_EL0 */ ARM64_SYS_REG(3, 3, 13, 0, 3), /* TPIDRRO_EL0 */ ARM64_SYS_REG(3, 3, 14, 0, 1), /* CNTPCT_EL0 */