From patchwork Thu Feb 14 17:12:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Krish Sadhukhan X-Patchwork-Id: 10813379 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 53B766C2 for ; Thu, 14 Feb 2019 17:37:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4183A2ED5D for ; Thu, 14 Feb 2019 17:37:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 340C72ED60; Thu, 14 Feb 2019 17:37:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BACFD2ED5D for ; Thu, 14 Feb 2019 17:37:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437457AbfBNRh0 (ORCPT ); Thu, 14 Feb 2019 12:37:26 -0500 Received: from userp2120.oracle.com ([156.151.31.85]:42166 "EHLO userp2120.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2403813AbfBNRh0 (ORCPT ); Thu, 14 Feb 2019 12:37:26 -0500 Received: from pps.filterd (userp2120.oracle.com [127.0.0.1]) by userp2120.oracle.com (8.16.0.27/8.16.0.27) with SMTP id x1EHYPCS150066; Thu, 14 Feb 2019 17:37:19 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=oracle.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type : content-transfer-encoding; s=corp-2018-07-02; bh=pU8mHwCz8hhUkXCEiXn2hXWoubDstqTQq44bd5kH8os=; b=Wb/o+oBJPtKrujavnLS7rHeVLfUT3NeBw3SuqK2+w2y5aEgvui7JhebwValR9UorVNPP 8fEVTb+hcykC70j6r28iyW0abFw1z0IsKPmbi6q/2WtNjfrfZSe0kBrFTnX0xLAvnTrt vltjzNUi5gr9veRwUD+Ujt5I9ouWJnmg8BOCdbOARu63c9FyVafLjJ/8VWx7e0eLd2MF ommX/c+ZB1E6i57r3oUEI9jBLJCzytXJT/xdiZsS0pCQVrC2eYgakQ21sKPcj1tW+sQL 7DfAwjWxlNgUtRG4Zuzi/qakbKOoiff6oZmlqHo/nQe6s1dpqNDOCZl2jKmEITCUSpzj 9A== Received: from userv0022.oracle.com (userv0022.oracle.com [156.151.31.74]) by userp2120.oracle.com with ESMTP id 2qhree9fec-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 14 Feb 2019 17:37:19 +0000 Received: from userv0122.oracle.com (userv0122.oracle.com [156.151.31.75]) by userv0022.oracle.com (8.14.4/8.14.4) with ESMTP id x1EHbJtU031562 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 14 Feb 2019 17:37:19 GMT Received: from abhmp0016.oracle.com (abhmp0016.oracle.com [141.146.116.22]) by userv0122.oracle.com (8.14.4/8.14.4) with ESMTP id x1EHbIOo022717; Thu, 14 Feb 2019 17:37:18 GMT Received: from ban25x6uut29.us.oracle.com (/10.153.73.29) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Thu, 14 Feb 2019 17:37:18 +0000 From: Krish Sadhukhan To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, rkrcmar@redhat.com, jmattson@google.com Subject: [PATCH][kvm-unit-test nVMX]: Check Host Control Registers on vmentry of L2 guests Date: Thu, 14 Feb 2019 12:12:14 -0500 Message-Id: <20190214171214.3798-2-krish.sadhukhan@oracle.com> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190214171214.3798-1-krish.sadhukhan@oracle.com> References: <20190214171214.3798-1-krish.sadhukhan@oracle.com> MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=nai engine=5900 definitions=9167 signatures=668683 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=842 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1902140119 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP According to section "Checks on VMX Controls" in Intel SDM vol 3C, the following checks are performed on vmentry of L2 guests: - The CR0 field must not set any bit to a value not supported in VMX operation. - The CR4 field must not set any bit to a value not supported in VMX operation. - On processors that support Intel 64 architecture, the CR3 field must be such that bits 63:52 and bits in the range 51:32 beyond the processor’s physical-address width must be 0. Signed-off-by: Krish Sadhukhan Reviewed-by: Liam Merwick --- lib/x86/processor.h | 1 + x86/vmx_tests.c | 77 +++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 78 insertions(+) diff --git a/lib/x86/processor.h b/lib/x86/processor.h index 15237a5..916e67d 100644 --- a/lib/x86/processor.h +++ b/lib/x86/processor.h @@ -40,6 +40,7 @@ #define X86_CR4_UMIP 0x00000800 #define X86_CR4_VMXE 0x00002000 #define X86_CR4_PCIDE 0x00020000 +#define X86_CR4_SMEP 0x00100000 #define X86_CR4_SMAP 0x00200000 #define X86_CR4_PKE 0x00400000 diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 66a87f6..7af0430 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -4995,6 +4995,81 @@ static void test_sysenter_field(u32 field, const char *name) vmcs_write(field, addr_saved); } +static void test_ctl_reg(const char *cr_name, u64 cr, u64 fixed0, u64 fixed1) +{ + u64 val; + u64 cr_saved = vmcs_read(cr); + + val = fixed0 & fixed1; + if (cr == HOST_CR4) + val |= X86_CR4_PAE; + vmcs_write(cr, val); + report_prefix_pushf("%s %lx", cr_name, val); + test_vmx_vmlaunch(0, false); + report_prefix_pop(); + + val = fixed0 | fixed1; + vmcs_write(cr, val); + report_prefix_pushf("%s %lx", cr_name, val); + test_vmx_vmlaunch(0, false); + report_prefix_pop(); + + val = fixed0 ^ fixed1; + vmcs_write(cr, val); + report_prefix_pushf("%s %lx", cr_name, val); + test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD, false); + report_prefix_pop(); + + val = fixed0 & (fixed1 << 1); + vmcs_write(cr, val); + report_prefix_pushf("%s %lx", cr_name, val); + test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD, false); + report_prefix_pop(); + + vmcs_write(cr, cr_saved); +} + +/* + * 1. The CR0 field must not set any bit to a value not supported in VMX + * operation. + * 2. The CR4 field must not set any bit to a value not supported in VMX + * operation. + * 3. On processors that support Intel 64 architecture, the CR3 field must + * be such that bits 63:52 and bits in the range 51:32 beyond the + * processor’s physical-address width must be 0. + * + * [Intel SDM] + */ +static void test_host_ctl_regs(void) +{ + u64 fixed0, fixed1, cr3, cr3_saved; + int i; + + /* Test CR0 */ + fixed0 = rdmsr(MSR_IA32_VMX_CR0_FIXED0); + fixed1 = rdmsr(MSR_IA32_VMX_CR0_FIXED1); + test_ctl_reg("HOST_CR0", HOST_CR0, fixed0, fixed1); + + /* Test CR4 */ + fixed0 = rdmsr(MSR_IA32_VMX_CR4_FIXED0); + fixed1 = rdmsr(MSR_IA32_VMX_CR4_FIXED1) & + ~(X86_CR4_SMEP | X86_CR4_SMAP); + test_ctl_reg("HOST_CR4", HOST_CR4, fixed0, fixed1); + + /* Test CR3 */ + cr3_saved = vmcs_read(HOST_CR3); + for (i = cpuid_maxphyaddr(); i < 64; i++) { + cr3 = cr3_saved | (1ul << i); + vmcs_write(HOST_CR3, cr3); + report_prefix_pushf("HOST_CR3 %lx", cr3); + test_vmx_vmlaunch(VMXERR_ENTRY_INVALID_HOST_STATE_FIELD, + false); + report_prefix_pop(); + } + + vmcs_write(HOST_CR3, cr3_saved); +} + /* * Check that the virtual CPU checks the VMX Host State Area as * documented in the Intel SDM. @@ -5008,6 +5083,8 @@ static void vmx_host_state_area_test(void) */ vmcs_write(GUEST_RFLAGS, 0); + test_host_ctl_regs(); + test_sysenter_field(HOST_SYSENTER_ESP, "HOST_SYSENTER_ESP"); test_sysenter_field(HOST_SYSENTER_EIP, "HOST_SYSENTER_EIP"); }