From patchwork Tue Nov 28 11:51:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13471063 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41173C4167B for ; Tue, 28 Nov 2023 11:51:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A6FDC10E4E6; Tue, 28 Nov 2023 11:51:46 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id BABCC10E4E6 for ; Tue, 28 Nov 2023 11:51:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701172304; x=1732708304; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=f9jDwvBP0V4MNvoOrDs0xEGu4ChK6dTGynxKSeSiObA=; b=SEeFHz/m8CcQSKY6XbnUaEdp65/VbUwcszqz/4MKF/d+QDt8cjTJ2pDF +j1sFS9yyCalDBjcqbm1LRhb/lAXRCySjnpl7swLt1pXCv76QKA4mQkm8 MdQG+CeLN1d23vo4SoGuFRwaGtkx1forivGS1iqhTfAGcIh9qYTrDcjia akmC/jQvw7AZmXqXPyjTn/w6Gt242XvSvTaoE0Ig8fucbz/Wi4QfoyLzr LkJZbZRy7EWgWJmJO47ENw+1ck4lNV6UT6VeU0K7/XbSxntZYWzmBvnsj wWCzZUtTjMn+gfRLe5o3qqWsSf0k7NiA/hynzKb4Tx+81B7/KzyFrguNr A==; X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="459411585" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="459411585" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:51:44 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="761907418" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="761907418" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 28 Nov 2023 03:51:42 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:51:41 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:31 +0200 Message-ID: <20231128115138.13238-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 1/8] drm/i915/cdclk: s/-1/~0/ when dealing with unsigned values X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä cdclk_pll_is_unknown() used ~0 when checking for the "VCO is unknown" value, but the assignment uses -1. They are the same in the end, but let's use the same ~0 form on both sides for consistency. Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index b93d1ad7936d..0dca29ec799b 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1180,7 +1180,7 @@ static void skl_sanitize_cdclk(struct drm_i915_private *dev_priv) /* force cdclk programming */ dev_priv->display.cdclk.hw.cdclk = 0; /* force full PLL disable + enable */ - dev_priv->display.cdclk.hw.vco = -1; + dev_priv->display.cdclk.hw.vco = ~0; } static void skl_cdclk_init_hw(struct drm_i915_private *dev_priv) @@ -2075,7 +2075,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv) dev_priv->display.cdclk.hw.cdclk = 0; /* force full PLL disable + enable */ - dev_priv->display.cdclk.hw.vco = -1; + dev_priv->display.cdclk.hw.vco = ~0; } static void bxt_cdclk_init_hw(struct drm_i915_private *dev_priv) From patchwork Tue Nov 28 11:51:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13471064 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7ECECC4167B for ; Tue, 28 Nov 2023 11:51:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 073EC10E4E7; Tue, 28 Nov 2023 11:51:50 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id C91A410E4E7 for ; Tue, 28 Nov 2023 11:51:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701172307; x=1732708307; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=SOtIsfFZlWNqgoXG4AOZUkYKmz9RHI64lU8eEg/wLnE=; b=lovafFIi8u7+sb7Zb+SdpaebXYz1khNmn2F1WOD7LIVkXCHyB/NrFc9v lWybswfY6ihEk7+EOoXB3AjHZle1yKR4ZwnDdcwpm5fIT8D77XVc4QSnd GGRlQCfmjX70ZCexusQ9hdhsqANx4+9NVwAFPOfLSF3W8agKM+Tf/yqO/ Hxmz/4jEckBCXMrTRahT+n1FG14zCvhJLKwRewbIr82+g5cpKVUCp3/I7 1P7OT10TNfpBeDjXqnk2cJsNXp+Xzhrc8eMLG8n5Jva6s+lmhaHtwal6b AfspLb+I9wkWATDP0uwyCt0s5qnm7vKzhF/uYzt33A/M226Ff9ckFjZTG w==; X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="459411592" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="459411592" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:51:47 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="761907431" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="761907431" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 28 Nov 2023 03:51:45 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:51:44 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:32 +0200 Message-ID: <20231128115138.13238-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 2/8] drm/i915/cdclk: Give the squash waveform length a name X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Replace the slightly magic 'size = 16' with a bit more descriptive name. We'll have another user for this value later on. Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 0dca29ec799b..87d5e5b67c4e 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1800,6 +1800,8 @@ static bool cdclk_pll_is_unknown(unsigned int vco) return vco == ~0; } +static const int cdclk_squash_len = 16; + static int cdclk_squash_divider(u16 waveform) { return hweight16(waveform ?: 0xffff); @@ -1811,7 +1813,6 @@ static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private *i91 struct intel_cdclk_config *mid_cdclk_config) { u16 old_waveform, new_waveform, mid_waveform; - int size = 16; int div = 2; /* Return if PLL is in an unknown state, force a complete disable and re-enable. */ @@ -1850,7 +1851,8 @@ static bool cdclk_compute_crawl_and_squash_midpoint(struct drm_i915_private *i91 } mid_cdclk_config->cdclk = DIV_ROUND_CLOSEST(cdclk_squash_divider(mid_waveform) * - mid_cdclk_config->vco, size * div); + mid_cdclk_config->vco, + cdclk_squash_len * div); /* make sure the mid clock came out sane */ From patchwork Tue Nov 28 11:51:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13471065 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B330C4167B for ; Tue, 28 Nov 2023 11:51:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A8C3C10E4E8; Tue, 28 Nov 2023 11:51:52 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id C0C7110E4E8 for ; Tue, 28 Nov 2023 11:51:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701172310; x=1732708310; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=003sWAA/kVc7Tu8wyKFCBQO7V5Jzg41p2A21KkPESik=; b=BQQWNv7ebOSxRsE0Y9/Vv6EaekPN5AJUjfCidgkV/gMcDY0x4d/aVFJu biyoR+OOTo4Q75Edt+gTyd2tKzuVrImublel++hko5dbQJ4dKL347G24s ayNgvbhm39XwU/ewHRebSxdwWW7tUnnSXdPOY7tRfaIMWPYaMdt73M/Hr OUD5ZZOQdVTs3Vkh2NXreTkfFKlK6j4WctG0a4inBX/+0dSJn5WsCD9uA jWQ7YK3j4KbnOgmIiuXPpVK86tb6tbkp7Q7lMFJX57Npmka6CLwrVYmZZ +kbYNVTLY/A3Vz4pr0L8j3Ug8laL2xjypYqyS5OrRvmm9QqeqSuy4rftr A==; X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="459411595" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="459411595" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:51:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="761907437" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="761907437" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 28 Nov 2023 03:51:48 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:51:48 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:33 +0200 Message-ID: <20231128115138.13238-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 3/8] drm/i915/cdclk: Remove the assumption that cd2x div==2 when using squashing X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Currently we have a hardcoded assumption that the cd2x divider is always 2 when squahsing is used. While that is true for all current platforms it might not hold in the future. So eliminate the assumption and calculate the correct divider from the other parameters. Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 87d5e5b67c4e..d45071675629 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1899,10 +1899,8 @@ static void _bxt_set_cdclk(struct drm_i915_private *dev_priv, waveform = cdclk_squash_waveform(dev_priv, cdclk); - if (waveform) - clock = vco / 2; - else - clock = cdclk; + clock = DIV_ROUND_CLOSEST(cdclk * cdclk_squash_len, + cdclk_squash_divider(waveform)); if (HAS_CDCLK_SQUASH(dev_priv)) dg2_cdclk_squash_program(dev_priv, waveform); From patchwork Tue Nov 28 11:51:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13471066 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1931C4167B for ; Tue, 28 Nov 2023 11:51:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5218510E4EA; Tue, 28 Nov 2023 11:51:56 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id D262E10E4EA for ; Tue, 28 Nov 2023 11:51:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701172313; x=1732708313; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=AF1YDEV+Dn6ipMi57sQGq7y7PkB54VLWbUwxk2veq3M=; b=O90E71HKp9kRVjJB3BYJrJG9Ee9FP0w0hfO7acAP8Qqa736lvXMTPkvT PmQt1d71Dq21irpiuYN6TKGRT49nuI0tQ1H9YfcMMt44Xx/m0khb0SRzA 3+OgUvXXVc63uNXi3f1e1gnVBHpSC7OcnU95Of//h+EkzPztxDb6+Ybee ehytC8hgHjtBMnBKPsuGPkY5/NNg3tDAP2Dl1XJszjcPsZWnc4mw5kFiL MVuliyw4Ak/SNd3JYFXt3ZLkxcJxuk4BH773v4j5adcgRsafb25B5PplT BUJbLsu5eRYi24uy7MtxFkWrNu48Jo0UbXAXDvt0HRJU7hk4W4gceDxQ/ w==; X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="459411599" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="459411599" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:51:53 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="761907442" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="761907442" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 28 Nov 2023 03:51:51 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:51:50 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:34 +0200 Message-ID: <20231128115138.13238-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 4/8] drm/i915/cdclk: Rewrite cdclk->voltage_level selection to use tables X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The cdclk->voltage_level if ladders are hard to read, especially as they're written the other way around compared to how bspec lists the limits. Let's rewrite them to use simple arrays that gives us the max cdclk for each voltage level. Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 83 ++++++++++++++-------- 1 file changed, 53 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index d45071675629..6f0a050ad663 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1446,50 +1446,73 @@ static u8 bxt_calc_voltage_level(int cdclk) return DIV_ROUND_UP(cdclk, 25000); } +static u8 calc_voltage_level(int cdclk, int num_voltage_levels, + const int voltage_level_max_cdclk[]) +{ + int voltage_level; + + for (voltage_level = 0; voltage_level < num_voltage_levels; voltage_level++) { + if (cdclk <= voltage_level_max_cdclk[voltage_level]) + return voltage_level; + } + + MISSING_CASE(cdclk); + return num_voltage_levels - 1; +} + static u8 icl_calc_voltage_level(int cdclk) { - if (cdclk > 556800) - return 2; - else if (cdclk > 312000) - return 1; - else - return 0; + static const int icl_voltage_level_max_cdclk[] = { + [0] = 312000, + [1] = 556800, + [2] = 652800, + }; + + return calc_voltage_level(cdclk, + ARRAY_SIZE(icl_voltage_level_max_cdclk), + icl_voltage_level_max_cdclk); } static u8 ehl_calc_voltage_level(int cdclk) { - if (cdclk > 326400) - return 3; - else if (cdclk > 312000) - return 2; - else if (cdclk > 180000) - return 1; - else - return 0; + static const int ehl_voltage_level_max_cdclk[] = { + [0] = 180000, + [1] = 312000, + [2] = 326400, + [3] = 556800, + }; + + return calc_voltage_level(cdclk, + ARRAY_SIZE(ehl_voltage_level_max_cdclk), + ehl_voltage_level_max_cdclk); } static u8 tgl_calc_voltage_level(int cdclk) { - if (cdclk > 556800) - return 3; - else if (cdclk > 326400) - return 2; - else if (cdclk > 312000) - return 1; - else - return 0; + static const int tgl_voltage_level_max_cdclk[] = { + [0] = 312000, + [1] = 326400, + [2] = 556800, + [3] = 652800, + }; + + return calc_voltage_level(cdclk, + ARRAY_SIZE(tgl_voltage_level_max_cdclk), + tgl_voltage_level_max_cdclk); } static u8 rplu_calc_voltage_level(int cdclk) { - if (cdclk > 556800) - return 3; - else if (cdclk > 480000) - return 2; - else if (cdclk > 312000) - return 1; - else - return 0; + static const int rplu_voltage_level_max_cdclk[] = { + [0] = 312000, + [1] = 480000, + [2] = 556800, + [3] = 652800, + }; + + return calc_voltage_level(cdclk, + ARRAY_SIZE(rplu_voltage_level_max_cdclk), + rplu_voltage_level_max_cdclk); } static void icl_readout_refclk(struct drm_i915_private *dev_priv, From patchwork Tue Nov 28 11:51:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13471067 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 050C3C07CA9 for ; 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X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="459411604" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="459411604" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:51:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="761907449" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="761907449" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 28 Nov 2023 03:51:54 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:51:54 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:35 +0200 Message-ID: <20231128115138.13238-6-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 5/8] drm/i915/mtl: Fix voltage_level for cdclk==480MHz X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Allow MTL to use voltage level 1 for 480MHz cdclk, instead of the voltage level 2 that it's currently using. Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 6f0a050ad663..f6446102490d 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -3512,7 +3512,7 @@ static const struct intel_cdclk_funcs mtl_cdclk_funcs = { .get_cdclk = bxt_get_cdclk, .set_cdclk = bxt_set_cdclk, .modeset_calc_cdclk = bxt_modeset_calc_cdclk, - .calc_voltage_level = tgl_calc_voltage_level, + .calc_voltage_level = rplu_calc_voltage_level, }; static const struct intel_cdclk_funcs rplu_cdclk_funcs = { From patchwork Tue Nov 28 11:51:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13471068 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91629C4167B for ; Tue, 28 Nov 2023 11:52:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C422210E4ED; Tue, 28 Nov 2023 11:52:01 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id D3D9C10E4ED for ; Tue, 28 Nov 2023 11:51:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701172319; x=1732708319; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=DOHr/YXhnEKdnrhFv2qa0iQjUrb5xE/CWQG12BOOyNU=; b=Wc/cY2eWPGCoFJfNn0QpUVr3trAbb/8EF1oKwYijiaejBW0hoLgZrbJf vD1YPC5DVtafpfAeJUYQCf5rR/pkVGryl4frbgSgRm3HS79gfpA454o1R l1N4vb5gVQLYj7R2EHvvDERvedhCNOwh48YG+oeIRTpT8gdTG0xRpuzJx tFdvPWJYDY2xdV3zttNR2ZJnLo++hxChh0oXfNxqSe6tBnh48ArR3CQPp MCf60ZfZH95FoRZAefv6g2n3w6n9VmKJIydynVdFUAQiSYCX4L0HERZyi QQh6SiFm/Xw+80YREnEbMCRTB97vKSjIJiTbFnp7nDcjgb8kd5UZP7Qtq Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="459411609" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="459411609" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:51:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="761907455" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="761907455" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 28 Nov 2023 03:51:57 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:51:57 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:36 +0200 Message-ID: <20231128115138.13238-7-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 6/8] drm/i915: Split intel_ddi_compute_min_voltage_level() into platform variants X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä The mess inside intel_ddi_compute_min_voltage_level() is illegible. Clean it up a bit by splitting the internals into per-platform functions. TODO: make it a vfunc? Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_ddi.c | 37 +++++++++++++++++++----- 1 file changed, 30 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 38f28c480b38..bcfcd7e789f0 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3672,16 +3672,39 @@ static bool intel_ddi_is_audio_enabled(struct drm_i915_private *dev_priv, AUDIO_OUTPUT_ENABLE(cpu_transcoder); } +static int tgl_ddi_min_voltage_level(const struct intel_crtc_state *crtc_state) +{ + if (crtc_state->port_clock > 594000) + return 2; + else + return 0; +} + +static int jsl_ddi_min_voltage_level(const struct intel_crtc_state *crtc_state) +{ + if (crtc_state->port_clock > 594000) + return 3; + else + return 0; +} + +static int icl_ddi_min_voltage_level(const struct intel_crtc_state *crtc_state) +{ + if (crtc_state->port_clock > 594000) + return 1; + else + return 0; +} + void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, struct intel_crtc_state *crtc_state) { - if (DISPLAY_VER(dev_priv) >= 12 && crtc_state->port_clock > 594000) - crtc_state->min_voltage_level = 2; - else if ((IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) && - crtc_state->port_clock > 594000) - crtc_state->min_voltage_level = 3; - else if (DISPLAY_VER(dev_priv) >= 11 && crtc_state->port_clock > 594000) - crtc_state->min_voltage_level = 1; + if (DISPLAY_VER(dev_priv) >= 12) + crtc_state->min_voltage_level = tgl_ddi_min_voltage_level(crtc_state); + else if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) + crtc_state->min_voltage_level = jsl_ddi_min_voltage_level(crtc_state); + else if (DISPLAY_VER(dev_priv) >= 11) + crtc_state->min_voltage_level = icl_ddi_min_voltage_level(crtc_state); } static enum transcoder bdw_transcoder_master_readout(struct drm_i915_private *dev_priv, From patchwork Tue Nov 28 11:51:37 2023 Content-Type: text/plain; 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28 Nov 2023 03:52:00 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:52:00 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:37 +0200 Message-ID: <20231128115138.13238-8-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 7/8] drm/i915/mtl: Calculate the correct voltage level from port_clock X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä On MTL we need to bump the voltage level to only 1 (not 2) when port clock exceeds 594MHz. Make it so. Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index bcfcd7e789f0..dd04bd7b348c 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3699,7 +3699,9 @@ static int icl_ddi_min_voltage_level(const struct intel_crtc_state *crtc_state) void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, struct intel_crtc_state *crtc_state) { - if (DISPLAY_VER(dev_priv) >= 12) + if (DISPLAY_VER(dev_priv) >= 14) + crtc_state->min_voltage_level = icl_ddi_min_voltage_level(crtc_state); + else if (DISPLAY_VER(dev_priv) >= 12) crtc_state->min_voltage_level = tgl_ddi_min_voltage_level(crtc_state); else if (IS_JASPERLAKE(dev_priv) || IS_ELKHARTLAKE(dev_priv)) crtc_state->min_voltage_level = jsl_ddi_min_voltage_level(crtc_state); From patchwork Tue Nov 28 11:51:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13471070 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4226AC07CA9 for ; Tue, 28 Nov 2023 11:52:08 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C5A3210E4F0; Tue, 28 Nov 2023 11:52:07 +0000 (UTC) Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.100]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3770510E4F0 for ; Tue, 28 Nov 2023 11:52:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701172326; x=1732708326; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=kXLv3Ztx/QT/IOD2ATg77ncDsyMyHGpbABxk+v3hUsw=; b=LYmgqzvLHHk51EH0Aw95ev8owwQ3ciOb4k+Mr1JTiHxCUq/4ssf67D7X vkrNwaV0bhVvyaf/uDVX7bagd9LIUDGZurhZ0a1JP0jDEZ/kwOIilrUHq 7jBE8rzs6dPJgM4h4qadOnhT5p4KT0RIwwnEnAw/eKIUBbk2wuVek89fC su2jQNMbakJ5wYfSaqAOSazEkCh4k47IWLICYj4/pUpic4pS99v0nI/lz KX/H8HrWqEEguKv2wHLAa3LGIjPjxnOQEubvB1U8WlgzFbGV7SKMNe0+/ tcRXjx/48fiJH9WMDAGKF9t5lhSSKYYKXnHshvo6VuGoEJGvpZPteEgy8 Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="459411616" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="459411616" Received: from orsmga007.jf.intel.com ([10.7.209.58]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Nov 2023 03:52:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10907"; a="761907463" X-IronPort-AV: E=Sophos;i="6.04,233,1695711600"; d="scan'208";a="761907463" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by orsmga007.jf.intel.com with SMTP; 28 Nov 2023 03:52:04 -0800 Received: by stinkbox (sSMTP sendmail emulation); Tue, 28 Nov 2023 13:52:03 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Tue, 28 Nov 2023 13:51:38 +0200 Message-ID: <20231128115138.13238-9-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231128115138.13238-1-ville.syrjala@linux.intel.com> References: <20231128115138.13238-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 8/8] drm/i915: Simplify intel_ddi_compute_min_voltage_level() X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Drop the redundant dev_priv parameters from intel_ddi_compute_min_voltage_level() to make life easier. Signed-off-by: Ville Syrjälä Reviewed-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++++---- drivers/gpu/drm/i915/display/intel_ddi.h | 3 +-- drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 +- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index dd04bd7b348c..12a29363e5df 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3696,9 +3696,10 @@ static int icl_ddi_min_voltage_level(const struct intel_crtc_state *crtc_state) return 0; } -void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, - struct intel_crtc_state *crtc_state) +void intel_ddi_compute_min_voltage_level(struct intel_crtc_state *crtc_state) { + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); + if (DISPLAY_VER(dev_priv) >= 14) crtc_state->min_voltage_level = icl_ddi_min_voltage_level(crtc_state); else if (DISPLAY_VER(dev_priv) >= 12) @@ -3920,7 +3921,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder, pipe_config->lane_lat_optim_mask = bxt_ddi_phy_get_lane_lat_optim_mask(encoder); - intel_ddi_compute_min_voltage_level(dev_priv, pipe_config); + intel_ddi_compute_min_voltage_level(pipe_config); intel_hdmi_read_gcp_infoframe(encoder, pipe_config); @@ -4200,7 +4201,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder, pipe_config->lane_lat_optim_mask = bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count); - intel_ddi_compute_min_voltage_level(dev_priv, pipe_config); + intel_ddi_compute_min_voltage_level(pipe_config); return 0; } diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h index 63853a1f6582..434de7196875 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.h +++ b/drivers/gpu/drm/i915/display/intel_ddi.h @@ -70,8 +70,7 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state, bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector); void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state, bool state); -void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv, - struct intel_crtc_state *crtc_state); +void intel_ddi_compute_min_voltage_level(struct intel_crtc_state *crtc_state); int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder, enum transcoder cpu_transcoder, bool enable, u32 hdcp_mask); diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 63364c9602ef..060728a4b851 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -614,7 +614,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, intel_dp_audio_compute_config(encoder, pipe_config, conn_state); - intel_ddi_compute_min_voltage_level(dev_priv, pipe_config); + intel_ddi_compute_min_voltage_level(pipe_config); intel_psr_compute_config(intel_dp, pipe_config, conn_state);