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Bottomley" , "Martin K. Petersen" , Peter Wang , Manivannan Sadhasivam , Andy Gross , Bjorn Andersson , Konrad Dybcio , Matthias Brugger , AngeloGioacchino Del Regno , CC: Alim Akhtar , Avri Altman , Bart Van Assche , , , , , , , , Nitin Rawat Subject: [PATCH V2 1/3] ufs: core: Add CPU latency QoS support for ufs driver Date: Mon, 4 Dec 2023 20:00:59 +0530 Message-ID: <20231204143101.64163-2-quic_mnaresh@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231204143101.64163-1-quic_mnaresh@quicinc.com> References: <20231204143101.64163-1-quic_mnaresh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: 4g6kFdhW0GWU1fjn6cZ0aserfFbkSVQq X-Proofpoint-GUID: 4g6kFdhW0GWU1fjn6cZ0aserfFbkSVQq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-04_13,2023-12-04_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 phishscore=0 adultscore=0 bulkscore=0 spamscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1015 mlxscore=0 malwarescore=0 impostorscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312040108 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231204_063145_022845_1640DC45 X-CRM114-Status: GOOD ( 26.26 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Register ufs driver to CPU latency PM QoS framework can improves ufs device random io performance. PM QoS initialization will insert new QoS request into the CPU latency QoS list with the maximum latency PM_QOS_DEFAULT_VALUE value. UFS driver will vote for performance mode on scale up and power save mode for scale down. If clock scaling feature is not enabled then voting will be based on clock on or off condition. tiotest benchmark tool io performance results on sm8550 platform: 1. Without PM QoS support Type (Speed in) | Average of 18 iterations Random Write(IPOS) | 41065.13 Random Read(IPOS) | 37101.3 2. With PM QoS support Type (Speed in) | Average of 18 iterations Random Write(IPOS) | 46784.9 Random Read(IPOS) | 42943.4 (Improvement % with PM QoS = ~15%). Co-developed-by: Nitin Rawat Signed-off-by: Nitin Rawat Signed-off-by: Naveen Kumar Goud Arepalli Signed-off-by: Maramaina Naresh --- drivers/ufs/core/ufshcd-priv.h | 8 +++++ drivers/ufs/core/ufshcd.c | 62 ++++++++++++++++++++++++++++++++++ include/ufs/ufshcd.h | 16 +++++++++ 3 files changed, 86 insertions(+) diff --git a/drivers/ufs/core/ufshcd-priv.h b/drivers/ufs/core/ufshcd-priv.h index f42d99ce5bf1..536805f6c4e1 100644 --- a/drivers/ufs/core/ufshcd-priv.h +++ b/drivers/ufs/core/ufshcd-priv.h @@ -241,6 +241,14 @@ static inline void ufshcd_vops_config_scaling_param(struct ufs_hba *hba, hba->vops->config_scaling_param(hba, p, data); } +static inline u32 ufshcd_vops_config_qos_vote(struct ufs_hba *hba) +{ + if (hba->vops && hba->vops->config_qos_vote) + return hba->vops->config_qos_vote(hba); + + return UFSHCD_QOS_DEFAULT_VOTE; +} + static inline void ufshcd_vops_reinit_notify(struct ufs_hba *hba) { if (hba->vops && hba->vops->reinit_notify) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index ae9936fc6ffb..13370febd2b5 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -1001,6 +1001,20 @@ static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba) return ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6; } +/** + * ufshcd_pm_qos_perf - vote for PM QoS performance or power save mode + * @hba: per adapter instance + * @on: If True, vote for perf PM QoS mode otherwise power save mode + */ +static void ufshcd_pm_qos_perf(struct ufs_hba *hba, bool on) +{ + if (!hba->pm_qos_init) + return; + + cpu_latency_qos_update_request(&hba->pm_qos_req, on ? hba->qos_vote + : PM_QOS_DEFAULT_VALUE); +} + /** * ufshcd_set_clk_freq - set UFS controller clock frequencies * @hba: per adapter instance @@ -1153,6 +1167,10 @@ static int ufshcd_scale_clks(struct ufs_hba *hba, unsigned long freq, trace_ufshcd_profile_clk_scaling(dev_name(hba->dev), (scale_up ? "up" : "down"), ktime_to_us(ktime_sub(ktime_get(), start)), ret); + + if (!ret) + ufshcd_pm_qos_perf(hba, scale_up); + return ret; } @@ -9204,6 +9222,8 @@ static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on) if (ret) return ret; + if (!ufshcd_is_clkscaling_supported(hba)) + ufshcd_pm_qos_perf(hba, on); out: if (ret) { list_for_each_entry(clki, head, list) { @@ -9296,6 +9316,45 @@ static int ufshcd_init_clocks(struct ufs_hba *hba) return ret; } +/** + * ufshcd_pm_qos_init - initialize PM QoS instance + * @hba: per adapter instance + */ +static void ufshcd_pm_qos_init(struct ufs_hba *hba) +{ + if (!(hba->caps & UFSHCD_CAP_PM_QOS)) + return; + + /* + * called to configure PM QoS vote value for UFS host, + * expecting qos vote return value from caller else + * default vote value will be return. + */ + hba->qos_vote = ufshcd_vops_config_qos_vote(hba); + cpu_latency_qos_add_request(&hba->pm_qos_req, + PM_QOS_DEFAULT_VALUE); + + if (cpu_latency_qos_request_active(&hba->pm_qos_req)) + hba->pm_qos_init = true; + + dev_dbg(hba->dev, "%s: QoS %s, qos_vote: %u\n", __func__, + hba->pm_qos_init ? "initialized" : "uninitialized", + hba->qos_vote); +} + +/** + * ufshcd_pm_qos_exit - remove instance from PM QoS + * @hba: per adapter instance + */ +static void ufshcd_pm_qos_exit(struct ufs_hba *hba) +{ + if (!hba->pm_qos_init) + return; + + cpu_latency_qos_remove_request(&hba->pm_qos_req); + hba->pm_qos_init = false; +} + static int ufshcd_variant_hba_init(struct ufs_hba *hba) { int err = 0; @@ -9381,6 +9440,7 @@ static int ufshcd_hba_init(struct ufs_hba *hba) static void ufshcd_hba_exit(struct ufs_hba *hba) { if (hba->is_powered) { + ufshcd_pm_qos_exit(hba); ufshcd_exit_clk_scaling(hba); ufshcd_exit_clk_gating(hba); if (hba->eh_wq) @@ -10030,6 +10090,7 @@ static int ufshcd_suspend(struct ufs_hba *hba) ufshcd_vreg_set_lpm(hba); /* Put the host controller in low power mode if possible */ ufshcd_hba_vreg_set_lpm(hba); + ufshcd_pm_qos_perf(hba, false); return ret; } @@ -10576,6 +10637,7 @@ int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) ufs_sysfs_add_nodes(hba->dev); device_enable_async_suspend(dev); + ufshcd_pm_qos_init(hba); return 0; free_tmf_queue: diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index d862c8ddce03..e9f2bad8934e 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -320,6 +320,9 @@ struct ufs_pwr_mode_info { * @phy_initialization: used to initialize phys * @device_reset: called to issue a reset pulse on the UFS device * @config_scaling_param: called to configure clock scaling parameters + * @config_qos_vote: called to configure PM QoS vote value for UFS host, + * expecting qos vote return value from caller else + default vote value will be return * @program_key: program or evict an inline encryption key * @event_notify: called to notify important events * @reinit_notify: called to notify reinit of UFSHCD during max gear switch @@ -362,6 +365,7 @@ struct ufs_hba_variant_ops { void (*config_scaling_param)(struct ufs_hba *hba, struct devfreq_dev_profile *profile, struct devfreq_simple_ondemand_data *data); + u32 (*config_qos_vote)(struct ufs_hba *hba); int (*program_key)(struct ufs_hba *hba, const union ufs_crypto_cfg_entry *cfg, int slot); void (*event_notify)(struct ufs_hba *hba, @@ -720,6 +724,11 @@ enum ufshcd_caps { * WriteBooster when scaling the clock down. */ UFSHCD_CAP_WB_WITH_CLK_SCALING = 1 << 12, + + /* This capability allows the host controller driver to use the PM QoS + * feature. + */ + UFSHCD_CAP_PM_QOS = 1 << 13, }; struct ufs_hba_variant_params { @@ -793,6 +802,8 @@ enum ufshcd_mcq_opr { OPR_MAX, }; +#define UFSHCD_QOS_DEFAULT_VOTE 0 + /** * struct ufs_hba - per adapter private structure * @mmio_base: UFSHCI base register address @@ -912,6 +923,8 @@ enum ufshcd_mcq_opr { * @mcq_base: Multi circular queue registers base address * @uhq: array of supported hardware queues * @dev_cmd_queue: Queue for issuing device management commands + * @pm_qos_req: PM QoS request handle + * @pm_qos_init: flag to check if pm qos init completed */ struct ufs_hba { void __iomem *mmio_base; @@ -1076,6 +1089,9 @@ struct ufs_hba { struct ufs_hw_queue *uhq; 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Mon, 4 Dec 2023 14:31:41 GMT Received: from hu-mnaresh-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 4 Dec 2023 06:31:35 -0800 From: Maramaina Naresh To: "James E.J. Bottomley" , "Martin K. Petersen" , Peter Wang , Manivannan Sadhasivam , Andy Gross , Bjorn Andersson , Konrad Dybcio , Matthias Brugger , AngeloGioacchino Del Regno , CC: Alim Akhtar , Avri Altman , Bart Van Assche , , , , , , , Subject: [PATCH V2 2/3] ufs: ufs-mediatek: Enable CPU latency PM QoS support for MEDIATEK SoC Date: Mon, 4 Dec 2023 20:01:00 +0530 Message-ID: <20231204143101.64163-3-quic_mnaresh@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231204143101.64163-1-quic_mnaresh@quicinc.com> References: <20231204143101.64163-1-quic_mnaresh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: ygjjDnGUt9ZU1vBNg46PmO1f0ZZXD18j X-Proofpoint-GUID: ygjjDnGUt9ZU1vBNg46PmO1f0ZZXD18j X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-04_13,2023-12-04_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 priorityscore=1501 bulkscore=0 mlxlogscore=999 phishscore=0 lowpriorityscore=0 mlxscore=0 impostorscore=0 clxscore=1015 spamscore=0 malwarescore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312040106 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231204_063558_298987_8C77155E X-CRM114-Status: GOOD ( 17.76 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Revert the existing PM QoS feature from MEDIATEK UFS driver as similar PM QoS feature implementation is moved to core ufshcd and also enable CPU latency PM QoS capability for MEDIATEK SoC. Signed-off-by: Maramaina Naresh --- drivers/ufs/host/ufs-mediatek.c | 20 +++----------------- drivers/ufs/host/ufs-mediatek.h | 3 --- 2 files changed, 3 insertions(+), 20 deletions(-) diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c index fc61790d289b..d8ece88103b9 100644 --- a/drivers/ufs/host/ufs-mediatek.c +++ b/drivers/ufs/host/ufs-mediatek.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include @@ -626,21 +625,9 @@ static void ufs_mtk_init_host_caps(struct ufs_hba *hba) dev_info(hba->dev, "caps: 0x%x", host->caps); } -static void ufs_mtk_boost_pm_qos(struct ufs_hba *hba, bool boost) -{ - struct ufs_mtk_host *host = ufshcd_get_variant(hba); - - if (!host || !host->pm_qos_init) - return; - - cpu_latency_qos_update_request(&host->pm_qos_req, - boost ? 0 : PM_QOS_DEFAULT_VALUE); -} - static void ufs_mtk_scale_perf(struct ufs_hba *hba, bool scale_up) { ufs_mtk_boost_crypt(hba, scale_up); - ufs_mtk_boost_pm_qos(hba, scale_up); } static void ufs_mtk_pwr_ctrl(struct ufs_hba *hba, bool on) @@ -937,6 +924,9 @@ static int ufs_mtk_init(struct ufs_hba *hba) /* Enable clk scaling*/ hba->caps |= UFSHCD_CAP_CLK_SCALING; + /* Enable PM QoS */ + hba->caps |= UFSHCD_CAP_PM_QOS; + hba->quirks |= UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL; hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_INTR; hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_RTC; @@ -959,10 +949,6 @@ static int ufs_mtk_init(struct ufs_hba *hba) host->ip_ver = ufshcd_readl(hba, REG_UFS_MTK_IP_VER); - /* Initialize pm-qos request */ - cpu_latency_qos_add_request(&host->pm_qos_req, PM_QOS_DEFAULT_VALUE); - host->pm_qos_init = true; - goto out; out_variant_clear: diff --git a/drivers/ufs/host/ufs-mediatek.h b/drivers/ufs/host/ufs-mediatek.h index f76e80d91729..38eab95b0f79 100644 --- a/drivers/ufs/host/ufs-mediatek.h +++ b/drivers/ufs/host/ufs-mediatek.h @@ -7,7 +7,6 @@ #define _UFS_MEDIATEK_H #include -#include #include /* @@ -167,7 +166,6 @@ struct ufs_mtk_mcq_intr_info { struct ufs_mtk_host { struct phy *mphy; - struct pm_qos_request pm_qos_req; struct regulator *reg_va09; struct reset_control *hci_reset; struct reset_control *unipro_reset; @@ -178,7 +176,6 @@ struct ufs_mtk_host { struct ufs_mtk_hw_ver hw_ver; enum ufs_mtk_host_caps caps; bool mphy_powered_on; - bool pm_qos_init; bool unipro_lpm; bool ref_clk_enabled; u16 ref_clk_ungating_wait_us; From patchwork Mon Dec 4 14:31:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maramaina Naresh X-Patchwork-Id: 13478547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 85368C4167B for ; Mon, 4 Dec 2023 14:32:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Mon, 4 Dec 2023 14:31:48 GMT Received: from hu-mnaresh-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 4 Dec 2023 06:31:42 -0800 From: Maramaina Naresh To: "James E.J. Bottomley" , "Martin K. Petersen" , Peter Wang , Manivannan Sadhasivam , Andy Gross , Bjorn Andersson , Konrad Dybcio , Matthias Brugger , AngeloGioacchino Del Regno , CC: Alim Akhtar , Avri Altman , Bart Van Assche , , , , , , , Subject: [PATCH V2 3/3] ufs: ufs-qcom: Enable CPU latency QoS support for QCOM SoC Date: Mon, 4 Dec 2023 20:01:01 +0530 Message-ID: <20231204143101.64163-4-quic_mnaresh@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231204143101.64163-1-quic_mnaresh@quicinc.com> References: <20231204143101.64163-1-quic_mnaresh@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: VrCej0ordQzxqeDL_AlUdl39HA1uG0ug X-Proofpoint-ORIG-GUID: VrCej0ordQzxqeDL_AlUdl39HA1uG0ug X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-04_13,2023-12-04_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxlogscore=999 mlxscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 phishscore=0 spamscore=0 malwarescore=0 clxscore=1015 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311060000 definitions=main-2312040108 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231204_063156_699964_9D1EC7A8 X-CRM114-Status: GOOD ( 15.52 ) X-BeenThere: linux-mediatek@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-mediatek" Errors-To: linux-mediatek-bounces+linux-mediatek=archiver.kernel.org@lists.infradead.org Enable CPU latency PM QoS capability support for QCOM SoC. Signed-off-by: Maramaina Naresh --- drivers/ufs/host/ufs-qcom.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 96cb8b5b4e66..3211cccce933 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1061,6 +1061,7 @@ static void ufs_qcom_set_caps(struct ufs_hba *hba) hba->caps |= UFSHCD_CAP_WB_EN; hba->caps |= UFSHCD_CAP_AGGR_POWER_COLLAPSE; hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND; + hba->caps |= UFSHCD_CAP_PM_QOS; if (host->hw_ver.major >= 0x2) { host->caps = UFS_QCOM_CAP_QUNIPRO |