From patchwork Fri Dec 8 17:02:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Wanner X-Patchwork-Id: 13485688 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E8E0CC10F05 for ; Fri, 8 Dec 2023 17:03:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=kO2jcvXebPZnWDKUsOAJF6vPJjmXMZrLEUlx9zk2Fis=; b=3vh2aaHKfWtpAu 5G4bFm6jBB1tbeF2rHK7j6oLbI/z4ifBoIF/bU3OVA1gYCtAIE+l1M/ibAXnn7XOxlZonakfTvZbL 6jo6KAboNSzW6VfcP0GXN7q7sk1+MNNNV19yNzjpYO1/IbhOP7gYuDLtzMVWpT2zGota9qTQJ6B0q 1P8f7/PW6KEkUQZjrVflJxrlU/pbIh8R8l/piyxZPX1zy6UFg7gGIQI2UqVIzUKWASVtiqMLqaW9Y Il3kiVZTPD19IapkxVZo9eD3fo5b+R9yPWcx4WD1CTHVA6I+HIt5Y40p4DkBpA154/axp7OIi/sAQ icFOOGw5zOC5nwWLZo5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rBeFO-00G6xH-0V; Fri, 08 Dec 2023 17:02:42 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rBeFL-00G6wu-0J for linux-arm-kernel@lists.infradead.org; Fri, 08 Dec 2023 17:02:40 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1702054959; x=1733590959; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Mh27JQlOb6arH7PgW+Gp1KbuEg/QqrNfpjle10/O130=; b=m60Cr53gHhrlSmAx1o1WcC9YJamdWFx7/Ajfzi9imVyelUIqr+uUaAha /me54UKTO0+uHqwfS9DRkZ6IhbmJYeOG22qe55+GOIS7T90XZi9Drf34X RWhC3Ra0AFLT/AUJ7DkAu6AJaFKAuINhqAUC/2RLA3OyGwNti/ZSjjaph 7SpfJ6N/9xiF0NlZ4ommdztwWSuJPwWIyVY/9LVv61OWALIyprkRll08o jwr373Lo7Rprts+mw3tbqf5BoOyhSo+u6VhF5SUyzEa65UWA7rtro7iN6 V0XXe8obGAfYsE3T7lD1gTHGQh6keifuo5D3QM8azTG5rsbiq7qLfDOAm Q==; X-CSE-ConnectionGUID: z5vkwNd3ShyqqUT0gld90A== X-CSE-MsgGUID: hghTHFs3TTqCTfo76SH1DA== X-ThreatScanner-Verdict: Negative X-IronPort-AV: E=Sophos;i="6.04,261,1695711600"; d="scan'208";a="243689112" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 08 Dec 2023 10:02:37 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 8 Dec 2023 10:02:17 -0700 Received: from ryan-Precision-3630-Tower.microchip.com (10.10.85.11) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 8 Dec 2023 10:02:17 -0700 From: To: , , CC: , , Ryan Wanner Subject: [PATCH] drivers: soc: atmel: Adjust defines to follow alphabetical order Date: Fri, 8 Dec 2023 10:02:30 -0700 Message-ID: <20231208170230.551265-1-Ryan.Wanner@microchip.com> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231208_090239_211870_8C9E4480 X-CRM114-Status: UNSURE ( 6.67 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ryan Wanner Move the defines so that they are in aphabetical order based on SOC. Signed-off-by: Ryan Wanner --- drivers/soc/atmel/soc.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/soc/atmel/soc.h b/drivers/soc/atmel/soc.h index 26dd26b4f179..9b2d31073b88 100644 --- a/drivers/soc/atmel/soc.h +++ b/drivers/soc/atmel/soc.h @@ -39,13 +39,13 @@ at91_soc_init(const struct at91_soc *socs); #define AT91SAM9261_CIDR_MATCH 0x019703a0 #define AT91SAM9263_CIDR_MATCH 0x019607a0 #define AT91SAM9G20_CIDR_MATCH 0x019905a0 -#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0 #define AT91SAM9G45_CIDR_MATCH 0x019b05a0 -#define AT91SAM9X5_CIDR_MATCH 0x019a05a0 #define AT91SAM9N12_CIDR_MATCH 0x019a07a0 +#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0 +#define AT91SAM9X5_CIDR_MATCH 0x019a05a0 #define SAM9X60_CIDR_MATCH 0x019b35a0 -#define SAMA7G5_CIDR_MATCH 0x00162100 #define SAM9X7_CIDR_MATCH 0x09750020 +#define SAMA7G5_CIDR_MATCH 0x00162100 #define AT91SAM9M11_EXID_MATCH 0x00000001 #define AT91SAM9M10_EXID_MATCH 0x00000002 @@ -62,19 +62,15 @@ at91_soc_init(const struct at91_soc *socs); #define AT91SAM9N12_EXID_MATCH 0x00000006 #define AT91SAM9CN11_EXID_MATCH 0x00000009 +#define AT91SAM9XE128_CIDR_MATCH 0x329973a0 +#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0 +#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0 + #define SAM9X60_EXID_MATCH 0x00000000 #define SAM9X60_D5M_EXID_MATCH 0x00000001 #define SAM9X60_D1G_EXID_MATCH 0x00000010 #define SAM9X60_D6K_EXID_MATCH 0x00000011 -#define SAMA7G51_EXID_MATCH 0x3 -#define SAMA7G52_EXID_MATCH 0x2 -#define SAMA7G53_EXID_MATCH 0x1 -#define SAMA7G54_EXID_MATCH 0x0 -#define SAMA7G54_D1G_EXID_MATCH 0x00000018 -#define SAMA7G54_D2G_EXID_MATCH 0x00000020 -#define SAMA7G54_D4G_EXID_MATCH 0x00000028 - #define SAM9X75_EXID_MATCH 0x00000000 #define SAM9X72_EXID_MATCH 0x00000004 #define SAM9X70_EXID_MATCH 0x00000005 @@ -83,10 +79,6 @@ at91_soc_init(const struct at91_soc *socs); #define SAM9X75_D1M_EXID_MATCH 0x00000003 #define SAM9X75_D2G_EXID_MATCH 0x00000006 -#define AT91SAM9XE128_CIDR_MATCH 0x329973a0 -#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0 -#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0 - #define SAMA5D2_CIDR_MATCH 0x0a5c08c0 #define SAMA5D21CU_EXID_MATCH 0x0000005a #define SAMA5D225C_D1M_EXID_MATCH 0x00000053 @@ -122,6 +114,14 @@ at91_soc_init(const struct at91_soc *socs); #define SAMA5D43_EXID_MATCH 0x00000003 #define SAMA5D44_EXID_MATCH 0x00000004 +#define SAMA7G51_EXID_MATCH 0x3 +#define SAMA7G52_EXID_MATCH 0x2 +#define SAMA7G53_EXID_MATCH 0x1 +#define SAMA7G54_EXID_MATCH 0x0 +#define SAMA7G54_D1G_EXID_MATCH 0x00000018 +#define SAMA7G54_D2G_EXID_MATCH 0x00000020 +#define SAMA7G54_D4G_EXID_MATCH 0x00000028 + #define SAME70Q21_CIDR_MATCH 0x21020e00 #define SAME70Q21_EXID_MATCH 0x00000002 #define SAME70Q20_CIDR_MATCH 0x21020c00