From patchwork Fri Dec 8 21:04:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Edwards X-Patchwork-Id: 13485845 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="e2xgLwD9" Received: from mail-il1-x12e.google.com (mail-il1-x12e.google.com [IPv6:2607:f8b0:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6C0601738; Fri, 8 Dec 2023 13:05:14 -0800 (PST) Received: by mail-il1-x12e.google.com with SMTP id e9e14a558f8ab-35d718382b7so9075705ab.1; Fri, 08 Dec 2023 13:05:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702069513; x=1702674313; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=X7JrVD5PKv0frUWLpY5zIGIkfAkbUXW6B5RnmTRZ8nk=; b=e2xgLwD9psUc+MsvWqMkW0QrVy1p0uKRYDewy97dmO5ey/Rys1z/H0JNaItbtnh7xK /HliAnS4ZAUKIjS5Dwu72S7MQRWXpnmkRgAfVIZHXO2zilbmZIhRdE2JgQIvYrYnquJb 766YkWrtr7l8W4jT18oIBywEk4lkvuu5QccI8HZrgqHkUg1AL589delH3zltxMVfMQdP XiE1PfRzTdZ1jQlvLl24y+Cg19sMSpAUF4bveL2oGrb4gZVL+penr1J57P9Ee7bzbXox AlCcUYt3SQKzUtq2EAQpcLQFmiJRx/QfPWbmpiqmcyqWsZBFtyvPpXaK5IdJviTKUukI 8AnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702069513; x=1702674313; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=X7JrVD5PKv0frUWLpY5zIGIkfAkbUXW6B5RnmTRZ8nk=; b=l7NRnQPxLN1x1QXx+4mYAWJ6if9+KR764tJj4fQzEtwR2LcE6dXUn0uDnWXx98dyxn XThi24Br2CXje+1f2JOhUF2CerxSWcoeZG/gSIwUzHLLuPL+vJHwyh9AUWMW8fHKxgIc etCi7E6TVF/iXBzb2UJskgedjnQXsFeS2UklQzzd7B5iCH8Nhcp0JUEYKMZcD3Ns8fqX oGxqGWAp19o6KsVK5i5haE8mpGJlSbCFFVApdA8PbMXY8PSdtx+/Nd/fFs9cRFRaM0mN o/+uelPkhDHqkuF///8SDIITY9IzsjMUWXOTscNgvDYXlICn1E7GYTkPuV1eMiQdvpGs lFMg== X-Gm-Message-State: AOJu0YyrHz0bB/Ywzt27bdUmbVaCMdRVQ2J/XZ9AqmgPFaRlDhpUqKyh 6NKUFtAIbs1F8Yli0z/xPlM= X-Google-Smtp-Source: AGHT+IG8uVR/WtJrgcWBO8dQk/a2dvjR9aLCHiO8VcwCJQemCBCfuXJ5U8DniFXMBEdx9VmGx/EguA== X-Received: by 2002:a92:c248:0:b0:35c:50f7:b18c with SMTP id k8-20020a92c248000000b0035c50f7b18cmr934433ilo.0.1702069513690; Fri, 08 Dec 2023 13:05:13 -0800 (PST) Received: from celestia.nettie.lan ([2001:470:42c4:101:971d:15c7:de39:3b4b]) by smtp.gmail.com with ESMTPSA id g12-20020a056e020d0c00b0035d5a1760c1sm736458ilj.69.2023.12.08.13.05.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 13:05:13 -0800 (PST) From: Sam Edwards X-Google-Original-From: Sam Edwards To: Mathias Nyman , Thinh Nguyen Cc: Greg Kroah-Hartman , Heiko Stuebner , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Edwards Subject: [PATCH 1/2] xhci: Introduce "disable-usb3" DT property/quirk Date: Fri, 8 Dec 2023 14:04:57 -0700 Message-ID: <20231208210458.912776-2-CFSworks@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208210458.912776-1-CFSworks@gmail.com> References: <20231208210458.912776-1-CFSworks@gmail.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some systems may have xHCI controllers that enumerate USB 3.0 ports, but these ports nevertheless cannot be used. Perhaps enabling them triggers a hardware bug, or perhaps they simply aren't connected and it would be confusing to the user to see an unusable USB 3.0 rhub show up -- whatever the case may be, it's reasonable to want to disable these ports. Add a DT property (and associated quirk) to the xHCI driver that skips over (i.e. ignores and doesn't initialize) any USB 3.0 ports discovered during driver initialization. Signed-off-by: Sam Edwards --- Documentation/devicetree/bindings/usb/usb-xhci.yaml | 4 ++++ drivers/usb/host/xhci-mem.c | 4 ++++ drivers/usb/host/xhci-plat.c | 3 +++ drivers/usb/host/xhci.h | 1 + 4 files changed, 12 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.yaml b/Documentation/devicetree/bindings/usb/usb-xhci.yaml index 180a261c3e8f..8a64e747260a 100644 --- a/Documentation/devicetree/bindings/usb/usb-xhci.yaml +++ b/Documentation/devicetree/bindings/usb/usb-xhci.yaml @@ -25,6 +25,10 @@ properties: description: Set if the controller has broken port disable mechanism type: boolean + disable-usb3: + description: Ignore (don't initialize, don't use) USB3 ports + type: boolean + imod-interval-ns: description: Interrupt moderation interval default: 5000 diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 0a37f0d511cf..bf8fcab626e4 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c @@ -1968,6 +1968,10 @@ static void xhci_add_in_port(struct xhci_hcd *xhci, unsigned int num_ports, minor_revision = XHCI_EXT_PORT_MINOR(temp); if (major_revision == 0x03) { + /* Ignore USB3 ports entirely if USB3 support is disabled. */ + if (xhci->quirks & XHCI_DISABLE_USB3) + return; + rhub = &xhci->usb3_rhub; /* * Some hosts incorrectly use sub-minor version for minor diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c index b93161374293..75285fb5bbbc 100644 --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c @@ -249,6 +249,9 @@ int xhci_plat_probe(struct platform_device *pdev, struct device *sysdev, const s if (device_property_read_bool(tmpdev, "quirk-broken-port-ped")) xhci->quirks |= XHCI_BROKEN_PORT_PED; + if (device_property_read_bool(tmpdev, "disable-usb3")) + xhci->quirks |= XHCI_DISABLE_USB3; + device_property_read_u32(tmpdev, "imod-interval-ns", &xhci->imod_interval); } diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index 5df370482521..c53fbeea478f 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h @@ -1906,6 +1906,7 @@ struct xhci_hcd { #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) #define XHCI_ZHAOXIN_HOST BIT_ULL(46) +#define XHCI_DISABLE_USB3 BIT_ULL(47) unsigned int num_active_eps; unsigned int limit_active_eps; From patchwork Fri Dec 8 21:04:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Edwards X-Patchwork-Id: 13485846 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VB8vo0Xq" Received: from mail-il1-x130.google.com (mail-il1-x130.google.com [IPv6:2607:f8b0:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA00E1985; Fri, 8 Dec 2023 13:05:15 -0800 (PST) Received: by mail-il1-x130.google.com with SMTP id e9e14a558f8ab-35d396ae91fso9016175ab.3; Fri, 08 Dec 2023 13:05:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702069515; x=1702674315; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QqvWOUimTI+IzTX35gstFYIO9U9PLoGOpX1jOFzw7Ys=; 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Fri, 08 Dec 2023 13:05:14 -0800 (PST) Received: from celestia.nettie.lan ([2001:470:42c4:101:971d:15c7:de39:3b4b]) by smtp.gmail.com with ESMTPSA id g12-20020a056e020d0c00b0035d5a1760c1sm736458ilj.69.2023.12.08.13.05.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 13:05:14 -0800 (PST) From: Sam Edwards X-Google-Original-From: Sam Edwards To: Mathias Nyman , Thinh Nguyen Cc: Greg Kroah-Hartman , Heiko Stuebner , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Sam Edwards Subject: [PATCH 2/2] usb: dwc3: host: Disable USB3 ports if maximum-speed doesn't permit USB3 Date: Fri, 8 Dec 2023 14:04:58 -0700 Message-ID: <20231208210458.912776-3-CFSworks@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231208210458.912776-1-CFSworks@gmail.com> References: <20231208210458.912776-1-CFSworks@gmail.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The DWC3 core can be configured (during IP instantiation, and/or via configuration signals) not to have any USB3 ports. Some SoCs, however, may have USB3 interfaces enabled that do not have USB3 PHYs driving them. This can be due to a few circumstances, including: a) The hardware designer didn't include USB3 PHYs and neglected to disable the DWC3 core's USB ports (I know of no instance where this has actually happened, however, and it seems pretty unlikely). b) The USB3 PHYs are present but powered off. Perhaps a driver to enable the PHYs has not yet been written or merged, or USB3 capability is unneeded in the system and the system designer would like to conserve power. c) The USB3 PHYs are muxed to a different controller. This can happen if the PHYs support non-USB protocols and one of these alternate functions is needed instead. In these circumstances, if the DWC3 does not receive clear link status indication on an enabled USB3 port, the DWC3 may not allow even USB2 to function: in host mode, the DWC3 generates an endless barrage of PORT_CSC status on the accompanying USB2 port, and the xHCI driver is unable to bring the USB2 port to a functioning state. Fix this by first checking if the maximum-speed property in the DT permits USB3. If not, pass the new `disable-usb3;` property to the virtual xHCI device, causing the xHCI driver not to enable the USB3 ports. This allows USB2 to function even with USB3 PHYs missing/misbehaving, and may be useful even when the USB3 PHYs are well-behaved: a DT author may know that USB3 support is intact, but disconnected (not exposed off-board) and choose to lower the maximum-speed property to avoid an unusable USB3 rhub showing up in sysfs/lsusb where it may mislead end-users. Signed-off-by: Sam Edwards --- drivers/usb/dwc3/host.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/host.c b/drivers/usb/dwc3/host.c index 61f57fe5bb78..29f170927e70 100644 --- a/drivers/usb/dwc3/host.c +++ b/drivers/usb/dwc3/host.c @@ -61,7 +61,7 @@ static int dwc3_host_get_irq(struct dwc3 *dwc) int dwc3_host_init(struct dwc3 *dwc) { - struct property_entry props[4]; + struct property_entry props[5]; struct platform_device *xhci; int ret, irq; int prop_idx = 0; @@ -95,6 +95,9 @@ int dwc3_host_init(struct dwc3 *dwc) if (dwc->usb2_lpm_disable) props[prop_idx++] = PROPERTY_ENTRY_BOOL("usb2-lpm-disable"); + if (dwc->maximum_speed == USB_SPEED_FULL || dwc->maximum_speed == USB_SPEED_HIGH) + props[prop_idx++] = PROPERTY_ENTRY_BOOL("disable-usb3"); + /** * WORKAROUND: dwc3 revisions <=3.00a have a limitation * where Port Disable command doesn't work.