From patchwork Tue Dec 12 18:09:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13489760 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8197494 for ; Tue, 12 Dec 2023 10:09:57 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1rD7CY-00018c-61; Tue, 12 Dec 2023 19:09:50 +0100 Received: from [2a0a:edc0:0:900:1d::77] (helo=ptz.office.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1rD7CX-00FOY3-Kp; Tue, 12 Dec 2023 19:09:49 +0100 Received: from ukl by ptz.office.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1rD7CX-001opK-BH; Tue, 12 Dec 2023 19:09:49 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Michael Turquette , Stephen Boyd , Russell King Cc: linux-clk@vger.kernel.org, kernel@pengutronix.de, Sean Anderson , Thierry Reding , Michal Simek , linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org Subject: [PATCH 1/2] clk: Add a devm variant of clk_rate_exclusive_get() Date: Tue, 12 Dec 2023 19:09:42 +0100 Message-ID: <744a6371f94fe96f527eea6e52a600914e6fb6b5.1702403904.git.u.kleine-koenig@pengutronix.de> X-Mailer: git-send-email 2.42.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1927; i=u.kleine-koenig@pengutronix.de; h=from:subject:message-id; bh=83osLBwIYWm/efrAoaEOAgooSgTJvsramEdhJvazV5c=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBleKHmnp1ZpKaQnrsMzctCAYGIjclO6xGTQBCtD KaUaHCzGUqJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZXih5gAKCRCPgPtYfRL+ TpyAB/4u6wkx3TpEBJVzSsWQzviQdOwzYmaP7vC3NCWpCoTuwRhrgzrTMjmRy/2sO/pTwmaXfE+ 2OTuqR6X8bgY0lMymYVkl2euoUnTknNk8hhhjfi/KLJwPcZUXChp9tnnsWLtvMUy3h7K02Z7e1z oko66rrnckYVteYUHN05lg+CygUx/ft79QtJsXdXMjkoDNQwUbnlGrZmMtXXm1QwVYq+kmt+o+X kV7ecKNZfvzlWqSNHWorRqvshwgyZXnbjKo6KHtie/xOdapn7JA5Qs/MQZd8YuvYCNicUBuhZla kaixocs/p2TkrKP//KEyIut1wACozmCQdgfdhHFpjPRiJkFJ X-Developer-Key: i=u.kleine-koenig@pengutronix.de; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-clk@vger.kernel.org This allows to simplify drivers that use clk_rate_exclusive_get() in their probe routine as calling clk_rate_exclusive_put() is cared for automatically. Signed-off-by: Uwe Kleine-König --- drivers/clk/clk.c | 15 +++++++++++++++ include/linux/clk.h | 12 ++++++++++++ 2 files changed, 27 insertions(+) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index af2011c2a93b..78249ca2341c 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -937,6 +937,21 @@ void clk_rate_exclusive_get(struct clk *clk) } EXPORT_SYMBOL_GPL(clk_rate_exclusive_get); +static void devm_clk_rate_exclusive_put(void *data) +{ + struct clk *clk = data; + + clk_rate_exclusive_put(clk); +} + +int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk) +{ + clk_rate_exclusive_get(clk); + + return devm_add_action_or_reset(dev, devm_clk_rate_exclusive_put, clk); +} +EXPORT_SYMBOL_GPL(devm_clk_rate_exclusive_get); + static void clk_core_unprepare(struct clk_core *core) { lockdep_assert_held(&prepare_lock); diff --git a/include/linux/clk.h b/include/linux/clk.h index f88c407925f8..5a749459c3a3 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -199,6 +199,18 @@ bool clk_is_match(const struct clk *p, const struct clk *q); */ void clk_rate_exclusive_get(struct clk *clk); +/** + * devm_clk_rate_exclusive_get - devm variant of clk_rate_exclusive_get + * @dev: device the exclusivity is bound to + * @clk: clock source + * + * Calls clk_rate_exclusive_get() on @clk and registers a devm cleanup handler + * on @dev to cal clk_rate_exclusive_put(). + * + * Must not be called from within atomic context. + */ +int devm_clk_rate_exclusive_get(struct device *dev, struct clk *clk); + /** * clk_rate_exclusive_put - release exclusivity over the rate control of a * producer From patchwork Tue Dec 12 18:09:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= X-Patchwork-Id: 13489762 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EC0AA1 for ; Tue, 12 Dec 2023 10:09:58 -0800 (PST) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1rD7CY-00018d-98; Tue, 12 Dec 2023 19:09:50 +0100 Received: from [2a0a:edc0:0:900:1d::77] (helo=ptz.office.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1rD7CX-00FOY6-SD; Tue, 12 Dec 2023 19:09:49 +0100 Received: from ukl by ptz.office.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1rD7CX-001opO-Ij; Tue, 12 Dec 2023 19:09:49 +0100 From: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= To: Michael Turquette , Stephen Boyd , Russell King Cc: linux-clk@vger.kernel.org, kernel@pengutronix.de, Sean Anderson , Thierry Reding , Michal Simek , linux-arm-kernel@lists.infradead.org, linux-pwm@vger.kernel.org Subject: [PATCH 2/2] pwm: xilinx: Simplify using devm functions Date: Tue, 12 Dec 2023 19:09:43 +0100 Message-ID: X-Mailer: git-send-email 2.42.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2370; i=u.kleine-koenig@pengutronix.de; h=from:subject:message-id; bh=pqqh+IxlHfU7VOKYnsJWW4bjYCEXlBsPm5O8mdl1h00=; b=owEBbQGS/pANAwAKAY+A+1h9Ev5OAcsmYgBleKHnd6rwMdHhx7Qz6/qVwKIw53lQwrBfRNIBv MchT3GehdmJATMEAAEKAB0WIQQ/gaxpOnoeWYmt/tOPgPtYfRL+TgUCZXih5wAKCRCPgPtYfRL+ TkkRCACRQCyqmefNKOdbC+jweaQ6JDJwVkg7xeOd3uBiFZb0RlFZ4mCrVEcT/f+qYQLErKoJBOL BdUwcucQG3T/IqWQ/9eXmSDRObMSpxfziWyLCZSISx9gXFlrWMjtY5cLN23l81NHIpleyEQw+x2 pJCn6jCaHMAekeRCy73A1qY57JUFpWk2g1cIzJY0NL/H+06tcRZyaDYPdSlCiBW0cFcSba7LgSR 09t2ZGhV/qWQWvv7JsrbPh/sg45qr8xV1H8siGLWmwDU8huxSoHTur0sTjAfUGfjVB908lwPXJE AQH4WO1ICZMrVTtvOh9PxyMR2U1WydRKKVTt/MU+mZ/sraXX X-Developer-Key: i=u.kleine-koenig@pengutronix.de; a=openpgp; fpr=0D2511F322BFAB1C1580266BE2DCDD9132669BD6 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: ukl@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-clk@vger.kernel.org devm_clk_get() + clk_prepare_enable() can be simplified to devm_clk_get_enabled(). Both clk_rate_exclusive_get() and pwmchip_add() have devm variants. This allows to completely drop the remove callback and the error path in the probe function. Signed-off-by: Uwe Kleine-König --- drivers/pwm/pwm-xilinx.c | 25 ++++++------------------- 1 file changed, 6 insertions(+), 19 deletions(-) diff --git a/drivers/pwm/pwm-xilinx.c b/drivers/pwm/pwm-xilinx.c index 5f3c2a6fed11..19a2a496d555 100644 --- a/drivers/pwm/pwm-xilinx.c +++ b/drivers/pwm/pwm-xilinx.c @@ -268,38 +268,26 @@ static int xilinx_pwm_probe(struct platform_device *pdev) * alas, such properties are not allowed to be used. */ - priv->clk = devm_clk_get(dev, "s_axi_aclk"); + priv->clk = devm_clk_get_enabled(dev, "s_axi_aclk"); if (IS_ERR(priv->clk)) return dev_err_probe(dev, PTR_ERR(priv->clk), "Could not get clock\n"); - ret = clk_prepare_enable(priv->clk); + ret = devm_clk_rate_exclusive_get(dev, priv->clk); if (ret) - return dev_err_probe(dev, ret, "Clock enable failed\n"); - clk_rate_exclusive_get(priv->clk); + return dev_err_probe(dev, ret, + "Could not get exclusive control over clock\n"); xilinx_pwm->chip.dev = dev; xilinx_pwm->chip.ops = &xilinx_pwm_ops; xilinx_pwm->chip.npwm = 1; - ret = pwmchip_add(&xilinx_pwm->chip); - if (ret) { - clk_rate_exclusive_put(priv->clk); - clk_disable_unprepare(priv->clk); + ret = devm_pwmchip_add(dev, &xilinx_pwm->chip); + if (ret) return dev_err_probe(dev, ret, "Could not register PWM chip\n"); - } return 0; } -static void xilinx_pwm_remove(struct platform_device *pdev) -{ - struct xilinx_pwm_device *xilinx_pwm = platform_get_drvdata(pdev); - - pwmchip_remove(&xilinx_pwm->chip); - clk_rate_exclusive_put(xilinx_pwm->priv.clk); - clk_disable_unprepare(xilinx_pwm->priv.clk); -} - static const struct of_device_id xilinx_pwm_of_match[] = { { .compatible = "xlnx,xps-timer-1.00.a", }, {}, @@ -308,7 +296,6 @@ MODULE_DEVICE_TABLE(of, xilinx_pwm_of_match); static struct platform_driver xilinx_pwm_driver = { .probe = xilinx_pwm_probe, - .remove_new = xilinx_pwm_remove, .driver = { .name = "xilinx-pwm", .of_match_table = of_match_ptr(xilinx_pwm_of_match),