From patchwork Thu Dec 14 10:33:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brandon Cheo Fusi X-Patchwork-Id: 13492737 X-Patchwork-Delegate: viresh.linux@gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Ulqv/kTn" Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 520BCA6; Thu, 14 Dec 2023 02:34:44 -0800 (PST) Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-3363e9240b4so255495f8f.0; Thu, 14 Dec 2023 02:34:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702550083; x=1703154883; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Y0a4gKP5gtrabO/Q+KI+zErFhUsDo6C0jBoUDN/BuNw=; b=Ulqv/kTn6DSCGrQrD7UJfsLODuwPo0nDdleUKfoY1pqu//QMthx8tpKlAY3iFJBfNZ mZegDFzb+iLRu0al+bZi/ydhYRPkYxCbbidE0FmDK7ipDv4UM1VvcwjQTlFBuCaZuCdW dsfN8azSP82WjDzUZRudjYsxcBoquMdZfSzaZIgSYz+ZvQAXScxB9VDMn2sczdYdU3k3 uv1cA9YqiJUW+CICQgu3Eb6Va7JyEbM+Ch8139U+7KZU9eb26Wa071XmGB1HLQ9GF48S J1WZmAuwBdbPm63DS+pEMs6OKNMIpYkOX6ASHBpHYULIZuPHqzcxuNK+a+rDIamQhULj TO1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702550083; x=1703154883; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Y0a4gKP5gtrabO/Q+KI+zErFhUsDo6C0jBoUDN/BuNw=; b=k0IjRzjUJ9/tsn6TBQa+O3RYE3XfNWodsIxIrzNYBJdsm+MU0UvPOtxf+qHi0LqVLW cldw0/Ij2ivTCQ2IlbUwuCWiLX6FJkkf4a3bVedBG6ChujpEn/b6gYWjTWbYcckufHSs rX6ZacP80oMjUggRoXYLUVUSZqNKJRVcAmwRJSvKZpannObtq0GTxHLNyCcvAMVBFH2O 3hPNVzxfAtWsfyOPhQE2YAZR8Mx2WavSW1XWFRF+wBu4vU3VjP8u4q4/ODHXx4Iky8+6 xngkd8wAgA78uhBCONtcgOE3W4W+BtBrZ53QccB31Ynf+uwhv16hpFBN/rd5BPZLiaL7 3Hvw== X-Gm-Message-State: AOJu0YwUJoTl9D01oqKcuFgY/3lhfU8Daqa6afBURmKK51sjIOde3Dz3 7Qtjf7Ga0mrCjzJxaKU9fwg= X-Google-Smtp-Source: AGHT+IFPVXHLmiez1c1QHJ6CdvlmAC2BBhWMXcwVlLmX7+8rd1VLGR63bHn6K6EuANrCno+ey5HLvQ== X-Received: by 2002:adf:e904:0:b0:336:4176:9229 with SMTP id f4-20020adfe904000000b0033641769229mr1327326wrm.54.1702550082488; Thu, 14 Dec 2023 02:34:42 -0800 (PST) Received: from localhost.localdomain ([129.0.226.240]) by smtp.gmail.com with ESMTPSA id e4-20020a5d65c4000000b003333ed23356sm15849623wrw.4.2023.12.14.02.34.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 02:34:41 -0800 (PST) From: Brandon Cheo Fusi To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Viresh Kumar , Yangtao Li Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Brandon Cheo Fusi Subject: [PATCH 1/5] riscv: dts: allwinner: Update opp table to allow CPU frequency scaling Date: Thu, 14 Dec 2023 11:33:38 +0100 Message-Id: <20231214103342.30775-2-fusibrandon13@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231214103342.30775-1-fusibrandon13@gmail.com> References: <20231214103342.30775-1-fusibrandon13@gmail.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Two OPPs are currently defined for the D1/D1s; one at 408MHz and another at 1.08GHz. Switching between these can be done with the "sun50i-cpufreq-nvmem" driver. This patch populates the opp table appropriately, with inspiration from https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi The supply voltages are PWM-controlled, but support for that IP is still in the works. So stick to a fixed 0.9V vdd-cpu supply, which seems to be the default on most D1 boards. Signed-off-by: Brandon Cheo Fusi --- arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) +}; diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi index 64c3c2e6c..e211fe4c7 100644 --- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi +++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi @@ -39,16 +39,22 @@ cpu0_intc: interrupt-controller { }; opp_table_cpu: opp-table-cpu { - compatible = "operating-points-v2"; + compatible = "allwinner,sun20i-d1-operating-points", + "allwinner,sun50i-h6-operating-points"; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed"; + opp-shared; opp-408000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <408000000>; - opp-microvolt = <900000 900000 1100000>; + opp-microvolt-speed0 = <900000>; }; opp-1080000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ opp-hz = /bits/ 64 <1008000000>; - opp-microvolt = <900000 900000 1100000>; + opp-microvolt-speed0 = <900000>; }; }; @@ -115,3 +121,8 @@ pmu { <0x00000000 0x0000000f 0xffffffff 0xffffffff 0x00020000>; }; }; + +&sid { + cpu_speed_grade: cpu-speed-grade@0 { + reg = <0x00 0x2>; + }; From patchwork Thu Dec 14 10:33:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brandon Cheo Fusi X-Patchwork-Id: 13492738 X-Patchwork-Delegate: viresh.linux@gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NDkATCZM" Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DF174139; Thu, 14 Dec 2023 02:35:08 -0800 (PST) Received: by mail-wr1-x436.google.com with SMTP id ffacd0b85a97d-32f8441dfb5so7205644f8f.0; Thu, 14 Dec 2023 02:35:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702550107; x=1703154907; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5YMMP/qsVfdoJtEElBLyEEO9c305KOAYJqUkekDdPZs=; b=NDkATCZMfoiVgg3N51a1twyD814Uj1CuF/7rrOYTHHHfXn2km7YjNZOYfFZhCDvhnT 0sdCN6/Ma/VWit5yxzq3XNqb+8rbD0VwawuPrwQAcqyhxIEIfgghukbp6pDvPWR3iqqP 6BRKwNXI63C+lCF+ZNUiN63Wj+pGQQOHeGfiabwTE+TPtk9hsQ7uC7cZvGwE8TSLQJ/q XUV8nOB0YK1scYnc0f0e+gA+H8E7SjwtXXLXeSzVH4tC+g91Lyl5RpvZigkROqjRUFfO Sdgixn+e8Q6If94xk1L1p12btGMevJ2w3w7N1B5MvBnbStdw8veNqMciLeacSEJGLxDO 1Fzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702550107; x=1703154907; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5YMMP/qsVfdoJtEElBLyEEO9c305KOAYJqUkekDdPZs=; b=XN3hFTaX7XjeLZ6hTH2JCAusZTLtEl8qpdx9VC7TfsI61kNO3QhnPTljqWceP6aPNi fZVtvX6rciVsuiuV+djQvcFnRjnzHSuPCbQgCms/4EB1Sj255BMWFgsJOli0oF42Ur8v dp2zFykXB2pO+Erz/znBcgYGgRiNYuFh2GbuIUhYMVezdkK2fZemGB9qE4QNmEdnhL5Z jUiHHbA69N7/nLRtUp0/Dg1Hd5R/gXg2BE47iOxhmHFYjmGFjJLXlozqKeGJrQmED3js e1/mZAdCRxRBHPB3v6aRSC7Pk+tqT3L49iDAW2UeEpHFbmMFWnhwJ7n7gpEvRcrzihlw LBeg== X-Gm-Message-State: AOJu0YzG84AjYnhmga3TYtHbmDTpyiHhnu/c8XsxHQjlHPKMDwwlQwBz +KHlEd5qVLFG7cprY/ikMR4= X-Google-Smtp-Source: AGHT+IGB2gMg2Mze62sZsH15EW7tQ5RddMXqMonm4fA8WEreIbA3LcsoIasFJ6/XxlhankFX/CQcBw== X-Received: by 2002:adf:9790:0:b0:333:2fd2:6f82 with SMTP id s16-20020adf9790000000b003332fd26f82mr4844499wrb.140.1702550107021; Thu, 14 Dec 2023 02:35:07 -0800 (PST) Received: from localhost.localdomain ([129.0.226.240]) by smtp.gmail.com with ESMTPSA id e4-20020a5d65c4000000b003333ed23356sm15849623wrw.4.2023.12.14.02.35.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 02:35:06 -0800 (PST) From: Brandon Cheo Fusi To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Viresh Kumar , Yangtao Li Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Brandon Cheo Fusi Subject: [PATCH 2/5] cpufreq: sun50i: Add D1 support Date: Thu, 14 Dec 2023 11:33:39 +0100 Message-Id: <20231214103342.30775-3-fusibrandon13@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231214103342.30775-1-fusibrandon13@gmail.com> References: <20231214103342.30775-1-fusibrandon13@gmail.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add support for D1 based devices to the Allwinner H6 cpufreq driver Signed-off-by: Brandon Cheo Fusi --- drivers/cpufreq/sun50i-cpufreq-nvmem.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c index 32a9c88f8..ccf83780f 100644 --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c @@ -160,6 +160,7 @@ static struct platform_driver sun50i_cpufreq_driver = { static const struct of_device_id sun50i_cpufreq_match_list[] = { { .compatible = "allwinner,sun50i-h6" }, + { .compatible = "allwinner,sun20i-d1" }, {} }; MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list); From patchwork Thu Dec 14 10:33:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brandon Cheo Fusi X-Patchwork-Id: 13492739 X-Patchwork-Delegate: viresh.linux@gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="QO/qw4f7" Received: from mail-wr1-x42b.google.com (mail-wr1-x42b.google.com [IPv6:2a00:1450:4864:20::42b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7DA4F139; Thu, 14 Dec 2023 02:35:21 -0800 (PST) Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-3332efd75c9so6822434f8f.2; Thu, 14 Dec 2023 02:35:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702550120; x=1703154920; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4SZpEgDuZF0Kd57Q/v4Kq9sCIukMURy5kzt0ohYZmr8=; b=QO/qw4f7RbtkpgM4FmK4C53/KNN7XywM/8TA9B0sanPqUs3mwxBF0FI1r85Q+E/E+5 zKKR17B35HPsa1Z3vJFP4+7Qfs095QnBwCD1tUsiA61tg5FZfIT8jS1S4y7KZmOYUQSt Pph8Q4Qbz9AXxzQQ8oF2y8c9jsrCbRwheNjhWB0lLZ6KPo9QjNG/EzpfjA2bYjRhJxz8 INmPcqxuOFA7Cc2UzZIkDnmsFOFBfVdbc4Np5Kpv6jpi4iQa+OkUk5xIXeWVTZwlMh93 VaYuikZhYU1DvO+ekOpW7Q4SJs/y9efBeXcOHUxYVlGD9MtSECIIJpTlMLUJENuAJg2b eCUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702550120; x=1703154920; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4SZpEgDuZF0Kd57Q/v4Kq9sCIukMURy5kzt0ohYZmr8=; b=jWaD8rR+a/fShMzjaGdmloifn+bUeYLNhTHoAcY5/vCmQv0n80QXPnARk9yBPm7v4Y IuxHib/SnWy3jz3PMgn/Tn3dID9gsUbs0ehi3Kyg4up3VXLRWC/ChNRy2SWtfk5Jul/1 wo3o8XcSU79u3XXPUQ00CX86rfZ47eze2iKdFEM/FsgMuCmtWzX0zmuEGBA+LhkXkkDN L42spu7hrBoRZMpnXj36nv1c7nGHV18e1HwuGtjAoWOyWgYxVbkGtEq2gp/YM3tE/CWl Vyp6EwAJ3eHQBPp1F2ADaGkHcgtc2xW0BKgDwNhs0rwTbBwsx0r+IJpViP1lWsdZUnZi 3HIQ== X-Gm-Message-State: AOJu0Yzjl0UjsplzorOCTv9Niz1d7aTQQ3SoWEOuR+D4NGpdkE6SallW mPM4Y/BeXMLteRgCqW8RP0c= X-Google-Smtp-Source: AGHT+IHYPY97jc9qd+t5is/0cCaszwyL2E4cFGf6c7JTug0/K/MlULH3FTa3Xttj5loEfnYxN8qi2g== X-Received: by 2002:a05:6000:235:b0:336:4a69:aa98 with SMTP id l21-20020a056000023500b003364a69aa98mr115808wrz.122.1702550119975; Thu, 14 Dec 2023 02:35:19 -0800 (PST) Received: from localhost.localdomain ([129.0.226.240]) by smtp.gmail.com with ESMTPSA id e4-20020a5d65c4000000b003333ed23356sm15849623wrw.4.2023.12.14.02.35.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 02:35:19 -0800 (PST) From: Brandon Cheo Fusi To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Viresh Kumar , Yangtao Li Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Brandon Cheo Fusi Subject: [PATCH 3/5] cpufreq: dt-platdev: Blocklist allwinner,sun20i-d1 SoC Date: Thu, 14 Dec 2023 11:33:40 +0100 Message-Id: <20231214103342.30775-4-fusibrandon13@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231214103342.30775-1-fusibrandon13@gmail.com> References: <20231214103342.30775-1-fusibrandon13@gmail.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Allwinner D1 uses H6 cpufreq driver. Add it to blocklist so the "cpufreq-dt" device is not created twice. Signed-off-by: Brandon Cheo Fusi --- drivers/cpufreq/cpufreq-dt-platdev.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index bd1e1357c..2febcfc2c 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -104,6 +104,7 @@ static const struct of_device_id allowlist[] __initconst = { */ static const struct of_device_id blocklist[] __initconst = { { .compatible = "allwinner,sun50i-h6", }, + { .compatible = "allwinner,sun20i-d1", }, { .compatible = "apple,arm-platform", }, From patchwork Thu Dec 14 10:33:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brandon Cheo Fusi X-Patchwork-Id: 13492740 X-Patchwork-Delegate: viresh.linux@gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="T9/rLp3l" Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E67B137; Thu, 14 Dec 2023 02:35:30 -0800 (PST) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-40c3ca9472dso58872025e9.2; Thu, 14 Dec 2023 02:35:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702550128; x=1703154928; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JrT4GQFgUc2NFNy8QfHDcUrSUYysbuxBIxCpg4THq6A=; b=T9/rLp3lA9YvFk+eSwLr/+vJsfm7myTmt3cfTjY76HaDeR2Hy43toF2exFW2JQKWGe k7id6fqMefwQRdGLPVHSdgY/3G+h6EAhJiOdlnC54E4lL0KwB3F+vnhI9+ZVV8lyUcQM EYV840p4rvOI4/eUqFs+nraKPav+eBUZtxuT7I2TdjWnyADOsb0xHB1SIJ8cdd3fqEOp TUBWSZFyReLKhY+xeQEYvTzbee39h1CgZ3iY9JIRKWtvkmzh0H7vr6yQ1D+6bbGorEXg 0oFS3D9a2TIL6ySaulKCrR00uhDLhLy0NGxAk8lQfk0KgC6C71pa9uSVpUtfne2kLo0M WjKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702550128; x=1703154928; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JrT4GQFgUc2NFNy8QfHDcUrSUYysbuxBIxCpg4THq6A=; b=KWPxMFUKg4Qor6qhFV63Lg+QugqneI4aVGTfpI03m+cOOyI9alAYOVefAjeSZr+Ksb kfwBuVzM0m5eD3lAZ4ZVbfsNWs05F1pIrKrdJRKLd7OTLo8x98XucszVktJObxOcv9QC S6+1KnxOdkb7m/IwFfSP0phMOxh6/fudM/1WchIW9uxKuWKPmA6JILhGSydhRFLsBcey fR4MWVo+wG8NSYKBMaGNGOKwHZrK59TqyycvgrjrZSGL+ZoPp8XjhUaRKCq9owxceRAR btrjGmf9N5TO7dgBZb3PJIhIBU48ih5twhbBdsIZ5+414LxvsfJ5dR15KqiYo6zT459B J3Pg== X-Gm-Message-State: AOJu0YxWXGRFWtPSwlbCEEle2vudxrXoMbgX4kalqQQJ8jb04uv4Jp8E nC6kvuRkSBiAZy0hwFOIv7Q= X-Google-Smtp-Source: AGHT+IGCjmnMr0NRq+HC8R0lvRI/AD01AcPL7img9WmAVtzQAIwlJBk50oZM1JWLrtlKld0tmTb1iA== X-Received: by 2002:a05:600c:2a41:b0:40c:32fa:4f45 with SMTP id x1-20020a05600c2a4100b0040c32fa4f45mr3510981wme.248.1702550128507; Thu, 14 Dec 2023 02:35:28 -0800 (PST) Received: from localhost.localdomain ([129.0.226.240]) by smtp.gmail.com with ESMTPSA id e4-20020a5d65c4000000b003333ed23356sm15849623wrw.4.2023.12.14.02.35.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 02:35:27 -0800 (PST) From: Brandon Cheo Fusi To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Viresh Kumar , Yangtao Li Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Brandon Cheo Fusi Subject: [PATCH 4/5] cpufreq: Add support for RISC-V CPU Frequency scaling drivers Date: Thu, 14 Dec 2023 11:33:41 +0100 Message-Id: <20231214103342.30775-5-fusibrandon13@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231214103342.30775-1-fusibrandon13@gmail.com> References: <20231214103342.30775-1-fusibrandon13@gmail.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add Kconfig file for cpufreq scaling drivers that can handle RISC-V CPUs. An entry is included for the Allwinner H6 cpufreq driver that works with D1. Signed-off-by: Brandon Cheo Fusi --- drivers/cpufreq/Kconfig | 4 ++++ drivers/cpufreq/Kconfig.riscv | 16 ++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 drivers/cpufreq/Kconfig.riscv diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig index 35efb53d5..4bef39fed 100644 --- a/drivers/cpufreq/Kconfig +++ b/drivers/cpufreq/Kconfig @@ -239,6 +239,10 @@ if PPC32 || PPC64 source "drivers/cpufreq/Kconfig.powerpc" endif +if RISCV +source "drivers/cpufreq/Kconfig.riscv" +endif + if MIPS config BMIPS_CPUFREQ tristate "BMIPS CPUfreq Driver" diff --git a/drivers/cpufreq/Kconfig.riscv b/drivers/cpufreq/Kconfig.riscv new file mode 100644 index 000000000..025c7c439 --- /dev/null +++ b/drivers/cpufreq/Kconfig.riscv @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# RISC-V CPU Frequency scaling drivers +# + +config ALLWINNER_SUN50I_CPUFREQ_NVMEM + tristate "Allwinner nvmem based SUN50I CPUFreq driver" + depends on ARCH_SUNXI + depends on NVMEM_SUNXI_SID + select PM_OPP + help + This adds the nvmem based CPUFreq driver for Allwinner + H6/D1 SoCs. + + To compile this driver as a module, choose M here: the + module will be called sun50i-cpufreq-nvmem. \ No newline at end of file From patchwork Thu Dec 14 10:33:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brandon Cheo Fusi X-Patchwork-Id: 13492741 X-Patchwork-Delegate: viresh.linux@gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="DfwPS7L0" Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 278BD138; Thu, 14 Dec 2023 02:35:54 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-33621d443a7so4223002f8f.3; Thu, 14 Dec 2023 02:35:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1702550152; x=1703154952; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/bSH5LSThTrH8jKZ5V0W7uU2b3lxsQ8a/FvDmGfwzlA=; b=DfwPS7L06Jc+pulUiwgpRofSxbwTOshNLSMK1u1CQ6vNuzaDyX4Dv+Zeav1x1y8LC4 hEW+dghmdMkpWneT83aOBK8UAxA97xhl6Cneb6pj35q9gNlcWsQdfb21aXnPb9TZ6LMo J/7zKE44LmjY7Kz0eUUaQ08orOjNd5L5UZxB58kVbwkUO45D1S8nuKSzOnDC2rApRVTH 3jb+C6V5k7gxtuQ5fytlZdoEXCAoW3qU+lz5qFLTX4T2pYeBhOAhKbJ56aJF4TftvLmO wbZu8uBISlpkTkw8vPA8v6AVGtXM3etLx/GOXOjzP+3jTwUxYpg+qrdk5NI3DSYDuhlu 18Xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702550152; x=1703154952; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/bSH5LSThTrH8jKZ5V0W7uU2b3lxsQ8a/FvDmGfwzlA=; b=R7lVjrh/D6w9aTN0Yi/Wm2ZVSLy8hQv3maofl63MeD+ySqYAbWg0PB2oWTUkuJo3Cj AkKAMpqtrkH9Z5UIyh/aE0HnRQzGkdyHIPbDPUKB6y+SWqUSVU2d1hNqUZYtD1hrxh4z YlV+Sq6X9gLlJ2KywR+rXyPug+lwBi+qRfL8iktK/E+q64yCTESO8IA+OsAkP83hO140 KDOzLR31gQG35pVQenWVCl9WLXv0VyM8dhqVFkSdUIzyMyV28AHOJdSbb7mEZFnpioy0 mXDjEUCGuODK//aT1zQo12GB+7/w4p3bFJX7OB3gGhryeDzsQDi5t+ZTsedNypyaJHZn mTqQ== X-Gm-Message-State: AOJu0YxXcAjKZbcZ+xvljAt6T26I82AwBUNUW+LBQRU1vc7zjzEHa933 SuSZxuGhH0N3bQV3xZ9crBU= X-Google-Smtp-Source: AGHT+IEbki3k5FnEaNVZtWRBuhOkVOwOnKsRmJW5T9tQx+eZlX6USeTgoCxh9UtIGcxFBYXudVg1vw== X-Received: by 2002:a5d:4bd2:0:b0:333:4940:dd1a with SMTP id l18-20020a5d4bd2000000b003334940dd1amr4977407wrt.23.1702550152438; Thu, 14 Dec 2023 02:35:52 -0800 (PST) Received: from localhost.localdomain ([129.0.226.240]) by smtp.gmail.com with ESMTPSA id e4-20020a5d65c4000000b003333ed23356sm15849623wrw.4.2023.12.14.02.35.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 Dec 2023 02:35:51 -0800 (PST) From: Brandon Cheo Fusi To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J . Wysocki" , Viresh Kumar , Yangtao Li Cc: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, Brandon Cheo Fusi Subject: [PATCH 5/5] cpufreq: Make sun50i h6 cpufreq Kconfig option generic Date: Thu, 14 Dec 2023 11:33:42 +0100 Message-Id: <20231214103342.30775-6-fusibrandon13@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231214103342.30775-1-fusibrandon13@gmail.com> References: <20231214103342.30775-1-fusibrandon13@gmail.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Remove the 'ARM_' prefix from the Allwinner SUN50I cpufreq driver Kconfig.arm option as that driver can support the D1, a RISC-V chip. Signed-off-by: Brandon Cheo Fusi --- drivers/cpufreq/Kconfig.arm | 4 ++-- drivers/cpufreq/Makefile | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/cpufreq/Kconfig.arm b/drivers/cpufreq/Kconfig.arm index f91160689..510604781 100644 --- a/drivers/cpufreq/Kconfig.arm +++ b/drivers/cpufreq/Kconfig.arm @@ -29,14 +29,14 @@ config ACPI_CPPC_CPUFREQ_FIE If in doubt, say N. -config ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM +config ALLWINNER_SUN50I_CPUFREQ_NVMEM tristate "Allwinner nvmem based SUN50I CPUFreq driver" depends on ARCH_SUNXI depends on NVMEM_SUNXI_SID select PM_OPP help This adds the nvmem based CPUFreq driver for Allwinner - h6 SoC. + H6/D1 SoCs. To compile this driver as a module, choose M here: the module will be called sun50i-cpufreq-nvmem. diff --git a/drivers/cpufreq/Makefile b/drivers/cpufreq/Makefile index 8d141c71b..110b676d2 100644 --- a/drivers/cpufreq/Makefile +++ b/drivers/cpufreq/Makefile @@ -78,7 +78,7 @@ obj-$(CONFIG_ARM_SCMI_CPUFREQ) += scmi-cpufreq.o obj-$(CONFIG_ARM_SCPI_CPUFREQ) += scpi-cpufreq.o obj-$(CONFIG_ARM_SPEAR_CPUFREQ) += spear-cpufreq.o obj-$(CONFIG_ARM_STI_CPUFREQ) += sti-cpufreq.o -obj-$(CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM) += sun50i-cpufreq-nvmem.o +obj-$(CONFIG_ALLWINNER_SUN50I_CPUFREQ_NVMEM) += sun50i-cpufreq-nvmem.o obj-$(CONFIG_ARM_TEGRA20_CPUFREQ) += tegra20-cpufreq.o obj-$(CONFIG_ARM_TEGRA124_CPUFREQ) += tegra124-cpufreq.o obj-$(CONFIG_ARM_TEGRA186_CPUFREQ) += tegra186-cpufreq.o