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Fri, 15 Dec 2023 17:58:20 -0600 From: Tanmay Shah To: , , , , , , , CC: , , , , Radhey Shyam Pandey , Rob Herring Subject: [PATCH v8 1/3] dt-bindings: remoteproc: add Tightly Coupled Memory (TCM) bindings Date: Fri, 15 Dec 2023 15:57:23 -0800 Message-ID: <20231215235725.1247350-2-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231215235725.1247350-1-tanmay.shah@amd.com> References: <20231215235725.1247350-1-tanmay.shah@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0DE:EE_|SJ2PR12MB8134:EE_ X-MS-Office365-Filtering-Correlation-Id: 77e1894a-e354-4e25-1e31-08dbfdc9bdd3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ccOuA/YWF+N4wOfffE3x55apNe9sXMjbN25TaZ2qzagyv5kWNe/2+wnE1gMhz27m/wDLbTicRBkC36AX6R+u4WqiUQel40OCxMdN+qM+W3lX6zI+8HipA7neg8rguq2Eq3IYt7cImHjzwbNCKMnf68tSrq7qyj9CqB7X5T9yftvxAh+9i6LAb/yoUk8c8GyKh7wbqZ5N4Nq/ggpkEoJXQV106GpLFVLtKXmW+qiAJDEO5JZFzku9AHu10WVKc7g+hmyRhCRnWFjWtW+Vs1mYy8BPih69jlcQTxx8H/Yc3s161b5e0zDY4pj2ne4N8XT2gH9vRgXbATTbTUeTB56rkvBkyAyW6FbDhzw+Hb7IVckHUwvhY2PEGT+AuPPbs3vpIvRAl1UVrIGb41oijDgK9bQYXrorNUt2/J/6fHwFc/l6r+v+al+is+B485V0aFNpDr7kWtnWysKk+WgoRKTH8GWAjNTvcV7qGk0xfQj0Y8nW5cbbf2kR52fYa8iC3vGzPuy+Og0/0fDQAqQLtAPmpe2gcn6hd6IZLuRkQ1l5QiDkb4eFBi5RkiG7PRIdgOuUVHIJgNiSIjq/arF3TDtcgorPddX9edOkihC6Q5R8Nc7qlN8DSpm0ra5TDypQh7SNeoYxhL1WB+CNc/ZETNBONCc/ma3/ljBMKycjJmvCMxogrVuauW9SlCfXK+e6FQNqwv+b6omnC8REv6eaPqFd79K8PeTiwCCuB0n7dDUXJFoswtQLHbcGtJCwgyzbvU18XIiKKnssLIle3TLG0wsuUg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(396003)(376002)(346002)(136003)(230922051799003)(1800799012)(186009)(64100799003)(82310400011)(451199024)(46966006)(40470700004)(36840700001)(40480700001)(7049001)(40460700003)(36860700001)(47076005)(81166007)(356005)(82740400003)(2906002)(7416002)(36756003)(5660300002)(83380400001)(336012)(426003)(1076003)(26005)(2616005)(478600001)(54906003)(70206006)(70586007)(41300700001)(86362001)(110136005)(4326008)(8676002)(8936002)(316002)(44832011)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2023 23:58:31.7571 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 77e1894a-e354-4e25-1e31-08dbfdc9bdd3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0DE.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8134 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231215_155840_487214_77F3539C X-CRM114-Status: GOOD ( 10.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Radhey Shyam Pandey Introduce bindings for TCM memory address space on AMD-xilinx Zynq UltraScale+ platform. It will help in defining TCM in device-tree and make it's access platform agnostic and data-driven. Tightly-coupled memories(TCMs) are low-latency memory that provides predictable instruction execution and predictable data load/store timing. Each Cortex-R5F processor contains two 64-bit wide 64 KB memory banks on the ATCM and BTCM ports, for a total of 128 KB of memory. The TCM resources(reg, reg-names and power-domain) are documented for each TCM in the R5 node. The reg and reg-names are made as required properties as we don't want to hardcode TCM addresses for future platforms and for zu+ legacy implementation will ensure that the old dts w/o reg/reg-names works and stable ABI is maintained. It also extends the examples for TCM split and lockstep modes. Signed-off-by: Radhey Shyam Pandey Signed-off-by: Tanmay Shah Acked-by: Rob Herring --- .../remoteproc/xlnx,zynqmp-r5fss.yaml | 131 +++++++++++++++--- 1 file changed, 113 insertions(+), 18 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml index 78aac69f1060..9ecd63ea1b38 100644 --- a/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml +++ b/Documentation/devicetree/bindings/remoteproc/xlnx,zynqmp-r5fss.yaml @@ -20,6 +20,17 @@ properties: compatible: const: xlnx,zynqmp-r5fss + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + ranges: + description: | + Standard ranges definition providing address translations for + local R5F TCM address spaces to bus addresses. + xlnx,cluster-mode: $ref: /schemas/types.yaml#/definitions/uint32 enum: [0, 1, 2] @@ -37,7 +48,7 @@ properties: 2: single cpu mode patternProperties: - "^r5f-[a-f0-9]+$": + "^r5f@[0-9a-f]+$": type: object description: | The RPU is located in the Low Power Domain of the Processor Subsystem. @@ -54,8 +65,19 @@ patternProperties: compatible: const: xlnx,zynqmp-r5f + reg: + items: + - description: ATCM internal memory region + - description: BTCM internal memory region + + reg-names: + items: + - const: atcm + - const: btcm + power-domains: - maxItems: 1 + minItems: 1 + maxItems: 3 mboxes: minItems: 1 @@ -102,34 +124,107 @@ patternProperties: required: - compatible - power-domains + - reg + - reg-names unevaluatedProperties: false required: - compatible + - "#address-cells" + - "#size-cells" + - ranges additionalProperties: false examples: - | - remoteproc { - compatible = "xlnx,zynqmp-r5fss"; - xlnx,cluster-mode = <1>; - - r5f-0 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware 0x7>; - memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; - mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; - mbox-names = "tx", "rx"; + #include + + //Split mode configuration + soc { + #address-cells = <2>; + #size-cells = <2>; + + remoteproc@ffe00000 { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <0>; + + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, + <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; + mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; + mbox-names = "tx", "rx"; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, + <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; + mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; + mbox-names = "tx", "rx"; + }; }; + }; - r5f-1 { - compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware 0x8>; - memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; - mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; - mbox-names = "tx", "rx"; + - | + //Lockstep configuration + soc { + #address-cells = <2>; + #size-cells = <2>; + + remoteproc@ffe00000 { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <1>; + + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x20000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x20000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x20000>, <0x0 0x20000 0x0 0x20000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>, <&rpu0vdev0buffer>, + <&rpu0vdev0vring0>, <&rpu0vdev0vring1>; + mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>; + mbox-names = "tx", "rx"; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>, <&rpu1vdev0buffer>, + <&rpu1vdev0vring0>, <&rpu1vdev0vring1>; + mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>; + mbox-names = "tx", "rx"; + }; }; }; ... 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Fri, 15 Dec 2023 17:58:21 -0600 From: Tanmay Shah To: , , , , , , , CC: , , , Subject: [PATCH v8 2/3] dts: zynqmp: add properties for TCM in remoteproc Date: Fri, 15 Dec 2023 15:57:24 -0800 Message-ID: <20231215235725.1247350-3-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231215235725.1247350-1-tanmay.shah@amd.com> References: <20231215235725.1247350-1-tanmay.shah@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F9:EE_|DS0PR12MB8019:EE_ X-MS-Office365-Filtering-Correlation-Id: 7a33132a-0f44-4299-dc55-08dbfdc9b96b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: c6pnVJgaZ31lqT5tI5s5+30SWy+/7UW9sjHRr6ff5VX7yQoMX4WUNzAPlAihNpWV/RZ5m6NS+hhLAHAtX2tJcvkvJWG4de5zdXpFsJ5iF4a9A5OKZ4ZomWCucIAmR56Xya0qlKExtbZMaLTZi4fLDQIQGtkSLx6TvZ9hoMT/Nf+WwRn2E9suHsFbIcCEh5BtzS+RBQOPpvo7vvzRHchDc23vxhA6rHSmjT9uZRuxWtCwPx1+QnDUELLDy5KK8ANYKvQ6ZYSmnq4EpxIX3g3PjroDRhS56v1N6VFs/4nNyQy8lZnK80e1c1/xh7R0HZNRBmsl/T/zbKWRcKwTvULNc/8ypO/fsWq4kQkR9Mq7hc++q3yQPZba3MXlmsqJFLK63PVJ8+npFL6U5WR2jeYFcuPmALaKbO98qHAviYXX9eoL5+MGIVKS4M7nvWM74bVUE3BgTsGzffDv3Z0KQSqRhtl4SlOiKjuwGR5s0S1bkRbNBUXdcu7dMPnlkC20EoJPU0uKvV642UTKqRRo8ibjaTqJJJ3g1e3tvVFT82Q3H1zoEnBsk+12K/N0SoVKzOwqmRd5VDVAUcGpmv6CSd41HGBLeaAMr2NhOdqpi7TsJvxDiiR+0eAjejoDTkq0Na0kIXmC9TbabWHOyiWLTk8jwd1Fu3cELVkLvpFgjNdyunnpZ/n0plR8Z0B6SJyUDrhYb9ObI4EmCgDKrQYpGi+QT6XzYnBrusVk0swJVa1v+FiM0S+jwvCj3MnrGYOAO/Cp9fM2ieLqVfP/deKwbe1qKQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(39860400002)(396003)(346002)(376002)(230922051799003)(186009)(451199024)(82310400011)(1800799012)(64100799003)(40470700004)(36840700001)(46966006)(83380400001)(478600001)(82740400003)(1076003)(40480700001)(2616005)(426003)(336012)(26005)(110136005)(7049001)(54906003)(316002)(70206006)(70586007)(356005)(81166007)(36860700001)(47076005)(86362001)(8676002)(4326008)(44832011)(40460700003)(8936002)(5660300002)(2906002)(36756003)(41300700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2023 23:58:24.2602 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7a33132a-0f44-4299-dc55-08dbfdc9b96b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F9.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8019 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231215_155835_396468_08F242D3 X-CRM114-Status: GOOD ( 12.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add properties as per new bindings in zynqmp remoteproc node to represent TCM address and size. This patch also adds alternative remoteproc node to represent remoteproc cluster in split mode. By default lockstep mode is enabled and users should disable it before using split mode dts. Both device-tree nodes can't be used simultaneously one of them must be disabled. For zcu102-1.0 and zcu102-1.1 board remoteproc split mode dts node is enabled and lockstep mode dts is disabled. Signed-off-by: Tanmay Shah Acked-by: Michal Simek --- .../boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts | 8 +++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 60 +++++++++++++++++-- 2 files changed, 63 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts index c8f71a1aec89..495ca94b45db 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev1.0.dts @@ -14,6 +14,14 @@ / { compatible = "xlnx,zynqmp-zcu102-rev1.0", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; }; +&rproc_split { + status = "okay"; +}; + +&rproc_lockstep { + status = "disabled"; +}; + &eeprom { #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index b61fc99cd911..602e6aba7ac5 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -247,19 +247,69 @@ fpga_full: fpga-full { ranges; }; - remoteproc { + rproc_lockstep: remoteproc@ffe00000 { compatible = "xlnx,zynqmp-r5fss"; xlnx,cluster-mode = <1>; - r5f-0 { + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x20000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x20000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x0 0x0 0x0 0x20000>, <0x0 0x20000 0x0 0x20000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; + memory-region = <&rproc_0_fw_image>; + }; + + r5f@1 { + compatible = "xlnx,zynqmp-r5f"; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; + memory-region = <&rproc_1_fw_image>; + }; + }; + + rproc_split: remoteproc-split@ffe00000 { + status = "disabled"; + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <0>; + + #address-cells = <2>; + #size-cells = <2>; + + ranges = <0x0 0x0 0x0 0xffe00000 0x0 0x10000>, + <0x0 0x20000 0x0 0xffe20000 0x0 0x10000>, + <0x1 0x0 0x0 0xffe90000 0x0 0x10000>, + <0x1 0x20000 0x0 0xffeb0000 0x0 0x10000>; + + r5f@0 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_0>; + reg = <0x0 0x0 0x0 0x10000>, <0x0 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_0>, + <&zynqmp_firmware PD_R5_0_ATCM>, + <&zynqmp_firmware PD_R5_0_BTCM>; memory-region = <&rproc_0_fw_image>; }; - r5f-1 { + r5f@1 { compatible = "xlnx,zynqmp-r5f"; - power-domains = <&zynqmp_firmware PD_RPU_1>; + reg = <0x1 0x0 0x0 0x10000>, <0x1 0x20000 0x0 0x10000>; + reg-names = "atcm", "btcm"; + power-domains = <&zynqmp_firmware PD_RPU_1>, + <&zynqmp_firmware PD_R5_1_ATCM>, + <&zynqmp_firmware PD_R5_1_BTCM>; memory-region = <&rproc_1_fw_image>; }; }; From patchwork Fri Dec 15 23:57:25 2023 Content-Type: text/plain; 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Fri, 15 Dec 2023 17:58:22 -0600 From: Tanmay Shah To: , , , , , , , CC: , , , Subject: [PATCH v8 3/3] remoteproc: zynqmp: parse TCM from device tree Date: Fri, 15 Dec 2023 15:57:25 -0800 Message-ID: <20231215235725.1247350-4-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231215235725.1247350-1-tanmay.shah@amd.com> References: <20231215235725.1247350-1-tanmay.shah@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0DE:EE_|PH7PR12MB6908:EE_ X-MS-Office365-Filtering-Correlation-Id: f06354c2-4059-4097-dc20-08dbfdc9be72 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2M9kLUlrAhqglEr1/Q3PV++PuXQ9jeoNe3KtUnLwS/9E0ynWPtu86WT90AygtIfUbYirEYvsbVHfIGwoFtaqihrlTDxzaupfubS9tp0UmjsaEAX6tDozRBPkQuVJDfVVZ/5B8/Fsc3woRK4ElbT0nOhrtb2uSK444azdWmQBM83ZRGfMg5ruYuBgTOJkFKKHh60Y2DeMtq/mUGKngpP470AHHv6p0yzLY/QgnR7ZGjwqzuZeToxqAqFYriE9TRhlvOxp/qkJOmgicAtjoiPaVMI+ZbiEaWwoX/Eilk6GKCki5HyqoQSS4hOOmk7nvmPv9THgpr2BXpSs+iCkBevQvE/T7azHIik8uieBZERtQElQqZFGrxz5arIODVMx14XoD6VGNj8jx4FS0QZFF+75Nl5RPMHBe4ulCJM5ayl+EO1PowRaKvKOjPfipl6dLWt8iQbcr+hYqpvoDD0W05x4gN50tr+4N8RAFvzmo5S8P3rZ1uL5te4bqFPlF3Oq6q5rNjvPP9avcCCLOaXVwQRtM7WiduxO/9biVm2iEDF+un04zVag20fUdKnmNhlAmM3GisnCYyhmDxOfjVacTZDdPrlbgiK/mDuRjL/H4E9EuoBbuHsKlmLxCygZvjUN+aDrryVnU/NjIRrIbqHiO8cQhl0oD5OmUdhmPPYTLtuUXu2CuHEutoLacsnSqvxW8A3KdG1b7dCl5E0csC8LoyogMuv24HLZ+7ZydbTXYnwP+en75vQygeyrM7JwJztAdvkWjvmiPmsQfuZR+2VnBfeZXA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(396003)(376002)(136003)(346002)(39860400002)(230922051799003)(451199024)(64100799003)(1800799012)(186009)(82310400011)(40470700004)(36840700001)(46966006)(40480700001)(66899024)(40460700003)(26005)(426003)(336012)(2616005)(1076003)(7049001)(356005)(82740400003)(86362001)(36756003)(81166007)(47076005)(83380400001)(5660300002)(4326008)(44832011)(36860700001)(70586007)(316002)(70206006)(110136005)(8676002)(8936002)(54906003)(2906002)(41300700001)(478600001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Dec 2023 23:58:32.8196 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f06354c2-4059-4097-dc20-08dbfdc9be72 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0DE.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6908 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231215_155840_798880_81ACAECD X-CRM114-Status: GOOD ( 23.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org ZynqMP TCM information is fixed in driver. Now ZynqMP TCM information is available in device-tree. Parse TCM information in driver as per new bindings. Signed-off-by: Tanmay Shah --- Changes in v8: - parse power-domains property from device-tree and use EEMI calls to power on/off TCM instead of using pm domains framework - Remove checking of pm_domain_id validation to power on/off tcm - Remove spurious change Changes in v7: - move checking of pm_domain_id from previous patch - fix mem_bank_data memory allocation drivers/remoteproc/xlnx_r5_remoteproc.c | 154 +++++++++++++++++++++++- 1 file changed, 148 insertions(+), 6 deletions(-) diff --git a/drivers/remoteproc/xlnx_r5_remoteproc.c b/drivers/remoteproc/xlnx_r5_remoteproc.c index 4395edea9a64..36d73dcd93f0 100644 --- a/drivers/remoteproc/xlnx_r5_remoteproc.c +++ b/drivers/remoteproc/xlnx_r5_remoteproc.c @@ -74,8 +74,8 @@ struct mbox_info { }; /* - * Hardcoded TCM bank values. This will be removed once TCM bindings are - * accepted for system-dt specifications and upstreamed in linux kernel + * Hardcoded TCM bank values. This will stay in driver to maintain backward + * compatibility with device-tree that does not have TCM information. */ static const struct mem_bank_data zynqmp_tcm_banks_split[] = { {0xffe00000UL, 0x0, 0x10000UL, PD_R5_0_ATCM, "atcm0"}, /* TCM 64KB each */ @@ -878,6 +878,139 @@ static struct zynqmp_r5_core *zynqmp_r5_add_rproc_core(struct device *cdev) return ERR_PTR(ret); } +static int zynqmp_r5_get_tcm_node_from_dt(struct zynqmp_r5_cluster *cluster) +{ + struct of_phandle_args out_args; + int tcm_reg_per_r5, tcm_pd_idx; + struct zynqmp_r5_core *r5_core; + int i, j, tcm_bank_count, ret; + struct platform_device *cpdev; + struct mem_bank_data *tcm; + struct device_node *np; + struct resource *res; + u64 abs_addr, size; + struct device *dev; + + for (i = 0; i < cluster->core_count; i++) { + r5_core = cluster->r5_cores[i]; + dev = r5_core->dev; + np = of_node_get(dev_of_node(dev)); + tcm_pd_idx = 1; + + /* we have address cell 2 and size cell as 2 */ + tcm_reg_per_r5 = of_property_count_elems_of_size(np, "reg", + 4 * sizeof(u32)); + if (tcm_reg_per_r5 <= 0) { + dev_err(dev, "can't get reg property err %d\n", tcm_reg_per_r5); + return -EINVAL; + } + + /* + * In lockstep mode, r5 core 0 will use r5 core 1 TCM + * power domains as well. so allocate twice of per core TCM + */ + if (cluster->mode == LOCKSTEP_MODE) + tcm_bank_count = tcm_reg_per_r5 * 2; + else + tcm_bank_count = tcm_reg_per_r5; + + r5_core->tcm_banks = devm_kcalloc(dev, tcm_bank_count, + sizeof(struct mem_bank_data *), + GFP_KERNEL); + if (!r5_core->tcm_banks) + ret = -ENOMEM; + + r5_core->tcm_bank_count = tcm_bank_count; + for (j = 0; j < tcm_bank_count; j++) { + tcm = devm_kzalloc(dev, sizeof(struct mem_bank_data), + GFP_KERNEL); + if (!tcm) + return -ENOMEM; + + r5_core->tcm_banks[j] = tcm; + + /* + * In lockstep mode, get second core's TCM power domains id + * after first core TCM parsing is done as + */ + if (j == tcm_reg_per_r5) { + /* dec first core node */ + of_node_put(np); + + /* get second core node */ + np = of_get_next_child(cluster->dev->of_node, np); + + /* + * reset index of power-domains property list + * for second core + */ + tcm_pd_idx = 1; + } + + /* get power-domains id of tcm */ + ret = of_parse_phandle_with_args(np, "power-domains", + "#power-domain-cells", + tcm_pd_idx, + &out_args); + if (ret) { + dev_err(r5_core->dev, + "failed to get tcm %d pm domain, ret %d\n", + j, ret); + of_node_put(out_args.np); + return ret; + } + tcm->pm_domain_id = out_args.args[0]; + of_node_put(out_args.np); + tcm_pd_idx++; + + /* + * In lockstep mode, we only need second core's power domain + * ids. Other information from second core isn't needed so + * ignore it. This forms table as zynqmp_tcm_banks_lockstep + */ + if (j >= tcm_reg_per_r5) + continue; + + /* get tcm address without translation */ + ret = of_property_read_reg(np, j, &abs_addr, &size); + if (ret) { + of_node_put(np); + dev_err(dev, "failed to get reg property\n"); + return ret; + } + + /* + * remote processor can address only 32 bits + * so convert 64-bits into 32-bits. This will discard + * any unwanted upper 32-bits. + */ + tcm->da = (u32)abs_addr; + tcm->size = (u32)size; + + cpdev = to_platform_device(dev); + res = platform_get_resource(cpdev, IORESOURCE_MEM, j); + if (!res) { + of_node_put(np); + dev_err(dev, "failed to get tcm resource\n"); + return -EINVAL; + } + + tcm->addr = (u32)res->start; + tcm->bank_name = (char *)res->name; + res = devm_request_mem_region(dev, tcm->addr, tcm->size, + tcm->bank_name); + if (!res) { + dev_err(dev, "failed to request tcm resource\n"); + of_node_put(np); + return -EINVAL; + } + } + } + + of_node_put(np); + return 0; +} + /** * zynqmp_r5_get_tcm_node() * Ideally this function should parse tcm node and store information @@ -956,10 +1089,19 @@ static int zynqmp_r5_core_init(struct zynqmp_r5_cluster *cluster, struct zynqmp_r5_core *r5_core; int ret, i; - ret = zynqmp_r5_get_tcm_node(cluster); - if (ret < 0) { - dev_err(dev, "can't get tcm node, err %d\n", ret); - return ret; + r5_core = cluster->r5_cores[0]; + if (of_find_property(r5_core->np, "reg", NULL)) { + ret = zynqmp_r5_get_tcm_node_from_dt(cluster); + if (ret) { + dev_err(dev, "can't get tcm node from dt, err %d\n", ret); + return ret; + } + } else { + ret = zynqmp_r5_get_tcm_node(cluster); + if (ret < 0) { + dev_err(dev, "can't get tcm node, err %d\n", ret); + return ret; + } } for (i = 0; i < cluster->core_count; i++) {