From patchwork Sun Dec 17 20:40:21 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495984 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2ACB3C3DA6E for ; Sun, 17 Dec 2023 20:40:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=tkl/RTBUM55rXbvUAoEsb2Gq82nyUk7fsn/zaMAWNg4=; b=d7cZpJ4J4Fto6a LRHrqF3opm+pX8WBaGMcrU3o1otfZ+WHzVEoy4dfFU8jMg7qS9g5wLSm0lKy2p/LNd5MZL8vHsXLb UKH1ItldHs2M++x9oIZAr54b7B5ji/Q9D7DJ4d9hg/XKs8QOQPC3NO73EI3Wdcz2GNQPyVMT7+frT MZunl0LKNLOFT2ARmWs/EjYq6UBRvYGT0GyMHQFoiOSaFyhMxq+EKqxYWdy8NHXFAbkY6zERVtQxf TGbRunIrxchrTm4iKa9X/2SwQ4wdHRUGcDFhorc10xPoMh/++l4Km/WSKnIU3ky6u/xeaNoGG2kGF UHrlrLMnIm0dBe7YaPDQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExw8-008Pxu-2U; Sun, 17 Dec 2023 20:40:32 +0000 Received: from mail-lf1-x132.google.com ([2a00:1450:4864:20::132]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExw2-008Pvd-3B for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:30 +0000 Received: by mail-lf1-x132.google.com with SMTP id 2adb3069b0e04-50e3901c2e2so220430e87.0 for ; Sun, 17 Dec 2023 12:40:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845625; x=1703450425; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rrEG4VfmknrXWlI8EmkbjWAiyXLxvwuw9ATy51bteag=; b=mkXiD83OhZzlqbXIRciHIQ51l0gTgLm683uReLP2yCrtYLAnM9/FXEOXwbFBOUhOLD 7VpF86zAxwbxMpIZKRAtnKWnI+XEGW+gsfIhuuW4Z2e1BHInbJx+VIyuOdLcBZ7l5fWX w4k6qYsb4sJuNJIcxRjBSp4sxk5o0ib2ciKyc68XtaVWXLldXGDnw9m+OJGNVAeVNgnb JSX/Fx7/TE/ZPRXH2+CHQE0eLhCbJ4+fussKIKRPhgE8iTPyOw8NrFdGS3mQMxkOYWF2 bJmTNkYr3F7BKToW2EWqFx75EdoyMWx8qxq0EZNUPh08VPsi2eNuBCCcqVrM0suvxPo5 dBNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845625; x=1703450425; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rrEG4VfmknrXWlI8EmkbjWAiyXLxvwuw9ATy51bteag=; b=XmdnyMG5VKmEM+WrjzGBKTzLhqsZYUd8XBo4muxwaKbpUSV3r2x+lXHR5mGTcSStxh Y8N3VcIYliXpMhCm30O4ZY3vXTYZnV9qUoiZ0W0b/vVEj9oKgMMuicMykU8h0x4Fx20L NLTqiuX45syvc4TE1H14S2MYvSkfHt7ZU2UNBvWIFGvDytVTRbGiPcOoZ79GFaCCmEZu FmJdDibpQUAK/Xa88RrtbJ00RQuZ7OYANpKjWoZ0kflvKmkxnDLbzz7Id+f5ekFg+7uZ zSS3Z6Bw869T/94skl2BSs41QrlP2obHt0DPDSv342A5+OqlB22IW2clLrO8Nl1V7kXx hfgw== X-Gm-Message-State: AOJu0YyYhWyCfrJUTQJ/oK5U3UcQ0hmpHyu9bMm7kueMsyKBkf0nwPKT z3KH+eWLEL1ZcLkJi5GljjW19w== X-Google-Smtp-Source: AGHT+IEdbOFaHEtuhEdk3AGty6kUoQMmFDTAepafza/ExRHO/YRb6kiEvclrAvmECNxkuDONeZBoTQ== X-Received: by 2002:a05:6512:1093:b0:50e:175d:7407 with SMTP id j19-20020a056512109300b0050e175d7407mr3460753lfg.64.1702845625660; Sun, 17 Dec 2023 12:40:25 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id by16-20020a170906a2d000b00a234491b96asm1264698ejb.63.2023.12.17.12.40.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:25 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 01/13] RISC-V: paravirt: Add skeleton for pv-time support Date: Sun, 17 Dec 2023 21:40:21 +0100 Message-ID: <20231217204019.36492-16-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124027_101442_076BCFCD X-CRM114-Status: GOOD ( 17.95 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add the files and functions needed to support paravirt time on RISC-V. Also include the common code needed for the first application of pv-time, which is steal-time. In the next patches we'll complete the functions to fully enable steal-time support. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- .../admin-guide/kernel-parameters.txt | 6 +- arch/riscv/include/asm/paravirt.h | 28 +++++++ arch/riscv/include/asm/paravirt_api_clock.h | 1 + arch/riscv/kernel/Makefile | 1 + arch/riscv/kernel/paravirt.c | 77 +++++++++++++++++++ arch/riscv/kernel/time.c | 3 + 6 files changed, 113 insertions(+), 3 deletions(-) create mode 100644 arch/riscv/include/asm/paravirt.h create mode 100644 arch/riscv/include/asm/paravirt_api_clock.h create mode 100644 arch/riscv/kernel/paravirt.c diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 65731b060e3f..a0d9259e4857 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3985,9 +3985,9 @@ vulnerability. System may allow data leaks with this option. - no-steal-acc [X86,PV_OPS,ARM64,PPC/PSERIES] Disable paravirtualized - steal time accounting. steal time is computed, but - won't influence scheduler behaviour + no-steal-acc [X86,PV_OPS,ARM64,PPC/PSERIES,RISCV] Disable + paravirtualized steal time accounting. steal time is + computed, but won't influence scheduler behaviour nosync [HW,M68K] Disables sync negotiation for all devices. diff --git a/arch/riscv/include/asm/paravirt.h b/arch/riscv/include/asm/paravirt.h new file mode 100644 index 000000000000..c0abde70fc2c --- /dev/null +++ b/arch/riscv/include/asm/paravirt.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_RISCV_PARAVIRT_H +#define _ASM_RISCV_PARAVIRT_H + +#ifdef CONFIG_PARAVIRT +#include + +struct static_key; +extern struct static_key paravirt_steal_enabled; +extern struct static_key paravirt_steal_rq_enabled; + +u64 dummy_steal_clock(int cpu); + +DECLARE_STATIC_CALL(pv_steal_clock, dummy_steal_clock); + +static inline u64 paravirt_steal_clock(int cpu) +{ + return static_call(pv_steal_clock)(cpu); +} + +int __init pv_time_init(void); + +#else + +#define pv_time_init() do {} while (0) + +#endif /* CONFIG_PARAVIRT */ +#endif /* _ASM_RISCV_PARAVIRT_H */ diff --git a/arch/riscv/include/asm/paravirt_api_clock.h b/arch/riscv/include/asm/paravirt_api_clock.h new file mode 100644 index 000000000000..65ac7cee0dad --- /dev/null +++ b/arch/riscv/include/asm/paravirt_api_clock.h @@ -0,0 +1 @@ +#include diff --git a/arch/riscv/kernel/Makefile b/arch/riscv/kernel/Makefile index fee22a3d1b53..807c2bde1f83 100644 --- a/arch/riscv/kernel/Makefile +++ b/arch/riscv/kernel/Makefile @@ -85,6 +85,7 @@ obj-$(CONFIG_SMP) += sbi-ipi.o obj-$(CONFIG_SMP) += cpu_ops_sbi.o endif obj-$(CONFIG_HOTPLUG_CPU) += cpu-hotplug.o +obj-$(CONFIG_PARAVIRT) += paravirt.o obj-$(CONFIG_KGDB) += kgdb.o obj-$(CONFIG_KEXEC_CORE) += kexec_relocate.o crash_save_regs.o machine_kexec.o obj-$(CONFIG_KEXEC_FILE) += elf_kexec.o machine_kexec_file.o diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c new file mode 100644 index 000000000000..141dbcc36fa2 --- /dev/null +++ b/arch/riscv/kernel/paravirt.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2023 Ventana Micro Systems Inc. + */ + +#define pr_fmt(fmt) "riscv-pv: " fmt + +#include +#include +#include +#include +#include +#include + +struct static_key paravirt_steal_enabled; +struct static_key paravirt_steal_rq_enabled; + +static u64 native_steal_clock(int cpu) +{ + return 0; +} + +DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock); + +static bool steal_acc = true; +static int __init parse_no_stealacc(char *arg) +{ + steal_acc = false; + return 0; +} + +early_param("no-steal-acc", parse_no_stealacc); + +static bool __init has_pv_steal_clock(void) +{ + return false; +} + +static int pv_time_cpu_online(unsigned int cpu) +{ + return 0; +} + +static int pv_time_cpu_down_prepare(unsigned int cpu) +{ + return 0; +} + +static u64 pv_time_steal_clock(int cpu) +{ + return 0; +} + +int __init pv_time_init(void) +{ + int ret; + + if (!has_pv_steal_clock()) + return 0; + + ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, + "riscv/pv_time:online", + pv_time_cpu_online, + pv_time_cpu_down_prepare); + if (ret < 0) + return ret; + + static_call_update(pv_steal_clock, pv_time_steal_clock); + + static_key_slow_inc(¶virt_steal_enabled); + if (steal_acc) + static_key_slow_inc(¶virt_steal_rq_enabled); + + pr_info("using paravirt steal-time\n"); + + return 0; +} diff --git a/arch/riscv/kernel/time.c b/arch/riscv/kernel/time.c index 23641e82a9df..ba3477197789 100644 --- a/arch/riscv/kernel/time.c +++ b/arch/riscv/kernel/time.c @@ -12,6 +12,7 @@ #include #include #include +#include unsigned long riscv_timebase __ro_after_init; EXPORT_SYMBOL_GPL(riscv_timebase); @@ -45,4 +46,6 @@ void __init time_init(void) timer_probe(); tick_setup_hrtimer_broadcast(); + + pv_time_init(); } From patchwork Sun Dec 17 20:40:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495980 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DBA5C3DA6E for ; Sun, 17 Dec 2023 20:40:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=kVDXiR/oNriQU3skgtcIZX1hyKN+/hVRSveGLa0ShOk=; b=Z+0zQmmsqCYeeE 0E/g3ikfzU3YCJAUV6Q0HyfkY0GTKBM9fchJ7OMfgwEmcookWYdbCGQelsyjT2VGSzC6Pw2+3Lqjj 7bZJ2fp9/YtDwbY+GY5JIASxN9mek9ooRpRLdvmf5CCa2xF3xIptNlXMXtBASBEl2O7AS0AF1T3YG Gp71qK4csm1+wbxKa5FZfN89zWNhs6FvVbXc1YaUpmtrzMZQ9Ub20BGv82nAkkM1uSoQVtAvs6jlH HUoHWBnENBBUB7AWO3FRhRc2KJLQt/IBYAw+xmYvosDGH2PhfxlewTfp54w18Df1M1Gb6SapYAdt9 3Rgci51i4dpOsMSTARKw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwC-008Pze-0S; Sun, 17 Dec 2023 20:40:36 +0000 Received: from mail-ej1-x636.google.com ([2a00:1450:4864:20::636]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExw7-008Pwx-0e for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:32 +0000 Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-a234139b725so78769566b.3 for ; Sun, 17 Dec 2023 12:40:30 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845629; x=1703450429; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gJEKgoCl75+B888vMMMdWTo7SEi5lRuwQ/RrT7Q47BA=; b=Xz5BlFw1f/fabTGbnF5hC57ddwOafGva7AjmxMnxpPmeb3LWwZwd2HJDCn/KzYIcU9 HaZJY3xhIRunmmzNT5c5aa4Rlssw2TWhrTXMiCswj925bRGolGZ9Jwv7LQ1ogxQuuVwx C4pr+toXqbkG5fSK2/lI8WLlMqdSf1ydFr3/Txvks6S+75zaTZGX7EgO+XQUJ3lgrXaG uALCaEZQyDEX+vioPRm9YNE+zhczXzUwuqNeZkeARDKQm1fd3e2Txo+h+mgykw2K93zg Pd1sMFBd1HLd2jYmf40ybm+tKUtwpX+iwtjKIPofMXjUt4LrfHvq1MGbjfDJJLOi6Hi2 KnEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845629; x=1703450429; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gJEKgoCl75+B888vMMMdWTo7SEi5lRuwQ/RrT7Q47BA=; b=w9XVV+XrLYxcjv4WXCkP6btBKQY7n3deuW3AYulCEL2tfcWnzaZPC5MaJIBdjcHtg8 s7JYMmvwkEwSg+0o6RPTIriIzBHm1xFWZd9eTjG52N3geyVnZKj5bpLstIMPrI44YTfJ 0KRc7udae4QKbMHyNHgubo+yW5UfVDBHEZFzwPPaRB2pngHNlWFiSBUABaFrX1K0EMgP x9/BL6+nNu5+w37q9PUjgq4hYGBY+fheIcoiB8hgnNcBMPvawGFURYDup++ZNfPuZVli 0W6jXBsKG21+rOZ37MnwixiVnj1Bm5XGTv9UG5UPp9rTDrUUTG+DR/Mta8vPRVO/TQQh ClpQ== X-Gm-Message-State: AOJu0Yzh407DyRcV/8LImwLFnRheDKG/L4waXaFvMLu1Yesp/3GLrZM8 9CLtBz0VHyyvp4e53C+/iYsaUQ== X-Google-Smtp-Source: AGHT+IGmIBlpFS+9pHcXMz1NvZF5Zb3Lg/gBLV72EKrLPU5g9c/YVXCXhRKKEe6j3IvX7UWfl+4alw== X-Received: by 2002:a17:906:4a5a:b0:a23:5332:d22b with SMTP id a26-20020a1709064a5a00b00a235332d22bmr185786ejv.244.1702845628675; Sun, 17 Dec 2023 12:40:28 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id fw10-20020a170906c94a00b00a2349073119sm1115090ejb.134.2023.12.17.12.40.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:28 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 02/13] RISC-V: Add SBI STA extension definitions Date: Sun, 17 Dec 2023 21:40:22 +0100 Message-ID: <20231217204019.36492-17-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124031_241395_F8C10C52 X-CRM114-Status: UNSURE ( 7.08 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The SBI STA extension enables steal-time accounting. Add the definitions it specifies. Reviewed-by: Conor Dooley Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- arch/riscv/include/asm/sbi.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h index 0892f4421bc4..b6f898c56940 100644 --- a/arch/riscv/include/asm/sbi.h +++ b/arch/riscv/include/asm/sbi.h @@ -31,6 +31,7 @@ enum sbi_ext_id { SBI_EXT_SRST = 0x53525354, SBI_EXT_PMU = 0x504D55, SBI_EXT_DBCN = 0x4442434E, + SBI_EXT_STA = 0x535441, /* Experimentals extensions must lie within this range */ SBI_EXT_EXPERIMENTAL_START = 0x08000000, @@ -243,6 +244,22 @@ enum sbi_ext_dbcn_fid { SBI_EXT_DBCN_CONSOLE_WRITE_BYTE = 2, }; +/* SBI STA (steal-time accounting) extension */ +enum sbi_ext_sta_fid { + SBI_EXT_STA_STEAL_TIME_SET_SHMEM = 0, +}; + +struct sbi_sta_struct { + __le32 sequence; + __le32 flags; + __le64 steal; + u8 preempted; + u8 pad[47]; +} __packed; + +#define SBI_STA_SHMEM_DISABLE -1 + +/* SBI spec version fields */ #define SBI_SPEC_VERSION_DEFAULT 0x1 #define SBI_SPEC_VERSION_MAJOR_SHIFT 24 #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f From patchwork Sun Dec 17 20:40:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495983 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D97DAC46CD4 for ; Sun, 17 Dec 2023 20:40:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=V6DYWlC4H4z/k9eEG1ITRbaIeg75Y8SGMgBgUntad5Q=; b=o9K7vcNB9lSDbr eFCBgUg9juiyUE0FMpkMkyj0wg0TYGbNVXASQlxxUfDLIMNyKLBreXlijIPWE3l761HXQSPHB8u42 D1Lnton/c6edH6Cc+Rra/djsFiFY5GsrPE3IU/YvNS1NFNxtf+7ZXXFvUrM84qERzkwg1vkNJOwxj 22M/CFl1qQD4zLPi5iYSS/xWC/ZEkuW6DZ+u16PvfMnDFAeNsoci1gPIgJQ5yYB3BUybwGt6lreBx EAf8s2+hqPif5ztyMYxBc4MDh7vl3Llm4IEYxyd232Z+k/uB8jfuAyExCkYP/Nw/nXuENSOqeJYtp QLjIuF5lz9/rvTT3JUog==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwE-008Q1A-1Z; Sun, 17 Dec 2023 20:40:38 +0000 Received: from mail-ed1-x535.google.com ([2a00:1450:4864:20::535]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExw9-008Pxg-1m for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:35 +0000 Received: by mail-ed1-x535.google.com with SMTP id 4fb4d7f45d1cf-55359dc0290so76863a12.1 for ; Sun, 17 Dec 2023 12:40:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845632; x=1703450432; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1C9+m5vX7gcyxmg3o58CZNvyTEXIZyT+2uiierRNF4w=; b=P1ArK+ncDJd3akgq5AbPbJ1lI5iZhR4zMnlkcvggFdf19XdEre3zWH3Rv0pb7OoPXb 0n/a9nHZB4dZkIXggSV4eVrnlMKE0E26hIVOIJqARlv7SW1ftnPQi2uauumXcxewi/9+ F3x0WzCcpzNZwW9YCMTwo5wFxfyhGE1y9tcL1KZH7iAYQkxN9caCbgTbrlp8JHi2OOGX ErJomkbBzwW8tzwvS4J3P8406Q7f1Uh4m9x7PoCGB36JK7ZqurKXtQ2/y2TC32KXZAKD gtiKENFgM9C153zkH2o7Ihm2s7N3rlxqHPYl77GxOfFUjUIqds+UpUEoJsM9GgZZXzCy /g0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845632; x=1703450432; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1C9+m5vX7gcyxmg3o58CZNvyTEXIZyT+2uiierRNF4w=; b=HyzGViOnrNfm8Qy07iqOyOrhlPkigyF8XyuZYLCiNnfLZ5NfYeSVTF1y+zz7NwtY76 Ucxqy+4i6L5WLqxgUPY2P5VCTBy5Ms4GOv2SREH+Lgx9Z9Okd4efUj9a3T23SYqBM6CZ OJx1CMOQT5hT4uoEdhRdmiZWvLn0dVCRVGS4dw+436zuZQ/dRBryjddZFv7kAYscjGys Xi2QIVEeXG8gY80HOvuIAUVealxLtFz7O/YdH/f67IYik5CtIw6fVY+vlwiqD4yEe94g +WXwbIVKNSulORWTseWV5I8Oe+EzJrKz/L/VXSVF3PDw5MPRottJ1KTR7/cLYndTqq/w z5Mg== X-Gm-Message-State: AOJu0YxAq5l+9iGE9qAgHPFJb61GO5kzmeB4MunsNfMKtG9r7ZfBg9wH zL26YzmSnrWn0MMHJadPXYUllg== X-Google-Smtp-Source: AGHT+IEb5mXAsy/TcJRY+ESJBC2XjarrnzMd6USLhSGOvGSddsgFgaE+w41cFsUI7yalBL6uW3ZbrA== X-Received: by 2002:a50:8712:0:b0:54c:aa1c:205e with SMTP id i18-20020a508712000000b0054caa1c205emr13974797edb.17.1702845631646; Sun, 17 Dec 2023 12:40:31 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id ev14-20020a056402540e00b005519a444a6asm5555289edb.71.2023.12.17.12.40.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:31 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 03/13] RISC-V: paravirt: Implement steal-time support Date: Sun, 17 Dec 2023 21:40:23 +0100 Message-ID: <20231217204019.36492-18-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124033_594282_C03122D4 X-CRM114-Status: GOOD ( 18.03 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org When the SBI STA extension exists we can use it to implement paravirt steal-time support. Fill in the empty pv-time functions with an SBI STA implementation and add the Kconfig knobs allowing it to be enabled. Signed-off-by: Andrew Jones Reviewed-by: Atish Patra Reviewed-by: Anup Patel --- arch/riscv/Kconfig | 19 +++++++++++ arch/riscv/kernel/paravirt.c | 63 ++++++++++++++++++++++++++++++++++-- 2 files changed, 79 insertions(+), 3 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 95a2a06acc6a..b99fd8129edf 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -724,6 +724,25 @@ config COMPAT If you want to execute 32-bit userspace applications, say Y. +config PARAVIRT + bool "Enable paravirtualization code" + depends on RISCV_SBI + help + This changes the kernel so it can modify itself when it is run + under a hypervisor, potentially improving performance significantly + over full virtualization. + +config PARAVIRT_TIME_ACCOUNTING + bool "Paravirtual steal time accounting" + depends on PARAVIRT + help + Select this option to enable fine granularity task steal time + accounting. Time spent executing other tasks in parallel with + the current vCPU is discounted from the vCPU power. To account for + that, there can be a small performance impact. + + If in doubt, say N here. + config RELOCATABLE bool "Build a relocatable kernel" depends on MMU && 64BIT && !XIP_KERNEL diff --git a/arch/riscv/kernel/paravirt.c b/arch/riscv/kernel/paravirt.c index 141dbcc36fa2..cc6a85432678 100644 --- a/arch/riscv/kernel/paravirt.c +++ b/arch/riscv/kernel/paravirt.c @@ -6,12 +6,21 @@ #define pr_fmt(fmt) "riscv-pv: " fmt #include +#include +#include #include #include +#include +#include +#include #include #include #include +#include +#include +#include + struct static_key paravirt_steal_enabled; struct static_key paravirt_steal_rq_enabled; @@ -31,24 +40,72 @@ static int __init parse_no_stealacc(char *arg) early_param("no-steal-acc", parse_no_stealacc); +DEFINE_PER_CPU(struct sbi_sta_struct, steal_time) __aligned(64); + static bool __init has_pv_steal_clock(void) { + if (sbi_spec_version >= sbi_mk_version(2, 0) && + sbi_probe_extension(SBI_EXT_STA) > 0) { + pr_info("SBI STA extension detected\n"); + return true; + } + return false; } -static int pv_time_cpu_online(unsigned int cpu) +static int sbi_sta_steal_time_set_shmem(unsigned long lo, unsigned long hi, + unsigned long flags) { + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_STA, SBI_EXT_STA_STEAL_TIME_SET_SHMEM, + lo, hi, flags, 0, 0, 0); + if (ret.error) { + if (lo == SBI_STA_SHMEM_DISABLE && hi == SBI_STA_SHMEM_DISABLE) + pr_warn("Failed to disable steal-time shmem"); + else + pr_warn("Failed to set steal-time shmem"); + return sbi_err_map_linux_errno(ret.error); + } + return 0; } +static int pv_time_cpu_online(unsigned int cpu) +{ + struct sbi_sta_struct *st = this_cpu_ptr(&steal_time); + phys_addr_t pa = __pa(st); + unsigned long lo = (unsigned long)pa; + unsigned long hi = IS_ENABLED(CONFIG_32BIT) ? upper_32_bits((u64)pa) : 0; + + return sbi_sta_steal_time_set_shmem(lo, hi, 0); +} + static int pv_time_cpu_down_prepare(unsigned int cpu) { - return 0; + return sbi_sta_steal_time_set_shmem(SBI_STA_SHMEM_DISABLE, + SBI_STA_SHMEM_DISABLE, 0); } static u64 pv_time_steal_clock(int cpu) { - return 0; + struct sbi_sta_struct *st = per_cpu_ptr(&steal_time, cpu); + u32 sequence; + u64 steal; + + /* + * Check the sequence field before and after reading the steal + * field. Repeat the read if it is different or odd. + */ + do { + sequence = READ_ONCE(st->sequence); + virt_rmb(); + steal = READ_ONCE(st->steal); + virt_rmb(); + } while ((le32_to_cpu(sequence) & 1) || + sequence != READ_ONCE(st->sequence)); + + return le64_to_cpu(steal); } int __init pv_time_init(void) From patchwork Sun Dec 17 20:40:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495982 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C7F6DC46CD7 for ; Sun, 17 Dec 2023 20:40:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=c92mGpv/1EJU+LQp2FkSsEO+TzSP21gTBM9Sqr9DfJY=; b=spfh4yGhdsliy0 OeUKBzhScBo/x52wZ5rqx5IrEPaQ2k66MvkSS2j8wXhTptblXae7lyq67aDG8CSrdbxBCTScqX9ED uNJeB1tsygN3JcuO7ekZt9TX7fqjG7Gr/041rZo22JO9yXsEqKOYIVg39EY99BpFHSt4zG8zQ06s+ sVzoV03H0wqNWNAGXmr9ikad7eRPlorKPQDXk0QdogZCYEO0asRJoHgPq/YmXFhEY2ceg2u0Pa0a1 jaikQJ2Dy43NmH0Ss5j5Svg8/s6l0y/jcKztCX0uUy7406wx3M60y73Nx5AqSrK7ttC3I986GpAir uvudVhLmjwzojtJDl52g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwG-008Q32-1h; Sun, 17 Dec 2023 20:40:40 +0000 Received: from mail-lf1-x136.google.com ([2a00:1450:4864:20::136]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwC-008Pz4-3D for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:38 +0000 Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-50bfd8d5c77so2424361e87.1 for ; Sun, 17 Dec 2023 12:40:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845634; x=1703450434; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+d89FGlW8uU7BxXGJ5yTN/jLWIL41Tj4iXPYsfWwAZY=; b=BCvIORgahiDdMM6Vi6aHDH5YXHFnZpEnSy307CnwAMwn3avxX6fc/8cGhsTIPrYPQ5 7r7sGH9YpY3Jgl1cJNUT+J85B+lL/8bJfHxALhOq4ZnsMiD9L7PqAktUqpRbUFwAb4Ld +R661BHJNm5AWRk7EzfXmw60I05UYDMDF4TVpzVHz499KBZQUf5fGpRfTLUX/udEQEZQ U9eZQhTUmaiuFwoZip9FDgPMpGLrjmvxg6PqeICzBzUZ30y9JHMjF+cDfQLUohsoMy9G D3njGA//DlXS33ynj4DteR6qAI32e58O2SnxfBIeMmbT6d/qjfz63tnKh7X94d3Ek0Dq hCwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845634; x=1703450434; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+d89FGlW8uU7BxXGJ5yTN/jLWIL41Tj4iXPYsfWwAZY=; b=xFgbxSG7VQSsrdrFSHZ59/G7vPas+pwxTWIiTOQzeZ0U3s1qB7zS0k815RrTu5Sbjs a/DA0GoI/ev6bm2BBvQVCHXCuVn/UxXxvVk3seBqm4nAajQf1ocMG1C7gFU9Ut9rornL zdj4gbwfjnMtdkTVFfqfWxRDB/AtTuopdkFLFcMbISpZcFdW7Z5pWWxJzG5087qoxJ0g VZ7gvicwRZb/ccJ2XhECkkyXtuGKS8Pamw6tw0dmRkhAsCWMKtPrXv2tuL5AUqfe/ojN PiZ4JAk9HAEf/72ybQM1Zza9n1oq+712l1ZaLJYiqkOhxYIWuik7iAZsWmwaJBIkuu8v 3BCw== X-Gm-Message-State: AOJu0YweAHwZGwOoWiKxMitq0c/IU8kyeAODVoKLkpSdqWvasa7BxKpd RFgLF/sDy7AnWnqhChkqApU3Jg== X-Google-Smtp-Source: AGHT+IGaGjUzlqaEdCfyqPOB7cC+hg78YM+9kfj/FXBbuW+nr2gBrZIAxYC4fVxXGTopJKaX8HSCCw== X-Received: by 2002:a05:6512:21cf:b0:50b:e29b:2f01 with SMTP id d15-20020a05651221cf00b0050be29b2f01mr2885756lft.264.1702845634647; Sun, 17 Dec 2023 12:40:34 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id jw23-20020a17090776b700b00a23365f1290sm1464388ejc.218.2023.12.17.12.40.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:34 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 04/13] RISC-V: KVM: Add SBI STA extension skeleton Date: Sun, 17 Dec 2023 21:40:24 +0100 Message-ID: <20231217204019.36492-19-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124037_048640_41B46339 X-CRM114-Status: GOOD ( 15.26 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add the files and functions needed to support the SBI STA (steal-time accounting) extension. In the next patches we'll complete the functions to fully enable SBI STA support. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- arch/riscv/include/asm/kvm_vcpu_sbi.h | 1 + arch/riscv/include/uapi/asm/kvm.h | 1 + arch/riscv/kvm/Makefile | 1 + arch/riscv/kvm/vcpu_sbi.c | 4 +++ arch/riscv/kvm/vcpu_sbi_sta.c | 47 +++++++++++++++++++++++++++ 5 files changed, 54 insertions(+) create mode 100644 arch/riscv/kvm/vcpu_sbi_sta.c diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h index bffda0ac59b6..99c23bb37a37 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -76,6 +76,7 @@ extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_rfence; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_srst; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_hsm; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_dbcn; +extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_experimental; extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_vendor; diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index 60d3b21dead7..e961d79622fb 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -157,6 +157,7 @@ enum KVM_RISCV_SBI_EXT_ID { KVM_RISCV_SBI_EXT_EXPERIMENTAL, KVM_RISCV_SBI_EXT_VENDOR, KVM_RISCV_SBI_EXT_DBCN, + KVM_RISCV_SBI_EXT_STA, KVM_RISCV_SBI_EXT_MAX, }; diff --git a/arch/riscv/kvm/Makefile b/arch/riscv/kvm/Makefile index 4c2067fc59fc..c9646521f113 100644 --- a/arch/riscv/kvm/Makefile +++ b/arch/riscv/kvm/Makefile @@ -26,6 +26,7 @@ kvm-$(CONFIG_RISCV_SBI_V01) += vcpu_sbi_v01.o kvm-y += vcpu_sbi_base.o kvm-y += vcpu_sbi_replace.o kvm-y += vcpu_sbi_hsm.o +kvm-y += vcpu_sbi_sta.o kvm-y += vcpu_timer.o kvm-$(CONFIG_RISCV_PMU_SBI) += vcpu_pmu.o vcpu_sbi_pmu.o kvm-y += aia.o diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index dcdff4458190..088daaa23dd8 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -70,6 +70,10 @@ static const struct kvm_riscv_sbi_extension_entry sbi_ext[] = { .ext_idx = KVM_RISCV_SBI_EXT_DBCN, .ext_ptr = &vcpu_sbi_ext_dbcn, }, + { + .ext_idx = KVM_RISCV_SBI_EXT_STA, + .ext_ptr = &vcpu_sbi_ext_sta, + }, { .ext_idx = KVM_RISCV_SBI_EXT_EXPERIMENTAL, .ext_ptr = &vcpu_sbi_ext_experimental, diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c new file mode 100644 index 000000000000..839911dcd837 --- /dev/null +++ b/arch/riscv/kvm/vcpu_sbi_sta.c @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2023 Ventana Micro Systems Inc. + */ + +#include + +#include +#include + +static int kvm_sbi_sta_steal_time_set_shmem(struct kvm_vcpu *vcpu) +{ + return SBI_ERR_FAILURE; +} + +static int kvm_sbi_ext_sta_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, + struct kvm_vcpu_sbi_return *retdata) +{ + struct kvm_cpu_context *cp = &vcpu->arch.guest_context; + unsigned long funcid = cp->a6; + int ret; + + switch (funcid) { + case SBI_EXT_STA_STEAL_TIME_SET_SHMEM: + ret = kvm_sbi_sta_steal_time_set_shmem(vcpu); + break; + default: + ret = SBI_ERR_NOT_SUPPORTED; + break; + } + + retdata->err_val = ret; + + return 0; +} + +static unsigned long kvm_sbi_ext_sta_probe(struct kvm_vcpu *vcpu) +{ + return 0; +} + +const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta = { + .extid_start = SBI_EXT_STA, + .extid_end = SBI_EXT_STA, + .handler = kvm_sbi_ext_sta_handler, + .probe = kvm_sbi_ext_sta_probe, +}; From patchwork Sun Dec 17 20:40:25 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 25397C46CA2 for ; Sun, 17 Dec 2023 20:40:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lKLcNcVBMAHeaV9MS5OLRUBZRpUf3N0FGzN+mHOcAfA=; b=np/DRVt0F2/Gju bArwc5HwVH4RDvNBs2MyvO/Yr7I2nZYhDAHYcgmpgJA0ulPio5kKWh4znDfC0QV19AQvDObpnGnHG 3tZH22EVwym6fM34a52rJuY/FMMTqhRmQJGA+76952nY0ROGnkDB0PjN/frOk6ZwYVTgKdaKA5Pfx Pp5PBlwX101DofzRcq6cYrHGGg2poefrLyRQkA5YFs2KZc+MMHgtt1xfncKM/utlbW1OxDfO2daux T5SffXC1XN12RaNCsh3P2j334uuMASi/xs23oicbyAOEQMLdtPeoyA5vD4/HAIaoIt6L2fUnjPYOO rhVYKdh4qDTfMgQCDgzQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwJ-008Q6D-3D; Sun, 17 Dec 2023 20:40:44 +0000 Received: from mail-ed1-x52a.google.com ([2a00:1450:4864:20::52a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwF-008Q16-2B for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:41 +0000 Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-552231d9c1dso3165501a12.0 for ; Sun, 17 Dec 2023 12:40:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845638; x=1703450438; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=wSoHYNOgfqU5+c8x6IeudkotxUSJD6YLApsHwAAqgOM=; b=Q+v9sqoCDt74s0lTOvE0D3OT0ITrU1NIjs2Sfht005F5LA2/ZZK2MLcUfTO2beG1nG BBS81Nds/V6P6YOTh/EKXoBnl6uBST/ZxTMK7AygV3MvfJKMhia2mL4keFTpdsg6Ay6e GT2FYDYeWAvYi+yupNBus+bkkRZVPLkHG0fFhIcMiNme8utRR9f8q++l++KxXorrzfT5 phwhlX5LeKC3XXbybR6COaKLsSqtirhZHoonRBAjJcAoEPYmZ9G/ZGlPYnWelDrbi+Be Jg12nCwAi/qFlE4e8nKv7wAo/VHfSwCDgbmcj0adNRTP9Spz6UTb1Hv3ppJ0bjctgHD+ ooyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845638; x=1703450438; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=wSoHYNOgfqU5+c8x6IeudkotxUSJD6YLApsHwAAqgOM=; b=RG0Jvuem5eWDo3ezn8bbPSYIsq056VEQVfTgdKhnFizm1XuQidE2qznCg7Tv//dPNb 8c7amZiQXDiAg4GhTSXOhe4iVtZEjon/z2h/e5qpUB2Ky9oJ9w2ZhnOOFGTdGSB5w2TT EIZEJw+xZcJu2jErQJuIgQnVWEVqnlW/ebjyX4WuVs8DbVeMeZAEXz7iIc1kJ4DZdjCt NxosxNFcRTX5Q+Q8F0iBR9NJFp8mxFjxtwqkSyDpsHRThPGq6GkeQAj/VThnCmwcPp0j BunALOzWHCE9jKNxW1zAljzq4o1suMlsmVQPIELS1GjaX1yMn10QRpKHFitgTsWCAJgp RULw== X-Gm-Message-State: AOJu0YxOkRM2qiTNW49B8lvPzewkBJO+FlLerUvguxkPbyypAvFJlpX6 fAwWC9h8MOhmhrtFDReNOO5sSQ== X-Google-Smtp-Source: AGHT+IFE5RF/SHXnJzGGw3wICaxYmcL1l5BAUO47j5YWQTpa+0J6ApMFhpsBULpgQvfhkW22Oeq7dg== X-Received: by 2002:a17:906:dfd0:b0:a19:a1ba:da41 with SMTP id jt16-20020a170906dfd000b00a19a1bada41mr8077173ejc.104.1702845637696; Sun, 17 Dec 2023 12:40:37 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id ld4-20020a1709079c0400b00a1df88cc7c0sm13219047ejc.182.2023.12.17.12.40.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:37 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 05/13] RISC-V: KVM: Add steal-update vcpu request Date: Sun, 17 Dec 2023 21:40:25 +0100 Message-ID: <20231217204019.36492-20-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124039_713410_B335BA5D X-CRM114-Status: GOOD ( 12.38 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add a new vcpu request to inform a vcpu that it should record its steal-time information. The request is made each time it has been detected that the vcpu task was not assigned a cpu for some time, which is easy to do by making the request from vcpu-load. The record function is just a stub for now and will be filled in with the rest of the steal-time support functions in following patches. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- arch/riscv/include/asm/kvm_host.h | 3 +++ arch/riscv/kvm/vcpu.c | 5 +++++ arch/riscv/kvm/vcpu_sbi_sta.c | 4 ++++ 3 files changed, 12 insertions(+) diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h index 0eefd9c991ae..230b82c3118d 100644 --- a/arch/riscv/include/asm/kvm_host.h +++ b/arch/riscv/include/asm/kvm_host.h @@ -41,6 +41,7 @@ KVM_ARCH_REQ_FLAGS(4, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) #define KVM_REQ_HFENCE \ KVM_ARCH_REQ_FLAGS(5, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP) +#define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(6) enum kvm_riscv_hfence_type { KVM_RISCV_HFENCE_UNKNOWN = 0, @@ -372,4 +373,6 @@ bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, u64 mask); void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); +void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); + #endif /* __RISCV_KVM_HOST_H__ */ diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index bf3952d1a621..6995b8b641e4 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -541,6 +541,8 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) kvm_riscv_vcpu_aia_load(vcpu, cpu); + kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu); + vcpu->cpu = cpu; } @@ -614,6 +616,9 @@ static void kvm_riscv_check_vcpu_requests(struct kvm_vcpu *vcpu) if (kvm_check_request(KVM_REQ_HFENCE, vcpu)) kvm_riscv_hfence_process(vcpu); + + if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu)) + kvm_riscv_vcpu_record_steal_time(vcpu); } } diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c index 839911dcd837..e28351c9488b 100644 --- a/arch/riscv/kvm/vcpu_sbi_sta.c +++ b/arch/riscv/kvm/vcpu_sbi_sta.c @@ -8,6 +8,10 @@ #include #include +void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu) +{ +} + static int kvm_sbi_sta_steal_time_set_shmem(struct kvm_vcpu *vcpu) { return SBI_ERR_FAILURE; From patchwork Sun Dec 17 20:40:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495986 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 704EAC3DA6E for ; Sun, 17 Dec 2023 20:40:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Fb2P6la1CxrlNM7//VjG4UxLrvHu1U3q6BddSmpUmcg=; b=thyogmcT8pu5QO ovtmdfSG/GVyWuPO7V0ZDJ8T2MmNyrEweGoe5NZtTktizaBWOtg7EeZ/res5A/x5NdR9w8N2n3vXF x+jBjFhgCDccDnn6Q/qyY4hZpqOhqy1yf1uIPoaT8Wk2pdzJXnJOtvBPCBb2RTeqeQ3j1pgOV25JU CeCTepI7r4S3RinU7ru+nFgtSRed1jgSSAD0F1KWpBm3jMaeurb4kHsdhcpbQJUYI92TY4AApciza dBPBJ+WyJcLq0E7ult0uUcB4muyK/I+RU1t9objR7lvBZpasQkBIx6sDXPSudQcMIanvOKIBSbRIT +xf5S70WCW2DO8GKwTSg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwO-008QAV-0X; Sun, 17 Dec 2023 20:40:48 +0000 Received: from mail-ed1-x52f.google.com ([2a00:1450:4864:20::52f]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwI-008Q3Z-2Z for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:44 +0000 Received: by mail-ed1-x52f.google.com with SMTP id 4fb4d7f45d1cf-54c70c70952so2809670a12.3 for ; Sun, 17 Dec 2023 12:40:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845640; x=1703450440; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=e/JsdsBfwTQ+WtoE+ZqPAArqtl47MKSL1wHIgI3qALc=; b=HvG2oLSlF9fFKVZCuUHkFueFtjAwWPbuKgFnP9fdHveL0JMlWUKcBnm+t57PN8OTJ4 lqrM/19xKJJORyM1Qua3lbigu+DKf9AqmndF0jdlUzF+Q8aHqkb4G1m4bXVgSwxWw4zq gBZCn4o5hdoTVjmD1iNbAcpgkccYg2F9EWJQBZXPzOf28AGJZEn5715jvJmz30UabzUa qQw/hPvEFzJvVBKdCKrpyW49D2WAD4u8LrvUpOEt1tA8Sa1Etz7Xx9YVL1hTzdTvhr8z MDw4y5K+NxBtIKSooG/RCGPtzS2uwhLEtB7M70Y37RirK6PSH6Z7x4vpKCJI2cC0d/uS MaKQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845640; x=1703450440; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e/JsdsBfwTQ+WtoE+ZqPAArqtl47MKSL1wHIgI3qALc=; b=NBBiaIhtRkedrW9XhBTYxpu788HNoG3gH13tAHEEIiyUTsDgTkna9jumjdlScdMQ8n rUVjr2DkFQJUEvDHK1ragV7+SOn5SEacNtIfbWWbHnbtjwmb/SmFdjm5a+Puq8J0aR1r amYD9o9Jo7i3g7rxMr6Ik83Zovpn0XNZ558k0D6g1EoFp0TQ4PD9OdBzLgts7kKvERAI 4a0SYQIVFERs6QRH3vzv2pcrHfnt3bHHYxdqrJFW5Gk/a5d1fRame4cP33rnVbU7NJuc BeIr4IcdwZCqQEe0eG4ANxKTH9u0/BgeaOBKxkhXjrO5HOx98n34mZvwq7GDUhoHBHOt rbMw== X-Gm-Message-State: AOJu0YxR+V/5G9mD97WV993yWNUC+tqjomCb63/FLaHkc20LXp8T4gFt 1dY+IU6tBgoVOahCbiJ5sA5Lew== X-Google-Smtp-Source: AGHT+IFR1J9OT5X4e0axZZpDP0qQuLSOAw+65TiLvqTzqYi3kfqjSPifUFVpqKX1wfG6EKURYOYfHQ== X-Received: by 2002:a50:d0cd:0:b0:553:432f:d46f with SMTP id g13-20020a50d0cd000000b00553432fd46fmr388919edf.95.1702845640693; Sun, 17 Dec 2023 12:40:40 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id en18-20020a056402529200b00552666f4745sm3884263edb.22.2023.12.17.12.40.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:40 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 06/13] RISC-V: KVM: Add SBI STA info to vcpu_arch Date: Sun, 17 Dec 2023 21:40:26 +0100 Message-ID: <20231217204019.36492-21-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124042_964891_646A7176 X-CRM114-Status: GOOD ( 13.00 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org KVM's implementation of SBI STA needs to track the address of each VCPU's steal-time shared memory region as well as the amount of stolen time. Add a structure to vcpu_arch to contain this state and make sure that the address is always set to INVALID_GPA on vcpu reset. And, of course, ensure KVM won't try to update steal- time when the shared memory address is invalid. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- arch/riscv/include/asm/kvm_host.h | 7 +++++++ arch/riscv/kvm/vcpu.c | 2 ++ arch/riscv/kvm/vcpu_sbi_sta.c | 10 ++++++++++ 3 files changed, 19 insertions(+) diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm_host.h index 230b82c3118d..525cba63e0c5 100644 --- a/arch/riscv/include/asm/kvm_host.h +++ b/arch/riscv/include/asm/kvm_host.h @@ -263,6 +263,12 @@ struct kvm_vcpu_arch { /* 'static' configurations which are set only once */ struct kvm_vcpu_config cfg; + + /* SBI steal-time accounting */ + struct { + gpa_t shmem; + u64 last_steal; + } sta; }; static inline void kvm_arch_sync_events(struct kvm *kvm) {} @@ -373,6 +379,7 @@ bool kvm_riscv_vcpu_has_interrupts(struct kvm_vcpu *vcpu, u64 mask); void kvm_riscv_vcpu_power_off(struct kvm_vcpu *vcpu); void kvm_riscv_vcpu_power_on(struct kvm_vcpu *vcpu); +void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu); void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu); #endif /* __RISCV_KVM_HOST_H__ */ diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index 6995b8b641e4..b5ca9f2e98ac 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -83,6 +83,8 @@ static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) vcpu->arch.hfence_tail = 0; memset(vcpu->arch.hfence_queue, 0, sizeof(vcpu->arch.hfence_queue)); + kvm_riscv_vcpu_sbi_sta_reset(vcpu); + /* Reset the guest CSRs for hotplug usecase */ if (loaded) kvm_arch_vcpu_load(vcpu, smp_processor_id()); diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c index e28351c9488b..6592d287fc4e 100644 --- a/arch/riscv/kvm/vcpu_sbi_sta.c +++ b/arch/riscv/kvm/vcpu_sbi_sta.c @@ -8,8 +8,18 @@ #include #include +void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) +{ + vcpu->arch.sta.shmem = INVALID_GPA; + vcpu->arch.sta.last_steal = 0; +} + void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu) { + gpa_t shmem = vcpu->arch.sta.shmem; + + if (shmem == INVALID_GPA) + return; } static int kvm_sbi_sta_steal_time_set_shmem(struct kvm_vcpu *vcpu) From patchwork Sun Dec 17 20:40:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495987 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ADB07C46CA2 for ; Sun, 17 Dec 2023 20:40:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=GUNld9+DTUx5/eT9SE9DS8K3RdJHO2EZ8sm21/KFNac=; b=tajA6ZYQ0h0FL5 8lslzP12ZTM08tjixU7BwTj16jx2/2Kf2uNXeqj5asbRpPyvpgRTT3KkaP5uN4OO2ULtP7WvO8ljX qMUvnNjJH25iONK+aXANLmyG0DNF3QZdggcd9bmi4Z/1EGsd9sFhaOVBoed2F7b88xmhic9zLMo7H +Lrigf1HJMRw6k1G+EUaEOWP/OqrB8e4stzCWDjqddj+3OtsTIn9elLVyyZlKYl76NM+ZQWNpKEe3 vfi/LdS4c3oUDWwye9dATsrEUFYOu6niNiN/1kjyiuRXd3v5oezyTpxVuGpBlro7psaG5ql5vO86n eq7Nqk3Q0foKR3NoDpRg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwQ-008QCR-0C; Sun, 17 Dec 2023 20:40:50 +0000 Received: from mail-ed1-x52c.google.com ([2a00:1450:4864:20::52c]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwL-008Q6P-0y for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:47 +0000 Received: by mail-ed1-x52c.google.com with SMTP id 4fb4d7f45d1cf-54c79968ffbso2396132a12.3 for ; Sun, 17 Dec 2023 12:40:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845643; x=1703450443; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ati28HaUo07sfuS7+TtS+dh1hqN/HNUg4uNuQ+ecmUw=; b=EjzPqd/t+0rVneI3+CrA5YAo//1IU5oAwKs71PijOysdzclUbnpORbV3HmotqyI8Ds 9To7ayWN0PzIyBz+JaTgs+u9B33iiFgS9hYQ4mSupy80ZzSIOQ6oL/TAqo8VQgAMlHXQ Wxshh/1LfxGBSZ5baJ0rVI8YK4McYsDilkRJ4YtUg/420vVy7VaHgTvlIm14daQdJpGN na/6Max9cO523xGRAVCuGBDk21bcFBjGsj+5YCdurJrOO8+aUaC+HC+yFnewVgNH4VPB stSfMIIDeyLcE+OfxPCbgvdyQoCnlqVp6ISIrbRSBCP+CTroNpHXojHbg/oZSzTPExIU 19lQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845643; x=1703450443; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ati28HaUo07sfuS7+TtS+dh1hqN/HNUg4uNuQ+ecmUw=; b=sNnOxmZMBmpxkjdQJKc00NKm8ULGdi+dtEg1z+n8CWYbV7uHXBw5EFFMKHLa/NvBPt 8MFm3Mkg09tmksvYCtXmO1q6WgisZcD7rb9VR7llWYvHV+ppTJ5elZr7rhmw3vDbJgQQ RdwWHQx2IFcygJR+rGyczcumvtvuMQ8EPl+GFAoaGcd4rTdOICl07vS4Qtz8/LG+WmAX uLuABuNKg+Me8RfME9zbe7fF1V3LNiSKkb9OC2lB+D2ejFVrWKm32RWK/puUxAGN23n8 60AAh5x2BS7CsojnrkNGtOfn5FxKaxeIlsehwfbChCZZvS7eJAMbOYLj0dPa3bDKfnBb ZAYw== X-Gm-Message-State: AOJu0YxWnVWqViNqABLRpkGV6swleA5t42bhGpGHXyYoeSSRjNeCSUut ZreGsL/y7BW9jdRLKtSL20G+qg== X-Google-Smtp-Source: AGHT+IENjr1Q0imeO9g1ADDvLyWrlVac+nDMKdTWEwh2wVU5ydBVeJSNnT65PVcn3ivg/6t32YR08w== X-Received: by 2002:a17:907:37a:b0:a23:4529:9fcc with SMTP id rs26-20020a170907037a00b00a2345299fccmr537602ejb.18.1702845643376; Sun, 17 Dec 2023 12:40:43 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id cw13-20020a170907160d00b00a1c9f65a31csm13355688ejd.4.2023.12.17.12.40.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:42 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 07/13] RISC-V: KVM: Add support for SBI extension registers Date: Sun, 17 Dec 2023 21:40:27 +0100 Message-ID: <20231217204019.36492-22-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124045_371322_3419D463 X-CRM114-Status: GOOD ( 14.77 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Some SBI extensions have state that needs to be saved / restored when migrating the VM. Provide a get/set-one-reg register type for SBI extension registers. Each SBI extension that uses this type will have its own subtype. There are currently no subtypes defined. The next patch introduces the first one. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- arch/riscv/include/asm/kvm_vcpu_sbi.h | 4 ++ arch/riscv/include/uapi/asm/kvm.h | 3 ++ arch/riscv/kvm/vcpu_onereg.c | 42 +++++++++++++++++-- arch/riscv/kvm/vcpu_sbi.c | 58 +++++++++++++++++++++++++++ 4 files changed, 103 insertions(+), 4 deletions(-) diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h index 99c23bb37a37..dd60f73b5c36 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -60,6 +60,10 @@ int kvm_riscv_vcpu_set_reg_sbi_ext(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg); +int kvm_riscv_vcpu_set_reg_sbi(struct kvm_vcpu *vcpu, + const struct kvm_one_reg *reg); +int kvm_riscv_vcpu_get_reg_sbi(struct kvm_vcpu *vcpu, + const struct kvm_one_reg *reg); const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext( struct kvm_vcpu *vcpu, unsigned long extid); bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx); diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index e961d79622fb..30f89a0e855f 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -242,6 +242,9 @@ enum KVM_RISCV_SBI_EXT_ID { #define KVM_REG_RISCV_VECTOR_REG(n) \ ((n) + sizeof(struct __riscv_v_ext_state) / sizeof(unsigned long)) +/* Registers for specific SBI extensions are mapped as type 10 */ +#define KVM_REG_RISCV_SBI (0x0a << KVM_REG_RISCV_TYPE_SHIFT) + /* Device Control API: RISC-V AIA */ #define KVM_DEV_RISCV_APLIC_ALIGN 0x1000 #define KVM_DEV_RISCV_APLIC_SIZE 0x4000 diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 11cdbf844291..901480e73817 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -961,6 +961,29 @@ static unsigned long num_sbi_ext_regs(struct kvm_vcpu *vcpu) return copy_sbi_ext_reg_indices(vcpu, NULL); } +static inline unsigned long num_sbi_regs(struct kvm_vcpu *vcpu) +{ + return 0; +} + +static int copy_sbi_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) +{ + int n = num_sbi_regs(vcpu); + + for (int i = 0; i < n; i++) { + u64 reg = KVM_REG_RISCV | KVM_REG_SIZE_U64 | + KVM_REG_RISCV_SBI | i; + + if (uindices) { + if (put_user(reg, uindices)) + return -EFAULT; + uindices++; + } + } + + return n; +} + static inline unsigned long num_vector_regs(const struct kvm_vcpu *vcpu) { if (!riscv_isa_extension_available(vcpu->arch.isa, v)) @@ -1028,6 +1051,7 @@ unsigned long kvm_riscv_vcpu_num_regs(struct kvm_vcpu *vcpu) res += num_vector_regs(vcpu); res += num_isa_ext_regs(vcpu); res += num_sbi_ext_regs(vcpu); + res += num_sbi_regs(vcpu); return res; } @@ -1083,6 +1107,12 @@ int kvm_riscv_vcpu_copy_reg_indices(struct kvm_vcpu *vcpu, ret = copy_sbi_ext_reg_indices(vcpu, uindices); if (ret < 0) return ret; + uindices += ret; + + ret = copy_sbi_reg_indices(vcpu, uindices); + if (ret < 0) + return ret; + uindices += ret; return 0; } @@ -1105,12 +1135,14 @@ int kvm_riscv_vcpu_set_reg(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_FP_D: return kvm_riscv_vcpu_set_reg_fp(vcpu, reg, KVM_REG_RISCV_FP_D); + case KVM_REG_RISCV_VECTOR: + return kvm_riscv_vcpu_set_reg_vector(vcpu, reg); case KVM_REG_RISCV_ISA_EXT: return kvm_riscv_vcpu_set_reg_isa_ext(vcpu, reg); case KVM_REG_RISCV_SBI_EXT: return kvm_riscv_vcpu_set_reg_sbi_ext(vcpu, reg); - case KVM_REG_RISCV_VECTOR: - return kvm_riscv_vcpu_set_reg_vector(vcpu, reg); + case KVM_REG_RISCV_SBI: + return kvm_riscv_vcpu_set_reg_sbi(vcpu, reg); default: break; } @@ -1136,12 +1168,14 @@ int kvm_riscv_vcpu_get_reg(struct kvm_vcpu *vcpu, case KVM_REG_RISCV_FP_D: return kvm_riscv_vcpu_get_reg_fp(vcpu, reg, KVM_REG_RISCV_FP_D); + case KVM_REG_RISCV_VECTOR: + return kvm_riscv_vcpu_get_reg_vector(vcpu, reg); case KVM_REG_RISCV_ISA_EXT: return kvm_riscv_vcpu_get_reg_isa_ext(vcpu, reg); case KVM_REG_RISCV_SBI_EXT: return kvm_riscv_vcpu_get_reg_sbi_ext(vcpu, reg); - case KVM_REG_RISCV_VECTOR: - return kvm_riscv_vcpu_get_reg_vector(vcpu, reg); + case KVM_REG_RISCV_SBI: + return kvm_riscv_vcpu_get_reg_sbi(vcpu, reg); default: break; } diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 088daaa23dd8..834176242ddf 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -325,6 +325,64 @@ int kvm_riscv_vcpu_get_reg_sbi_ext(struct kvm_vcpu *vcpu, return 0; } +int kvm_riscv_vcpu_set_reg_sbi(struct kvm_vcpu *vcpu, + const struct kvm_one_reg *reg) +{ + unsigned long __user *uaddr = + (unsigned long __user *)(unsigned long)reg->addr; + unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | + KVM_REG_SIZE_MASK | + KVM_REG_RISCV_SBI); + unsigned long reg_subtype, reg_val; + + if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) + return -EINVAL; + + if (copy_from_user(®_val, uaddr, KVM_REG_SIZE(reg->id))) + return -EFAULT; + + reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; + reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; + + switch (reg_subtype) { + default: + return -EINVAL; + } + + return 0; +} + +int kvm_riscv_vcpu_get_reg_sbi(struct kvm_vcpu *vcpu, + const struct kvm_one_reg *reg) +{ + unsigned long __user *uaddr = + (unsigned long __user *)(unsigned long)reg->addr; + unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | + KVM_REG_SIZE_MASK | + KVM_REG_RISCV_SBI); + unsigned long reg_subtype, reg_val; + int ret; + + if (KVM_REG_SIZE(reg->id) != sizeof(unsigned long)) + return -EINVAL; + + reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; + reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; + + switch (reg_subtype) { + default: + return -EINVAL; + } + + if (ret) + return ret; + + if (copy_to_user(uaddr, ®_val, KVM_REG_SIZE(reg->id))) + return -EFAULT; + + return 0; +} + const struct kvm_vcpu_sbi_extension *kvm_vcpu_sbi_find_ext( struct kvm_vcpu *vcpu, unsigned long extid) { From patchwork Sun Dec 17 20:40:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495988 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08C9DC3DA6E for ; Sun, 17 Dec 2023 20:40:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=t6ni3bXsCckBtslPccZ0s7zKudaMd2HF7RNn6xfbQ2I=; b=Mh58bhEmHPfBKb cc3AHbY6zwBkZQijA2r4gjVVkgv6995UHxD2qp+9JbxEPbHyovYWJPSndklt/eLg833w/jGA6DjJ2 zRgzy9L3UQOecmpdMc/CTov0tjmYCHOoRy6a5PdnFRbnuo/i3VVfOqG39liskiMgeod3TXnwem0wK 540MjZYH2D/GAIidcolUywZ77s1iYD5QfaO/VfVtWatRT0rO202Umm3e3qaC7Om0YMC31B7BkPwZF P22U1p4grEGxLFrerNaJMLojoNTK83eX/Z6dKzPSkC1XDCD64H8hCbxIE7d/j9aUzUUeBFQArxodK 88FG9AT1Bhe+Q4+/22/g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwS-008QFR-3C; Sun, 17 Dec 2023 20:40:52 +0000 Received: from mail-ej1-x629.google.com ([2a00:1450:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwN-008Q93-3A for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:49 +0000 Received: by mail-ej1-x629.google.com with SMTP id a640c23a62f3a-a233828ab91so80047066b.1 for ; Sun, 17 Dec 2023 12:40:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845646; x=1703450446; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=NtGr4Fn+I2+EzIJxOXUDFqiD7JlAKn3Prc9Bkz+E+cc=; b=XjGSkNuF+q/esfbB2BVqQCL1CSR0LPhFTeER+zbWGc/zjwrLaYyesUdWwJ1RsRE3Fc 2Z5QCwXd1d4xrJ3fmL41I1QS4sMKPpruTRMQDV5gTzIVel/mThloy0blnh6FMc+CUKU3 ZZREXp6K14pKoHgxjvBrJ8xOpvwrWuHZQrzD/eYqc3AoNhOaQDbTDALu8pvrnAJEnXiP xE7yFAseOC3lLOYkB5wPFLjXiBQymMQ3FGTP2BZba8I5p8AXwQDNyR5V1DhUR9EonCHw xbpLUdb29EG1iI5juibDiWM+KBVTO2AM/TYcJkERNruPVgJoS8FP8oeQ1wV6AQo0B41i xceQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845646; x=1703450446; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NtGr4Fn+I2+EzIJxOXUDFqiD7JlAKn3Prc9Bkz+E+cc=; b=wzfgnAcUJESfOmsb1gbL5iKppCaVamjAqb6IasaRouMZbqPIWA5B8mYtVZW4yvcBh2 H9jp9yzFW6+IvuZkxiZajybpERnJ+q4SStkzIMzFBwd12bsi3A3prsgjGthYtBFb55wC yXSjHcPf8HdxK7Si5Q2eMC6Wwz+oDE05/yvoyJL2s79CjQQtQ1yDJk1Winy2o+v0wNj9 6XDPmQ1o4VulLDl85mQEMLfZwpQYL7iXh8XN8CPsqv8Jgm9TusZ1PHa0YWtp/Zid8Wdl ZwKRW3KZmM+yXdnoc1ngwACWQ1C30qhoN4YcvnJ2kQImpG65eGNEVn11RGGgtlUfRc6O Z4Rg== X-Gm-Message-State: AOJu0Yx0JhxNZU+mwRL4RftoBt9OwLZhx9ooPTqUPyexGHcAIHjQa69G chVLX7dApx05LA5XPo0oGIsMWA== X-Google-Smtp-Source: AGHT+IGZSyA+qVaXofC6/vCZf32Av6rxB35TER1A+ZgRIjF4fteian0c+B1PhM+QLysyNcIBtGTkig== X-Received: by 2002:a17:906:74db:b0:a23:5776:d03f with SMTP id z27-20020a17090674db00b00a235776d03fmr385947ejl.64.1702845646284; Sun, 17 Dec 2023 12:40:46 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id tm6-20020a170907c38600b00a1db955c809sm13328040ejc.73.2023.12.17.12.40.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:45 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 08/13] RISC-V: KVM: Add support for SBI STA registers Date: Sun, 17 Dec 2023 21:40:28 +0100 Message-ID: <20231217204019.36492-23-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124048_044159_AFAF1A64 X-CRM114-Status: GOOD ( 19.15 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org KVM userspace needs to be able to save and restore the steal-time shared memory address. Provide the address through the get/set-one-reg interface with two ulong-sized SBI STA extension registers (lo and hi). 64-bit KVM userspace must not set the hi register to anything other than zero and is allowed to completely neglect saving/restoring it. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones --- arch/riscv/include/asm/kvm_vcpu_sbi.h | 5 +++ arch/riscv/include/uapi/asm/kvm.h | 9 +++++ arch/riscv/kvm/vcpu_onereg.c | 36 +++++++++++------- arch/riscv/kvm/vcpu_sbi.c | 5 +++ arch/riscv/kvm/vcpu_sbi_sta.c | 55 +++++++++++++++++++++++++++ 5 files changed, 96 insertions(+), 14 deletions(-) diff --git a/arch/riscv/include/asm/kvm_vcpu_sbi.h b/arch/riscv/include/asm/kvm_vcpu_sbi.h index dd60f73b5c36..b96705258cf9 100644 --- a/arch/riscv/include/asm/kvm_vcpu_sbi.h +++ b/arch/riscv/include/asm/kvm_vcpu_sbi.h @@ -70,6 +70,11 @@ bool riscv_vcpu_supports_sbi_ext(struct kvm_vcpu *vcpu, int idx); int kvm_riscv_vcpu_sbi_ecall(struct kvm_vcpu *vcpu, struct kvm_run *run); void kvm_riscv_vcpu_sbi_init(struct kvm_vcpu *vcpu); +int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, + unsigned long *reg_val); +int kvm_riscv_vcpu_set_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, + unsigned long reg_val); + #ifdef CONFIG_RISCV_SBI_V01 extern const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_v01; #endif diff --git a/arch/riscv/include/uapi/asm/kvm.h b/arch/riscv/include/uapi/asm/kvm.h index 30f89a0e855f..d8974f954f2a 100644 --- a/arch/riscv/include/uapi/asm/kvm.h +++ b/arch/riscv/include/uapi/asm/kvm.h @@ -161,6 +161,12 @@ enum KVM_RISCV_SBI_EXT_ID { KVM_RISCV_SBI_EXT_MAX, }; +/* SBI STA extension registers for KVM_GET_ONE_REG and KVM_SET_ONE_REG */ +struct kvm_riscv_sbi_sta { + unsigned long shmem_lo; + unsigned long shmem_hi; +}; + /* Possible states for kvm_riscv_timer */ #define KVM_RISCV_TIMER_STATE_OFF 0 #define KVM_RISCV_TIMER_STATE_ON 1 @@ -244,6 +250,9 @@ enum KVM_RISCV_SBI_EXT_ID { /* Registers for specific SBI extensions are mapped as type 10 */ #define KVM_REG_RISCV_SBI (0x0a << KVM_REG_RISCV_TYPE_SHIFT) +#define KVM_REG_RISCV_SBI_STA (0x0 << KVM_REG_RISCV_SUBTYPE_SHIFT) +#define KVM_REG_RISCV_SBI_STA_REG(name) \ + (offsetof(struct kvm_riscv_sbi_sta, name) / sizeof(unsigned long)) /* Device Control API: RISC-V AIA */ #define KVM_DEV_RISCV_APLIC_ALIGN 0x1000 diff --git a/arch/riscv/kvm/vcpu_onereg.c b/arch/riscv/kvm/vcpu_onereg.c index 901480e73817..66d8fa648cfe 100644 --- a/arch/riscv/kvm/vcpu_onereg.c +++ b/arch/riscv/kvm/vcpu_onereg.c @@ -961,27 +961,35 @@ static unsigned long num_sbi_ext_regs(struct kvm_vcpu *vcpu) return copy_sbi_ext_reg_indices(vcpu, NULL); } -static inline unsigned long num_sbi_regs(struct kvm_vcpu *vcpu) -{ - return 0; -} - static int copy_sbi_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) { - int n = num_sbi_regs(vcpu); + struct kvm_vcpu_sbi_context *scontext = &vcpu->arch.sbi_context; + int total = 0; - for (int i = 0; i < n; i++) { - u64 reg = KVM_REG_RISCV | KVM_REG_SIZE_U64 | - KVM_REG_RISCV_SBI | i; + if (scontext->ext_status[KVM_RISCV_SBI_EXT_STA] == KVM_RISCV_SBI_EXT_STATUS_ENABLED) { + u64 size = IS_ENABLED(CONFIG_32BIT) ? KVM_REG_SIZE_U32 : KVM_REG_SIZE_U64; + int n = sizeof(struct kvm_riscv_sbi_sta) / sizeof(unsigned long); - if (uindices) { - if (put_user(reg, uindices)) - return -EFAULT; - uindices++; + for (int i = 0; i < n; i++) { + u64 reg = KVM_REG_RISCV | size | + KVM_REG_RISCV_SBI | KVM_REG_RISCV_SBI_STA | i; + + if (uindices) { + if (put_user(reg, uindices)) + return -EFAULT; + uindices++; + } } + + total += n; } - return n; + return total; +} + +static inline unsigned long num_sbi_regs(struct kvm_vcpu *vcpu) +{ + return copy_sbi_reg_indices(vcpu, NULL); } static inline unsigned long num_vector_regs(const struct kvm_vcpu *vcpu) diff --git a/arch/riscv/kvm/vcpu_sbi.c b/arch/riscv/kvm/vcpu_sbi.c index 834176242ddf..0689f6813968 100644 --- a/arch/riscv/kvm/vcpu_sbi.c +++ b/arch/riscv/kvm/vcpu_sbi.c @@ -345,6 +345,8 @@ int kvm_riscv_vcpu_set_reg_sbi(struct kvm_vcpu *vcpu, reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; switch (reg_subtype) { + case KVM_REG_RISCV_SBI_STA: + return kvm_riscv_vcpu_set_reg_sbi_sta(vcpu, reg_num, reg_val); default: return -EINVAL; } @@ -370,6 +372,9 @@ int kvm_riscv_vcpu_get_reg_sbi(struct kvm_vcpu *vcpu, reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; switch (reg_subtype) { + case KVM_REG_RISCV_SBI_STA: + ret = kvm_riscv_vcpu_get_reg_sbi_sta(vcpu, reg_num, ®_val); + break; default: return -EINVAL; } diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c index 6592d287fc4e..87bf1a5f05ce 100644 --- a/arch/riscv/kvm/vcpu_sbi_sta.c +++ b/arch/riscv/kvm/vcpu_sbi_sta.c @@ -3,6 +3,8 @@ * Copyright (c) 2023 Ventana Micro Systems Inc. */ +#include +#include #include #include @@ -59,3 +61,56 @@ const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta = { .handler = kvm_sbi_ext_sta_handler, .probe = kvm_sbi_ext_sta_probe, }; + +int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, + unsigned long reg_num, + unsigned long *reg_val) +{ + switch (reg_num) { + case KVM_REG_RISCV_SBI_STA_REG(shmem_lo): + *reg_val = (unsigned long)vcpu->arch.sta.shmem; + break; + case KVM_REG_RISCV_SBI_STA_REG(shmem_hi): + if (IS_ENABLED(CONFIG_32BIT)) + *reg_val = upper_32_bits(vcpu->arch.sta.shmem); + else + *reg_val = 0; + break; + default: + return -EINVAL; + } + + return 0; +} + +int kvm_riscv_vcpu_set_reg_sbi_sta(struct kvm_vcpu *vcpu, + unsigned long reg_num, + unsigned long reg_val) +{ + switch (reg_num) { + case KVM_REG_RISCV_SBI_STA_REG(shmem_lo): + if (IS_ENABLED(CONFIG_32BIT)) { + gpa_t hi = upper_32_bits(vcpu->arch.sta.shmem); + + vcpu->arch.sta.shmem = reg_val; + vcpu->arch.sta.shmem |= hi << 32; + } else { + vcpu->arch.sta.shmem = reg_val; + } + break; + case KVM_REG_RISCV_SBI_STA_REG(shmem_hi): + if (IS_ENABLED(CONFIG_32BIT)) { + gpa_t lo = lower_32_bits(vcpu->arch.sta.shmem); + + vcpu->arch.sta.shmem = ((gpa_t)reg_val << 32); + vcpu->arch.sta.shmem |= lo; + } else if (reg_val != 0) { + return -EINVAL; + } + break; + default: + return -EINVAL; + } + + return 0; +} From patchwork Sun Dec 17 20:40:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495989 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C28EEC46CA2 for ; Sun, 17 Dec 2023 20:40:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=N+/AgHZlntavuiZ9KA6xiRuBu89oMW4rooEnENY+i30=; b=Y89iZVlbk7AbUf mG6X4rmGlT6oeg2HIhKrgqAdqimpnKSxA2HmDHlXOutwlgI2ZRudjj9sif9IkPDAiH5VpaafaUNRR 2q7XZ/4ovCMA0KksD8IKtcaDoQ+GWOjgvArc+hV0cl/XclqQm+L+sAhD1NLdGayi2DQttBxTXiAmb Rae9HMgkOoERxGRO7/cJQupMsoHaDJbFRuzwktUFtcO80PJF/9NSBRJuS/CLtggw25tNgouJk2dmA iisF5cqHdJd8aPerG5JXqshOrhckWZyYQHgIfenUQOmO8HMAS7AA72pW3B1JRifjBaMFkMyTUwhoJ bbMpdAYgL/EHaGRYPAGA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwU-008QGt-1M; Sun, 17 Dec 2023 20:40:54 +0000 Received: from mail-ed1-x529.google.com ([2a00:1450:4864:20::529]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwQ-008QBe-1J for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:52 +0000 Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-55193d5e8cdso2713928a12.1 for ; Sun, 17 Dec 2023 12:40:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845648; x=1703450448; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vqR2C7zz01TFiIRh8DqKIf6Ieu9BaM0pJyMslNaYBQk=; b=SP5jhLmUwBNXLO9aSwXbphngnvgYjtwYzgQ1WnLVbsrDEcwoUaOOvkpGgjy/bzFdmw LFYxGyzlHlwZLlzuqjfjJ/Clzm2qs9UfkPMT6l2X8+ks5lpjzmJtNHlZqGJ3vsxmd9t9 EaApskCQwHtpsutiXqfaywPqCp68hE1FFfoD28hE738USysiYwHPSKWTAMFf2OGuoUgx 7mFjDLoSjoRV376AwKEiTQyXtQ9YVf4g2ujJ7U726BAOL/vv5+QWu6AQa7RTboHidCQb 9F1pcSrJN54MUg0Np7cqhaoAOGMYpkPSbGtGBKHLZ1EP9Ywnr9C0bJuIt4FCh9dJ35fQ wdnQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845648; x=1703450448; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vqR2C7zz01TFiIRh8DqKIf6Ieu9BaM0pJyMslNaYBQk=; b=vZ6OKqCQxHwuz559Cuoh1rKfl79leZHjCUqM6moGKRzGduGC9ARJzB/gdEEW/naZrt h5cF2RZxdaFicQAvIM8XK/R2FOxnlrPuhygVpOiZYexjCaopTwhf1w0Deom25S1RLUFV BVcwVeo6dO0yF0MHEarOPQZ22Hrsm/dFWaFbSWIOndcBfRqqPLdKxYuDZTCmNWxjoYDM /1Bfwk76U7lYhn1qPFgiNAVp6fxSwdk272Ed1RHChvxTkwKLp8Kd2PyrhYRbs9fN0+sv oIO0LLcY0vl9+WCWS9lPB1jI782vM2e01rcbwtKJ+XZKgazB35T3SUWVzvQ+INzPms4C afag== X-Gm-Message-State: AOJu0YxZbrcPOLz4yj5J5hbNBZNCDOklPU1Zy5Wh8f+kEZ+CeWdHwq32 jEgvTqmkzvEO/2xFkVbIkgTkaw== X-Google-Smtp-Source: AGHT+IEfGs4OQaguX6OAmX8Oe3Y0KxLn+ASdz7H+Iz7dSMU5rXaa7WIYeXOCpVviVKaTjXqSem+pTw== X-Received: by 2002:a17:906:c20e:b0:9e6:38f2:8439 with SMTP id d14-20020a170906c20e00b009e638f28439mr6546645ejz.60.1702845648676; Sun, 17 Dec 2023 12:40:48 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id tk7-20020a170907c28700b00a1d1ebc2206sm13365557ejc.72.2023.12.17.12.40.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:48 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 09/13] RISC-V: KVM: Implement SBI STA extension Date: Sun, 17 Dec 2023 21:40:29 +0100 Message-ID: <20231217204019.36492-24-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124050_452971_AD134118 X-CRM114-Status: GOOD ( 17.48 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add a select SCHED_INFO to the KVM config in order to get run_delay info. Then implement SBI STA's set-steal-time-shmem function and kvm_riscv_vcpu_record_steal_time() to provide the steal-time info to guests. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- arch/riscv/kvm/Kconfig | 1 + arch/riscv/kvm/vcpu_sbi_sta.c | 96 ++++++++++++++++++++++++++++++++++- 2 files changed, 95 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kvm/Kconfig b/arch/riscv/kvm/Kconfig index dfc237d7875b..148e52b516cf 100644 --- a/arch/riscv/kvm/Kconfig +++ b/arch/riscv/kvm/Kconfig @@ -32,6 +32,7 @@ config KVM select KVM_XFER_TO_GUEST_WORK select MMU_NOTIFIER select PREEMPT_NOTIFIERS + select SCHED_INFO help Support hosting virtualized guest machines. diff --git a/arch/riscv/kvm/vcpu_sbi_sta.c b/arch/riscv/kvm/vcpu_sbi_sta.c index 87bf1a5f05ce..01f09fe8c3b0 100644 --- a/arch/riscv/kvm/vcpu_sbi_sta.c +++ b/arch/riscv/kvm/vcpu_sbi_sta.c @@ -6,9 +6,15 @@ #include #include #include +#include +#include +#include +#include #include +#include #include +#include void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) { @@ -19,14 +25,100 @@ void kvm_riscv_vcpu_sbi_sta_reset(struct kvm_vcpu *vcpu) void kvm_riscv_vcpu_record_steal_time(struct kvm_vcpu *vcpu) { gpa_t shmem = vcpu->arch.sta.shmem; + u64 last_steal = vcpu->arch.sta.last_steal; + u32 *sequence_ptr, sequence; + u64 *steal_ptr, steal; + unsigned long hva; + gfn_t gfn; if (shmem == INVALID_GPA) return; + + /* + * shmem is 64-byte aligned (see the enforcement in + * kvm_sbi_sta_steal_time_set_shmem()) and the size of sbi_sta_struct + * is 64 bytes, so we know all its offsets are in the same page. + */ + gfn = shmem >> PAGE_SHIFT; + hva = kvm_vcpu_gfn_to_hva(vcpu, gfn); + + if (WARN_ON(kvm_is_error_hva(hva))) { + vcpu->arch.sta.shmem = INVALID_GPA; + return; + } + + sequence_ptr = (u32 *)(hva + offset_in_page(shmem) + + offsetof(struct sbi_sta_struct, sequence)); + steal_ptr = (u64 *)(hva + offset_in_page(shmem) + + offsetof(struct sbi_sta_struct, steal)); + + if (WARN_ON(get_user(sequence, sequence_ptr))) + return; + + sequence = le32_to_cpu(sequence); + sequence += 1; + + if (WARN_ON(put_user(cpu_to_le32(sequence), sequence_ptr))) + return; + + if (!WARN_ON(get_user(steal, steal_ptr))) { + steal = le64_to_cpu(steal); + vcpu->arch.sta.last_steal = READ_ONCE(current->sched_info.run_delay); + steal += vcpu->arch.sta.last_steal - last_steal; + WARN_ON(put_user(cpu_to_le64(steal), steal_ptr)); + } + + sequence += 1; + WARN_ON(put_user(cpu_to_le32(sequence), sequence_ptr)); + + kvm_vcpu_mark_page_dirty(vcpu, gfn); } static int kvm_sbi_sta_steal_time_set_shmem(struct kvm_vcpu *vcpu) { - return SBI_ERR_FAILURE; + struct kvm_cpu_context *cp = &vcpu->arch.guest_context; + unsigned long shmem_phys_lo = cp->a0; + unsigned long shmem_phys_hi = cp->a1; + u32 flags = cp->a2; + struct sbi_sta_struct zero_sta = {0}; + unsigned long hva; + bool writable; + gpa_t shmem; + int ret; + + if (flags != 0) + return SBI_ERR_INVALID_PARAM; + + if (shmem_phys_lo == SBI_STA_SHMEM_DISABLE && + shmem_phys_hi == SBI_STA_SHMEM_DISABLE) { + vcpu->arch.sta.shmem = INVALID_GPA; + return 0; + } + + if (shmem_phys_lo & (SZ_64 - 1)) + return SBI_ERR_INVALID_PARAM; + + shmem = shmem_phys_lo; + + if (shmem_phys_hi != 0) { + if (IS_ENABLED(CONFIG_32BIT)) + shmem |= ((gpa_t)shmem_phys_hi << 32); + else + return SBI_ERR_INVALID_ADDRESS; + } + + hva = kvm_vcpu_gfn_to_hva_prot(vcpu, shmem >> PAGE_SHIFT, &writable); + if (kvm_is_error_hva(hva) || !writable) + return SBI_ERR_INVALID_ADDRESS; + + ret = kvm_vcpu_write_guest(vcpu, shmem, &zero_sta, sizeof(zero_sta)); + if (ret) + return SBI_ERR_FAILURE; + + vcpu->arch.sta.shmem = shmem; + vcpu->arch.sta.last_steal = current->sched_info.run_delay; + + return 0; } static int kvm_sbi_ext_sta_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, @@ -52,7 +144,7 @@ static int kvm_sbi_ext_sta_handler(struct kvm_vcpu *vcpu, struct kvm_run *run, static unsigned long kvm_sbi_ext_sta_probe(struct kvm_vcpu *vcpu) { - return 0; + return !!sched_info_on(); } const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_sta = { From patchwork Sun Dec 17 20:40:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495990 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 33729C3DA6E for ; Sun, 17 Dec 2023 20:41:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Eg1ynbqSV3At8cjCW0P90V/Zg26/nVnN3H0wzYV1j4M=; b=tk+RbDcYVgn4g9 xFsaaH9dro/G1BBu6HmhQ/28qo1qWLTrBATSRI64rK03KB7f29z9gxeylJRqVdorUAf3dOuerbN2Z VbTLaH5db2nr/+VcaQbhM/3UFXCUaG0x8S+b5sD3psy7pN8Hx1OHSrxwKNNU59wBw5Dx/piQHNP6V NfqelBRkpbyvLHhjqD2Lq6nA2ieYT5uttnw2iQTbiQ0DyFeWJ7ZJ7yAE/bRoXmipEJZcU2JgKCR2J tQySxqHfnhCi7lFYoIo4dCXpBkNrLw4sqxVdADrr1Q6DI0LTsgkMFmT4Wwh6QmTpFKzJTz3WiY8Vz qG/ZExmlXUu6zDXJGhsA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwX-008QKf-2z; Sun, 17 Dec 2023 20:40:57 +0000 Received: from mail-ej1-x62e.google.com ([2a00:1450:4864:20::62e]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwT-008QEO-09 for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:54 +0000 Received: by mail-ej1-x62e.google.com with SMTP id a640c23a62f3a-a2343c31c4bso70692966b.1 for ; Sun, 17 Dec 2023 12:40:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845651; x=1703450451; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=SOMbKPx9f+JcS4fNjPCKfauG48/CPKUV3NQDAwTQdeE=; b=ajvUoj/tD0sVhHh+dbZlddSPjHYhnaIvgLX/7S7B+nCdLZ6o/DGsppJdYJJFyjUFt9 BnjYwzr/II4s3eyFUFFFO5PwUETlegvQq85NXb6Gd4GXIlwS+t+vARrVfNs0MnCGMAGz h+wLWLO2Vck1iyGMjW7gfeP7d0Mr5CSGGQPlD91ewg+fE+VWPMFUxYppqaMVVeSUOVLK M5skEGYuGavoeQWlxRVSSxgZ38hdYPS1yJdNmCHbeDHdSUL5eBtD+XtHuQhCngEMNw0y 8WQcd9PkMkTlN5zJFUYE919ePi1fKq+MO6061HcKcgB+Hgq3YcmkP4yIVFG6TzpeKg1H VfOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845651; x=1703450451; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=SOMbKPx9f+JcS4fNjPCKfauG48/CPKUV3NQDAwTQdeE=; b=l0kN8j5M1IPgF5OQh9hZwGm5II9o3uWui8StOy5sqf6ifaFy/eeaOzlVAsb6f8mf9e Qtw64rJMxn3iqsbr0RhqaIBdHuFwdcbSCYyndE6h5g8RHy+lBkh/jMB6SvXcv5hLzA7m qwwXe4JxdJdD2dKbA3DuZAJS1XKfukdfE/9mVHLh0tv/fEEpgEV1LSfxeuwinO1Ik963 X3eGsnaFykCwbPNTF0O9aGefEphoon/ofzCO5hCakJpvjXoVL1e/ijhnpLP/2V7PD1yA NmW/l4ZC2uYvxroc32blKwqnC/qLIqbhYbxwgFPBc0nu+dtSdEzMngF8Bt1YaX8lRlH8 +T+w== X-Gm-Message-State: AOJu0YxAO8yPiTBG8D3lUvueMkgg9vwNgNHoKhm+wE46tbOr0FZTusCa PQo3C3PYX9KsBcfAuITYvjyuQw== X-Google-Smtp-Source: AGHT+IElKIALGSKv91isCCjAY+9MIW2ym0pewkkwdkfoL3kKEux4VitJsNehhoeuFDnBHYAQt77IKw== X-Received: by 2002:a17:906:83:b0:a23:195c:8a59 with SMTP id 3-20020a170906008300b00a23195c8a59mr1296006ejc.34.1702845651321; Sun, 17 Dec 2023 12:40:51 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id oz39-20020a170906cd2700b00a235f3b8259sm38073ejb.186.2023.12.17.12.40.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:50 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 10/13] RISC-V: KVM: selftests: Move sbi_ecall to processor.c Date: Sun, 17 Dec 2023 21:40:30 +0100 Message-ID: <20231217204019.36492-25-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124053_090579_B4C64BEA X-CRM114-Status: UNSURE ( 8.88 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org sbi_ecall() isn't ucall specific and its prototype is already in processor.h. Move its implementation to processor.c. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones --- .../selftests/kvm/lib/riscv/processor.c | 26 +++++++++++++++++++ tools/testing/selftests/kvm/lib/riscv/ucall.c | 26 ------------------- 2 files changed, 26 insertions(+), 26 deletions(-) diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c index 6c25f7843ef4..6905a4348380 100644 --- a/tools/testing/selftests/kvm/lib/riscv/processor.c +++ b/tools/testing/selftests/kvm/lib/riscv/processor.c @@ -367,3 +367,29 @@ void vcpu_args_set(struct kvm_vcpu *vcpu, unsigned int num, ...) void assert_on_unhandled_exception(struct kvm_vcpu *vcpu) { } + +struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, + unsigned long arg1, unsigned long arg2, + unsigned long arg3, unsigned long arg4, + unsigned long arg5) +{ + register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); + register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); + register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); + register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); + register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4); + register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5); + register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); + register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); + struct sbiret ret; + + asm volatile ( + "ecall" + : "+r" (a0), "+r" (a1) + : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) + : "memory"); + ret.error = a0; + ret.value = a1; + + return ret; +} diff --git a/tools/testing/selftests/kvm/lib/riscv/ucall.c b/tools/testing/selftests/kvm/lib/riscv/ucall.c index fe6d1004f018..14ee17151a59 100644 --- a/tools/testing/selftests/kvm/lib/riscv/ucall.c +++ b/tools/testing/selftests/kvm/lib/riscv/ucall.c @@ -10,32 +10,6 @@ #include "kvm_util.h" #include "processor.h" -struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, - unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4, - unsigned long arg5) -{ - register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); - register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); - register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); - register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3); - register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4); - register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5); - register uintptr_t a6 asm ("a6") = (uintptr_t)(fid); - register uintptr_t a7 asm ("a7") = (uintptr_t)(ext); - struct sbiret ret; - - asm volatile ( - "ecall" - : "+r" (a0), "+r" (a1) - : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7) - : "memory"); - ret.error = a0; - ret.value = a1; - - return ret; -} - void *ucall_arch_get_ucall(struct kvm_vcpu *vcpu) { struct kvm_run *run = vcpu->run; From patchwork Sun Dec 17 20:40:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495991 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 60D9BC46CD3 for ; Sun, 17 Dec 2023 20:41:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=392YmjqICp0vrhFUdmVj0EMe3zIq/53GL/zyFfL+87o=; b=SNr+BTU9/CZ7bb YxM5TYbHx4nSzoLb0Y0NoER08l9GbrlfsjeL0fKE1KtK00mxezQePvoIZlcVonQHhCkBBumg2HKXr xtUtFtcUdyNdkNM3/8VafoTiot4ddCGQA21Af8LGrsvanG8dYxP8oKKrCBqSFkjO/CkafCtT7LGEo XIAmgBMGn4h5O8oeGR5UMzBbO4Am1xY2/R9FbQXhXaN94vnM71fEjSxLfa7I86/t9IYhzzN4zV/eu MlvGtY2wGaTat86xfpRyHKApSDl6TMsNlkOBmLGK6YiRxcW5lpZ3u3ufou3tqMr/Ru7mbgl+Pb/dh xlQxRMhkDwESggfk9ehw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwZ-008QMY-1a; Sun, 17 Dec 2023 20:40:59 +0000 Received: from mail-ed1-x536.google.com ([2a00:1450:4864:20::536]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwU-008QGq-31 for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:40:56 +0000 Received: by mail-ed1-x536.google.com with SMTP id 4fb4d7f45d1cf-54c70c70952so2809792a12.3 for ; Sun, 17 Dec 2023 12:40:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845653; x=1703450453; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=N7vwoe3CX/elDbSVVxBrCH+gKLsjFQobx8w+cxadJhQ=; b=hNPyugiVDixtt7FBaCyGE3FDggtgx0Pn00+FJEy6T0M9+NvOH7L3BPuVdD/ANngvbY kSm9lUM7bARAzUqw1vFC0/PS85jdMEw2nHDLIFOqsHFeEAWzJkkNE9FmL0QSeA4n3Hr6 h/iEALWavlB5zN/7mNAo37QKVviYh6r27ahLk3wbyUyzjAbac5HX6AWOEa8ulQ4fgKTJ HKaNxfQJ6HZySZ7k4jrdI5V9Yx2Ggo/drzeVonnDbqWr/cO5Gi6mtTEoRKOgH8dmlEyj u5/AZ3dlbIg3VukKa4rkZaaVK3B3xiaXrRvKctKX4zwuJrAs0hk21baWTyPHUVAh7ZE0 FAng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845653; x=1703450453; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N7vwoe3CX/elDbSVVxBrCH+gKLsjFQobx8w+cxadJhQ=; b=HpUjcZxipsg3NMRxpXeNHtCKrg+QuN4N1XaS4Sf3I0aZKoKi+i4PCvvamOR8o+dfu9 zOqI4lstkJvvqWUoOYf0bbHX3V1xYMcu54YG5sYgdRMByILrnEdoLOBGpOY7qRrnpW0S 8AXxE0vorhGRXF95asqOeGg0drSBAqcXNP6Hd0y9bj4qP0gePszKsgeVyScanYOViiJc 4eXf74f4Y+PeMfkakUAYbTVHxLY5Q5IT4B8OQACYMIqJTqZSIa3CWHkevT8Uup9ohOAK IZrdI9PYD0S832ORgdGdsp1HCxTAXnrNbycwbPSrdbiAfq2tVZI0a6rrpSpNiiC4esvi ruzQ== X-Gm-Message-State: AOJu0YzIeXSOJSnZgWOg4gCjcVql3YIgGJ/dHwUbiomRZP5bxJUsz/DE 2HuDsUOBxlpd9Fn0j1+qArIjHA== X-Google-Smtp-Source: AGHT+IHm0ZOnGz+LVNIDHqOQJjqLNvNLueuDiQKDMBt1714V/QR1XUkwgUSLwCRwL7GcimCNaPKWfA== X-Received: by 2002:a17:907:7e8c:b0:a10:f087:ba43 with SMTP id qb12-20020a1709077e8c00b00a10f087ba43mr5497857ejc.43.1702845653800; Sun, 17 Dec 2023 12:40:53 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id ld4-20020a1709079c0400b00a1df88cc7c0sm13219257ejc.182.2023.12.17.12.40.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:53 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 11/13] RISC-V: KVM: selftests: Add guest_sbi_probe_extension Date: Sun, 17 Dec 2023 21:40:31 +0100 Message-ID: <20231217204019.36492-26-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124054_996101_F57ECE51 X-CRM114-Status: UNSURE ( 8.95 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add guest_sbi_probe_extension(), allowing guest code to probe for SBI extensions. As guest_sbi_probe_extension() needs SBI_ERR_NOT_SUPPORTED, take the opportunity to bring in all SBI error codes. We don't bring in all current extension IDs or base extension function IDs though, even though we need one of each, because we'd prefer to bring those in as necessary. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- .../selftests/kvm/include/riscv/processor.h | 21 +++++++++++++++++++ .../selftests/kvm/lib/riscv/processor.c | 19 +++++++++++++++++ 2 files changed, 40 insertions(+) diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h index e70ccda2011b..dc50ad62e150 100644 --- a/tools/testing/selftests/kvm/include/riscv/processor.h +++ b/tools/testing/selftests/kvm/include/riscv/processor.h @@ -108,6 +108,17 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype, #define SATP_ASID_SHIFT 44 #define SATP_ASID_MASK _AC(0xFFFF, UL) +/* SBI return error codes */ +#define SBI_SUCCESS 0 +#define SBI_ERR_FAILURE -1 +#define SBI_ERR_NOT_SUPPORTED -2 +#define SBI_ERR_INVALID_PARAM -3 +#define SBI_ERR_DENIED -4 +#define SBI_ERR_INVALID_ADDRESS -5 +#define SBI_ERR_ALREADY_AVAILABLE -6 +#define SBI_ERR_ALREADY_STARTED -7 +#define SBI_ERR_ALREADY_STOPPED -8 + #define SBI_EXT_EXPERIMENTAL_START 0x08000000 #define SBI_EXT_EXPERIMENTAL_END 0x08FFFFFF @@ -115,6 +126,14 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype, #define KVM_RISCV_SELFTESTS_SBI_UCALL 0 #define KVM_RISCV_SELFTESTS_SBI_UNEXP 1 +enum sbi_ext_id { + SBI_EXT_BASE = 0x10, +}; + +enum sbi_ext_base_fid { + SBI_EXT_BASE_PROBE_EXT = 3, +}; + struct sbiret { long error; long value; @@ -125,4 +144,6 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, unsigned long arg3, unsigned long arg4, unsigned long arg5); +bool guest_sbi_probe_extension(int extid, long *out_val); + #endif /* SELFTEST_KVM_PROCESSOR_H */ diff --git a/tools/testing/selftests/kvm/lib/riscv/processor.c b/tools/testing/selftests/kvm/lib/riscv/processor.c index 6905a4348380..7ca736fb4194 100644 --- a/tools/testing/selftests/kvm/lib/riscv/processor.c +++ b/tools/testing/selftests/kvm/lib/riscv/processor.c @@ -393,3 +393,22 @@ struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0, return ret; } + +bool guest_sbi_probe_extension(int extid, long *out_val) +{ + struct sbiret ret; + + ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid, + 0, 0, 0, 0, 0); + + __GUEST_ASSERT(!ret.error || ret.error == SBI_ERR_NOT_SUPPORTED, + "ret.error=%ld, ret.value=%ld\n", ret.error, ret.value); + + if (ret.error == SBI_ERR_NOT_SUPPORTED) + return false; + + if (out_val) + *out_val = ret.value; + + return true; +} From patchwork Sun Dec 17 20:40:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495992 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E40EC3DA6E for ; Sun, 17 Dec 2023 20:41:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=MueJDZA1jR1Dedh+H6jfCrYKbzU/Gs0ndLIvhHXqFoc=; b=ABzopF0xgKYyJY UwZD4gGZzntLa7Ix5QuawHbAqEG5BzvJz5jZekfdsgTkFt1v1aWvbmqyTDD5aN/TSwF5Ef/+XgwqT jomi7jeKA+wCN2lqa0ws2wcVSpl7myhYJectzJt0l5lyaRXeiF4EPqrZIcMVnNtIlOVzTqwf5pIq2 47UsglqqG3pnvxl2Hy42S9Iogl7Q15uK7LQQXtjqeRbLx4pvuD+v1ErTHfAQBkwqiqT17gOjd02jl hGEbLlNVHCqQOWaIMMlP9c5L562gcel4CXmAOnagt9AUD4fndnFIdb86ePq4CcH+lu5ddOVMKwtq5 V8O2hKrMy5EU0Aq1VMPQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwg-008QTs-1U; Sun, 17 Dec 2023 20:41:06 +0000 Received: from mail-lf1-x130.google.com ([2a00:1450:4864:20::130]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwY-008QKH-2i for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:41:02 +0000 Received: by mail-lf1-x130.google.com with SMTP id 2adb3069b0e04-50c222a022dso2741199e87.1 for ; Sun, 17 Dec 2023 12:40:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845657; x=1703450457; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=CYOX71zEokWHjzEcvWIrQLee3NMMjOHxX+5WvcjbXXI=; b=C8N8WE/ThoDoRVlGX8QhXnOCBBtVka99z/Zjgj8LQ3IZPcKOGks7wUDidCjqV9AwSJ s2WzgsYWibIJUpjwbbYcxHxmOBBBPY+7nzquOxFwDhb21ZaUzTMm/AK2eq4YsZeComWl HvS4bpfUVNtzwlm6PFZV2EUbHP51IZXIfkDpErUB4tXpa2IcH8JjORXBrbISsT1uMs8v 9P+GmVltCIzF5EdBPcMU7702c7vBw5tRXD30rz17HvrskSCDXPrnwNCzellDREWP+TxJ hGVUUusgV2VowfxLbqpY/tyioC5p+nQPw3YsFykiv99rgdCkD3lNj7dQCCyhCSKZQIpv 8/+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845657; x=1703450457; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=CYOX71zEokWHjzEcvWIrQLee3NMMjOHxX+5WvcjbXXI=; b=QEdqKbxBYZtIEV0X8XYmTYvLRxilp4vAHsxc96sXEiDPlCSZc997uo8zwfeyH68TlW DGRdA83H/gREMI4lufW4pXcAl7zs6nIHKC8kL5m2i5MCASpzvXEZwvLEPYtOeaC6MOqX FnKNvqN6DdknfmIyYCS+LZo7umYumxtRQofQdm0yhvbi/NOAubcFnl1M287R7tMJN8uW xfglESPqpoI3Z/RUUCd1lHQwoPYSMtyetsPMTPj6+5Jkw08cCizFvtXjeBcB4Rm4lcsX /9q5T7cN5b9krcZevTc1Gwivm/daZihDO1a4YccgitwidlxTGsSEJgqgednh/UQErizl h4lw== X-Gm-Message-State: AOJu0YxlD4GCdM1IGFHzCy7jT5GPo41PmO/uwPHbhFFTwLIzmVqXAwYF 0BJyy9mLqi4SLyqcWWAVK9Og0A== X-Google-Smtp-Source: AGHT+IH1xn042sT0VNKgHrWYd6sFpf+vZYJa38MXKaW0kSC81lcx8FbVGON1f22yztwwDGhF79wc/A== X-Received: by 2002:a05:6512:523:b0:50e:26e4:b6b2 with SMTP id o3-20020a056512052300b0050e26e4b6b2mr1009280lfc.80.1702845656852; Sun, 17 Dec 2023 12:40:56 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id h7-20020a170906530700b00a1b32663d7csm13443539ejo.102.2023.12.17.12.40.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:56 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 12/13] RISC-V: KVM: selftests: Add steal_time test support Date: Sun, 17 Dec 2023 21:40:32 +0100 Message-ID: <20231217204019.36492-27-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124058_894064_2291402A X-CRM114-Status: GOOD ( 13.33 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org With the introduction of steal-time accounting support for RISC-V KVM we can add RISC-V support to the steal_time test. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- tools/testing/selftests/kvm/Makefile | 5 +- .../selftests/kvm/include/riscv/processor.h | 1 + tools/testing/selftests/kvm/steal_time.c | 99 +++++++++++++++++++ 3 files changed, 103 insertions(+), 2 deletions(-) diff --git a/tools/testing/selftests/kvm/Makefile b/tools/testing/selftests/kvm/Makefile index 963435959a92..4bf4f52341a8 100644 --- a/tools/testing/selftests/kvm/Makefile +++ b/tools/testing/selftests/kvm/Makefile @@ -194,12 +194,13 @@ TEST_GEN_PROGS_s390x += kvm_binary_stats_test TEST_GEN_PROGS_riscv += demand_paging_test TEST_GEN_PROGS_riscv += dirty_log_test -TEST_GEN_PROGS_riscv += guest_print_test TEST_GEN_PROGS_riscv += get-reg-list +TEST_GEN_PROGS_riscv += guest_print_test +TEST_GEN_PROGS_riscv += kvm_binary_stats_test TEST_GEN_PROGS_riscv += kvm_create_max_vcpus TEST_GEN_PROGS_riscv += kvm_page_table_test TEST_GEN_PROGS_riscv += set_memory_region_test -TEST_GEN_PROGS_riscv += kvm_binary_stats_test +TEST_GEN_PROGS_riscv += steal_time SPLIT_TESTS += get-reg-list diff --git a/tools/testing/selftests/kvm/include/riscv/processor.h b/tools/testing/selftests/kvm/include/riscv/processor.h index dc50ad62e150..a0f9efe5a2a8 100644 --- a/tools/testing/selftests/kvm/include/riscv/processor.h +++ b/tools/testing/selftests/kvm/include/riscv/processor.h @@ -128,6 +128,7 @@ static inline uint64_t __kvm_reg_id(uint64_t type, uint64_t subtype, enum sbi_ext_id { SBI_EXT_BASE = 0x10, + SBI_EXT_STA = 0x535441, }; enum sbi_ext_base_fid { diff --git a/tools/testing/selftests/kvm/steal_time.c b/tools/testing/selftests/kvm/steal_time.c index 171adfb2a6cb..bae0c5026f82 100644 --- a/tools/testing/selftests/kvm/steal_time.c +++ b/tools/testing/selftests/kvm/steal_time.c @@ -11,7 +11,9 @@ #include #include #include +#ifndef __riscv #include +#endif #include "test_util.h" #include "kvm_util.h" @@ -203,6 +205,103 @@ static void steal_time_dump(struct kvm_vm *vm, uint32_t vcpu_idx) pr_info(" st_time: %ld\n", st->st_time); } +#elif defined(__riscv) + +/* SBI STA shmem must have 64-byte alignment */ +#define STEAL_TIME_SIZE ((sizeof(struct sta_struct) + 63) & ~63) + +static vm_paddr_t st_gpa[NR_VCPUS]; + +struct sta_struct { + uint32_t sequence; + uint32_t flags; + uint64_t steal; + uint8_t preempted; + uint8_t pad[47]; +} __packed; + +static void sta_set_shmem(vm_paddr_t gpa, unsigned long flags) +{ + unsigned long lo = (unsigned long)gpa; +#if __riscv_xlen == 32 + unsigned long hi = (unsigned long)(gpa >> 32); +#else + unsigned long hi = gpa == -1 ? -1 : 0; +#endif + struct sbiret ret = sbi_ecall(SBI_EXT_STA, 0, lo, hi, flags, 0, 0, 0); + + GUEST_ASSERT(ret.value == 0 && ret.error == 0); +} + +static void check_status(struct sta_struct *st) +{ + GUEST_ASSERT(!(READ_ONCE(st->sequence) & 1)); + GUEST_ASSERT(READ_ONCE(st->flags) == 0); + GUEST_ASSERT(READ_ONCE(st->preempted) == 0); +} + +static void guest_code(int cpu) +{ + struct sta_struct *st = st_gva[cpu]; + uint32_t sequence; + long out_val = 0; + bool probe; + + probe = guest_sbi_probe_extension(SBI_EXT_STA, &out_val); + GUEST_ASSERT(probe && out_val == 1); + + sta_set_shmem(st_gpa[cpu], 0); + GUEST_SYNC(0); + + check_status(st); + WRITE_ONCE(guest_stolen_time[cpu], st->steal); + sequence = READ_ONCE(st->sequence); + check_status(st); + GUEST_SYNC(1); + + check_status(st); + GUEST_ASSERT(sequence < READ_ONCE(st->sequence)); + WRITE_ONCE(guest_stolen_time[cpu], st->steal); + check_status(st); + GUEST_DONE(); +} + +static bool is_steal_time_supported(struct kvm_vcpu *vcpu) +{ + uint64_t id = RISCV_SBI_EXT_REG(KVM_RISCV_SBI_EXT_STA); + unsigned long enabled; + + vcpu_get_reg(vcpu, id, &enabled); + TEST_ASSERT(enabled == 0 || enabled == 1, "Expected boolean result"); + + return enabled; +} + +static void steal_time_init(struct kvm_vcpu *vcpu, uint32_t i) +{ + /* ST_GPA_BASE is identity mapped */ + st_gva[i] = (void *)(ST_GPA_BASE + i * STEAL_TIME_SIZE); + st_gpa[i] = addr_gva2gpa(vcpu->vm, (vm_vaddr_t)st_gva[i]); + sync_global_to_guest(vcpu->vm, st_gva[i]); + sync_global_to_guest(vcpu->vm, st_gpa[i]); +} + +static void steal_time_dump(struct kvm_vm *vm, uint32_t vcpu_idx) +{ + struct sta_struct *st = addr_gva2hva(vm, (ulong)st_gva[vcpu_idx]); + int i; + + pr_info("VCPU%d:\n", vcpu_idx); + pr_info(" sequence: %d\n", st->sequence); + pr_info(" flags: %d\n", st->flags); + pr_info(" steal: %"PRIu64"\n", st->steal); + pr_info(" preempted: %d\n", st->preempted); + pr_info(" pad: "); + for (i = 0; i < 47; ++i) + pr_info("%d", st->pad[i]); + pr_info("\n"); +} + #endif static void *do_steal_time(void *arg) From patchwork Sun Dec 17 20:40:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jones X-Patchwork-Id: 13495993 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E3C55C46CA2 for ; Sun, 17 Dec 2023 20:41:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=wzUwzLYhOqC+UeyzUrE4AjOUxnoCNUNaFPFDad9Mn3Q=; b=ErL0X7EMWAWqCu TBUDyUClstWIgFYcHHimqgpr+7JywybqJ24IRoeK7MW0X0jAZGcWKT0WhTK9LanV6wyhp+suvXoao H6YW5hVtubuOjpmCZEdVy5IB9KJUz2IUicgGNF+Lnk0E2ABVR3BR5GypxzTOpeIa61w0v5BJ5J645 sotkGWvyljflJTgZ9sn84h+MtB57OwhTvx1VTuXyaF12fi+BgMZeXlpmsNS9IbGKOUiSnYlDcxYK/ iK0S4qUFyTJnT/ciMkDl4O56gkVnob+ZpF000Niktasgq1/Djh06iIY0GheSDsjsmEOA32WQdPaez Ie2ay+85+T/kmu/EwKXw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1rExwk-008Qa7-1B; Sun, 17 Dec 2023 20:41:10 +0000 Received: from mail-lf1-x12a.google.com ([2a00:1450:4864:20::12a]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1rExwc-008QNT-0v for linux-riscv@lists.infradead.org; Sun, 17 Dec 2023 20:41:07 +0000 Received: by mail-lf1-x12a.google.com with SMTP id 2adb3069b0e04-50e1d61b657so2752443e87.0 for ; Sun, 17 Dec 2023 12:41:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1702845660; x=1703450460; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=R3/0Hma02Vd0ly7A0sb99/J3m8aSq89MJrcPUNSRUYI=; b=ho8tkRrrXmzJYZE95SV08DycyQjqKryT49/o3LFj8k8fqSuLNEtO/4MsaW0Ln+bB2E WDVmXeLpkDxhREZ9CxHqaaM7+uBGtxLsrBeMYcvDVwbOvDDhAD7J7iZuatfNx+j/FWvx Da9Z+FoQKqwwHmAvcrQgVS2ejaPVZbNY1BRWBq1TykoMNFOCo7R7es+vGPbuPzAuydBF 1Y2BX+IA285i4HkFDVkhpR9cdpc76Rs4VNAEmiEIixd9CgNcVxCwAN/NhrZDfOBr4al3 S66CkE5S/sR6f9xxp6WiaJgV0rU/kaOf0mbCmHBlVkM+h9pGMuODyAyr4F3RElEg7H7b n88Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702845660; x=1703450460; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=R3/0Hma02Vd0ly7A0sb99/J3m8aSq89MJrcPUNSRUYI=; b=fFyIq9vUB1i78t6N+kK7C7qHE4wgEEhsq9dvKBuBvD4uzyRftxTM36a68bEzEoUlFX gZYeecmxtTJUV5jEj21t9ZO8HOsvIzN8XgQtqf5eOMmfdKVD+zWBx4/OJhtDZ8f2X7F8 l2ln1M8TLWILdAle9zeiectoiLcQ9bol1pomh6SZ7iKmWj/snKXjaiNT9qK6dff3OD3F bIgTmx4j7vB/2094gYgDg/CiKwROWh7Tkx+hb7tQ40Y3R7hqS1p138IjFDj/hqgQX/s5 L5X/BHIEe+5ZBG9QFiNUC3HQfHfliKmqjbvHblITg4JiEeHUVN24ZwW5Hj1aF1C1AKJp j/FA== X-Gm-Message-State: AOJu0YwRN00mcvcjSPwJCzpX8BFyK4cKPKRT5bmJKapMGPOmUNfnrERR Zf1nI7eDTkTT5y5rByQ5noicsQ== X-Google-Smtp-Source: AGHT+IERXKNF/+s+NEEHzdapPwlDcWN89Zm4uZLWWe/4d5WgczvSO/z3yTIm2LP04zK6s+fR6i5MCg== X-Received: by 2002:a05:6512:398e:b0:50d:12b4:e02c with SMTP id j14-20020a056512398e00b0050d12b4e02cmr7559657lfu.53.1702845659741; Sun, 17 Dec 2023 12:40:59 -0800 (PST) Received: from localhost (cst-prg-88-42.cust.vodafone.cz. [46.135.88.42]) by smtp.gmail.com with ESMTPSA id ul5-20020a170907ca8500b00a1fa7e39957sm9677795ejc.136.2023.12.17.12.40.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Dec 2023 12:40:59 -0800 (PST) From: Andrew Jones To: kvm-riscv@lists.infradead.org, linux-riscv@lists.infradead.org, virtualization@lists.linux-foundation.org Cc: anup@brainfault.org, atishp@atishpatra.org, pbonzini@redhat.com, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, jgross@suse.com, srivatsa@csail.mit.edu, guoren@kernel.org, conor.dooley@microchip.com Subject: [PATCH v3 13/13] RISC-V: KVM: selftests: Add get-reg-list test for STA registers Date: Sun, 17 Dec 2023 21:40:33 +0100 Message-ID: <20231217204019.36492-28-ajones@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231217204019.36492-15-ajones@ventanamicro.com> References: <20231217204019.36492-15-ajones@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20231217_124103_803285_E2DACA55 X-CRM114-Status: UNSURE ( 9.88 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add SBI STA and its two registers to the get-reg-list test. Reviewed-by: Anup Patel Signed-off-by: Andrew Jones Reviewed-by: Atish Patra --- .../selftests/kvm/riscv/get-reg-list.c | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/tools/testing/selftests/kvm/riscv/get-reg-list.c b/tools/testing/selftests/kvm/riscv/get-reg-list.c index b8da2e86bf9c..55dd1fc3c536 100644 --- a/tools/testing/selftests/kvm/riscv/get-reg-list.c +++ b/tools/testing/selftests/kvm/riscv/get-reg-list.c @@ -71,6 +71,7 @@ bool filter_reg(__u64 reg) case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_HSM: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_PMU: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_DBCN: + case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_STA: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_EXPERIMENTAL: case KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR: return true; @@ -461,6 +462,7 @@ static const char *sbi_ext_single_id_to_str(__u64 reg_off) KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_SRST), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_HSM), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_PMU), + KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_STA), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_EXPERIMENTAL), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_VENDOR), KVM_SBI_EXT_ARR(KVM_RISCV_SBI_EXT_DBCN), @@ -509,6 +511,32 @@ static const char *sbi_ext_id_to_str(const char *prefix, __u64 id) return strdup_printf("%lld | %lld /* UNKNOWN */", reg_subtype, reg_off); } +static const char *sbi_sta_id_to_str(__u64 reg_off) +{ + switch (reg_off) { + case 0: return "KVM_REG_RISCV_SBI_STA | KVM_REG_RISCV_SBI_STA_REG(shmem_lo)"; + case 1: return "KVM_REG_RISCV_SBI_STA | KVM_REG_RISCV_SBI_STA_REG(shmem_hi)"; + } + return strdup_printf("KVM_REG_RISCV_SBI_STA | %lld /* UNKNOWN */", reg_off); +} + +static const char *sbi_id_to_str(const char *prefix, __u64 id) +{ + __u64 reg_off = id & ~(REG_MASK | KVM_REG_RISCV_SBI); + __u64 reg_subtype = reg_off & KVM_REG_RISCV_SUBTYPE_MASK; + + assert((id & KVM_REG_RISCV_TYPE_MASK) == KVM_REG_RISCV_SBI); + + reg_off &= ~KVM_REG_RISCV_SUBTYPE_MASK; + + switch (reg_subtype) { + case KVM_REG_RISCV_SBI_STA: + return sbi_sta_id_to_str(reg_off); + } + + return strdup_printf("%lld | %lld /* UNKNOWN */", reg_subtype, reg_off); +} + void print_reg(const char *prefix, __u64 id) { const char *reg_size = NULL; @@ -565,6 +593,10 @@ void print_reg(const char *prefix, __u64 id) printf("\tKVM_REG_RISCV | %s | KVM_REG_RISCV_SBI_EXT | %s,\n", reg_size, sbi_ext_id_to_str(prefix, id)); break; + case KVM_REG_RISCV_SBI: + printf("\tKVM_REG_RISCV | %s | KVM_REG_RISCV_SBI | %s,\n", + reg_size, sbi_id_to_str(prefix, id)); + break; default: printf("\tKVM_REG_RISCV | %s | 0x%llx /* UNKNOWN */,\n", reg_size, id & ~REG_MASK); @@ -651,6 +683,12 @@ static __u64 sbi_base_regs[] = { KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_VENDOR, }; +static __u64 sbi_sta_regs[] = { + KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI_EXT | KVM_REG_RISCV_SBI_SINGLE | KVM_RISCV_SBI_EXT_STA, + KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI | KVM_REG_RISCV_SBI_STA | KVM_REG_RISCV_SBI_STA_REG(shmem_lo), + KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_SBI | KVM_REG_RISCV_SBI_STA | KVM_REG_RISCV_SBI_STA_REG(shmem_hi), +}; + static __u64 zicbom_regs[] = { KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_CONFIG | KVM_REG_RISCV_CONFIG_REG(zicbom_block_size), KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_ISA_EXT | KVM_REG_RISCV_ISA_SINGLE | KVM_RISCV_ISA_EXT_ZICBOM, @@ -757,6 +795,9 @@ static __u64 fp_d_regs[] = { #define SUBLIST_SBI_BASE \ {"sbi-base", .feature_type = VCPU_FEATURE_SBI_EXT, .feature = KVM_RISCV_SBI_EXT_V01, \ .regs = sbi_base_regs, .regs_n = ARRAY_SIZE(sbi_base_regs),} +#define SUBLIST_SBI_STA \ + {"sbi-sta", .feature_type = VCPU_FEATURE_SBI_EXT, .feature = KVM_RISCV_SBI_EXT_STA, \ + .regs = sbi_sta_regs, .regs_n = ARRAY_SIZE(sbi_sta_regs),} #define SUBLIST_ZICBOM \ {"zicbom", .feature = KVM_RISCV_ISA_EXT_ZICBOM, .regs = zicbom_regs, .regs_n = ARRAY_SIZE(zicbom_regs),} #define SUBLIST_ZICBOZ \ @@ -832,6 +873,7 @@ static struct vcpu_reg_list config_sbi_##ext = { \ /* Note: The below list is alphabetically sorted. */ KVM_SBI_EXT_SUBLIST_CONFIG(base, BASE); +KVM_SBI_EXT_SUBLIST_CONFIG(sta, STA); KVM_SBI_EXT_SIMPLE_CONFIG(pmu, PMU); KVM_SBI_EXT_SIMPLE_CONFIG(dbcn, DBCN); @@ -858,6 +900,7 @@ KVM_ISA_EXT_SIMPLE_CONFIG(zihpm, ZIHPM); struct vcpu_reg_list *vcpu_configs[] = { &config_sbi_base, + &config_sbi_sta, &config_sbi_pmu, &config_sbi_dbcn, &config_aia,