From patchwork Tue Dec 19 12:11:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Selvin Xavier X-Patchwork-Id: 13498216 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3373C18626 for ; Tue, 19 Dec 2023 12:27:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=broadcom.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=broadcom.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="ctBPvQCR" Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-6d099d316a8so4123626b3a.0 for ; Tue, 19 Dec 2023 04:27:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1702988879; x=1703593679; darn=vger.kernel.org; h=message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vGiZf2OI1ZKO2SeKbdJEUQHb5hKSthTwpEjL5cWKYUo=; b=ctBPvQCRgSxaKPtLBGdroqJf8wnNYrzkW7/17p61Bj9Y1JfOMBR113Nwv40/eW81At l7Cjpt68fmfxXk3FaUGQe6r+SbDkbe+JfsJ8Pui3ENmHg8k2QPiv/M3+6A5hoD/McEZ4 iTDnTcUBBsBWVXsE/1jOEsvblA06pFYFCuAGU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702988879; x=1703593679; h=message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vGiZf2OI1ZKO2SeKbdJEUQHb5hKSthTwpEjL5cWKYUo=; b=dY7BgUNShqkVZmWVfW3FPpEkjKBlAK2wM0f3Gf6bsiIU86LIPO0tBJc/wRAEjktbzW phsi+Nn9QsBxwUFvJMKuvcSLCbAaJxbdjTr7uTAJXFa8EzWzkJTRYhxWDUZK9xO8Pdpb 154RamNCWgkC1fxUpxErIPp9fRqEtmoxLqtyojnIFjieGldpbh6VZqqjVFCFntBhCG50 URZm6lgH/usE0IxIz9q/noXSYi+Vx6JQrjAsm40yCYaJt9uDhRyt1X56vJonteZ62ZIn svs2/S8ilvLePSjwDGDyri+vwahyEKuBePqEd+uzLgJCbCxms1cYVnuYxlnb+yiY7T6P I7JA== X-Gm-Message-State: AOJu0YxRYrRz7ZHbSna4B8Wr6342RSKFu+1VjCvDGtRwqa0qEdcZjHZE W0rdeLpK7cmLxfhdpei1L0A3Zw== X-Google-Smtp-Source: AGHT+IHhaz2dgR5z+vF8nVMuRpNeKt5YB3i48TOsWmez7TeTw82CThj4IZ+TJh2MotDyAL/gs7dXoQ== X-Received: by 2002:a05:6a20:2593:b0:190:8c90:c317 with SMTP id k19-20020a056a20259300b001908c90c317mr21528066pzd.79.1702988879323; Tue, 19 Dec 2023 04:27:59 -0800 (PST) Received: from dhcp-10-192-206-197.iig.avagotech.net.net ([192.19.252.250]) by smtp.gmail.com with ESMTPSA id gu20-20020a056a004e5400b006d68dfa1b45sm4276679pfb.153.2023.12.19.04.27.56 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Tue, 19 Dec 2023 04:27:58 -0800 (PST) From: Selvin Xavier To: leon@kernel.org, jgg@ziepe.ca Cc: linux-rdma@vger.kernel.org, andrew.gospodarek@broadcom.com, Selvin Xavier Subject: [PATCH for-next] RDMA/bnxt_re: Fix the offset for GenP7 adapters for user applications Date: Tue, 19 Dec 2023 04:11:40 -0800 Message-Id: <1702987900-5363-1-git-send-email-selvin.xavier@broadcom.com> X-Mailer: git-send-email 2.5.5 Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: User Doorbell page indexes start at an offset for GenP7 adapters. Fix the offset that will be used for user doorbell page indexes. Fixes: a62d68581441 ("RDMA/bnxt_re: Update the BAR offsets") Signed-off-by: Selvin Xavier --- drivers/infiniband/hw/bnxt_re/main.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/infiniband/hw/bnxt_re/main.c b/drivers/infiniband/hw/bnxt_re/main.c index eb03eba..f022c922 100644 --- a/drivers/infiniband/hw/bnxt_re/main.c +++ b/drivers/infiniband/hw/bnxt_re/main.c @@ -108,12 +108,14 @@ static void bnxt_re_set_db_offset(struct bnxt_re_dev *rdev) dev_info(rdev_to_dev(rdev), "Couldn't get DB bar size, Low latency framework is disabled\n"); /* set register offsets for both UC and WC */ - if (bnxt_qplib_is_chip_gen_p7(cctx)) + if (bnxt_qplib_is_chip_gen_p7(cctx)) { res->dpi_tbl.ucreg.offset = offset; - else + res->dpi_tbl.wcreg.offset = en_dev->l2_db_size; + } else { res->dpi_tbl.ucreg.offset = res->is_vf ? BNXT_QPLIB_DBR_VF_DB_OFFSET : BNXT_QPLIB_DBR_PF_DB_OFFSET; - res->dpi_tbl.wcreg.offset = res->dpi_tbl.ucreg.offset; + res->dpi_tbl.wcreg.offset = res->dpi_tbl.ucreg.offset; + } /* If WC mapping is disabled by L2 driver then en_dev->l2_db_size * is equal to the DB-Bar actual size. This indicates that L2