From patchwork Tue Dec 19 20:34:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13499056 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 53A33C46CA2 for ; Tue, 19 Dec 2023 20:34:46 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 962B210E1CC; Tue, 19 Dec 2023 20:34:45 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id B2ADA10E1CC for ; Tue, 19 Dec 2023 20:34:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1703018083; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=s2gh7avZ+webTJh4GlB/OmJjsr2TX31NuZTJbonK+AA=; b=TKv2Ph6pSgWPvJo+RswnyE3kHrQY82y1ObLyC10SSSJbPLg8n+Aghch+FFo2JwQiIdbsWx ia+IPHR3IEmLzW9j8xmPYtLjUkxTsekCXtdkW1WL8F4AqfJWKDjUFhvbDvrM0rtv3TFtvD CzX6T7YAxJ+14q8l7B673lo2dGv7I90= Received: from mail-wr1-f70.google.com (mail-wr1-f70.google.com [209.85.221.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-634-Dit_Z07mP06Bz-Ww5S2JXA-1; Tue, 19 Dec 2023 15:34:40 -0500 X-MC-Unique: Dit_Z07mP06Bz-Ww5S2JXA-1 Received: by mail-wr1-f70.google.com with SMTP id ffacd0b85a97d-336719795a7so584863f8f.0 for ; Tue, 19 Dec 2023 12:34:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703018079; x=1703622879; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s2gh7avZ+webTJh4GlB/OmJjsr2TX31NuZTJbonK+AA=; b=XZAWqytRhgINlH4uJqdQ6hd4ZYBfroS/ZYZLa39+l0yJ/7nVJrE6ooUX/A5gPddc+t Eu8gisbIk0h9P8jjObmNpzLt8H5rK7MsmhOtTx2QRDtdQg0ydwIQtvbkOqb4xZAyZha0 he4565ABtzRXQZcO5T4j4Ux9s2Z1sLBmPKT57rUtiABNcc8K53M0/w/qW5Px7rDs7QyY vq6YEcbN7tQmG47hR037mgAPue5UmMOHu2lb4KnPCNdom9Ae6GQk/jFr29wEHXiW1MaB ExZ1Eq2WI46VSIkh/HexlHQegP1si+8UkGwRy9u1rFqjAcq/M+BnkeAgibZRlfLo8f+T eCHg== X-Gm-Message-State: AOJu0Yx3NsqibFnkwXvmJMyIj8JY5FHvuCh6UOWHMHXTNpf6QKLDN+E7 FNezLQz0FoE9PMnM75Lwecapkv9euxYgEdVJlYk6LeqnXCpD/POBTywRaNG/2WUGbohMA2vumm6 vb2O3ZE/4u2olTtc8xr6O7rDS0Wx7 X-Received: by 2002:adf:fbc5:0:b0:32f:7c6c:aa14 with SMTP id d5-20020adffbc5000000b0032f7c6caa14mr9345894wrs.37.1703018079105; Tue, 19 Dec 2023 12:34:39 -0800 (PST) X-Google-Smtp-Source: AGHT+IHfz12dyj5qQB1RZu3obqwFvurn6HeBaxHioQSLuCusvAEiMmUqPMMF1GzfYjGC0YmrWBecYw== X-Received: by 2002:adf:fbc5:0:b0:32f:7c6c:aa14 with SMTP id d5-20020adffbc5000000b0032f7c6caa14mr9345884wrs.37.1703018078853; Tue, 19 Dec 2023 12:34:38 -0800 (PST) Received: from localhost (205.pool92-176-231.dynamic.orange.es. [92.176.231.205]) by smtp.gmail.com with ESMTPSA id j8-20020a05600c190800b0040c11fbe581sm4472994wmq.27.2023.12.19.12.34.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 12:34:38 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v3 1/4] dt-bindings: display: ssd1307fb: Add vendor prefix to width and height Date: Tue, 19 Dec 2023 21:34:06 +0100 Message-ID: <20231219203416.2299702-2-javierm@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219203416.2299702-1-javierm@redhat.com> References: <20231219203416.2299702-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Conor Dooley , Jocelyn Falempe , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Javier Martinez Canillas , Maxime Ripard , Krzysztof Kozlowski , Rob Herring , Geert Uytterhoeven , Peter Robinson , Thomas Zimmermann , David Airlie Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The commit 591825fba8a2 ("dt-bindings: display: ssd1307fb: Remove default width and height values") used the wrong properties for width and height, instead of the correct "solomon,width" and "solomon,height" properties. Fix this by adding the vendor prefix to the width and height properties. Fixes: 591825fba8a2 ("dt-bindings: display: ssd1307fb: Remove default width and height values") Reported-by: Conor Dooley Closes: https://lore.kernel.org/dri-devel/20231218-example-envision-b41ca8efa251@spud/ Signed-off-by: Javier Martinez Canillas Acked-by: Rob Herring --- (no changes since v1) .../bindings/display/solomon,ssd1307fb.yaml | 20 +++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml b/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml index 3afbb52d1b7f..153ff86fb405 100644 --- a/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml +++ b/Documentation/devicetree/bindings/display/solomon,ssd1307fb.yaml @@ -131,9 +131,9 @@ allOf: const: sinowealth,sh1106 then: properties: - width: + solomon,width: default: 132 - height: + solomon,height: default: 64 solomon,dclk-div: default: 1 @@ -149,9 +149,9 @@ allOf: - solomon,ssd1305 then: properties: - width: + solomon,width: default: 132 - height: + solomon,height: default: 64 solomon,dclk-div: default: 1 @@ -167,9 +167,9 @@ allOf: - solomon,ssd1306 then: properties: - width: + solomon,width: default: 128 - height: + solomon,height: default: 64 solomon,dclk-div: default: 1 @@ -185,9 +185,9 @@ allOf: - solomon,ssd1307 then: properties: - width: + solomon,width: default: 128 - height: + solomon,height: default: 39 solomon,dclk-div: default: 2 @@ -205,9 +205,9 @@ allOf: - solomon,ssd1309 then: properties: - width: + solomon,width: default: 128 - height: + solomon,height: default: 64 solomon,dclk-div: default: 1 From patchwork Tue Dec 19 20:34:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13499057 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 262ADC46CA2 for ; Tue, 19 Dec 2023 20:34:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8574C10E20D; Tue, 19 Dec 2023 20:34:51 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 9C15A10E20D for ; Tue, 19 Dec 2023 20:34:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1703018088; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NiVYl512QhGYSepDsrAuE1nuD6kWmIVdAFOPcanDwvc=; b=Id7XPjLNVgHvktGtHRDSmyx6w15wYE66ly9XXwJQsus6GffNRVZlMpGctnL3dVwsSfUwPy 66gwp1VveH/j1OGLjMXTo1ruri0V2SaVn8+a7GBDmzRJPPHcDVzOx0P9UBCywFCj8vvaYz EgFVpDiyxJOJYrJP80zcA7caVEzEXIE= Received: from mail-wm1-f70.google.com (mail-wm1-f70.google.com [209.85.128.70]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-15--xazBuKvPMG4YQAnYdHrBw-1; Tue, 19 Dec 2023 15:34:45 -0500 X-MC-Unique: -xazBuKvPMG4YQAnYdHrBw-1 Received: by mail-wm1-f70.google.com with SMTP id 5b1f17b1804b1-40d2f6f2787so4263045e9.0 for ; Tue, 19 Dec 2023 12:34:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703018084; x=1703622884; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=NiVYl512QhGYSepDsrAuE1nuD6kWmIVdAFOPcanDwvc=; b=Reqf8o4KOxwVoIKrlblajzb3we2tpZUaGTnPFB9+GWaFCozHj1w9VULJP4+KGqte57 zYID0/S/8U8VrAvJ7G7o4tWW1ntbRvHUGb3L6WVV19ZcsHX6po5XOtudot+fvlLQ7v0m lTnrx7aF/GlC6YCXRKiVWvZSsNlf8E8vHVepHHfWQEgHI1YJPYhnTcEAtx67/gnfBrEb HB4x41CZ+Pe//aOTKHlDZiNNpSsw48G4h91jIXG3y2fLyXFiwHnpqqCp8RD2CuDpERtH ut+ehI4VS6aZlyCre5Ip1JN10RYdAEB+OLd3WHUkF3xLC5OsqC8zu6xYmGuZi+vjJa64 HD/Q== X-Gm-Message-State: AOJu0YxoSm5YQoS8ZtQVTjLuwW+1NAyCLZZkPafbAdg6ZDMpmM10YThW A2+Zm3NZdqczw+ECaTJgWBqAMVtfD6szJOw5fSl77Rspv074XI0nzGSCUDhom1j4SffqD9qWsiH 2BE0O8fLkNBjRp4ht5QFw64JaqQxY X-Received: by 2002:a05:600c:44c7:b0:40c:2bb8:70c9 with SMTP id f7-20020a05600c44c700b0040c2bb870c9mr9608760wmo.150.1703018084371; Tue, 19 Dec 2023 12:34:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IG6aQ1XQXOizk6reDjlxoJMiPmuIWJ0QcHegbS1RgeL9ztmoE3yAj4OKXbYEsvTfcyds5jWDQ== X-Received: by 2002:a05:600c:44c7:b0:40c:2bb8:70c9 with SMTP id f7-20020a05600c44c700b0040c2bb870c9mr9608753wmo.150.1703018084172; Tue, 19 Dec 2023 12:34:44 -0800 (PST) Received: from localhost (205.pool92-176-231.dynamic.orange.es. [92.176.231.205]) by smtp.gmail.com with ESMTPSA id c5-20020a05600c0ac500b0040a3f9862e3sm43508wmr.1.2023.12.19.12.34.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 12:34:43 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v3 2/4] dt-bindings: display: ssd132x: Add vendor prefix to width and height Date: Tue, 19 Dec 2023 21:34:07 +0100 Message-ID: <20231219203416.2299702-3-javierm@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219203416.2299702-1-javierm@redhat.com> References: <20231219203416.2299702-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Conor Dooley , Jocelyn Falempe , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Javier Martinez Canillas , Maxime Ripard , Krzysztof Kozlowski , Rob Herring , Geert Uytterhoeven , Peter Robinson , Thomas Zimmermann , David Airlie Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Commit 2d23e7d6bacb ("dt-bindings: display: Add SSD132x OLED controllers") used the wrong properties for width and height, instead of the correct "solomon,width" and "solomon,height" properties. Fix this by adding the vendor prefix to the width and height properties. Fixes: 2d23e7d6bacb ("dt-bindings: display: Add SSD132x OLED controllers") Reported-by: Conor Dooley Closes: https://lore.kernel.org/dri-devel/20231218-example-envision-b41ca8efa251@spud/ Signed-off-by: Javier Martinez Canillas Acked-by: Rob Herring --- (no changes since v1) .../devicetree/bindings/display/solomon,ssd132x.yaml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/display/solomon,ssd132x.yaml b/Documentation/devicetree/bindings/display/solomon,ssd132x.yaml index 37975ee61c5a..dd7939989cf4 100644 --- a/Documentation/devicetree/bindings/display/solomon,ssd132x.yaml +++ b/Documentation/devicetree/bindings/display/solomon,ssd132x.yaml @@ -30,9 +30,9 @@ allOf: const: solomon,ssd1322 then: properties: - width: + solomon,width: default: 480 - height: + solomon,height: default: 128 - if: @@ -42,9 +42,9 @@ allOf: const: solomon,ssd1325 then: properties: - width: + solomon,width: default: 128 - height: + solomon,height: default: 80 - if: @@ -54,9 +54,9 @@ allOf: const: solomon,ssd1327 then: properties: - width: + solomon,width: default: 128 - height: + solomon,height: default: 128 unevaluatedProperties: false From patchwork Tue Dec 19 20:34:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13499058 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C4BAC46CA2 for ; Tue, 19 Dec 2023 20:34:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 94F7C10E21E; Tue, 19 Dec 2023 20:34:57 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7481810E21E for ; Tue, 19 Dec 2023 20:34:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1703018094; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=uBP5+4pQK3uFRN8UqYAB+LK0Vg09XZtHg8dKysI62eg=; b=QLn1Q/yb3XXADe3VUYxpztzxH6wbL/aMvnBvGIpXVRytYCpshaWMUIRCy8WDzWGMyLaim4 z5tyAanND7x0yYEukc/2UTqfCD1awZu2c/11DzbbI9coEKkLOdNLAkprjSUqw1HqBtzIOJ oBZg3+Z8nCXUXghU9+sqYqeYBouDNa0= Received: from mail-wm1-f71.google.com (mail-wm1-f71.google.com [209.85.128.71]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-245-DoC0nZqpMjSCZww9HXW3TQ-1; Tue, 19 Dec 2023 15:34:52 -0500 X-MC-Unique: DoC0nZqpMjSCZww9HXW3TQ-1 Received: by mail-wm1-f71.google.com with SMTP id 5b1f17b1804b1-40c469953a8so33079835e9.1 for ; Tue, 19 Dec 2023 12:34:51 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703018091; x=1703622891; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=uBP5+4pQK3uFRN8UqYAB+LK0Vg09XZtHg8dKysI62eg=; b=qSLe4MhVJtQkqVnc8xed3CGwo5e+2BDA1mFaLRB5M5zOrzXD64BjaE3fnGx60MnKl4 X/IrrelNr4C02O34Izn0FRVqFI/foBv4t3RO3DAJhqvdp3R2jHspolPW6zT1oio0GdpU Ui0T3sI1Ab0fj9G6PxUjYMKyJmCBd2aHfPcb1OOgbfQ8jhERi7VxC61X1QyPpMA830fO fWAs/+id72IgZsKSnDEI/Y8xtOnmo8HfOzjaF+WOVKlCpe23lteX4JfK1PsRspovmsm6 9l/YfZmjrcgmYXecgkLwc8hM+MfP/guOftV4aOeTdHxRodB6xwgtzK+uGLWeNqbvRblL Md2Q== X-Gm-Message-State: AOJu0Ywh95U0yE2z0xOTfxtI+RYEAHqgpC60RM7mLA5uugFHRXvQYZ5K Gk7AXG3yHwSA3EoBdLUsOmZ6ZVxPKOSnptd+9C/1Y9ZxdbF4ujz+P3mko9BzWXvbmrexBvMkK5m 37VN1WZT0i9wPPuprUmAKDAgt2xk+ X-Received: by 2002:a05:600c:458d:b0:40b:33c0:a22 with SMTP id r13-20020a05600c458d00b0040b33c00a22mr11268572wmo.28.1703018090940; Tue, 19 Dec 2023 12:34:50 -0800 (PST) X-Google-Smtp-Source: AGHT+IFsXT5JFxqoigwef/u1QlfVGRPMXewmQtLqix/INqsVLkJ2tdFjoRjRtz0EBStx4PVCPvpwYg== X-Received: by 2002:a05:600c:458d:b0:40b:33c0:a22 with SMTP id r13-20020a05600c458d00b0040b33c00a22mr11268569wmo.28.1703018090722; Tue, 19 Dec 2023 12:34:50 -0800 (PST) Received: from localhost (205.pool92-176-231.dynamic.orange.es. [92.176.231.205]) by smtp.gmail.com with ESMTPSA id c5-20020a05600c0a4500b0040c411da99csm4464496wmq.48.2023.12.19.12.34.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 12:34:50 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v3 3/4] dt-bindings: display: Add SSD133x OLED controllers Date: Tue, 19 Dec 2023 21:34:08 +0100 Message-ID: <20231219203416.2299702-4-javierm@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219203416.2299702-1-javierm@redhat.com> References: <20231219203416.2299702-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Conor Dooley , Jocelyn Falempe , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, Javier Martinez Canillas , Maxime Ripard , Krzysztof Kozlowski , Rob Herring , Geert Uytterhoeven , Peter Robinson , Thomas Zimmermann , David Airlie Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add a Device Tree binding schema for the OLED panels based on the Solomon SSD133x family of controllers. Signed-off-by: Javier Martinez Canillas Reviewed-by: Rob Herring --- Changes in v3: - Move solomon,ssd-common.yaml ref before the properties section and width/height constraints after the other properties (Conor Dooley). Changes in v2: - Unconditionally set the width and height constraints (Conor Dooley). - Fix indentation in the DTS examples (Krzysztof Kozlowski). .../bindings/display/solomon,ssd133x.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/solomon,ssd133x.yaml diff --git a/Documentation/devicetree/bindings/display/solomon,ssd133x.yaml b/Documentation/devicetree/bindings/display/solomon,ssd133x.yaml new file mode 100644 index 000000000000..e93879b3da5d --- /dev/null +++ b/Documentation/devicetree/bindings/display/solomon,ssd133x.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/solomon,ssd133x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Solomon SSD133x OLED Display Controllers + +maintainers: + - Javier Martinez Canillas + +allOf: + - $ref: solomon,ssd-common.yaml# + +properties: + compatible: + enum: + - solomon,ssd1331 + + solomon,width: + default: 96 + + solomon,height: + default: 64 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + oled@3c { + compatible = "solomon,ssd1331"; + reg = <0x3c>; + reset-gpios = <&gpio2 7>; + }; + + }; + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + oled@0 { + compatible = "solomon,ssd1331"; + reg = <0x0>; + reset-gpios = <&gpio2 7>; + dc-gpios = <&gpio2 8>; + spi-max-frequency = <10000000>; + }; + }; From patchwork Tue Dec 19 20:34:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Javier Martinez Canillas X-Patchwork-Id: 13499059 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 031BDC46CA2 for ; Tue, 19 Dec 2023 20:35:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6A77610E223; Tue, 19 Dec 2023 20:35:00 +0000 (UTC) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by gabe.freedesktop.org (Postfix) with ESMTPS id A828610E223 for ; Tue, 19 Dec 2023 20:34:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1703018098; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zkjuwGnB6yGvGi3JwEumv3TfCYqLhTwnwhsWkP+zduk=; b=fkw0IZo2XGOIjdcbV6ALscVrw136hDK+3m2+X3VLQooyI2JDgMNJepEzJK2x4uZZyuVZ/6 DA+ZVTS6KLPlyyk+qxxr4HJCRtKP21B0JKNQPwapb4+Qqz2FJEBB1/FcyFID6v6UIoIiH7 FXhM47Ad45Iz5eb7jn6P+ghFNj1iq/E= Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-107-q2OLAmQ_NcChYYXt_iScVQ-1; Tue, 19 Dec 2023 15:34:56 -0500 X-MC-Unique: q2OLAmQ_NcChYYXt_iScVQ-1 Received: by mail-wm1-f69.google.com with SMTP id 5b1f17b1804b1-40d29d4ed7fso7563735e9.1 for ; Tue, 19 Dec 2023 12:34:56 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703018095; x=1703622895; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zkjuwGnB6yGvGi3JwEumv3TfCYqLhTwnwhsWkP+zduk=; b=XL78gu6r3TmcSer8FqX8sX8WqVFAwDM+qJQoNU28i478ld/Nq4Y+aRz2eNZKYOrQA0 Fqe/t6SU1H7CIujUNvtKyta4D6LsRMqxpbUTuwfY+BvQtJ2X62c2pk0KWSltHJkjxtxK jR5q4ub11cjlLjBXToX4PItqY5gbyYvEPXZbWfZiSbGLlVev6vO3ZWH9FqvAulr3MNXC DYL0Blnpt/Ypz2oWWb6gOAG0bk5a9+Q+oO45F/VIVS9whTL9jUArSc1IhTF7ZCmRVjkO qBrq/pYz8ZJybD4xedWihxOkuEAvESghuGxziLn7INJxyhBUXjxnRAn5mx3pvJaS2G7S 7SZQ== X-Gm-Message-State: AOJu0Yz7spKdksKGsqA3D5lFResH/A5dDIKzX1eLEuULonjQ0ZQIu+be JFyWrL+FLBhdng5dHZFAu14AzP51A5lWA8knZvlPS6a/aKhk8B7RCXjOR5WG+lVU0Pzh10s3Xeb Q9dNEXLPb7CZACU7Z68bqtzP+PCGv X-Received: by 2002:a05:600c:3b06:b0:40b:3863:3ae7 with SMTP id m6-20020a05600c3b0600b0040b38633ae7mr10031268wms.29.1703018094725; Tue, 19 Dec 2023 12:34:54 -0800 (PST) X-Google-Smtp-Source: AGHT+IHcu/YHy2LD7exgMfsi8Eo1GPXvzBwIi4Q/ULcndX30WgtS5fFzUiQgS9Nh2NRmGCQEGy8u0g== X-Received: by 2002:a05:600c:3b06:b0:40b:3863:3ae7 with SMTP id m6-20020a05600c3b0600b0040b38633ae7mr10031264wms.29.1703018094307; Tue, 19 Dec 2023 12:34:54 -0800 (PST) Received: from localhost (205.pool92-176-231.dynamic.orange.es. [92.176.231.205]) by smtp.gmail.com with ESMTPSA id x3-20020a5d6b43000000b003366e974cacsm3604065wrw.73.2023.12.19.12.34.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Dec 2023 12:34:53 -0800 (PST) From: Javier Martinez Canillas To: linux-kernel@vger.kernel.org Subject: [PATCH v3 4/4] drm/ssd130x: Add support for the SSD133x OLED controller family Date: Tue, 19 Dec 2023 21:34:09 +0100 Message-ID: <20231219203416.2299702-5-javierm@redhat.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231219203416.2299702-1-javierm@redhat.com> References: <20231219203416.2299702-1-javierm@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jocelyn Falempe , Conor Dooley , dri-devel@lists.freedesktop.org, Javier Martinez Canillas , Maxime Ripard , Krzysztof Kozlowski , Geert Uytterhoeven , Peter Robinson , Thomas Zimmermann , David Airlie Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The Solomon SSD133x controllers (such as the SSD1331) are used by RGB dot matrix OLED panels, add a modesetting pipeline to support the chip family. The SSD133x controllers support 256 (8-bit) and 65k (16-bit) color depths but only the former is implemented for now. This is because the 256 color depth format matches a fourcc code already present in DRM (RGB8), but the 65k pixel format does not match the existing RG16 fourcc code format. Instead of a R:G:B 5:6:5, the controller expects the 16-bit pixels to be R:G:B 6:5:6, and so a new fourcc needs to be added to support this format. Signed-off-by: Javier Martinez Canillas Reviewed-by: Jocelyn Falempe --- (no changes since v1) drivers/gpu/drm/solomon/ssd130x-i2c.c | 5 + drivers/gpu/drm/solomon/ssd130x-spi.c | 7 + drivers/gpu/drm/solomon/ssd130x.c | 370 ++++++++++++++++++++++++++ drivers/gpu/drm/solomon/ssd130x.h | 5 +- 4 files changed, 386 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/solomon/ssd130x-i2c.c b/drivers/gpu/drm/solomon/ssd130x-i2c.c index f2ccab9c06d9..a047dbec4e48 100644 --- a/drivers/gpu/drm/solomon/ssd130x-i2c.c +++ b/drivers/gpu/drm/solomon/ssd130x-i2c.c @@ -105,6 +105,11 @@ static const struct of_device_id ssd130x_of_match[] = { .compatible = "solomon,ssd1327", .data = &ssd130x_variants[SSD1327_ID], }, + /* ssd133x family */ + { + .compatible = "solomon,ssd1331", + .data = &ssd130x_variants[SSD1331_ID], + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, ssd130x_of_match); diff --git a/drivers/gpu/drm/solomon/ssd130x-spi.c b/drivers/gpu/drm/solomon/ssd130x-spi.c index 84e035a7ab3f..84bfde31d172 100644 --- a/drivers/gpu/drm/solomon/ssd130x-spi.c +++ b/drivers/gpu/drm/solomon/ssd130x-spi.c @@ -142,6 +142,11 @@ static const struct of_device_id ssd130x_of_match[] = { .compatible = "solomon,ssd1327", .data = &ssd130x_variants[SSD1327_ID], }, + /* ssd133x family */ + { + .compatible = "solomon,ssd1331", + .data = &ssd130x_variants[SSD1331_ID], + }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, ssd130x_of_match); @@ -166,6 +171,8 @@ static const struct spi_device_id ssd130x_spi_table[] = { { "ssd1322", SSD1322_ID }, { "ssd1325", SSD1325_ID }, { "ssd1327", SSD1327_ID }, + /* ssd133x family */ + { "ssd1331", SSD1331_ID }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(spi, ssd130x_spi_table); diff --git a/drivers/gpu/drm/solomon/ssd130x.c b/drivers/gpu/drm/solomon/ssd130x.c index bef293922b98..447d0c7c88c6 100644 --- a/drivers/gpu/drm/solomon/ssd130x.c +++ b/drivers/gpu/drm/solomon/ssd130x.c @@ -119,6 +119,26 @@ #define SSD130X_SET_VCOMH_VOLTAGE 0xbe #define SSD132X_SET_FUNCTION_SELECT_B 0xd5 +/* ssd133x commands */ +#define SSD133X_SET_COL_RANGE 0x15 +#define SSD133X_SET_ROW_RANGE 0x75 +#define SSD133X_CONTRAST_A 0x81 +#define SSD133X_CONTRAST_B 0x82 +#define SSD133X_CONTRAST_C 0x83 +#define SSD133X_SET_MASTER_CURRENT 0x87 +#define SSD132X_SET_PRECHARGE_A 0x8a +#define SSD132X_SET_PRECHARGE_B 0x8b +#define SSD132X_SET_PRECHARGE_C 0x8c +#define SSD133X_SET_DISPLAY_START 0xa1 +#define SSD133X_SET_DISPLAY_OFFSET 0xa2 +#define SSD133X_SET_DISPLAY_NORMAL 0xa4 +#define SSD133X_SET_MASTER_CONFIG 0xad +#define SSD133X_POWER_SAVE_MODE 0xb0 +#define SSD133X_PHASES_PERIOD 0xb1 +#define SSD133X_SET_CLOCK_FREQ 0xb3 +#define SSD133X_SET_PRECHARGE_VOLTAGE 0xbb +#define SSD133X_SET_VCOMH_VOLTAGE 0xbe + #define MAX_CONTRAST 255 const struct ssd130x_deviceinfo ssd130x_variants[] = { @@ -180,6 +200,12 @@ const struct ssd130x_deviceinfo ssd130x_variants[] = { .default_width = 128, .default_height = 128, .family_id = SSD132X_FAMILY, + }, + /* ssd133x family */ + [SSD1331_ID] = { + .default_width = 96, + .default_height = 64, + .family_id = SSD133X_FAMILY, } }; EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X); @@ -589,6 +615,117 @@ static int ssd132x_init(struct ssd130x_device *ssd130x) return 0; } +static int ssd133x_init(struct ssd130x_device *ssd130x) +{ + int ret; + + /* Set color A contrast */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_CONTRAST_A, 0x91); + if (ret < 0) + return ret; + + /* Set color B contrast */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_CONTRAST_B, 0x50); + if (ret < 0) + return ret; + + /* Set color C contrast */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_CONTRAST_C, 0x7d); + if (ret < 0) + return ret; + + /* Set master current */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_SET_MASTER_CURRENT, 0x06); + if (ret < 0) + return ret; + + /* Set column start and end */ + ret = ssd130x_write_cmd(ssd130x, 3, SSD133X_SET_COL_RANGE, 0x00, ssd130x->width - 1); + if (ret < 0) + return ret; + + /* Set row start and end */ + ret = ssd130x_write_cmd(ssd130x, 3, SSD133X_SET_ROW_RANGE, 0x00, ssd130x->height - 1); + if (ret < 0) + return ret; + + /* + * Horizontal Address Increment + * Normal order SA,SB,SC (e.g. RGB) + * COM Split Odd Even + * 256 color format + */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD13XX_SET_SEG_REMAP, 0x20); + if (ret < 0) + return ret; + + /* Set display start and offset */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_SET_DISPLAY_START, 0x00); + if (ret < 0) + return ret; + + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_SET_DISPLAY_OFFSET, 0x00); + if (ret < 0) + return ret; + + /* Set display mode normal */ + ret = ssd130x_write_cmd(ssd130x, 1, SSD133X_SET_DISPLAY_NORMAL); + if (ret < 0) + return ret; + + /* Set multiplex ratio value */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD13XX_SET_MULTIPLEX_RATIO, ssd130x->height - 1); + if (ret < 0) + return ret; + + /* Set master configuration */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_SET_MASTER_CONFIG, 0x8e); + if (ret < 0) + return ret; + + /* Set power mode */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_POWER_SAVE_MODE, 0x0b); + if (ret < 0) + return ret; + + /* Set Phase 1 and 2 period */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_PHASES_PERIOD, 0x31); + if (ret < 0) + return ret; + + /* Set clock divider */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_SET_CLOCK_FREQ, 0xf0); + if (ret < 0) + return ret; + + /* Set pre-charge A */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_PRECHARGE_A, 0x64); + if (ret < 0) + return ret; + + /* Set pre-charge B */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_PRECHARGE_B, 0x78); + if (ret < 0) + return ret; + + /* Set pre-charge C */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD132X_SET_PRECHARGE_C, 0x64); + if (ret < 0) + return ret; + + /* Set pre-charge level */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_SET_PRECHARGE_VOLTAGE, 0x3a); + if (ret < 0) + return ret; + + /* Set VCOMH voltage */ + ret = ssd130x_write_cmd(ssd130x, 2, SSD133X_SET_VCOMH_VOLTAGE, 0x3e); + if (ret < 0) + return ret; + + return 0; +} + static int ssd130x_update_rect(struct ssd130x_device *ssd130x, struct drm_rect *rect, u8 *buf, u8 *data_array) @@ -753,6 +890,47 @@ static int ssd132x_update_rect(struct ssd130x_device *ssd130x, return ret; } +static int ssd133x_update_rect(struct ssd130x_device *ssd130x, + struct drm_rect *rect, u8 *data_array, + unsigned int pitch) +{ + unsigned int x = rect->x1; + unsigned int y = rect->y1; + unsigned int columns = drm_rect_width(rect); + unsigned int rows = drm_rect_height(rect); + int ret; + + /* + * The screen is divided in Segment and Common outputs, where + * COM0 to COM[N - 1] are the rows and SEG0 to SEG[M - 1] are + * the columns. + * + * Each Segment has a 8-bit pixel and each Common output has a + * row of pixels. When using the (default) horizontal address + * increment mode, each byte of data sent to the controller has + * a Segment (e.g: SEG0). + * + * When using the 256 color depth format, each pixel contains 3 + * sub-pixels for color A, B and C. These have 3 bit, 3 bit and + * 2 bits respectively. + */ + + /* Set column start and end */ + ret = ssd130x_write_cmd(ssd130x, 3, SSD133X_SET_COL_RANGE, x, columns - 1); + if (ret < 0) + return ret; + + /* Set row start and end */ + ret = ssd130x_write_cmd(ssd130x, 3, SSD133X_SET_ROW_RANGE, y, rows - 1); + if (ret < 0) + return ret; + + /* Write out update in one go since horizontal addressing mode is used */ + ret = ssd130x_write_data(ssd130x, data_array, pitch * rows); + + return ret; +} + static void ssd130x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_array) { unsigned int pages = DIV_ROUND_UP(ssd130x->height, SSD130X_PAGE_HEIGHT); @@ -805,6 +983,22 @@ static void ssd132x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_array) ssd130x_write_data(ssd130x, data_array, columns * height); } +static void ssd133x_clear_screen(struct ssd130x_device *ssd130x, u8 *data_array) +{ + const struct drm_format_info *fi = drm_format_info(DRM_FORMAT_RGB332); + unsigned int pitch; + + if (!fi) + return; + + pitch = drm_format_info_min_pitch(fi, 0, ssd130x->width); + + memset(data_array, 0, pitch * ssd130x->height); + + /* Write out update in one go since horizontal addressing mode is used */ + ssd130x_write_data(ssd130x, data_array, pitch * ssd130x->height); +} + static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *vmap, struct drm_rect *rect, @@ -866,6 +1060,36 @@ static int ssd132x_fb_blit_rect(struct drm_framebuffer *fb, return ret; } +static int ssd133x_fb_blit_rect(struct drm_framebuffer *fb, + const struct iosys_map *vmap, + struct drm_rect *rect, u8 *data_array, + struct drm_format_conv_state *fmtcnv_state) +{ + struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev); + const struct drm_format_info *fi = drm_format_info(DRM_FORMAT_RGB332); + unsigned int dst_pitch; + struct iosys_map dst; + int ret = 0; + + if (!fi) + return -EINVAL; + + dst_pitch = drm_format_info_min_pitch(fi, 0, drm_rect_width(rect)); + + ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE); + if (ret) + return ret; + + iosys_map_set_vaddr(&dst, data_array); + drm_fb_xrgb8888_to_rgb332(&dst, &dst_pitch, vmap, fb, rect, fmtcnv_state); + + drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE); + + ssd133x_update_rect(ssd130x, rect, data_array, dst_pitch); + + return ret; +} + static int ssd130x_primary_plane_atomic_check(struct drm_plane *plane, struct drm_atomic_state *state) { @@ -964,6 +1188,29 @@ static int ssd132x_primary_plane_atomic_check(struct drm_plane *plane, return 0; } +static int ssd133x_primary_plane_atomic_check(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); + struct drm_crtc *crtc = plane_state->crtc; + struct drm_crtc_state *crtc_state = NULL; + int ret; + + if (crtc) + crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + + ret = drm_atomic_helper_check_plane_state(plane_state, crtc_state, + DRM_PLANE_NO_SCALING, + DRM_PLANE_NO_SCALING, + false, false); + if (ret) + return ret; + else if (!plane_state->visible) + return 0; + + return 0; +} + static void ssd130x_primary_plane_atomic_update(struct drm_plane *plane, struct drm_atomic_state *state) { @@ -1034,6 +1281,39 @@ static void ssd132x_primary_plane_atomic_update(struct drm_plane *plane, drm_dev_exit(idx); } +static void ssd133x_primary_plane_atomic_update(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); + struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane); + struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state); + struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc); + struct ssd130x_crtc_state *ssd130x_crtc_state = to_ssd130x_crtc_state(crtc_state); + struct drm_framebuffer *fb = plane_state->fb; + struct drm_atomic_helper_damage_iter iter; + struct drm_device *drm = plane->dev; + struct drm_rect dst_clip; + struct drm_rect damage; + int idx; + + if (!drm_dev_enter(drm, &idx)) + return; + + drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state); + drm_atomic_for_each_plane_damage(&iter, &damage) { + dst_clip = plane_state->dst; + + if (!drm_rect_intersect(&dst_clip, &damage)) + continue; + + ssd133x_fb_blit_rect(fb, &shadow_plane_state->data[0], &dst_clip, + ssd130x_crtc_state->data_array, + &shadow_plane_state->fmtcnv_state); + } + + drm_dev_exit(idx); +} + static void ssd130x_primary_plane_atomic_disable(struct drm_plane *plane, struct drm_atomic_state *state) { @@ -1082,6 +1362,30 @@ static void ssd132x_primary_plane_atomic_disable(struct drm_plane *plane, drm_dev_exit(idx); } +static void ssd133x_primary_plane_atomic_disable(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_device *drm = plane->dev; + struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); + struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane); + struct drm_crtc_state *crtc_state; + struct ssd130x_crtc_state *ssd130x_crtc_state; + int idx; + + if (!plane_state->crtc) + return; + + crtc_state = drm_atomic_get_new_crtc_state(state, plane_state->crtc); + ssd130x_crtc_state = to_ssd130x_crtc_state(crtc_state); + + if (!drm_dev_enter(drm, &idx)) + return; + + ssd133x_clear_screen(ssd130x, ssd130x_crtc_state->data_array); + + drm_dev_exit(idx); +} + /* Called during init to allocate the plane's atomic state. */ static void ssd130x_primary_plane_reset(struct drm_plane *plane) { @@ -1144,6 +1448,12 @@ static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs[] .atomic_check = ssd132x_primary_plane_atomic_check, .atomic_update = ssd132x_primary_plane_atomic_update, .atomic_disable = ssd132x_primary_plane_atomic_disable, + }, + [SSD133X_FAMILY] = { + DRM_GEM_SHADOW_PLANE_HELPER_FUNCS, + .atomic_check = ssd133x_primary_plane_atomic_check, + .atomic_update = ssd133x_primary_plane_atomic_update, + .atomic_disable = ssd133x_primary_plane_atomic_disable, } }; @@ -1214,6 +1524,33 @@ static int ssd132x_crtc_atomic_check(struct drm_crtc *crtc, return 0; } +static int ssd133x_crtc_atomic_check(struct drm_crtc *crtc, + struct drm_atomic_state *state) +{ + struct drm_device *drm = crtc->dev; + struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); + struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc); + struct ssd130x_crtc_state *ssd130x_state = to_ssd130x_crtc_state(crtc_state); + const struct drm_format_info *fi = drm_format_info(DRM_FORMAT_RGB332); + unsigned int pitch; + int ret; + + if (!fi) + return -EINVAL; + + ret = drm_crtc_helper_atomic_check(crtc, state); + if (ret) + return ret; + + pitch = drm_format_info_min_pitch(fi, 0, ssd130x->width); + + ssd130x_state->data_array = kmalloc(pitch * ssd130x->height, GFP_KERNEL); + if (!ssd130x_state->data_array) + return -ENOMEM; + + return 0; +} + /* Called during init to allocate the CRTC's atomic state. */ static void ssd130x_crtc_reset(struct drm_crtc *crtc) { @@ -1275,6 +1612,10 @@ static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs[] = { .mode_valid = ssd130x_crtc_mode_valid, .atomic_check = ssd132x_crtc_atomic_check, }, + [SSD133X_FAMILY] = { + .mode_valid = ssd130x_crtc_mode_valid, + .atomic_check = ssd133x_crtc_atomic_check, + }, }; static const struct drm_crtc_funcs ssd130x_crtc_funcs = { @@ -1337,6 +1678,31 @@ static void ssd132x_encoder_atomic_enable(struct drm_encoder *encoder, ssd130x_power_off(ssd130x); } +static void ssd133x_encoder_atomic_enable(struct drm_encoder *encoder, + struct drm_atomic_state *state) +{ + struct drm_device *drm = encoder->dev; + struct ssd130x_device *ssd130x = drm_to_ssd130x(drm); + int ret; + + ret = ssd130x_power_on(ssd130x); + if (ret) + return; + + ret = ssd133x_init(ssd130x); + if (ret) + goto power_off; + + ssd130x_write_cmd(ssd130x, 1, SSD13XX_DISPLAY_ON); + + backlight_enable(ssd130x->bl_dev); + + return; + +power_off: + ssd130x_power_off(ssd130x); +} + static void ssd130x_encoder_atomic_disable(struct drm_encoder *encoder, struct drm_atomic_state *state) { @@ -1358,6 +1724,10 @@ static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs[] = { [SSD132X_FAMILY] = { .atomic_enable = ssd132x_encoder_atomic_enable, .atomic_disable = ssd130x_encoder_atomic_disable, + }, + [SSD133X_FAMILY] = { + .atomic_enable = ssd133x_encoder_atomic_enable, + .atomic_disable = ssd130x_encoder_atomic_disable, } }; diff --git a/drivers/gpu/drm/solomon/ssd130x.h b/drivers/gpu/drm/solomon/ssd130x.h index 075c5c3ee75a..a4554018bb2a 100644 --- a/drivers/gpu/drm/solomon/ssd130x.h +++ b/drivers/gpu/drm/solomon/ssd130x.h @@ -25,7 +25,8 @@ enum ssd130x_family_ids { SSD130X_FAMILY, - SSD132X_FAMILY + SSD132X_FAMILY, + SSD133X_FAMILY }; enum ssd130x_variants { @@ -39,6 +40,8 @@ enum ssd130x_variants { SSD1322_ID, SSD1325_ID, SSD1327_ID, + /* ssd133x family */ + SSD1331_ID, NR_SSD130X_VARIANTS };