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[178.202.40.247]) by smtp.gmail.com with ESMTPSA id j20-20020aa7c0d4000000b005527de2aecfsm10943344edp.42.2023.12.29.04.07.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Dec 2023 04:07:28 -0800 (PST) From: Heinrich Schuchardt To: Palmer Dabbelt , Alistair Francis Cc: Paolo Bonzini , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Heinrich Schuchardt Subject: [PATCH v2 1/4] smbios: add processor-family option Date: Fri, 29 Dec 2023 13:07:21 +0100 Message-ID: <20231229120724.41383-2-heinrich.schuchardt@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> References: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=185.125.188.122; envelope-from=heinrich.schuchardt@canonical.com; helo=smtp-relay-internal-0.canonical.com X-Spam_score_int: -69 X-Spam_score: -7.0 X-Spam_bar: ------- X-Spam_report: (-7.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.553, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org For RISC-V the SMBIOS standard requires specific values of the processor family value depending on the bitness of the CPU. Add a processor-family option for SMBIOS table 4. The value of processor-family may exceed 255 and therefore must be provided in the Processor Family 2 field. Set the Processor Family field to 0xFE which signals that the Processor Family 2 is used. Signed-off-by: Heinrich Schuchardt Reviewed-by: Alistair Francis Reviewed-by: Andrew Jones --- v2: new patch --- hw/smbios/smbios.c | 13 +++++++++++-- qemu-options.hx | 4 ++-- 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index 2a90601ac5..647bc6d603 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbios.c @@ -102,6 +102,7 @@ static struct { #define DEFAULT_CPU_SPEED 2000 static struct { + uint16_t processor_family; const char *sock_pfx, *manufacturer, *version, *serial, *asset, *part; uint64_t max_speed; uint64_t current_speed; @@ -110,6 +111,7 @@ static struct { .max_speed = DEFAULT_CPU_SPEED, .current_speed = DEFAULT_CPU_SPEED, .processor_id = 0, + .processor_family = 0x01, /* Other */ }; struct type8_instance { @@ -337,6 +339,10 @@ static const QemuOptDesc qemu_smbios_type4_opts[] = { .name = "part", .type = QEMU_OPT_STRING, .help = "part number", + }, { + .name = "processor-family", + .type = QEMU_OPT_NUMBER, + .help = "processor family", }, { .name = "processor-id", .type = QEMU_OPT_NUMBER, @@ -726,7 +732,7 @@ static void smbios_build_type_4_table(MachineState *ms, unsigned instance) snprintf(sock_str, sizeof(sock_str), "%s%2x", type4.sock_pfx, instance); SMBIOS_TABLE_SET_STR(4, socket_designation_str, sock_str); t->processor_type = 0x03; /* CPU */ - t->processor_family = 0x01; /* Other */ + t->processor_family = 0xfe; /* use Processor Family 2 field */ SMBIOS_TABLE_SET_STR(4, processor_manufacturer_str, type4.manufacturer); if (type4.processor_id == 0) { t->processor_id[0] = cpu_to_le32(smbios_cpuid_version); @@ -758,7 +764,7 @@ static void smbios_build_type_4_table(MachineState *ms, unsigned instance) t->thread_count = (threads_per_socket > 255) ? 0xFF : threads_per_socket; t->processor_characteristics = cpu_to_le16(0x02); /* Unknown */ - t->processor_family2 = cpu_to_le16(0x01); /* Other */ + t->processor_family2 = cpu_to_le16(type4.processor_family); if (tbl_len == SMBIOS_TYPE_4_LEN_V30) { t->core_count2 = t->core_enabled2 = cpu_to_le16(cores_per_socket); @@ -1402,6 +1408,9 @@ void smbios_entry_add(QemuOpts *opts, Error **errp) return; } save_opt(&type4.sock_pfx, opts, "sock_pfx"); + type4.processor_family = qemu_opt_get_number(opts, + "processor-family", + 0x01 /* Other */); save_opt(&type4.manufacturer, opts, "manufacturer"); save_opt(&type4.version, opts, "version"); save_opt(&type4.serial, opts, "serial"); diff --git a/qemu-options.hx b/qemu-options.hx index b66570ae00..7bdb414345 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -2694,7 +2694,7 @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios, " specify SMBIOS type 3 fields\n" "-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str]\n" " [,asset=str][,part=str][,max-speed=%d][,current-speed=%d]\n" - " [,processor-id=%d]\n" + " [,processor-family=%d,processor-id=%d]\n" " specify SMBIOS type 4 fields\n" "-smbios type=8[,external_reference=str][,internal_reference=str][,connector_type=%d][,port_type=%d]\n" " specify SMBIOS type 8 fields\n" @@ -2722,7 +2722,7 @@ SRST ``-smbios type=3[,manufacturer=str][,version=str][,serial=str][,asset=str][,sku=str]`` Specify SMBIOS type 3 fields -``-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str][,asset=str][,part=str][,processor-id=%d]`` +``-smbios type=4[,sock_pfx=str][,manufacturer=str][,version=str][,serial=str][,asset=str][,part=str][,processor-family=%d][,processor-id=%d]`` Specify SMBIOS type 4 fields ``-smbios type=11[,value=str][,path=filename]`` From patchwork Fri Dec 29 12:07:22 2023 Content-Type: text/plain; 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[178.202.40.247]) by smtp.gmail.com with ESMTPSA id j20-20020aa7c0d4000000b005527de2aecfsm10943344edp.42.2023.12.29.04.07.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Dec 2023 04:07:29 -0800 (PST) From: Heinrich Schuchardt To: Palmer Dabbelt , Alistair Francis Cc: Paolo Bonzini , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Heinrich Schuchardt Subject: [PATCH v2 2/4] smbios: function to set default processor family Date: Fri, 29 Dec 2023 13:07:22 +0100 Message-ID: <20231229120724.41383-3-heinrich.schuchardt@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> References: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=185.125.188.123; envelope-from=heinrich.schuchardt@canonical.com; helo=smtp-relay-internal-1.canonical.com X-Spam_score_int: -69 X-Spam_score: -7.0 X-Spam_bar: ------- X-Spam_report: (-7.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.553, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Provide a function to set the default processor family. Signed-off-by: Heinrich Schuchardt Reviewed-by: Andrew Jones --- v2: new patch --- hw/smbios/smbios.c | 7 +++++++ include/hw/firmware/smbios.h | 1 + 2 files changed, 8 insertions(+) diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c index 647bc6d603..03fe736565 100644 --- a/hw/smbios/smbios.c +++ b/hw/smbios/smbios.c @@ -989,6 +989,13 @@ void smbios_set_cpuid(uint32_t version, uint32_t features) field = value; \ } +void smbios_set_default_processor_family(uint16_t processor_family) +{ + if (type4.processor_family <= 0x01) { + type4.processor_family = processor_family; + } +} + void smbios_set_defaults(const char *manufacturer, const char *product, const char *version, bool legacy_mode, bool uuid_encoded, SmbiosEntryPointType ep_type) diff --git a/include/hw/firmware/smbios.h b/include/hw/firmware/smbios.h index 7f3259a630..6e514982d4 100644 --- a/include/hw/firmware/smbios.h +++ b/include/hw/firmware/smbios.h @@ -295,6 +295,7 @@ void smbios_set_cpuid(uint32_t version, uint32_t features); void smbios_set_defaults(const char *manufacturer, const char *product, const char *version, bool legacy_mode, bool uuid_encoded, SmbiosEntryPointType ep_type); +void smbios_set_default_processor_family(uint16_t processor_family); uint8_t *smbios_get_table_legacy(MachineState *ms, size_t *length); void smbios_get_tables(MachineState *ms, const struct smbios_phys_mem_area *mem_array, From patchwork Fri Dec 29 12:07:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heinrich Schuchardt X-Patchwork-Id: 13506462 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BFC65C4706F for ; Fri, 29 Dec 2023 12:09:24 +0000 (UTC) Received: from [::1] (helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rJBeW-0007uP-D1; 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[178.202.40.247]) by smtp.gmail.com with ESMTPSA id j20-20020aa7c0d4000000b005527de2aecfsm10943344edp.42.2023.12.29.04.07.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Dec 2023 04:07:30 -0800 (PST) From: Heinrich Schuchardt To: Palmer Dabbelt , Alistair Francis Cc: Paolo Bonzini , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Heinrich Schuchardt Subject: [PATCH v2 3/4] target/riscv: SMBIOS support for RISC-V virt machine Date: Fri, 29 Dec 2023 13:07:23 +0100 Message-ID: <20231229120724.41383-4-heinrich.schuchardt@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> References: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=185.125.188.123; envelope-from=heinrich.schuchardt@canonical.com; helo=smtp-relay-internal-1.canonical.com X-Spam_score_int: -69 X-Spam_score: -7.0 X-Spam_bar: ------- X-Spam_report: (-7.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.553, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Generate SMBIOS tables for the RISC-V mach-virt. Add CONFIG_SMBIOS=y to the RISC-V default config. Set the default processor family in the type 4 table. The implementation is based on the corresponding ARM and Loongson code. With the patch the following firmware tables are provided: etc/smbios/smbios-anchor etc/smbios/smbios-tables Signed-off-by: Heinrich Schuchardt Reviewed-by: Daniel Henrique Barboza Reviewed-by: Andrew Jones --- v2: set processor family --- hw/riscv/Kconfig | 1 + hw/riscv/virt.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index b6a5eb4452..1e11ac9432 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -41,6 +41,7 @@ config RISCV_VIRT select RISCV_IMSIC select SIFIVE_PLIC select SIFIVE_TEST + select SMBIOS select VIRTIO_MMIO select FW_CFG_DMA select PLATFORM_BUS diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index d2eac24156..a876dd8f34 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -36,6 +36,7 @@ #include "hw/riscv/boot.h" #include "hw/riscv/numa.h" #include "kvm/kvm_riscv.h" +#include "hw/firmware/smbios.h" #include "hw/intc/riscv_aclint.h" #include "hw/intc/riscv_aplic.h" #include "hw/intc/riscv_imsic.h" @@ -1249,6 +1250,45 @@ static void create_platform_bus(RISCVVirtState *s, DeviceState *irqchip) sysbus_mmio_get_region(sysbus, 0)); } +static void virt_build_smbios(RISCVVirtState *s) +{ + MachineClass *mc = MACHINE_GET_CLASS(s); + MachineState *ms = MACHINE(s); + uint8_t *smbios_tables, *smbios_anchor; + size_t smbios_tables_len, smbios_anchor_len; + struct smbios_phys_mem_area mem_array; + const char *product = "QEMU Virtual Machine"; + + if (kvm_enabled()) { + product = "KVM Virtual Machine"; + } + + smbios_set_defaults("QEMU", product, mc->name, false, + true, SMBIOS_ENTRY_POINT_TYPE_64); + +#if defined(TARGET_RISCV32) + smbios_set_default_processor_family(0x200); +#elif defined(TARGET_RISCV64) + smbios_set_default_processor_family(0x201); +#endif + + /* build the array of physical mem area from base_memmap */ + mem_array.address = s->memmap[VIRT_DRAM].base; + mem_array.length = ms->ram_size; + + smbios_get_tables(ms, &mem_array, 1, + &smbios_tables, &smbios_tables_len, + &smbios_anchor, &smbios_anchor_len, + &error_fatal); + + if (smbios_anchor) { + fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-tables", + smbios_tables, smbios_tables_len); + fw_cfg_add_file(s->fw_cfg, "etc/smbios/smbios-anchor", + smbios_anchor, smbios_anchor_len); + } +} + static void virt_machine_done(Notifier *notifier, void *data) { RISCVVirtState *s = container_of(notifier, RISCVVirtState, @@ -1337,6 +1377,8 @@ static void virt_machine_done(Notifier *notifier, void *data) riscv_setup_direct_kernel(kernel_entry, fdt_load_addr); } + virt_build_smbios(s); + if (virt_is_acpi_enabled(s)) { virt_acpi_setup(s); } From patchwork Fri Dec 29 12:07:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Heinrich Schuchardt X-Patchwork-Id: 13506461 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EC8FCC46CD4 for ; Fri, 29 Dec 2023 12:09:23 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rJBea-00081J-Qk; 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[178.202.40.247]) by smtp.gmail.com with ESMTPSA id j20-20020aa7c0d4000000b005527de2aecfsm10943344edp.42.2023.12.29.04.07.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 Dec 2023 04:07:31 -0800 (PST) From: Heinrich Schuchardt To: Palmer Dabbelt , Alistair Francis Cc: Paolo Bonzini , Bin Meng , Weiwei Li , Daniel Henrique Barboza , Liu Zhiwei , "Michael S . Tsirkin" , Igor Mammedov , Ani Sinha , qemu-riscv@nongnu.org, qemu-devel@nongnu.org, Heinrich Schuchardt Subject: [PATCH v2 4/4] qemu-options: enable -smbios option on RISC-V Date: Fri, 29 Dec 2023 13:07:24 +0100 Message-ID: <20231229120724.41383-5-heinrich.schuchardt@canonical.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> References: <20231229120724.41383-1-heinrich.schuchardt@canonical.com> MIME-Version: 1.0 Received-SPF: pass client-ip=185.125.188.123; envelope-from=heinrich.schuchardt@canonical.com; helo=smtp-relay-internal-1.canonical.com X-Spam_score_int: -69 X-Spam_score: -7.0 X-Spam_bar: ------- X-Spam_report: (-7.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-2.553, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org With SMBIOS support added for RISC-V we also should enable the command line option. Signed-off-by: Heinrich Schuchardt Reviewed-by: Daniel Henrique Barboza Acked-by: Alistair Francis Reviewed-by: Andrew Jones --- v2: new patch --- qemu-options.hx | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/qemu-options.hx b/qemu-options.hx index 7bdb414345..5ed82df11f 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -2705,7 +2705,7 @@ DEF("smbios", HAS_ARG, QEMU_OPTION_smbios, " specify SMBIOS type 17 fields\n" "-smbios type=41[,designation=str][,kind=str][,instance=%d][,pcidev=str]\n" " specify SMBIOS type 41 fields\n", - QEMU_ARCH_I386 | QEMU_ARCH_ARM | QEMU_ARCH_LOONGARCH) + QEMU_ARCH_I386 | QEMU_ARCH_ARM | QEMU_ARCH_LOONGARCH | QEMU_ARCH_RISCV) SRST ``-smbios file=binary`` Load SMBIOS entry from binary file.