From patchwork Thu Jan 4 11:11:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kubalewski, Arkadiusz" X-Patchwork-Id: 13511017 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98098210F6 for ; Thu, 4 Jan 2024 11:15:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="HmoAeUs4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704366902; x=1735902902; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=latcYaoADu/BdubtmjoFleX7eq/oqt473BrRvC/yq2o=; b=HmoAeUs4TK4V5p4xUGyyPqJbkSdLWTY2xhdxJ40DFpBBg6/B3JhcBAIB DdluSRbYrb8/ACAb7VWJ8KrPhRVvHFHxYqcFOOKR7fNdsBveXPIXHlX7r xDVP2XJThmrAWWImd9SuSBRLYr5lMyNsncuoutLFmCK4Uhiusojz1WUxX WQg5o/TW0uQpH+EYmwNSfCOop+y7pE3FmDEBtcFp2vmY1cycc0ToUx9DL c4q7RoC6Mq2FjVvYRAKOEoAOsVqQ/UAJtEO0OgVXZliG70WdMxA374AhD nYYw83rspMSRsEZoNTwFLMd/Yff/zhKI55zKdIIxIeuNOKzxG3LFI7olf w==; X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="382174426" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="382174426" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2024 03:15:02 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="1027391537" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="1027391537" Received: from amlin-018-114.igk.intel.com ([10.102.18.114]) by fmsmga006.fm.intel.com with ESMTP; 04 Jan 2024 03:14:59 -0800 From: Arkadiusz Kubalewski To: netdev@vger.kernel.org Cc: vadim.fedorenko@linux.dev, jiri@resnulli.us, michal.michalik@intel.com, milena.olech@intel.com, pabeni@redhat.com, kuba@kernel.org, Arkadiusz Kubalewski , Jan Glaza Subject: [PATCH net v2 1/4] dpll: fix pin dump crash after module unbind Date: Thu, 4 Jan 2024 12:11:29 +0100 Message-Id: <20240104111132.42730-2-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> References: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Disallow dump of unregistered parent pins, it is possible when parent pin and dpll device registerer kernel module instance unbinds, and other kernel module instances of the same dpll device have pins registered with the parent pin. The user can invoke a pin-dump but as the parent was unregistered, those shall not be accessed by the userspace, prevent that by checking if parent pin is still registered. Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") Reviewed-by: Jan Glaza Signed-off-by: Arkadiusz Kubalewski --- drivers/dpll/dpll_netlink.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index ce7cf736f020..b53478374a38 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -328,6 +328,8 @@ dpll_msg_add_pin_parents(struct sk_buff *msg, struct dpll_pin *pin, void *parent_priv; ppin = ref->pin; + if (!xa_get_mark(&dpll_pin_xa, ppin->id, DPLL_REGISTERED)) + continue; parent_priv = dpll_pin_on_dpll_priv(dpll_ref->dpll, ppin); ret = ops->state_on_pin_get(pin, dpll_pin_on_pin_priv(ppin, pin), From patchwork Thu Jan 4 11:11:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kubalewski, Arkadiusz" X-Patchwork-Id: 13511018 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DBD8A210FD for ; Thu, 4 Jan 2024 11:15:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QQjL22pD" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704366904; x=1735902904; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XOhGLMUyKxzJIQfIMJsbRvqzm/9eSEzz5pvJ33vXmTo=; b=QQjL22pDwmMDfCuPt9z4jWFyNjFHDCq6NdOspproPo4q4C1zkjAHHgfI GqN7VayJmBeL0SCvDpUgdz/clZqW6JAqeAxWmBavf+uXH9CLVKhpUlcMU velba1pOzEr4upN6h2KgIGuBfVvCgzlwve88fNcREy0gP89Y0wrEaxPu7 WPKe++OMojNJnY+KaZt30aSQuRBHPnDe89loABhniTnKm9y6HhxKZM8Z2 WOKa/DLBvvzlp4dW6vCjdiTBOyIDeySq0amtu+ur7SxvWYDw/5LvlBbTD oxobf4GHR8w/rHuZ65s5izHQuqCKKt1o+iE93cGWbRjLZbwXsdLFsSpsB g==; X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="382174431" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="382174431" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2024 03:15:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="1027391564" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="1027391564" Received: from amlin-018-114.igk.intel.com ([10.102.18.114]) by fmsmga006.fm.intel.com with ESMTP; 04 Jan 2024 03:15:02 -0800 From: Arkadiusz Kubalewski To: netdev@vger.kernel.org Cc: vadim.fedorenko@linux.dev, jiri@resnulli.us, michal.michalik@intel.com, milena.olech@intel.com, pabeni@redhat.com, kuba@kernel.org, Arkadiusz Kubalewski , Jan Glaza , Przemek Kitszel Subject: [PATCH net v2 2/4] dpll: fix pin dump crash for rebound module Date: Thu, 4 Jan 2024 12:11:30 +0100 Message-Id: <20240104111132.42730-3-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> References: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org When a kernel module is unbound but the pin resources were not entirely freed (other kernel module instance have had kept the reference to that pin), and kernel module is again bound, the pin properties would not be updated (the properties are only assigned when memory for the pin is allocated), prop pointer still points to the kernel module memory of the kernel module which was deallocated on the unbind. If the pin dump is invoked in this state, the result is a kernel crash. Prevent the crash by storing persistent pin properties in dpll subsystem, copy the content from the kernel module when pin is allocated, instead of using memory of the kernel module. Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") Reviewed-by: Jan Glaza Reviewed-by: Przemek Kitszel Signed-off-by: Arkadiusz Kubalewski --- drivers/dpll/dpll_core.c | 29 ++++++++++++++++++++++++++--- drivers/dpll/dpll_core.h | 4 ++-- drivers/dpll/dpll_netlink.c | 28 ++++++++++++++-------------- 3 files changed, 42 insertions(+), 19 deletions(-) diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c index 3568149b9562..0b469096ef79 100644 --- a/drivers/dpll/dpll_core.c +++ b/drivers/dpll/dpll_core.c @@ -429,6 +429,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, const struct dpll_pin_properties *prop) { struct dpll_pin *pin; + size_t freq_size; int ret; pin = kzalloc(sizeof(*pin), GFP_KERNEL); @@ -440,9 +441,22 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, if (WARN_ON(prop->type < DPLL_PIN_TYPE_MUX || prop->type > DPLL_PIN_TYPE_MAX)) { ret = -EINVAL; - goto err; + goto pin_free; } - pin->prop = prop; + memcpy(&pin->prop, prop, sizeof(pin->prop)); + if (prop->freq_supported && prop->freq_supported_num) { + freq_size = prop->freq_supported_num * + sizeof(*pin->prop.freq_supported); + pin->prop.freq_supported = kmemdup(prop->freq_supported, + freq_size, GFP_KERNEL); + if (!pin->prop.freq_supported) { + ret = -ENOMEM; + goto pin_free; + } + } + pin->prop.board_label = kstrdup(prop->board_label, GFP_KERNEL); + pin->prop.panel_label = kstrdup(prop->panel_label, GFP_KERNEL); + pin->prop.package_label = kstrdup(prop->package_label, GFP_KERNEL); refcount_set(&pin->refcount, 1); xa_init_flags(&pin->dpll_refs, XA_FLAGS_ALLOC); xa_init_flags(&pin->parent_refs, XA_FLAGS_ALLOC); @@ -451,8 +465,13 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module, goto err; return pin; err: + kfree(pin->prop.package_label); + kfree(pin->prop.panel_label); + kfree(pin->prop.board_label); + kfree(pin->prop.freq_supported); xa_destroy(&pin->dpll_refs); xa_destroy(&pin->parent_refs); +pin_free: kfree(pin); return ERR_PTR(ret); } @@ -512,6 +531,10 @@ void dpll_pin_put(struct dpll_pin *pin) xa_destroy(&pin->dpll_refs); xa_destroy(&pin->parent_refs); xa_erase(&dpll_pin_xa, pin->id); + kfree(pin->prop.board_label); + kfree(pin->prop.panel_label); + kfree(pin->prop.package_label); + kfree(pin->prop.freq_supported); kfree(pin); } mutex_unlock(&dpll_lock); @@ -634,7 +657,7 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, unsigned long i, stop; int ret; - if (WARN_ON(parent->prop->type != DPLL_PIN_TYPE_MUX)) + if (WARN_ON(parent->prop.type != DPLL_PIN_TYPE_MUX)) return -EINVAL; if (WARN_ON(!ops) || diff --git a/drivers/dpll/dpll_core.h b/drivers/dpll/dpll_core.h index 5585873c5c1b..717f715015c7 100644 --- a/drivers/dpll/dpll_core.h +++ b/drivers/dpll/dpll_core.h @@ -44,7 +44,7 @@ struct dpll_device { * @module: module of creator * @dpll_refs: hold referencees to dplls pin was registered with * @parent_refs: hold references to parent pins pin was registered with - * @prop: pointer to pin properties given by registerer + * @prop: pin properties copied from the registerer * @rclk_dev_name: holds name of device when pin can recover clock from it * @refcount: refcount **/ @@ -55,7 +55,7 @@ struct dpll_pin { struct module *module; struct xarray dpll_refs; struct xarray parent_refs; - const struct dpll_pin_properties *prop; + struct dpll_pin_properties prop; refcount_t refcount; }; diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index b53478374a38..3ce9995013f1 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -278,17 +278,17 @@ dpll_msg_add_pin_freq(struct sk_buff *msg, struct dpll_pin *pin, if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY, sizeof(freq), &freq, DPLL_A_PIN_PAD)) return -EMSGSIZE; - for (fs = 0; fs < pin->prop->freq_supported_num; fs++) { + for (fs = 0; fs < pin->prop.freq_supported_num; fs++) { nest = nla_nest_start(msg, DPLL_A_PIN_FREQUENCY_SUPPORTED); if (!nest) return -EMSGSIZE; - freq = pin->prop->freq_supported[fs].min; + freq = pin->prop.freq_supported[fs].min; if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MIN, sizeof(freq), &freq, DPLL_A_PIN_PAD)) { nla_nest_cancel(msg, nest); return -EMSGSIZE; } - freq = pin->prop->freq_supported[fs].max; + freq = pin->prop.freq_supported[fs].max; if (nla_put_64bit(msg, DPLL_A_PIN_FREQUENCY_MAX, sizeof(freq), &freq, DPLL_A_PIN_PAD)) { nla_nest_cancel(msg, nest); @@ -304,9 +304,9 @@ static bool dpll_pin_is_freq_supported(struct dpll_pin *pin, u32 freq) { int fs; - for (fs = 0; fs < pin->prop->freq_supported_num; fs++) - if (freq >= pin->prop->freq_supported[fs].min && - freq <= pin->prop->freq_supported[fs].max) + for (fs = 0; fs < pin->prop.freq_supported_num; fs++) + if (freq >= pin->prop.freq_supported[fs].min && + freq <= pin->prop.freq_supported[fs].max) return true; return false; } @@ -398,7 +398,7 @@ static int dpll_cmd_pin_get_one(struct sk_buff *msg, struct dpll_pin *pin, struct netlink_ext_ack *extack) { - const struct dpll_pin_properties *prop = pin->prop; + const struct dpll_pin_properties *prop = &pin->prop; struct dpll_pin_ref *ref; int ret; @@ -691,7 +691,7 @@ dpll_pin_on_pin_state_set(struct dpll_pin *pin, u32 parent_idx, int ret; if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & - pin->prop->capabilities)) { + pin->prop.capabilities)) { NL_SET_ERR_MSG(extack, "state changing is not allowed"); return -EOPNOTSUPP; } @@ -727,7 +727,7 @@ dpll_pin_state_set(struct dpll_device *dpll, struct dpll_pin *pin, int ret; if (!(DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE & - pin->prop->capabilities)) { + pin->prop.capabilities)) { NL_SET_ERR_MSG(extack, "state changing is not allowed"); return -EOPNOTSUPP; } @@ -754,7 +754,7 @@ dpll_pin_prio_set(struct dpll_device *dpll, struct dpll_pin *pin, int ret; if (!(DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE & - pin->prop->capabilities)) { + pin->prop.capabilities)) { NL_SET_ERR_MSG(extack, "prio changing is not allowed"); return -EOPNOTSUPP; } @@ -782,7 +782,7 @@ dpll_pin_direction_set(struct dpll_pin *pin, struct dpll_device *dpll, int ret; if (!(DPLL_PIN_CAPABILITIES_DIRECTION_CAN_CHANGE & - pin->prop->capabilities)) { + pin->prop.capabilities)) { NL_SET_ERR_MSG(extack, "direction changing is not allowed"); return -EOPNOTSUPP; } @@ -812,8 +812,8 @@ dpll_pin_phase_adj_set(struct dpll_pin *pin, struct nlattr *phase_adj_attr, int ret; phase_adj = nla_get_s32(phase_adj_attr); - if (phase_adj > pin->prop->phase_range.max || - phase_adj < pin->prop->phase_range.min) { + if (phase_adj > pin->prop.phase_range.max || + phase_adj < pin->prop.phase_range.min) { NL_SET_ERR_MSG_ATTR(extack, phase_adj_attr, "phase adjust value not supported"); return -EINVAL; @@ -997,7 +997,7 @@ dpll_pin_find(u64 clock_id, struct nlattr *mod_name_attr, unsigned long i; xa_for_each_marked(&dpll_pin_xa, i, pin, DPLL_REGISTERED) { - prop = pin->prop; + prop = &pin->prop; cid_match = clock_id ? pin->clock_id == clock_id : true; mod_match = mod_name_attr && module_name(pin->module) ? !nla_strcmp(mod_name_attr, From patchwork Thu Jan 4 11:11:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kubalewski, Arkadiusz" X-Patchwork-Id: 13511019 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D2F9D21109 for ; Thu, 4 Jan 2024 11:15:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dr4JWvON" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704366906; x=1735902906; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=or6bprJ6TdJStRBqGMaArHe9smvxrsAGlIvp+wkzmo8=; b=dr4JWvONNB6VBmAT66ZjDtBMcGYzwsoTgOMfaxB5PFAqcRzDlqsLIK0o ONsqHU+0JxaBOPtQXlR+rXezNjKrpk91gkl427Z5rcihtNTAv/8qOYwY6 nBqKJQQXunoZLupC6l60EnHjOiZ52EWJtbNifOQRJVrLzRODy/cAU6Xbj MkUhkLLRnxx7xzytRaEPeim6P3LpSAWTbAlN0hKURqKxH0VgVlPOOB4Cx GOk7Ng0b2bJW2/Ch/DGOja9eOKqjicDJR8K//XWeiveoE0mhGVe0fg3Ik Nh9xrdKtbRZ/yk3aVuKVZOP9PkkXXGwAZvTPCPBNyDdhcvjr0zLCo7aSI A==; X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="382174448" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="382174448" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2024 03:15:06 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="1027391580" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="1027391580" Received: from amlin-018-114.igk.intel.com ([10.102.18.114]) by fmsmga006.fm.intel.com with ESMTP; 04 Jan 2024 03:15:04 -0800 From: Arkadiusz Kubalewski To: netdev@vger.kernel.org Cc: vadim.fedorenko@linux.dev, jiri@resnulli.us, michal.michalik@intel.com, milena.olech@intel.com, pabeni@redhat.com, kuba@kernel.org, Arkadiusz Kubalewski , Jan Glaza Subject: [PATCH net v2 3/4] dpll: fix register pin with unregistered parent pin Date: Thu, 4 Jan 2024 12:11:31 +0100 Message-Id: <20240104111132.42730-4-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> References: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org In case of multiple kernel module instances using the same dpll device: if only one registers dpll device, then only that one can register directly connected pins with a dpll device. When unregistered parent is responsible for determining if the muxed pin can be registered with it or not, the drivers need to be loaded in serialized order to work correctly - first the driver instance which registers the direct pins needs to be loaded, then the other instances could register muxed type pins. Allow registration of a pin with a parent even if the parent was not yet registered, thus allow ability for unserialized driver instance load order. Do not WARN_ON notification for unregistered pin, which can be invoked for described case, instead just return error. Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") Reviewed-by: Jan Glaza Signed-off-by: Arkadiusz Kubalewski --- drivers/dpll/dpll_core.c | 4 ---- drivers/dpll/dpll_netlink.c | 2 +- 2 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c index 0b469096ef79..c8a2129f5699 100644 --- a/drivers/dpll/dpll_core.c +++ b/drivers/dpll/dpll_core.c @@ -28,8 +28,6 @@ static u32 dpll_xa_id; WARN_ON_ONCE(!xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) #define ASSERT_DPLL_NOT_REGISTERED(d) \ WARN_ON_ONCE(xa_get_mark(&dpll_device_xa, (d)->id, DPLL_REGISTERED)) -#define ASSERT_PIN_REGISTERED(p) \ - WARN_ON_ONCE(!xa_get_mark(&dpll_pin_xa, (p)->id, DPLL_REGISTERED)) struct dpll_device_registration { struct list_head list; @@ -664,8 +662,6 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin, WARN_ON(!ops->state_on_pin_get) || WARN_ON(!ops->direction_get)) return -EINVAL; - if (ASSERT_PIN_REGISTERED(parent)) - return -EINVAL; mutex_lock(&dpll_lock); ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv); diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index 3ce9995013f1..f266db8da2f0 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -553,7 +553,7 @@ dpll_pin_event_send(enum dpll_cmd event, struct dpll_pin *pin) int ret = -ENOMEM; void *hdr; - if (WARN_ON(!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED))) + if (!xa_get_mark(&dpll_pin_xa, pin->id, DPLL_REGISTERED)) return -ENODEV; msg = genlmsg_new(NLMSG_GOODSIZE, GFP_KERNEL); From patchwork Thu Jan 4 11:11:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kubalewski, Arkadiusz" X-Patchwork-Id: 13511020 X-Patchwork-Delegate: kuba@kernel.org Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 020D9210F3 for ; Thu, 4 Jan 2024 11:15:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BuKRQccN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1704366908; x=1735902908; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=01oIGEc6Ohy6Rpabg8fxapMCJ78or9cM1DwlMsM2U/g=; b=BuKRQccNk7etufrmfkdjFLUVbE7EYUzo4obRSmptJ17xdUu+Y1qmvecc wDfB6RJ21a9AlD+/xTaVIdjoc5j14rqBinkgHpPLOd3FSqNgOg6++xaTc PSQYc/85AbRUW6NFMlBtRB7yD61nSK+9tTi3Rk5f2vkPlL9ZzOP8D1JXI wz2tLcejp7OLQRz6nThvBuXrsYSl0y2LuUFCnM8TLje/5TmP6MkT4fTWP q9izbhvUhEX6zN2ddQtiktVzyufFUbT0jN5xr+7fRlhyKrerQOczNDV1c XMucM3NxnzmePt9n+L3oXBPXc7othkMvoPiOZVvWY0s6jrOVBqgu7vWDm w==; X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="382174463" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="382174463" Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jan 2024 03:15:08 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10942"; a="1027391611" X-IronPort-AV: E=Sophos;i="6.04,330,1695711600"; d="scan'208";a="1027391611" Received: from amlin-018-114.igk.intel.com ([10.102.18.114]) by fmsmga006.fm.intel.com with ESMTP; 04 Jan 2024 03:15:06 -0800 From: Arkadiusz Kubalewski To: netdev@vger.kernel.org Cc: vadim.fedorenko@linux.dev, jiri@resnulli.us, michal.michalik@intel.com, milena.olech@intel.com, pabeni@redhat.com, kuba@kernel.org, Arkadiusz Kubalewski , Jan Glaza Subject: [PATCH net v2 4/4] dpll: hide "zombie" pins for userspace Date: Thu, 4 Jan 2024 12:11:32 +0100 Message-Id: <20240104111132.42730-5-arkadiusz.kubalewski@intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> References: <20240104111132.42730-1-arkadiusz.kubalewski@intel.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org If parent pin was unregistered but child pin was not, the userspace would see the "zombie" pins - the ones that were registered with parent pin (pins_pin_on_pin_register(..)). Technically those are not available - as there is no dpll device in the system. Do not dump those pins and prevent userspace from any interaction with them. Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") Fixes: 9d71b54b65b1 ("dpll: netlink: Add DPLL framework base functions") Reviewed-by: Jan Glaza Signed-off-by: Arkadiusz Kubalewski --- drivers/dpll/dpll_netlink.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c index f266db8da2f0..495dfc43c0be 100644 --- a/drivers/dpll/dpll_netlink.c +++ b/drivers/dpll/dpll_netlink.c @@ -949,6 +949,19 @@ dpll_pin_parent_pin_set(struct dpll_pin *pin, struct nlattr *parent_nest, return 0; } +static bool dpll_pin_parents_registered(struct dpll_pin *pin) +{ + struct dpll_pin_ref *par_ref; + struct dpll_pin *p; + unsigned long i, j; + + xa_for_each(&pin->parent_refs, i, par_ref) + xa_for_each_marked(&dpll_pin_xa, j, p, DPLL_REGISTERED) + if (par_ref->pin == p) + return true; + return false; +} + static int dpll_pin_set_from_nlattr(struct dpll_pin *pin, struct genl_info *info) { @@ -1153,6 +1166,9 @@ int dpll_nl_pin_get_dumpit(struct sk_buff *skb, struct netlink_callback *cb) xa_for_each_marked_start(&dpll_pin_xa, i, pin, DPLL_REGISTERED, ctx->idx) { + if (!xa_empty(&pin->parent_refs) && + !dpll_pin_parents_registered(pin)) + continue; hdr = genlmsg_put(skb, NETLINK_CB(cb->skb).portid, cb->nlh->nlmsg_seq, &dpll_nl_family, NLM_F_MULTI, @@ -1179,6 +1195,10 @@ int dpll_nl_pin_set_doit(struct sk_buff *skb, struct genl_info *info) { struct dpll_pin *pin = info->user_ptr[0]; + if (!xa_empty(&pin->parent_refs) && + !dpll_pin_parents_registered(pin)) + return -ENODEV; + return dpll_pin_set_from_nlattr(pin, info); }