From patchwork Fri Jan 5 10:24:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511925 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5415AC47079 for ; Fri, 5 Jan 2024 10:26:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNX-0007jt-AF; Fri, 05 Jan 2024 05:24:39 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNW-0007jf-Bd for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:38 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNU-0004LB-E1 for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:38 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-40e3a67ca9fso1001525e9.0 for ; Fri, 05 Jan 2024 02:24:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450274; x=1705055074; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=nlBWcwz5/uNxxE5HcedXNLhE+jIf4Z06u/LEi3FC4kY=; b=MDnZ7LPN69/JZ0RjsoeWnYhJ+V7aKyM9rEylTlzKY0mlZDCfkgB3Atgwxgkb/L0Abz jodBydUNJ9Tdf/zTeI/o04LHQZAUapjwVaCmdQaK0Ac7E77fLE+5NJi5eHoy55rxCQr0 uMIpTcnFIjNZIk4t5m8SPQB6UVaNA5tQi0p9u/AMnJpF1peI9mDInT5ysVqwsnc2jn9C L4MFYMpjjGvNN5qGIFescUFj0QE85qvZNmv7LVOIAanUNSwVGPXEeymIXoUwIYXjNYoP w+KKwKjhjThfsQ23yrhp48n2F1L4KJ25gbNkX0GJG40m4YKVLzjfJ2svB+HwfZX71SZL Pliw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450274; x=1705055074; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=nlBWcwz5/uNxxE5HcedXNLhE+jIf4Z06u/LEi3FC4kY=; b=kEB5nRb/yZ94fcZq6ht46UwYTmXzkf6cbScHvHVK+ZPuMLtGs10b3h0mWXFKdHVGd2 FxLtDezW9kMYA2mnvyPsz5XJwy45h+MMPxbJPusKivy63vo9OhHy8VOJ8mj/KYHKWGJ/ wbsEvsRC8FCxcCLpi/jiq5reFhl60bYnuTMhW3pc1ThdbUbPlduePCznEPkh5K23Efi8 wisXJcqbOoV5GPR3cmotEe7rvwA/EWQz4K1KVaDKUJ2H3n51sbU2waqS+ab0lrTxUEKT Tutl2xe1IxCTi4C/ykrfr/fpNdL6Sr71W3jTQmxV9n3/YjEZbCBczYsG25szzVWKc5++ Ym/w== X-Gm-Message-State: AOJu0Yxm0nXI78EsAn5enCzsnEs38m16cEYMdZjP2bGjUHceamoxr1ll An3xfmbxaNih73CL0xi+XjPDkOf7hl9vrYl9cpKB4U3UTQ== X-Google-Smtp-Source: AGHT+IHWgvZpdCYamCYi4o1gV2DKLOQ5EKDs0Jod9PjPfuZlHo2zae5cWfkQgUQTAw4B+6W+Hgy8VQ== X-Received: by 2002:a05:600c:600a:b0:40e:39bc:816d with SMTP id az10-20020a05600c600a00b0040e39bc816dmr209349wmb.152.1704450274537; Fri, 05 Jan 2024 02:24:34 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:34 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 1/9] sparc/grlib: split out the headers for each peripherals Date: Fri, 5 Jan 2024 11:24:13 +0100 Message-Id: <20240105102421.163554-2-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=chigot@adacore.com; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org ... and move them in their right hardware directory. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé --- hw/char/grlib_apbuart.c | 4 +-- hw/intc/grlib_irqmp.c | 4 +-- hw/sparc/leon3.c | 6 ++-- hw/timer/grlib_gptimer.c | 4 +-- include/hw/char/grlib_uart.h | 30 +++++++++++++++++++ .../hw/{sparc/grlib.h => intc/grlib_irqmp.h} | 14 +++------ include/hw/timer/grlib_gptimer.h | 30 +++++++++++++++++++ 7 files changed, 74 insertions(+), 18 deletions(-) create mode 100644 include/hw/char/grlib_uart.h rename include/hw/{sparc/grlib.h => intc/grlib_irqmp.h} (86%) create mode 100644 include/hw/timer/grlib_gptimer.h diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c index 82ff40a530..2c9ab70b85 100644 --- a/hw/char/grlib_apbuart.c +++ b/hw/char/grlib_apbuart.c @@ -1,7 +1,7 @@ /* * QEMU GRLIB APB UART Emulator * - * Copyright (c) 2010-2019 AdaCore + * Copyright (c) 2010-2024 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -26,7 +26,7 @@ #include "hw/irq.h" #include "hw/qdev-properties.h" #include "hw/qdev-properties-system.h" -#include "hw/sparc/grlib.h" +#include "hw/char/grlib_uart.h" #include "hw/sysbus.h" #include "qemu/module.h" #include "chardev/char-fe.h" diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 3bfe2544b7..c994d5dacc 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -3,7 +3,7 @@ * * (Multiprocessor and extended interrupt not supported) * - * Copyright (c) 2010-2019 AdaCore + * Copyright (c) 2010-2024 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -29,7 +29,7 @@ #include "hw/sysbus.h" #include "hw/qdev-properties.h" -#include "hw/sparc/grlib.h" +#include "hw/intc/grlib_irqmp.h" #include "trace.h" #include "qapi/error.h" diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 1e39d2e2d0..58784c099a 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -1,7 +1,7 @@ /* * QEMU Leon3 System Emulator * - * Copyright (c) 2010-2019 AdaCore + * Copyright (c) 2010-2024 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -40,7 +40,9 @@ #include "elf.h" #include "trace.h" -#include "hw/sparc/grlib.h" +#include "hw/timer/grlib_gptimer.h" +#include "hw/char/grlib_uart.h" +#include "hw/intc/grlib_irqmp.h" #include "hw/misc/grlib_ahb_apb_pnp.h" /* Default system clock. */ diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c index 5c4923c1e0..5c2cddcec3 100644 --- a/hw/timer/grlib_gptimer.c +++ b/hw/timer/grlib_gptimer.c @@ -1,7 +1,7 @@ /* * QEMU GRLIB GPTimer Emulator * - * Copyright (c) 2010-2019 AdaCore + * Copyright (c) 2010-2024 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -23,7 +23,7 @@ */ #include "qemu/osdep.h" -#include "hw/sparc/grlib.h" +#include "hw/timer/grlib_gptimer.h" #include "hw/sysbus.h" #include "qemu/timer.h" #include "hw/irq.h" diff --git a/include/hw/char/grlib_uart.h b/include/hw/char/grlib_uart.h new file mode 100644 index 0000000000..b67da6c62a --- /dev/null +++ b/include/hw/char/grlib_uart.h @@ -0,0 +1,30 @@ +/* + * QEMU GRLIB UART + * + * Copyright (c) 2024 AdaCore + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef GRLIB_UART_H +#define GRLIB_UART_H + +#define TYPE_GRLIB_APB_UART "grlib-apbuart" + +#endif diff --git a/include/hw/sparc/grlib.h b/include/hw/intc/grlib_irqmp.h similarity index 86% rename from include/hw/sparc/grlib.h rename to include/hw/intc/grlib_irqmp.h index ef1946c7f8..b9cc584168 100644 --- a/include/hw/sparc/grlib.h +++ b/include/hw/intc/grlib_irqmp.h @@ -1,7 +1,7 @@ /* * QEMU GRLIB Components * - * Copyright (c) 2010-2019 AdaCore + * Copyright (c) 2010-2024 AdaCore * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -22,8 +22,8 @@ * THE SOFTWARE. */ -#ifndef GRLIB_H -#define GRLIB_H +#ifndef GRLIB_IRQMP_H +#define GRLIB_IRQMP_H #include "hw/sysbus.h" @@ -36,10 +36,4 @@ void grlib_irqmp_ack(DeviceState *dev, int intno); -/* GPTimer */ -#define TYPE_GRLIB_GPTIMER "grlib-gptimer" - -/* APB UART */ -#define TYPE_GRLIB_APB_UART "grlib-apbuart" - -#endif /* GRLIB_H */ +#endif /* GRLIB_IRQMP_H */ diff --git a/include/hw/timer/grlib_gptimer.h b/include/hw/timer/grlib_gptimer.h new file mode 100644 index 0000000000..81b1ff0511 --- /dev/null +++ b/include/hw/timer/grlib_gptimer.h @@ -0,0 +1,30 @@ +/* + * QEMU GRLIB GPTimer + * + * Copyright (c) 2024 AdaCore + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef GRLIB_GPTIMER_H +#define GRLIB_GPTIMER_H + +#define TYPE_GRLIB_GPTIMER "grlib-gptimer" + +#endif From patchwork Fri Jan 5 10:24:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511922 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 51FA9C3DA6E for ; Fri, 5 Jan 2024 10:26:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNb-0007kS-03; Fri, 05 Jan 2024 05:24:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNZ-0007k9-96 for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:41 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNW-0004LL-NG for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:41 -0500 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-40d87df95ddso12480805e9.0 for ; Fri, 05 Jan 2024 02:24:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450276; x=1705055076; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QPZTQwMMmpeM+k/XenFcBsNQhX/GrfhY4n6lvzqKbec=; b=Nxwtko4SMku5TNUYxcs+pRTUrefGjVMGBW+zMtEYjhEfEncEUfvTnBGK4In3OQ9e+k +b4v1Wl/3u2kkT1XCm+faS6mZ2c5Is5j2FJjgo+WguAIFoRDjYQ0rZezVUPuyAzkyOtD bPZzm5egSP9SnEbrAnYs75BhgcIiZ/QcbD5UrtfcNjFwFU2vc+wkGYkCu6BjbRpNsMfD A9nRaQRPKhBqP213PmTxY9Ap45/riwbH/qdHkAxk0cQxxjoCTv/W87OPYySnjUYpZd6N z2jykEIMfcMpBGBNwCMNwxdIuRBaUeAB5RQ5vA5fktUcULplFJW6mCXoZTHPj27qEcC5 mgRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450276; x=1705055076; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QPZTQwMMmpeM+k/XenFcBsNQhX/GrfhY4n6lvzqKbec=; b=CVc+QHHkZ9afRu5xdUOCOLcR97CPkXOR1fNRpmLnpFrsL4glcKds+TqJdG/PgrYIt0 lfHIKoCbHEuQHIEAMUKnD9+eNQ2NEZ9iQUsVFdxR7IdwIb9ZlLWWMolYl0ovZ87Fd8Fs U7anPuS+eJhaXsay8uofi4wGnnLAAieOqhpVFgI3+pcmGgURfBRPt29yeSntwJ9XDmCR 3dJ2olxKbJnbKD0PWt0OPOfr8SCrrYR69e/uaGZHc1LaYCPAuLI+b+KVshihiJEA9uK2 YvaY1hHd23oLRQoPOgmJwCJRFQ9VlT9Bvxm/cT82jkiNsIs4x0SDR4eMR+7QZESrzmUc bi6g== X-Gm-Message-State: AOJu0YwwEp1ngJlzpJ3sjdCS3qBP8KJjqwXZx2e+zaZJqQzEVApDpo9v 98BcKYXowh4N4m1cuaqiDAZlAS7cH3YX9hDSqM2lT1AQYQ== X-Google-Smtp-Source: AGHT+IGEzZL43NJOVKH+2aW7p92HZORm9rDDxuvE+KyiSNpMBl4OvVwP+IujTRxTD5l0dm0+JWUfyg== X-Received: by 2002:a05:600c:3b20:b0:40d:88ef:dc07 with SMTP id m32-20020a05600c3b2000b0040d88efdc07mr513860wms.81.1704450276682; Fri, 05 Jan 2024 02:24:36 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:36 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 2/9] intc/grlib_irqmp: add ncpus property Date: Fri, 5 Jan 2024 11:24:14 +0100 Message-Id: <20240105102421.163554-3-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=chigot@adacore.com; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This adds a "ncpus" property to the "grlib-irqmp" device to be used later, this required a little refactoring of how we initialize the device (ie: use realize instead of init). Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé --- hw/intc/grlib_irqmp.c | 30 +++++++++++++++++++++--------- hw/sparc/leon3.c | 2 +- 2 files changed, 22 insertions(+), 10 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index c994d5dacc..2bacc0ff56 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -1,7 +1,7 @@ /* * QEMU GRLIB IRQMP Emulator * - * (Multiprocessor and extended interrupt not supported) + * (Extended interrupt not supported) * * Copyright (c) 2010-2024 AdaCore * @@ -61,6 +61,7 @@ struct IRQMP { MemoryRegion iomem; + unsigned int ncpus; IRQMPState *state; qemu_irq irq; }; @@ -324,33 +325,44 @@ static void grlib_irqmp_reset(DeviceState *d) irqmp->state->parent = irqmp; } -static void grlib_irqmp_init(Object *obj) +static void grlib_irqmp_realize(DeviceState *dev, Error **errp) { - IRQMP *irqmp = GRLIB_IRQMP(obj); - SysBusDevice *dev = SYS_BUS_DEVICE(obj); + IRQMP *irqmp = GRLIB_IRQMP(dev); - qdev_init_gpio_in(DEVICE(obj), grlib_irqmp_set_irq, MAX_PILS); - qdev_init_gpio_out_named(DEVICE(obj), &irqmp->irq, "grlib-irq", 1); - memory_region_init_io(&irqmp->iomem, obj, &grlib_irqmp_ops, irqmp, + if ((!irqmp->ncpus) || (irqmp->ncpus > IRQMP_MAX_CPU)) { + error_setg(errp, "Invalid ncpus properties: " + "%u, must be 0 < ncpus =< %u.", irqmp->ncpus, + IRQMP_MAX_CPU); + } + + qdev_init_gpio_in(dev, grlib_irqmp_set_irq, MAX_PILS); + qdev_init_gpio_out_named(dev, &irqmp->irq, "grlib-irq", 1); + memory_region_init_io(&irqmp->iomem, OBJECT(dev), &grlib_irqmp_ops, irqmp, "irqmp", IRQMP_REG_SIZE); irqmp->state = g_malloc0(sizeof *irqmp->state); - sysbus_init_mmio(dev, &irqmp->iomem); + sysbus_init_mmio(SYS_BUS_DEVICE(dev), &irqmp->iomem); } +static Property grlib_irqmp_properties[] = { + DEFINE_PROP_UINT32("ncpus", IRQMP, ncpus, 1), + DEFINE_PROP_END_OF_LIST(), +}; + static void grlib_irqmp_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); + dc->realize = grlib_irqmp_realize; dc->reset = grlib_irqmp_reset; + device_class_set_props(dc, grlib_irqmp_properties); } static const TypeInfo grlib_irqmp_info = { .name = TYPE_GRLIB_IRQMP, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(IRQMP), - .instance_init = grlib_irqmp_init, .class_init = grlib_irqmp_class_init, }; diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 58784c099a..7b9809b81f 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -263,11 +263,11 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ irqmpdev = qdev_new(TYPE_GRLIB_IRQMP); + sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, env, "pil", 1); qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0, qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET); env->irq_manager = irqmpdev; env->qemu_irq_ack = leon3_irq_manager; From patchwork Fri Jan 5 10:24:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511923 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1CEF9C47079 for ; Fri, 5 Jan 2024 10:26:00 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNb-0007kx-JX; Fri, 05 Jan 2024 05:24:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNZ-0007kG-IA for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:41 -0500 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNX-0004LY-Vb for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:41 -0500 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-40d60c49ee7so14411245e9.0 for ; Fri, 05 Jan 2024 02:24:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450278; x=1705055078; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9Z1mHvdUHHHRFLRSfDR4ab/pkYOdLcf18m6kktBpYUo=; b=UZ3Zhg0ZP92wbt5LdIwlMaOQPOpwpLrt/S6bqGUVTzPLc6jB1rGbXxrDDDKCH0JenR kRlAlZqG25BP51JddA8q5kvIeEsQesHQB3uL9Du15YOfaD8ziw4gxCVg5+NFzQW10tg/ j7RcoAiSIbg9leuDyNmBv1t0gICyGY1l9q/WIqK+VYR/IM9+hyxQNMobLJj8bdSd2ecv Y2flW7Au5RTMP1fT/OJ7n4G76tOaOxgQ1oVXHJayIGATMf0WCB4KXE5qwqsMXp57p1ft mnm/9z7Z+h0XxnMj7f8D8XXCT9zqrSoZvgDGkjAPb4pZZR3Fn8UzbR2XTxqN2pxsqw7T kM3g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450278; x=1705055078; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9Z1mHvdUHHHRFLRSfDR4ab/pkYOdLcf18m6kktBpYUo=; b=hBUM/sfS4LYrKTRQzzh0dain+ygMXrXM5hCMQo4zuAF0Wv6l6dBwBTxctuy6H7pI8u fbHZwvaKNoQ3oTJ/f+2LBJHdLtNGWKdMeSog55irYOgBHbKwx0HMHGedAhxKRTqjkEtH sdZIV3CbmuwikiIEuBE8t9Dj3FBPOn7L6abYYBhgX3+RzSiI57aph3GqDmN6Vmy353ej O+J7QPviFVfWE5ZvY8HrSCRYQpeNtbiJoq9hTdlGYTWw4tl3LlJkdn6bRlovzUnmkvfl 8qO2FuP6rMY91liH9YG0uS9IX290qso70XTBQt8OSWN83rd7zrAt9b8wreb1jzI5S2S1 3zyg== X-Gm-Message-State: AOJu0YwVdzNe/si8SgI/xQ+KVEo5m6lbUUnWNhf/B4oC0Jm5n44bONUG nCJQGy7eExnDyh7s8qqtJjp5E2KfO/ZeS1VhWM+IMd9zZA== X-Google-Smtp-Source: AGHT+IGxE6NmQr3liJqKP6vE0idxPeWQBeUxYrGoeD0PASG4YfPmZKSZ360cVZYIIpm4wwkbHPxKdQ== X-Received: by 2002:a05:600c:3b87:b0:40d:39cb:6af6 with SMTP id n7-20020a05600c3b8700b0040d39cb6af6mr1159688wms.28.1704450278417; Fri, 05 Jan 2024 02:24:38 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:37 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 3/9] intc/grlib_irqmp: implements the multiprocessor status register Date: Fri, 5 Jan 2024 11:24:15 +0100 Message-Id: <20240105102421.163554-4-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=chigot@adacore.com; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This implements the multiprocessor status register in grlib-irqmp and bind it to a start signal, which will be later wired in leon3-generic to start a cpu. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot --- hw/intc/grlib_irqmp.c | 22 +++++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index 2bacc0ff56..be0e840181 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -63,6 +63,7 @@ struct IRQMP { unsigned int ncpus; IRQMPState *state; + qemu_irq start_signal[IRQMP_MAX_CPU]; qemu_irq irq; }; @@ -70,6 +71,7 @@ struct IRQMPState { uint32_t level; uint32_t pending; uint32_t clear; + uint32_t mpstatus; uint32_t broadcast; uint32_t mask[IRQMP_MAX_CPU]; @@ -180,10 +182,12 @@ static uint64_t grlib_irqmp_read(void *opaque, hwaddr addr, return state->force[0]; case CLEAR_OFFSET: - case MP_STATUS_OFFSET: /* Always read as 0 */ return 0; + case MP_STATUS_OFFSET: + return state->mpstatus; + case BROADCAST_OFFSET: return state->broadcast; @@ -222,8 +226,9 @@ static uint64_t grlib_irqmp_read(void *opaque, hwaddr addr, static void grlib_irqmp_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { - IRQMP *irqmp = opaque; + IRQMP *irqmp = opaque; IRQMPState *state; + int i; assert(irqmp != NULL); state = irqmp->state; @@ -256,7 +261,13 @@ static void grlib_irqmp_write(void *opaque, hwaddr addr, return; case MP_STATUS_OFFSET: - /* Read Only (no SMP support) */ + value &= 0xffff; + for (i = 0; i < irqmp->ncpus; i++) { + if ((value >> i) & 1) { + qemu_set_irq(irqmp->start_signal[i], 1); + state->mpstatus &= ~(1 << i); + } + } return; case BROADCAST_OFFSET: @@ -323,6 +334,8 @@ static void grlib_irqmp_reset(DeviceState *d) memset(irqmp->state, 0, sizeof *irqmp->state); irqmp->state->parent = irqmp; + irqmp->state->mpstatus = ((irqmp->ncpus - 1) << 28) + | ((1 << irqmp->ncpus) - 2); } static void grlib_irqmp_realize(DeviceState *dev, Error **errp) @@ -336,6 +349,9 @@ static void grlib_irqmp_realize(DeviceState *dev, Error **errp) } qdev_init_gpio_in(dev, grlib_irqmp_set_irq, MAX_PILS); + /* Transitionning from 0 to 1 starts the CPUs. */ + qdev_init_gpio_out_named(dev, irqmp->start_signal, "grlib-start-cpu", + IRQMP_MAX_CPU); qdev_init_gpio_out_named(dev, &irqmp->irq, "grlib-irq", 1); memory_region_init_io(&irqmp->iomem, OBJECT(dev), &grlib_irqmp_ops, irqmp, "irqmp", IRQMP_REG_SIZE); From patchwork Fri Jan 5 10:24:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511924 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2863BC3DA6E for ; Fri, 5 Jan 2024 10:26:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNd-0007lT-CG; Fri, 05 Jan 2024 05:24:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNb-0007l3-MQ for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:43 -0500 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNZ-0004Le-U3 for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:43 -0500 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-40d76fefd6bso12383195e9.2 for ; Fri, 05 Jan 2024 02:24:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450280; x=1705055080; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=REnTJhdFUEh9ogw8XoBpqYK4Nd8U+IE3k2q6fPhQ764=; b=HQ1Bklr4kB/Oke94GsQXZz6i5zCxuainb+0bGSb58kypbKgUTGyKdEkiiTHKmdL+h/ UKhDYSXXzc7PV8E6Ei5K5srNYoSVDv8l8isCVd5WBC4oOp8JZN3HthBuHIsbxiROVhH5 Eaa4MVThuJMkLPu59nK+XcuHKDqzNo6PcjhSXuaZ+A5YPwX4ug6+Z1it5aytvlXi0KJW QYxQ9jszBP20/mBA25L3AV7L97FIA0vDHjt4NYVzRiHS6dgNNe9k9jvwpP4wUFbgXx0s JwIVxUOrSl/ZfYKeGuWaGQPUeBRGinNEuaIsLurMRkCH11W0EubQhv7oAzN/XTuSoCry 1Jyw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450280; x=1705055080; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=REnTJhdFUEh9ogw8XoBpqYK4Nd8U+IE3k2q6fPhQ764=; b=SBDEvqcRuuNF94cQQlarHF8lxJ6Fkk6KUS/kCVeHI5kEJCFTFyhONk0TgzyhdXrvRM nrg1c1sF0MmFfxTyhbHo9LNKLL13DEky5Had372iTvbdWTNDBXKF1E0ySpXazhp5vApo 0CYtNgcLyIOxxsdfP7D9fd0L0gjL9dkHNyIUiftgFc8WQCmq0AnrEq1iM5ueR9dy4KJW Swo+jmc7ZJYu2zEjAs+O0tgf4GfYz/LeSX96DPptsbUprp2ZodJz9stadB10wfvBAH6C Qsq2mhFhqZICVvRcZ/WJGe6y6z8ezn+ut/PWt1re8OCapdXcjza1KWBSyhpVSVa0/XRJ 1UdA== X-Gm-Message-State: AOJu0YyXtjJNX7KZRUD10O5szIWsWRlODbKdccAWf/YfkwA5f0TF2Cv3 eeh9ZLnixlH9g44LdDcqrfrq4vBaxAiKtIudFCcRictHpA== X-Google-Smtp-Source: AGHT+IHYP3ho2Cg6MLPsSfS4EMsRRvnifsAnWQn8QIcxvrJnjTbG6dlWNrJtU/v83TVHJHMhXAdf7Q== X-Received: by 2002:a05:600c:3b90:b0:40e:34d3:8ef5 with SMTP id n16-20020a05600c3b9000b0040e34d38ef5mr507203wms.147.1704450279958; Fri, 05 Jan 2024 02:24:39 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:39 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 4/9] intc/grlib_irqmp: implements multicore irq Date: Fri, 5 Jan 2024 11:24:16 +0100 Message-Id: <20240105102421.163554-5-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32b; envelope-from=chigot@adacore.com; helo=mail-wm1-x32b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Now there is an ncpus property, use it in order to deliver the IRQ to multiple CPU. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot --- hw/intc/grlib_irqmp.c | 43 ++++++++++++++++++----------------- hw/sparc/leon3.c | 3 ++- include/hw/intc/grlib_irqmp.h | 2 +- 3 files changed, 25 insertions(+), 23 deletions(-) diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c index be0e840181..4df0293064 100644 --- a/hw/intc/grlib_irqmp.c +++ b/hw/intc/grlib_irqmp.c @@ -64,7 +64,7 @@ struct IRQMP { unsigned int ncpus; IRQMPState *state; qemu_irq start_signal[IRQMP_MAX_CPU]; - qemu_irq irq; + qemu_irq irq[IRQMP_MAX_CPU]; }; struct IRQMPState { @@ -83,37 +83,37 @@ struct IRQMPState { static void grlib_irqmp_check_irqs(IRQMPState *state) { - uint32_t pend = 0; - uint32_t level0 = 0; - uint32_t level1 = 0; + uint32_t pend = 0; + uint32_t level0 = 0; + uint32_t level1 = 0; + int i; assert(state != NULL); assert(state->parent != NULL); - /* IRQ for CPU 0 (no SMP support) */ - pend = (state->pending | state->force[0]) - & state->mask[0]; - - level0 = pend & ~state->level; - level1 = pend & state->level; + for (i = 0; i < state->parent->ncpus; i++) { + pend = (state->pending | state->force[i]) & state->mask[i]; + level0 = pend & ~state->level; + level1 = pend & state->level; - trace_grlib_irqmp_check_irqs(state->pending, state->force[0], - state->mask[0], level1, level0); + trace_grlib_irqmp_check_irqs(state->pending, state->force[i], + state->mask[i], level1, level0); - /* Trigger level1 interrupt first and level0 if there is no level1 */ - qemu_set_irq(state->parent->irq, level1 ?: level0); + /* Trigger level1 interrupt first and level0 if there is no level1 */ + qemu_set_irq(state->parent->irq[i], level1 ?: level0); + } } -static void grlib_irqmp_ack_mask(IRQMPState *state, uint32_t mask) +static void grlib_irqmp_ack_mask(IRQMPState *state, int cpu, uint32_t mask) { /* Clear registers */ state->pending &= ~mask; - state->force[0] &= ~mask; /* Only CPU 0 (No SMP support) */ + state->force[cpu] &= ~mask; grlib_irqmp_check_irqs(state); } -void grlib_irqmp_ack(DeviceState *dev, int intno) +void grlib_irqmp_ack(DeviceState *dev, int cpu, int intno) { IRQMP *irqmp = GRLIB_IRQMP(dev); IRQMPState *state; @@ -127,7 +127,7 @@ void grlib_irqmp_ack(DeviceState *dev, int intno) trace_grlib_irqmp_ack(intno); - grlib_irqmp_ack_mask(state, mask); + grlib_irqmp_ack_mask(state, cpu, mask); } static void grlib_irqmp_set_irq(void *opaque, int irq, int level) @@ -153,7 +153,6 @@ static void grlib_irqmp_set_irq(void *opaque, int irq, int level) s->pending |= 1 << irq; } grlib_irqmp_check_irqs(s); - } } @@ -257,7 +256,9 @@ static void grlib_irqmp_write(void *opaque, hwaddr addr, case CLEAR_OFFSET: value &= ~1; /* clean up the value */ - grlib_irqmp_ack_mask(state, value); + for (i = 0; i < irqmp->ncpus; i++) { + grlib_irqmp_ack_mask(state, i, value); + } return; case MP_STATUS_OFFSET: @@ -352,7 +353,7 @@ static void grlib_irqmp_realize(DeviceState *dev, Error **errp) /* Transitionning from 0 to 1 starts the CPUs. */ qdev_init_gpio_out_named(dev, irqmp->start_signal, "grlib-start-cpu", IRQMP_MAX_CPU); - qdev_init_gpio_out_named(dev, &irqmp->irq, "grlib-irq", 1); + qdev_init_gpio_out_named(dev, irqmp->irq, "grlib-irq", irqmp->ncpus); memory_region_init_io(&irqmp->iomem, OBJECT(dev), &grlib_irqmp_ops, irqmp, "irqmp", IRQMP_REG_SIZE); diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 7b9809b81f..94d8ec94b0 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -168,7 +168,8 @@ static void leon3_cache_control_int(CPUSPARCState *env) static void leon3_irq_ack(void *irq_manager, int intno) { - grlib_irqmp_ack((DeviceState *)irq_manager, intno); + /* No SMP support yet. */ + grlib_irqmp_ack((DeviceState *)irq_manager, 0, intno); } /* diff --git a/include/hw/intc/grlib_irqmp.h b/include/hw/intc/grlib_irqmp.h index b9cc584168..776a2508e1 100644 --- a/include/hw/intc/grlib_irqmp.h +++ b/include/hw/intc/grlib_irqmp.h @@ -34,6 +34,6 @@ /* IRQMP */ #define TYPE_GRLIB_IRQMP "grlib-irqmp" -void grlib_irqmp_ack(DeviceState *dev, int intno); +void grlib_irqmp_ack(DeviceState *dev, int cpu, int intno); #endif /* GRLIB_IRQMP_H */ From patchwork Fri Jan 5 10:24:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511927 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 022D5C47258 for ; Fri, 5 Jan 2024 10:26:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNe-0007ld-BA; Fri, 05 Jan 2024 05:24:46 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNd-0007lI-8j for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:45 -0500 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNb-0004Lw-LF for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:45 -0500 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-40d894764e7so14739245e9.1 for ; Fri, 05 Jan 2024 02:24:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450281; x=1705055081; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BUJ6l0OkyKg584UzrfGAsqs56Rbvr/1CMcQmKL/iGrw=; b=DRVZfQ4snrT8pzOduqa4/68XX7AQCEVkDtWlNTsFibq6O0VL47vSBErDJpGadnol6R BLTEEHcd4w9aTY6pd3ozRzshqIbgRDfTcy1nZzNA9CLEmtMCywXREtDMdxcY4iyd3kso dHwUm1VoaAjUT/nat/k2h8JPJwnJQPPzoSF8Yn5nJDjbAaVEB/qQ5LXRH/hUtsQoMMYb s7RdxBCi7X4xZU0YrzgpzrRbj0Uu7OzvDmFVYN/Pia1Bo6xwBuhH/RZ+jRi0H4tCZZOf LyAyCuHPZu9POBP5KcpVisAI3tIZXOXogEh0JBzPiZ2Jq1FAMZzCY6/3ZuaexMNOleFv WGbw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450281; x=1705055081; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BUJ6l0OkyKg584UzrfGAsqs56Rbvr/1CMcQmKL/iGrw=; b=dybQQrm/1bXpbmzP8qas7KVjrZYmyXQ+Ytm0aps1dGit8+r3+h8L63XutDpcuA+LwY uu6HsipxCeBMiJIqE6OtJ8zD4rXgYBZivzYz0pScB4fRSMHZyuwlD4fjhcS67JhFcB2v jRsOdb/3Qt54xj5g2kbrp/8JBT/D8tdZ204s4EjQupq71Kji/1UUh7vz91f69HFTKauA PhPrhiRr1f30f6e2oMAbhpwqcUZaZFulyTxvkx1qY66kfCJWajVacuEba/0UauLLzALH VGwVNoMoREeqSphSX9Xh41I4tPT1DGrwHkQRv3pF3hCdrcIXY5w8YHYHVr+5YynBt7Mr 4D+g== X-Gm-Message-State: AOJu0Ywd4UxOOeAaS8VJoj/YGxyMK4pDHvt8i60GjsujYjvODVGxvylL c/R2VGoxmL1gnCRMjn4Zt9elYGkNt7YZNLVoYsH0s1XZyQ== X-Google-Smtp-Source: AGHT+IE/hVblsS/6QiS0GUM5yeRUP4aspV3fLTmaYo+CfWYszB+mQbh+rc3oVI6vWZJsau1FejRbXA== X-Received: by 2002:a05:600c:2d8c:b0:40c:4b4e:95a6 with SMTP id i12-20020a05600c2d8c00b0040c4b4e95a6mr653703wmg.94.1704450281563; Fri, 05 Jan 2024 02:24:41 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:40 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 5/9] target/sparc: implement asr17 feature for smp Date: Fri, 5 Jan 2024 11:24:17 +0100 Message-Id: <20240105102421.163554-6-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=chigot@adacore.com; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This allows the guest program to know its cpu id. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Richard Henderson --- target/sparc/helper.c | 16 ++++++++++++++++ target/sparc/helper.h | 1 + target/sparc/translate.c | 13 +++---------- 3 files changed, 20 insertions(+), 10 deletions(-) diff --git a/target/sparc/helper.c b/target/sparc/helper.c index bd10b60e4b..2247e243b5 100644 --- a/target/sparc/helper.c +++ b/target/sparc/helper.c @@ -212,4 +212,20 @@ void helper_power_down(CPUSPARCState *env) env->npc = env->pc + 4; cpu_loop_exit(cs); } + +target_ulong helper_rdasr17(CPUSPARCState *env) +{ + CPUState *cs = env_cpu(env); + target_ulong val; + + /* + * TODO: There are many more fields to be filled, + * some of which are writable. + */ + val = env->def.nwindows - 1; /* [4:0] NWIN */ + val |= 1 << 8; /* [8] V8 */ + val |= (cs->cpu_index) << 28; /* [31:28] INDEX */ + + return val; +} #endif diff --git a/target/sparc/helper.h b/target/sparc/helper.h index 55eff66283..fc818b8678 100644 --- a/target/sparc/helper.h +++ b/target/sparc/helper.h @@ -2,6 +2,7 @@ DEF_HELPER_1(rett, void, env) DEF_HELPER_2(wrpsr, void, env, tl) DEF_HELPER_1(rdpsr, tl, env) +DEF_HELPER_1(rdasr17, tl, env) DEF_HELPER_1(power_down, void, env) #else DEF_HELPER_FLAGS_2(wrpil, TCG_CALL_NO_RWG, void, env, tl) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index 9387299559..1cabda9565 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -37,6 +37,7 @@ #ifdef TARGET_SPARC64 # define gen_helper_rdpsr(D, E) qemu_build_not_reached() +# define gen_helper_rdasr17(D, E) qemu_build_not_reached() # define gen_helper_rett(E) qemu_build_not_reached() # define gen_helper_power_down(E) qemu_build_not_reached() # define gen_helper_wrpsr(E, S) qemu_build_not_reached() @@ -2681,16 +2682,8 @@ static bool trans_RDY(DisasContext *dc, arg_RDY *a) static TCGv do_rd_leon3_config(DisasContext *dc, TCGv dst) { - uint32_t val; - - /* - * TODO: There are many more fields to be filled, - * some of which are writable. - */ - val = dc->def->nwindows - 1; /* [4:0] NWIN */ - val |= 1 << 8; /* [8] V8 */ - - return tcg_constant_tl(val); + gen_helper_rdasr17(dst, tcg_env); + return dst; } TRANS(RDASR17, ASR17, do_rd_special, true, a->rd, do_rd_leon3_config) From patchwork Fri Jan 5 10:24:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511921 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26BEEC4707B for ; Fri, 5 Jan 2024 10:25:53 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNg-0007me-TV; Fri, 05 Jan 2024 05:24:49 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNf-0007lu-Gu for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:47 -0500 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNd-0004M6-Ut for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:47 -0500 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-40d894764e7so14739445e9.1 for ; Fri, 05 Jan 2024 02:24:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450283; x=1705055083; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=u4O3zLDFQ6ZlP/1FwL4rg4zmPOXbZNJoyi4V6XF7xMA=; b=PXtIzZHxueOGIPZcUTGNJNfMyx6AXtXTvxouyBp0zzVj93IDoWY3QdZqkO4Afxkj/S ShDxpCiZGxf13/QtXe7VSBQvK3QV17J79WlDREuoyc+m2aHcQE8S9dfxAtWnpZBfLv0U wE03fLZvdtRohgZ1rKxwu6g4oaY8lEY4LPH2/le/kORcjsoWicNrkHiEvVnMQf9iJ9dX XL+dW5LZEUz3ADEX9IQPVTpaI7tfLER1UA5mrg7VQN9Lf8ZOwikEyUgxUtu4wn23/ZEe DhMJ0j8FJtONUS0iHO6W22uQe5AzYuH8tVM5VFoktbqjQ3eYPj9Yn0lthq9WhkXCXYCl +frw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450283; x=1705055083; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u4O3zLDFQ6ZlP/1FwL4rg4zmPOXbZNJoyi4V6XF7xMA=; b=b0J+9p7s3qlWFBPSCBQLVbL/f2b3v3gXrrvvm1dA74pdQQ9WedQoKAEh3x0rYLjWlW BafhcjpcX2gAZ9zy/Ns9vFmYF/qaMgVj681pAf/oh/jp0vN21uJgJUEXNRBAlbgWUKF1 xTD1CBgnjUzNZH9ZsjdPAp+QqdUKwMi5sr3V4RNU3nFhzMPN/nkt1XZJVa+uaHzW5lEB 2KYgL/MI5faZSLb1eQF8e786BHoOMh+NELMhAilgInFqtfh1cvKSuJLBoib+pP+PfI0b ldCyPKD7EuQEsscOxphxM6N4jFtqrqKC/0ofbmhuNl0wrDllaYsj56iodkchoiz4uAWW C35w== X-Gm-Message-State: AOJu0YzoGVgEr7JQYJ2J3zfW+gnzeI7WiJ/Z7F5yVEFpwfG85eZPjGE4 1kKpjEbnoZ/KPaDqesWgMglBa2MINX+AifqcGOgmjwc/sQ== X-Google-Smtp-Source: AGHT+IGdOVGRypPWbYhgGZUcXklD8OVeRUYGfUYOWFHPBuwnoFFSY6IPjF9DMAHiC6CkHg1FZTPN2g== X-Received: by 2002:a05:600c:1552:b0:40e:34ed:2a35 with SMTP id f18-20020a05600c155200b0040e34ed2a35mr668539wmg.119.1704450283065; Fri, 05 Jan 2024 02:24:43 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:42 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 6/9] target/sparc: simplify qemu_irq_ack Date: Fri, 5 Jan 2024 11:24:18 +0100 Message-Id: <20240105102421.163554-7-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=chigot@adacore.com; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This is a simple cleanup, since env is passed to qemu_irq_ack it can be accessed from inside qemu_irq_ack. Just drop this parameter. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot Reviewed-by: Philippe Mathieu-Daudé --- hw/sparc/leon3.c | 8 ++++---- target/sparc/cpu.h | 2 +- target/sparc/int32_helper.c | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 94d8ec94b0..6019fc4c2d 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -166,10 +166,10 @@ static void leon3_cache_control_int(CPUSPARCState *env) } } -static void leon3_irq_ack(void *irq_manager, int intno) +static void leon3_irq_ack(CPUSPARCState *env, int intno) { /* No SMP support yet. */ - grlib_irqmp_ack((DeviceState *)irq_manager, 0, intno); + grlib_irqmp_ack(env->irq_manager, 0, intno); } /* @@ -211,9 +211,9 @@ static void leon3_set_pil_in(void *opaque, int n, int level) } } -static void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno) +static void leon3_irq_manager(CPUSPARCState *env, int intno) { - leon3_irq_ack(irq_manager, intno); + leon3_irq_ack(env, intno); leon3_cache_control_int(env); } diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 6999a10a40..12a11ecb26 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -549,7 +549,7 @@ struct CPUArchState { sparc_def_t def; void *irq_manager; - void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno); + void (*qemu_irq_ack)(CPUSPARCState *env, int intno); /* Leon3 cache control */ uint32_t cache_control; diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index 1563613582..8f4e08ed09 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -160,7 +160,7 @@ void sparc_cpu_do_interrupt(CPUState *cs) #if !defined(CONFIG_USER_ONLY) /* IRQ acknowledgment */ if ((intno & ~15) == TT_EXTINT && env->qemu_irq_ack != NULL) { - env->qemu_irq_ack(env, env->irq_manager, intno); + env->qemu_irq_ack(env, intno); } #endif } From patchwork Fri Jan 5 10:24:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511926 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6FBAEC4707B for ; Fri, 5 Jan 2024 10:26:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNi-0007mx-BI; Fri, 05 Jan 2024 05:24:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNg-0007m8-JS for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:48 -0500 Received: from mail-wm1-x32f.google.com ([2a00:1450:4864:20::32f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNe-0004MK-A6 for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:48 -0500 Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-40d2e56f3a6so2220295e9.1 for ; Fri, 05 Jan 2024 02:24:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450284; x=1705055084; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3kjoVNEQWPmPx6yVfKaTZBwWjHQDINWXYhqFXPqbyKs=; b=KT1xOqSHtelGnKyZ/54NdAgwUhIVc2ABFRF7+inlhKNtJg8VTQe8ADF7uXkebHugFI j+cUk5SY8HrWEdWk5eS5tXUNIlVT/OjiQoUKvqeWAeu2Wp5EVBU6BlnDl18WZpoYer+2 ibjtl+Bwv8Ykrtn9tg1fTEv9vqP2de8OYXhfcV6cZtYK6+xETqZd25gGjlw/9EwEyNaQ ZYTnT1SRD056/iqf9SmhXUmpFJp2GCOTZC3MPw2GdUp7zRy4QzfMtTfnHfVlVTF/3ZOx GnqFDQrvRj48sLVhtNloNJX2TmjT8OrVVrrFif/Lg19+KhMGUIx9EMqI4TQhdQFZyJyj 86RQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450284; x=1705055084; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3kjoVNEQWPmPx6yVfKaTZBwWjHQDINWXYhqFXPqbyKs=; b=iDSoC3PnzlKV6dVa0d7jQDc3YN9U347NEcDM0HAAHvlqnOPA54YMog5z3DOlNGSS6k 5gRPkcx9QxhIX/n8hALbKmUi03mmyrOtLE581TsseC2bd/4Nyi/TFZ9dDvoqc4GQHGeU dCjyqNuAESAeoYtAspRfaDdzkky/48sliOy6JWGoh6cqQQ8TsKCoAm714lmLtptRr/BF BttJqPCRA7N/EKrR2EMLDFjBg9146hN3IyZj++cTZjrnLvHZ+n08trFN8iRz8zWr/Ew0 ZN1WaiofBqNUwCl0hlcYCOnTCdCFn+NZGzecKXSqml8N/HHqeuzA8Yx5sicJgcoS7RVE 28gQ== X-Gm-Message-State: AOJu0Yy9jApsrKhytmQ9QSZADHfDtWtppew6wyEChpSrQmGAK7mz0Oxi sXsPEr6XRx8rjWpZ87Wyy/u0jvuSBrJ851SMOUOqJvloPA== X-Google-Smtp-Source: AGHT+IHInj+NmU0oW11MkMdA5E7GPt3s4o5kIin0Y3oMEyyIEbrKgG8O98DORqLVLgOqo6/PGpr/Dg== X-Received: by 2002:a05:600c:181c:b0:40d:9236:cd9e with SMTP id n28-20020a05600c181c00b0040d9236cd9emr1095593wmp.35.1704450284438; Fri, 05 Jan 2024 02:24:44 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:43 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 7/9] leon3: implement multiprocessor Date: Fri, 5 Jan 2024 11:24:19 +0100 Message-Id: <20240105102421.163554-8-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=chigot@adacore.com; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org This allows to register more than one CPU on the leon3_generic machine. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot --- hw/sparc/leon3.c | 106 +++++++++++++++++++++++++++++++++-------------- 1 file changed, 74 insertions(+), 32 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 6019fc4c2d..38fb8d9af1 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -52,6 +52,8 @@ #define LEON3_PROM_OFFSET (0x00000000) #define LEON3_RAM_OFFSET (0x40000000) +#define MAX_CPUS 4 + #define LEON3_UART_OFFSET (0x80000100) #define LEON3_UART_IRQ (3) @@ -65,9 +67,12 @@ #define LEON3_AHB_PNP_OFFSET (0xFFFFF000) typedef struct ResetData { - SPARCCPU *cpu; - uint32_t entry; /* save kernel entry in case of reset */ - target_ulong sp; /* initial stack pointer */ + struct CPUResetData { + int id; + SPARCCPU *cpu; + target_ulong sp; /* initial stack pointer */ + } info[MAX_CPUS]; + uint32_t entry; /* save kernel entry in case of reset */ } ResetData; static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) @@ -123,18 +128,19 @@ static void write_bootloader(CPUSPARCState *env, uint8_t *base, stl_p(p++, 0x01000000); /* nop */ } -static void main_cpu_reset(void *opaque) +static void leon3_cpu_reset(void *opaque) { - ResetData *s = (ResetData *)opaque; - CPUState *cpu = CPU(s->cpu); - CPUSPARCState *env = &s->cpu->env; + struct CPUResetData *info = (struct CPUResetData *) opaque; + int id = info->id; + ResetData *s = (ResetData *)DO_UPCAST(ResetData, info[id], info); + CPUState *cpu = CPU(s->info[id].cpu); + CPUSPARCState *env = cpu_env(cpu); cpu_reset(cpu); - - cpu->halted = 0; - env->pc = s->entry; - env->npc = s->entry + 4; - env->regbase[6] = s->sp; + cpu->halted = cpu->cpu_index != 0; + env->pc = s->entry; + env->npc = s->entry + 4; + env->regbase[6] = s->info[id].sp; } static void leon3_cache_control_int(CPUSPARCState *env) @@ -168,8 +174,8 @@ static void leon3_cache_control_int(CPUSPARCState *env) static void leon3_irq_ack(CPUSPARCState *env, int intno) { - /* No SMP support yet. */ - grlib_irqmp_ack(env->irq_manager, 0, intno); + CPUState *cpu = CPU(env_cpu(env)); + grlib_irqmp_ack(env->irq_manager, cpu->cpu_index, intno); } /* @@ -211,6 +217,20 @@ static void leon3_set_pil_in(void *opaque, int n, int level) } } +static void leon3_start_cpu_async_work(CPUState *cpu, run_on_cpu_data data) +{ + cpu->halted = 0; +} + +static void leon3_start_cpu(void *opaque, int n, int level) +{ + CPUState *cs = CPU(opaque); + + if (level) { + async_run_on_cpu(cs, leon3_start_cpu_async_work, RUN_ON_CPU_NULL); + } +} + static void leon3_irq_manager(CPUSPARCState *env, int intno) { leon3_irq_ack(env, intno); @@ -236,17 +256,21 @@ static void leon3_generic_hw_init(MachineState *machine) AHBPnp *ahb_pnp; APBPnp *apb_pnp; - /* Init CPU */ - cpu = SPARC_CPU(cpu_create(machine->cpu_type)); - env = &cpu->env; + reset_info = g_malloc0(sizeof(ResetData)); - cpu_sparc_set_id(env, 0); + for (i = 0; i < machine->smp.cpus; i++) { + /* Init CPU */ + cpu = SPARC_CPU(cpu_create(machine->cpu_type)); + env = &cpu->env; - /* Reset data */ - reset_info = g_new0(ResetData, 1); - reset_info->cpu = cpu; - reset_info->sp = LEON3_RAM_OFFSET + ram_size; - qemu_register_reset(main_cpu_reset, reset_info); + cpu_sparc_set_id(env, i); + + /* Reset data */ + reset_info->info[i].id = i; + reset_info->info[i].cpu = cpu; + reset_info->info[i].sp = LEON3_RAM_OFFSET + ram_size; + qemu_register_reset(leon3_cpu_reset, &reset_info->info[i]); + } ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP)); sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal); @@ -264,14 +288,28 @@ static void leon3_generic_hw_init(MachineState *machine) /* Allocate IRQ manager */ irqmpdev = qdev_new(TYPE_GRLIB_IRQMP); + object_property_set_int(OBJECT(irqmpdev), "ncpus", machine->smp.cpus, + &error_fatal); sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal); - qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, - env, "pil", 1); - qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0, - qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0)); + + for (i = 0; i < machine->smp.cpus; i++) { + cpu = reset_info->info[i].cpu; + env = &cpu->env; + qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_start_cpu, + cpu, "start_cpu", 1); + qdev_connect_gpio_out_named(irqmpdev, "grlib-start-cpu", i, + qdev_get_gpio_in_named(DEVICE(cpu), + "start_cpu", 0)); + qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in, + env, "pil", 1); + qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", i, + qdev_get_gpio_in_named(DEVICE(cpu), + "pil", 0)); + env->irq_manager = irqmpdev; + env->qemu_irq_ack = leon3_irq_manager; + } + sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET); - env->irq_manager = irqmpdev; - env->qemu_irq_ack = leon3_irq_manager; grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF, GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV, 2, 0, GRLIB_APBIO_AREA); @@ -345,10 +383,13 @@ static void leon3_generic_hw_init(MachineState *machine) uint8_t *bootloader_entry; bootloader_entry = memory_region_get_ram_ptr(prom); - write_bootloader(env, bootloader_entry, entry); - env->pc = LEON3_PROM_OFFSET; - env->npc = LEON3_PROM_OFFSET + 4; + write_bootloader(&reset_info->info[0].cpu->env, bootloader_entry, + entry); reset_info->entry = LEON3_PROM_OFFSET; + for (i = 0; i < machine->smp.cpus; i++) { + reset_info->info[i].cpu->env.pc = LEON3_PROM_OFFSET; + reset_info->info[i].cpu->env.npc = LEON3_PROM_OFFSET + 4; + } } } @@ -387,6 +428,7 @@ static void leon3_generic_machine_init(MachineClass *mc) mc->init = leon3_generic_hw_init; mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3"); mc->default_ram_id = "leon3.ram"; + mc->max_cpus = MAX_CPUS; } DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init) From patchwork Fri Jan 5 10:24:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511920 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D66D4C3DA6E for ; Fri, 5 Jan 2024 10:25:26 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNj-0007nV-N5; Fri, 05 Jan 2024 05:24:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNh-0007mk-DA for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:49 -0500 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNf-0004Mb-Mx for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:49 -0500 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-337520892f7so215634f8f.0 for ; Fri, 05 Jan 2024 02:24:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450285; x=1705055085; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=cyhXeq5O9PIrBjHu1IQT114KkUm0/yE3+A0a8VWqx9o=; b=JktbmNP6RiAAVB4mFSE4yymfmknCy/qR954cl51YAfl37n0GK4MgKdRr+11qeEGdPA 0FCwmpgV3czTJRJA+VPpfzZZS+j7A0ekfejyo8U3A7/GxMf07KNUkLalczO6CvRdrl3N Z8R5m63LXnt8NSAHYlx1L10gNZQDEY2ltuHb3B0IQ6h8Q0p3vdp7z5pqdvQk/f6ulwAM 8hwq5h0V7rKhL1FZTNfmmSEkIiHKiFVLC8EUt8cM5ni07NNxCTPDSu4hV0N3UUJrPmCe I6Dj0PGq7tY5eBjEydEsG7VSUrO86bRCeVfXDL/xmuQZASt7NnHoo5rLwjzdpYoXuIPL ny6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450285; x=1705055085; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=cyhXeq5O9PIrBjHu1IQT114KkUm0/yE3+A0a8VWqx9o=; b=PJ7xHWaSu7SY36NIf+DXQqMQSutJa7vkKuuuYZRCVIX/67utW8G3Uv39t2BPrgQDg8 ez+gZCCEQBNOp+SLUOK0qI4XaSyB/05wMIEnhd9di0bCg44i77buXNl4ZBBU3/Vk8TrE xLP/8otug2cTSKLQkA31fj65cWu3zGs3kAe5sjxtyv1tYDMyo6fbxmyvxak4uc0BSBrE B4FkQ1mGxFBOyaMpaRMSgkWLu6Bfs7WWtG+pqMZ6xbBzWXbfDD/aRmuhGtRiSfkcdf1R A9N7idLlsqIjj3ejZCpmwWBeHdBtCq9hXUGk5WSUZsaXkD7+aPS5N8+26em+EtJGZgld YPNA== X-Gm-Message-State: AOJu0YxEAKKSgZ+DHoNiFz++OgxLx6GGFmrQMuLXt4Pg/nEdwz4EB2gT G3mgrFSaWqPatB6hKQpDbcN8XwKxncHo6xJq013+mZU0tA== X-Google-Smtp-Source: AGHT+IFZfSonu2LWihWEAXG4WxVUqYFrV1VR3yx1FtqVmEbEODNAaqTeJWgSfQmZFeu6R6i8/3Rprg== X-Received: by 2002:a05:600c:1c10:b0:40d:81d3:8d21 with SMTP id j16-20020a05600c1c1000b0040d81d38d21mr1118152wms.124.1704450285624; Fri, 05 Jan 2024 02:24:45 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:45 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Frederic Konrad Subject: [PATCH 8/9] leon3: check cpu_id in the tiny bootloader Date: Fri, 5 Jan 2024 11:24:20 +0100 Message-Id: <20240105102421.163554-9-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=chigot@adacore.com; helo=mail-wr1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Now that SMP is possible, the asr17 must be checked in the little boot code or the secondary CPU will reinitialize the Timer and the Uart. Co-developed-by: Frederic Konrad Signed-off-by: Clément Chigot --- hw/sparc/leon3.c | 22 ++++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index 38fb8d9af1..7498eaa827 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -98,13 +98,27 @@ static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val) /* * When loading a kernel in RAM the machine is expected to be in a different - * state (eg: initialized by the bootloader). This little code reproduces - * this behavior. + * state (eg: initialized by the bootloader). This little code reproduces + * this behavior. Also this code can be executed by the secondary cpus as + * well since it looks at the %asr17 register before doing any + * initialization, it allows to use the same reset address for all the + * cpus. */ static void write_bootloader(CPUSPARCState *env, uint8_t *base, hwaddr kernel_addr) { uint32_t *p = (uint32_t *) base; + uint32_t *sec_cpu_branch_p = NULL; + + /* If we are running on a secondary CPU, jump directly to the kernel. */ + + stl_p(p++, 0x85444000); /* rd %asr17, %g2 */ + stl_p(p++, 0x8530a01c); /* srl %g2, 0x1c, %g2 */ + stl_p(p++, 0x80908000); /* tst %g2 */ + /* Fill that later. */ + sec_cpu_branch_p = p; + stl_p(p++, 0x0BADC0DE); /* bne xxx */ + stl_p(p++, 0x01000000); /* nop */ /* Initialize the UARTs */ /* *UART_CONTROL = UART_RECEIVE_ENABLE | UART_TRANSMIT_ENABLE; */ @@ -118,6 +132,10 @@ static void write_bootloader(CPUSPARCState *env, uint8_t *base, /* *GPTIMER0_CONFIG = GPTIMER_ENABLE | GPTIMER_RESTART; */ p = gen_store_u32(p, 0x80000318, 3); + /* Now, the relative branch above can be computed. */ + stl_p(sec_cpu_branch_p, 0x12800000 + + (p - sec_cpu_branch_p)); + /* JUMP to the entry point */ stl_p(p++, 0x82100000); /* mov %g0, %g1 */ stl_p(p++, 0x03000000 + extract32(kernel_addr, 10, 22)); From patchwork Fri Jan 5 10:24:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Cl=C3=A9ment_Chigot?= X-Patchwork-Id: 13511918 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EBAC6C4707B for ; Fri, 5 Jan 2024 10:25:17 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rLhNl-0007nw-1J; Fri, 05 Jan 2024 05:24:53 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rLhNj-0007nG-3Y for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:51 -0500 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rLhNh-0004ND-LR for qemu-devel@nongnu.org; Fri, 05 Jan 2024 05:24:50 -0500 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-40d4a7f0c4dso14407035e9.1 for ; Fri, 05 Jan 2024 02:24:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=adacore.com; s=google; t=1704450287; x=1705055087; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ETwtqX8xX2jjy7kY2kGndiyjXuP9S4VMULkepuavFeo=; b=WOtI+5mY+eiTlbGqZ522QHD24P/JsL/X8wO4nH0ArdeiIgiKGMtTFsKx1S2JRDWq+q Ob7kgzgVKYlU7ualxPFKo5n4vfj+lud1wSmTLlhwga9tPrcyxqwYMgMm++SmJAnbbGpS GT1SUHRtONhrP30OfRG65/lOKt7RIadZ5BxYdZQIiQGIwM2e7B40HpA93xAgkT7MYPE6 dELluO3+ZDQAYxPMaIl+dC2uMmwZF98K+pMN5saDfv4MuADfJd0rzJ5heg5RRrdCUrHW caOyCKr8jLajlitHbBnemLwxWr/G7P3rIdbpFrlWwV0RFzcYlJpaDCg/lCkuE00Kh1zr 55TQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704450287; x=1705055087; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ETwtqX8xX2jjy7kY2kGndiyjXuP9S4VMULkepuavFeo=; b=FWpfgoUUBDWBFFlMJwADS9iNl+YT+g2zNgUY0WNUOuEB7nX260vurqCLfAbMMGuk9G G/wyNDKRu0foSaEoD+v8VspuNecW/SOpTl/XseyUDr6abtMR4KXjFzpswmE2TsD4HWxX 09qV+Q3JQolyGLa7VwbOF1QmG/XqCzUkWzgsrqziotFLzwwP7464an30yGawXrg/I1e6 BjBje/umJQxHdnHElDr3/hMkY+MlR4VHOwc6er/T7qs/OnfV6EgTlEcG+OH8yeY4A0GV XE5uy8zSjp3wYKEMsv/8vXVlIZrbbUli518pSogQxqVqO+R5TSlgJkiU9y7m3UDQFhsr EK0w== X-Gm-Message-State: AOJu0Yz3sbKfzCDRDIZMwWYMDn+s5T56YU64x4e5sndZmj/3lXGF3Kzx 5kFce8bz5kb09IWGvK5qtz6bH3lE3saU7wevCknjm6k7eQ== X-Google-Smtp-Source: AGHT+IGzDgN7CMWCWTOmAOjpI3xWG7OPOx4FYUNOntWa/Yu3u6xjC6JPIxzbvkhxVjz8CmeeEzNusg== X-Received: by 2002:a05:600c:331a:b0:40d:5c44:a9d with SMTP id q26-20020a05600c331a00b0040d5c440a9dmr1146481wmp.161.1704450287762; Fri, 05 Jan 2024 02:24:47 -0800 (PST) Received: from chigot-Dell.home ([2a01:cb15:8123:8100:323e:281a:689:2b09]) by smtp.gmail.com with ESMTPSA id v8-20020a05600c444800b0040d934f48d3sm1117548wmn.32.2024.01.05.02.24.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jan 2024 02:24:47 -0800 (PST) From: =?utf-8?q?Cl=C3=A9ment_Chigot?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Cl=C3=A9ment_Chigot?= , Fabien Chouteau Subject: [PATCH 9/9] MAINTAINERS: replace Fabien by myself as Leon3 maintainer Date: Fri, 5 Jan 2024 11:24:21 +0100 Message-Id: <20240105102421.163554-10-chigot@adacore.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240105102421.163554-1-chigot@adacore.com> References: <20240105102421.163554-1-chigot@adacore.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=chigot@adacore.com; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org CC: Fabien Chouteau Signed-off-by: Clément Chigot Reviewed-by: Fabien Chouteau --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 395f26ba86..a065e0b21f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1694,7 +1694,7 @@ F: hw/rtc/sun4v-rtc.c F: include/hw/rtc/sun4v-rtc.h Leon3 -M: Fabien Chouteau +M: Clément Chigot M: Frederic Konrad S: Maintained F: hw/sparc/leon3.c