From patchwork Mon Jan 8 09:36:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13513206 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ej1-f48.google.com (mail-ej1-f48.google.com [209.85.218.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3BEB512B6B; Mon, 8 Jan 2024 09:38:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="b4QCDGLN" Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-a28d25253d2so157379366b.0; Mon, 08 Jan 2024 01:38:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704706723; x=1705311523; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xwtEGBKue4JW01UC/X1KgpKlH7eEcJJtQh1fhUNInlo=; b=b4QCDGLN5I6uxwZePQiraZRHDooLWy1KU/4e2w9gHyPl4F1TlBUCaUOWnhhbsLtv82 de5Bcs/9qJni2oCkFCKRP6JTB0J/cHiKN13ZQk7QHnvKrW6dwBCE1dKe6/aC1zzVJfkB lMATm1T0XSiDRwpU0wkBzbnm6KS28iYHAuINnAXQk2LJG11JZH6BzSrEUSGiQ1SnowZV yN2Holb1rqEkqO+fy+kSXpgiqCYkrStxLL/JT4oh7JXuISmnWSeicrXvOQOQmCZWq12C t3lak7fR50oAf5zeYwXiqCB3gaSHkBWUNGGPKjomCzcxSdmLVVavVLfqYN9aZPdhtiLG Xk1A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704706723; x=1705311523; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=xwtEGBKue4JW01UC/X1KgpKlH7eEcJJtQh1fhUNInlo=; b=UjeQUww3M8RpWNlHW4+5k7fyA01BvkGnBvQlBiX7lF/dzkcRqZ4rIbfeACt6hJP1Ut c477Gg91K3RKQRlYyVKFJKfMr5tl4Rg851+lQ/IxUrLkK7bRbBsCcfb2hSMYUTY5Izmh lTZ1ksRQDozfF46Ozj9DJ+ntFfin/9on7nXALChqE9+ZxGZCDVC/ndZmjrGyAQL6OCMR i7GOHdn97bz33Ph+7GRACtoYWAlvIuixyp3PKsTMTWNj6A4oHcxumA73xzKnKgjFvJun PjwTkfFxKzWqpYFc6dHjpCj0Xb9Njjrp4htLRPk47lYWPKBfUhYgTC4GJYh7ip6xn6pp 0sVQ== X-Gm-Message-State: AOJu0YwZI6KSnGiRc2yBh/Ki18mL1y8PHW7DePX8LpZnlz99vGJ4IJqL eK3SR5ra12PfFbBSIJeWbBM= X-Google-Smtp-Source: AGHT+IEHsKXSWX0z331I/UVixFf2/4cPl7Jjq2WA3i3Okah8CEiq3sPUrugq948yR+m7c2m45o6Ahg== X-Received: by 2002:a17:907:9257:b0:a26:8f35:7130 with SMTP id kb23-20020a170907925700b00a268f357130mr1164052ejb.48.1704706723469; Mon, 08 Jan 2024 01:38:43 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id v12-20020a170906338c00b00a2ae71cee2asm326851eja.177.2024.01.08.01.38.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 01:38:43 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 net-next 1/5] net: phy: Add BaseT1 auto-negotiation constants Date: Mon, 8 Jan 2024 10:36:56 +0100 Message-Id: <20240108093702.13476-2-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240108093702.13476-1-dima.fedrau@gmail.com> References: <20240108093702.13476-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Added constants for advertising 100BT1 and 1000BT1 in register BASE-T1 auto-negotiation advertisement register [31:16] (Register 7.515) Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- include/uapi/linux/mdio.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/uapi/linux/mdio.h b/include/uapi/linux/mdio.h index d03863da180e..020ccc810d23 100644 --- a/include/uapi/linux/mdio.h +++ b/include/uapi/linux/mdio.h @@ -348,6 +348,8 @@ /* BASE-T1 auto-negotiation advertisement register [31:16] */ #define MDIO_AN_T1_ADV_M_B10L 0x4000 /* device is compatible with 10BASE-T1L */ +#define MDIO_AN_T1_ADV_M_1000BT1 0x0080 /* advertise 1000BASE-T1 */ +#define MDIO_AN_T1_ADV_M_100BT1 0x0020 /* advertise 100BASE-T1 */ #define MDIO_AN_T1_ADV_M_MST 0x0010 /* advertise master preference */ /* BASE-T1 auto-negotiation advertisement register [47:32] */ From patchwork Mon Jan 8 09:36:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13513207 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A86A13FF6; Mon, 8 Jan 2024 09:38:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mfcpsLB3" Received: by mail-lf1-f42.google.com with SMTP id 2adb3069b0e04-50eac018059so1809410e87.0; Mon, 08 Jan 2024 01:38:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704706726; x=1705311526; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vXPtrc41fsYsH4qrRymYuoMKNwwt0FQDNNg3m4pWnyE=; b=mfcpsLB34S15dP5D9ja8CG4gkQsAexwrXskq9XKtpftaMp13MZtB5vW2lzIuNkV7nF i/KBj70gSMTdJtLkVChN+WyTeUjBY49pc9d+ErXI8TVHzmP3D375OnydM+o7nYndxibI SNQ/yZK8UNOKszNdK9tlX/600FfaIuAjsPBbZ+3thIHzQwNNt39ObRaSTzqB006qLSUV utkB0QxGTfjBo2uav9lbweDjbX0DMs6ZpuNWC5VyAB27r1Ynn6n6RiQxQucfhu+ENfb4 HwbTlN5v2EqhKUVxkLeDfSwoATSsl2zWv2UUWrDNDjLk7/6mApMY4iHKY0l0LqGzOCVT tEWA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704706726; x=1705311526; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vXPtrc41fsYsH4qrRymYuoMKNwwt0FQDNNg3m4pWnyE=; b=mV3uGi2Y43/Ah4KMx2z6RA0aVTeYiiX31WQe90CzWUzdybFktlntwbKaQ6xFLpLWyC BjHzFpHETL/4U3flnWlhz7iovgzrFFPZI6RYgfyb725WwkETN8jwt8i8hG8mKkQG1fh9 +WNFoRj3vjyqt+KZG4Na/1lZHN/TlHg+FO8nVxca8ioA+J+cJucAE2RlmOuPMbeZ31n2 hK5WFRWMXzAcEv05xjNU35nzrLVXjMpl+NMKunUqwLldFMIo8AiahAnJUj7LWemPrYPC Ff47M6YBUakZxy7jA9h+xrKo5+3426Bf0p7p2LB7fB4GDl2wg9XimTQlQu5nR2HMyRJb yckg== X-Gm-Message-State: AOJu0YzWO/HDo5chZazEayPG0vhppKdlneXCgfm0hY8UQU1i/7WJg/Gk fmNaiDyvEcXQqnJczy1y70ajHfvkc/wj5w== X-Google-Smtp-Source: AGHT+IHC3wPb+Q7obmNmg1TOA4Uld8yrZGtvfJ6ZthdpVYnERVwZAYnBFJrRy2sVw2Gv+Ev2/Srpqg== X-Received: by 2002:a05:6512:2252:b0:50e:bb4d:e502 with SMTP id i18-20020a056512225200b0050ebb4de502mr1791143lfu.122.1704706726408; Mon, 08 Jan 2024 01:38:46 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id v12-20020a170906338c00b00a2ae71cee2asm326851eja.177.2024.01.08.01.38.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 01:38:45 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 net-next 2/5] net: phy: Support 100/1000BT1 linkmode advertisements Date: Mon, 8 Jan 2024 10:36:57 +0100 Message-Id: <20240108093702.13476-3-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240108093702.13476-1-dima.fedrau@gmail.com> References: <20240108093702.13476-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Extend helper functions mii_t1_adv_m_mod_linkmode_t and linkmode_adv_to_mii_t1_adv_m_t to support 100BT1 and 1000BT1 linkmode advertisements. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- include/linux/mdio.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/linux/mdio.h b/include/linux/mdio.h index 79ceee3c8673..ecd21acc7eed 100644 --- a/include/linux/mdio.h +++ b/include/linux/mdio.h @@ -373,6 +373,10 @@ static inline void mii_t1_adv_m_mod_linkmode_t(unsigned long *advertising, u32 l { linkmode_mod_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, advertising, lpa & MDIO_AN_T1_ADV_M_B10L); + linkmode_mod_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, + advertising, lpa & MDIO_AN_T1_ADV_M_100BT1); + linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, + advertising, lpa & MDIO_AN_T1_ADV_M_1000BT1); } /** @@ -409,6 +413,10 @@ static inline u32 linkmode_adv_to_mii_t1_adv_m_t(unsigned long *advertising) if (linkmode_test_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, advertising)) result |= MDIO_AN_T1_ADV_M_B10L; + if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, advertising)) + result |= MDIO_AN_T1_ADV_M_100BT1; + if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, advertising)) + result |= MDIO_AN_T1_ADV_M_1000BT1; return result; } From patchwork Mon Jan 8 09:36:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13513208 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ed1-f47.google.com (mail-ed1-f47.google.com [209.85.208.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 177EC12B98; Mon, 8 Jan 2024 09:38:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NC6seQ8d" Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-55745901085so1909601a12.0; Mon, 08 Jan 2024 01:38:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704706729; x=1705311529; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=twJ7d4uD5NUV+Z7PbyEFQ4ONw+b0/btr7P4BkLMwn+8=; b=NC6seQ8dgtbOi/wNnvVIWWAITKqeSla+3XkR3R3wUesSs815+n7Qp+NKWKBR+u87Ud m7d85KctBgJyK5mZvn0iM/ugq8b/rpQwg30Jf0+u4o0XLbiKPLJZpEIbZfS3lo6lgUqL IgfnD0//Fb/te8oTLxCZ3zhBxPe7AdB86a+uN1bfm7xcqU3ppDYjtWBP9DhY+Z5ZUuCh 1fcdz5NFXLAyAVaZLdq6jYAF1OmMLSVeJs8bVRjC0bpjkLq2aI+5wGXA1odSMwpG3tko P26g1PnffPpAqap6AXi5S2RNdeoxp4nnenx5fk8Uum0DeAyVX+BcFr5btDFmqwNbNI/+ UJ/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704706729; x=1705311529; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=twJ7d4uD5NUV+Z7PbyEFQ4ONw+b0/btr7P4BkLMwn+8=; b=uQyaSfug6nIROA/HrwvZu7wZV4WDcilmrrFlN/HKlD0l9LDDKWUJXPaOEhYvV9D9Gg 1AE3qSndMhD2tIY0ro4oaStaPmST9CGT0Z8mRuOSmBVZ5+yCD8Mvw7DABGPI/K+LwrBe KUbpHVTCkNHuivdNLG9I1oKPLZipn6CGmTTeB9l8/HHWBJDdijobEylLD4pgxZ9Ulb7E 7p77u8OAgrw17ny6oxPFK7tBTlyFF0JTrlwFzk7knPWDVKEsb8o9FOKHtF/cOKZ2LV8d pNFtz1khRBKbx2aiOlovVM32s/M8Rv0t6ma3bqO+DTmEIRP79xYC3KltP4mdx245meiy 13uA== X-Gm-Message-State: AOJu0YwLC+TcvfNdqm4dqHBq1/bVEMEzYS6xVoRstOWbDC9f3gGrDULd IszJqoeQHHMxLRcga1UBQuY= X-Google-Smtp-Source: AGHT+IGty6bxts11L4BflPKbvRLKr8SA0sRUXZWzjcehALNT5ay1IESrxGgUl7Cd9BzleunXta4/5w== X-Received: by 2002:a17:907:c82:b0:a2a:da74:dd38 with SMTP id gi2-20020a1709070c8200b00a2ada74dd38mr266499ejc.117.1704706729257; Mon, 08 Jan 2024 01:38:49 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id v12-20020a170906338c00b00a2ae71cee2asm326851eja.177.2024.01.08.01.38.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 01:38:48 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 net-next 3/5] net: phy: c45: detect 100/1000BASE-T1 linkmode advertisements Date: Mon, 8 Jan 2024 10:36:58 +0100 Message-Id: <20240108093702.13476-4-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240108093702.13476-1-dima.fedrau@gmail.com> References: <20240108093702.13476-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Set 100BT1 and 1000BT1 linkmode advertisement bits to adv_l_mask to enable detection. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/phy-c45.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy-c45.c b/drivers/net/phy/phy-c45.c index 747d14bf152c..de8f5dc8be12 100644 --- a/drivers/net/phy/phy-c45.c +++ b/drivers/net/phy/phy-c45.c @@ -208,7 +208,8 @@ static int genphy_c45_baset1_an_config_aneg(struct phy_device *phydev) adv_l_mask = MDIO_AN_T1_ADV_L_FORCE_MS | MDIO_AN_T1_ADV_L_PAUSE_CAP | MDIO_AN_T1_ADV_L_PAUSE_ASYM; - adv_m_mask = MDIO_AN_T1_ADV_M_MST | MDIO_AN_T1_ADV_M_B10L; + adv_m_mask = MDIO_AN_T1_ADV_M_1000BT1 | MDIO_AN_T1_ADV_M_100BT1 | + MDIO_AN_T1_ADV_M_MST | MDIO_AN_T1_ADV_M_B10L; switch (phydev->master_slave_set) { case MASTER_SLAVE_CFG_MASTER_FORCE: From patchwork Mon Jan 8 09:36:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13513209 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B5E314297; Mon, 8 Jan 2024 09:38:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="NnRVUNpu" Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-5572a9b3420so4399877a12.1; Mon, 08 Jan 2024 01:38:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704706732; x=1705311532; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sBEjqA+Yux9LdtGIMQNFjjykLZZmBxi30+k6T2PulHk=; b=NnRVUNpupbC9ZoraSqBBHy/irg8q7y4R8+3WmmtiHnh/Lc8rkcQln93VYhmQMOpPpE 2GqDfp60QnVD3ew+qB0fYBwixfibMNU1l2SSFztlswjsnhhGreZUycyUWjk/1Zq9/wfF XEpGeejJCRptoTxKOSTBB/IDt6upcDR1sG3lLerwNCRVEhYZad2Zw/A+9rBInq7jDCwE C9XJWEwKRWikEREdVXSYtF4/hltcn0NSE98Y6I3MG1r32ungOEPODdIH4+93usQhV8Dv sv5tc1hko1UkXB4lX62HOvfBXLKflfhDtfODAvUx1jKn4wMiLYHEDoHOs4j4fW2t/7UU N1sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704706732; x=1705311532; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sBEjqA+Yux9LdtGIMQNFjjykLZZmBxi30+k6T2PulHk=; b=PSFk4QATjwsWwsH5Pk0KTjUT1mX4aWGaUN5tejJTZct2iC+H8PcigTzRwUVqagROk6 2jkszFBT/vKrcPCa4Qbxlf0jWeWLYkO7jc9ClYfJvhniKHtiJQPdDZlPQ/mz3crP3DN0 ss7b2gOvEOxWnNZGinDYwzK/fMrIeKL0rwQEkJ/cXh9xwy2gMP67ZOpsFnzF0mb/91hb s6bOHml5CQQxcQeVG5/bAR5+le2nM1mgn6eHpYey/tEVFfmZRko+3RFm9VSRCkwzSH8G 6qG8Ahc+rAa3fDx77UdoGhvlN6UCBU2kDKOqhgpB8Jl394vLwjYR3SUdgTzpR+3nugHA cijw== X-Gm-Message-State: AOJu0YwPMSK/+4iqaQNLv9koFNTmqLUGzx6nu9CS8w8fpk2RHIQIWKLy mCFmJEmejXtmsJI+Kn+U/tY= X-Google-Smtp-Source: AGHT+IF3NjP2L7Lsesort1rSt8AXVSN0R4/0a07M3ql+v7eWqTQHPtLLiPQNr6nU/WxQiBfEEFtskA== X-Received: by 2002:a17:906:1797:b0:a28:bd9c:8363 with SMTP id t23-20020a170906179700b00a28bd9c8363mr3058304eje.57.1704706732133; Mon, 08 Jan 2024 01:38:52 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id v12-20020a170906338c00b00a2ae71cee2asm326851eja.177.2024.01.08.01.38.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 01:38:51 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 net-next 4/5] net: phy: marvell-88q2xxx: fix typos Date: Mon, 8 Jan 2024 10:36:59 +0100 Message-Id: <20240108093702.13476-5-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240108093702.13476-1-dima.fedrau@gmail.com> References: <20240108093702.13476-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Rename mv88q2xxxx_get_sqi to mv88q2xxx_get_sqi and mv88q2xxxx_get_sqi_max to mv88q2xxx_get_sqi_max. Fix linebreaks and use everywhere hexadecimal numbers written with lowercase letters instead of mixing it up. Signed-off-by: Dimitri Fedrau Reviewed-by: Andrew Lunn --- drivers/net/phy/marvell-88q2xxx.c | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index 1c3ff77de56b..dcebb4643aff 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -14,7 +14,7 @@ #define MDIO_MMD_AN_MV_STAT_MS_CONF_FAULT 0x8000 #define MDIO_MMD_PCS_MV_100BT1_STAT1 33032 -#define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00FF +#define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00ff #define MDIO_MMD_PCS_MV_100BT1_STAT1_JABBER 0x0100 #define MDIO_MMD_PCS_MV_100BT1_STAT1_LINK 0x0200 #define MDIO_MMD_PCS_MV_100BT1_STAT1_LOCAL_RX 0x1000 @@ -27,6 +27,8 @@ #define MDIO_MMD_PCS_MV_100BT1_STAT2_LINK 0x0004 #define MDIO_MMD_PCS_MV_100BT1_STAT2_ANGE 0x0008 +#define MDIO_MMD_PCS_MV_RX_STAT 33328 + static int mv88q2xxx_soft_reset(struct phy_device *phydev) { int ret; @@ -63,7 +65,8 @@ static int mv88q2xxx_read_link_gbit(struct phy_device *phydev) * the link was already down. */ if (!phy_polling_mode(phydev) || !phydev->link) { - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_PCS_1000BT1_STAT); if (ret < 0) return ret; else if (ret & MDIO_PCS_1000BT1_STAT_LINK) @@ -71,7 +74,8 @@ static int mv88q2xxx_read_link_gbit(struct phy_device *phydev) } if (!link) { - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_PCS_1000BT1_STAT); if (ret < 0) return ret; else if (ret & MDIO_PCS_1000BT1_STAT_LINK) @@ -95,7 +99,8 @@ static int mv88q2xxx_read_link_100m(struct phy_device *phydev) * we always read the realtime status. */ if (!phy_polling_mode(phydev) || !phydev->link) { - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_100BT1_STAT1); if (ret < 0) return ret; else if (ret & MDIO_MMD_PCS_MV_100BT1_STAT1_LINK) @@ -200,7 +205,7 @@ static int mv88q2xxx_config_init(struct phy_device *phydev) return mv88q2xxx_config_aneg(phydev); } -static int mv88q2xxxx_get_sqi(struct phy_device *phydev) +static int mv88q2xxx_get_sqi(struct phy_device *phydev) { int ret; @@ -208,7 +213,8 @@ static int mv88q2xxxx_get_sqi(struct phy_device *phydev) /* Read the SQI from the vendor specific receiver status * register */ - ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8230); + ret = phy_read_mmd(phydev, MDIO_MMD_PCS, + MDIO_MMD_PCS_MV_RX_STAT); if (ret < 0) return ret; @@ -218,7 +224,7 @@ static int mv88q2xxxx_get_sqi(struct phy_device *phydev) * but can be found in the Software Initialization Guide. Only * revisions >= A0 are supported. */ - ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, 0xFC5D, 0x00FF, 0x00AC); + ret = phy_modify_mmd(phydev, MDIO_MMD_PCS, 0xfc5d, 0xff, 0xac); if (ret < 0) return ret; @@ -227,10 +233,10 @@ static int mv88q2xxxx_get_sqi(struct phy_device *phydev) return ret; } - return ret & 0x0F; + return ret & 0x0f; } -static int mv88q2xxxx_get_sqi_max(struct phy_device *phydev) +static int mv88q2xxx_get_sqi_max(struct phy_device *phydev) { return 15; } @@ -246,8 +252,8 @@ static struct phy_driver mv88q2xxx_driver[] = { .read_status = mv88q2xxx_read_status, .soft_reset = mv88q2xxx_soft_reset, .set_loopback = genphy_c45_loopback, - .get_sqi = mv88q2xxxx_get_sqi, - .get_sqi_max = mv88q2xxxx_get_sqi_max, + .get_sqi = mv88q2xxx_get_sqi, + .get_sqi_max = mv88q2xxx_get_sqi_max, }, }; From patchwork Mon Jan 8 09:37:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dimitri Fedrau X-Patchwork-Id: 13513210 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-ed1-f44.google.com (mail-ed1-f44.google.com [209.85.208.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8104125A6; Mon, 8 Jan 2024 09:38:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Z3nYco1P" Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-55770379ed4so1346973a12.3; Mon, 08 Jan 2024 01:38:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1704706735; x=1705311535; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=f922AAAvTUPPGAMjuD/HGIUip6YX4Zxif4jpCQOF54Q=; b=Z3nYco1PB8wrEretwoNbX5rl//Q5CNMuJqNYHNYyVKccZTq7DiCcfLcjL37pRmtHFg gsPsFmWUmzxMtYo/O+ej7Xsgjev8mPxt7p/P25CxriWgW2J+mwdRDbTGW5GVZZmONga5 1XkD4j2haXVc8J8bxcMArVC2Na369noZpacCqZEgQYp36qEkxw0B/rfKqMnTg8RUvXui yi3pQE3c09t8jSb3vrmna6XniVhqDYmfMfsMwYBQPmcKoavhA+jYUbcea3WTeQUa/3Dz LWUQtv6AL8VUW+jS1TmLtFcCY6JqzxNmHILeqSSt/ki9/Zn0AaXN3kS2+Cms5hPFUlIu GgkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1704706735; x=1705311535; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=f922AAAvTUPPGAMjuD/HGIUip6YX4Zxif4jpCQOF54Q=; b=eYa/6mMRWjwBKFEYz5IkoRLAKATUPmMlXvl/lpPWkDVWkmKyTU+XazNkHi/GVJ1OqU kxzUXISymfGFkZr7djDj6G/FUQ+NotvyA/VkX9sXRzhtBk5TeZAORtfBYVR7kWCusm14 ny1OPttTnuolxteHazV0jBqX0K5FeXRich1NCLd4bSi0hM+KSnI2Cmvl1bccgj3WMNQh JbTxxU554OTYNaBJJHLC4VIv+hgpgIQEQCV5FHjGKKTfyXM5d54Es+qKkw6MhXMVDx2K NJ3Q6QxDxJesvki4Yng0Dz1C+2u2l5ukwtpxI2LNW/e7KY4bf2ERNK3MDlM0PPnQD0r8 1kjQ== X-Gm-Message-State: AOJu0Yyzuz8vFXctWTWYXP76WIIx5mVCfoSBIm8T0m4RIi1owvPPAtoq rzKwlMU7uOCG+yQ42kRSAnSmBFIhB90+EQ== X-Google-Smtp-Source: AGHT+IH2J5bvyAlahRK3WFWSh7+fk+vNfS5rTlvUTI+eJr2X8J7ADz3qdASb7PiB6YGRPg2y62Yfyw== X-Received: by 2002:a17:906:2685:b0:a28:b92e:c22a with SMTP id t5-20020a170906268500b00a28b92ec22amr1602842ejc.22.1704706735142; Mon, 08 Jan 2024 01:38:55 -0800 (PST) Received: from debian.fritz.box ([93.184.186.109]) by smtp.gmail.com with ESMTPSA id v12-20020a170906338c00b00a2ae71cee2asm326851eja.177.2024.01.08.01.38.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Jan 2024 01:38:54 -0800 (PST) From: Dimitri Fedrau To: Cc: Dimitri Fedrau , Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Stefan Eichenberger , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 net-next 5/5] net: phy: marvell-88q2xxx: add driver for the Marvell 88Q2220 PHY Date: Mon, 8 Jan 2024 10:37:00 +0100 Message-Id: <20240108093702.13476-6-dima.fedrau@gmail.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240108093702.13476-1-dima.fedrau@gmail.com> References: <20240108093702.13476-1-dima.fedrau@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Add a driver for the Marvell 88Q2220. This driver allows to detect the link, switch between 100BASE-T1 and 1000BASE-T1 and switch between master and slave mode. Autonegoation is supported. Signed-off-by: Dimitri Fedrau --- drivers/net/phy/marvell-88q2xxx.c | 206 +++++++++++++++++++++++++++++- include/linux/marvell_phy.h | 1 + 2 files changed, 201 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/marvell-88q2xxx.c b/drivers/net/phy/marvell-88q2xxx.c index dcebb4643aff..8a0dae82ab2d 100644 --- a/drivers/net/phy/marvell-88q2xxx.c +++ b/drivers/net/phy/marvell-88q2xxx.c @@ -6,6 +6,8 @@ #include #include +#define PHY_ID_88Q2220_REVB0 (MARVELL_PHY_ID_88Q2220 | 0x1) + #define MDIO_MMD_AN_MV_STAT 32769 #define MDIO_MMD_AN_MV_STAT_ANEG 0x0100 #define MDIO_MMD_AN_MV_STAT_LOCAL_RX 0x1000 @@ -13,6 +15,11 @@ #define MDIO_MMD_AN_MV_STAT_LOCAL_MASTER 0x4000 #define MDIO_MMD_AN_MV_STAT_MS_CONF_FAULT 0x8000 +#define MDIO_MMD_AN_MV_STAT2 32794 +#define MDIO_MMD_AN_MV_STAT2_AN_RESOLVED 0x0800 +#define MDIO_MMD_AN_MV_STAT2_100BT1 0x2000 +#define MDIO_MMD_AN_MV_STAT2_1000BT1 0x4000 + #define MDIO_MMD_PCS_MV_100BT1_STAT1 33032 #define MDIO_MMD_PCS_MV_100BT1_STAT1_IDLE_ERROR 0x00ff #define MDIO_MMD_PCS_MV_100BT1_STAT1_JABBER 0x0100 @@ -29,6 +36,42 @@ #define MDIO_MMD_PCS_MV_RX_STAT 33328 +struct mmd_val { + int devad; + u32 regnum; + u16 val; +}; + +const struct mmd_val mv88q222x_revb0_init_seq0[] = { + { MDIO_MMD_PCS, 0x8033, 0x6801 }, + { MDIO_MMD_AN, MDIO_AN_T1_CTRL, 0x0 }, + { MDIO_MMD_PMAPMD, MDIO_CTRL1, + MDIO_CTRL1_LPOWER | MDIO_PMA_CTRL1_SPEED1000 }, + { MDIO_MMD_PCS, 0xfe1b, 0x48 }, + { MDIO_MMD_PCS, 0xffe4, 0x6b6 }, + { MDIO_MMD_PMAPMD, MDIO_CTRL1, 0x0 }, + { MDIO_MMD_PCS, MDIO_CTRL1, 0x0 }, +}; + +const struct mmd_val mv88q222x_revb0_init_seq1[] = { + { MDIO_MMD_PCS, 0xfe79, 0x0 }, + { MDIO_MMD_PCS, 0xfe07, 0x125a }, + { MDIO_MMD_PCS, 0xfe09, 0x1288 }, + { MDIO_MMD_PCS, 0xfe08, 0x2588 }, + { MDIO_MMD_PCS, 0xfe11, 0x1105 }, + { MDIO_MMD_PCS, 0xfe72, 0x042c }, + { MDIO_MMD_PCS, 0xfbba, 0xcb2 }, + { MDIO_MMD_PCS, 0xfbbb, 0xc4a }, + { MDIO_MMD_AN, 0x8032, 0x2020 }, + { MDIO_MMD_AN, 0x8031, 0xa28 }, + { MDIO_MMD_AN, 0x8031, 0xc28 }, + { MDIO_MMD_PCS, 0xffdb, 0xfc10 }, + { MDIO_MMD_PCS, 0xfe1b, 0x58 }, + { MDIO_MMD_PCS, 0xfe79, 0x4 }, + { MDIO_MMD_PCS, 0xfe5f, 0xe8 }, + { MDIO_MMD_PCS, 0xfe05, 0x755c }, +}; + static int mv88q2xxx_soft_reset(struct phy_device *phydev) { int ret; @@ -125,24 +168,90 @@ static int mv88q2xxx_read_link_100m(struct phy_device *phydev) static int mv88q2xxx_read_link(struct phy_device *phydev) { - int ret; - /* The 88Q2XXX PHYs do not have the PMA/PMD status register available, * therefore we need to read the link status from the vendor specific * registers depending on the speed. */ + if (phydev->speed == SPEED_1000) - ret = mv88q2xxx_read_link_gbit(phydev); + return mv88q2xxx_read_link_gbit(phydev); + else if (phydev->speed == SPEED_100) + return mv88q2xxx_read_link_100m(phydev); + + phydev->link = false; + return 0; +} + +static int mv88q2xxx_read_master_slave_state(struct phy_device *phydev) +{ + int ret; + + phydev->master_slave_state = MASTER_SLAVE_STATE_UNKNOWN; + ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT); + if (ret < 0) + return ret; + + if (ret & MDIO_MMD_AN_MV_STAT_LOCAL_MASTER) + phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER; else - ret = mv88q2xxx_read_link_100m(phydev); + phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE; - return ret; + return 0; +} + +static int mv88q2xxx_read_aneg_speed(struct phy_device *phydev) +{ + int ret; + + phydev->speed = SPEED_UNKNOWN; + ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT2); + if (ret < 0) + return ret; + + if (!(ret & MDIO_MMD_AN_MV_STAT2_AN_RESOLVED)) + return 0; + + if (ret & MDIO_MMD_AN_MV_STAT2_100BT1) + phydev->speed = SPEED_100; + else if (ret & MDIO_MMD_AN_MV_STAT2_1000BT1) + phydev->speed = SPEED_1000; + + return 0; } static int mv88q2xxx_read_status(struct phy_device *phydev) { int ret; + if (phydev->autoneg == AUTONEG_ENABLE) { + /* We have to get the negotiated speed first, otherwise we are + * not able to read the link. + */ + ret = mv88q2xxx_read_aneg_speed(phydev); + if (ret < 0) + return ret; + + ret = mv88q2xxx_read_link(phydev); + if (ret < 0) + return ret; + + ret = genphy_c45_read_lpa(phydev); + if (ret < 0) + return ret; + + ret = genphy_c45_baset1_read_status(phydev); + if (ret < 0) + return ret; + + ret = mv88q2xxx_read_master_slave_state(phydev); + if (ret < 0) + return ret; + + phy_resolve_aneg_linkmode(phydev); + + return 0; + } + ret = mv88q2xxx_read_link(phydev); if (ret < 0) return ret; @@ -171,7 +280,9 @@ static int mv88q2xxx_get_features(struct phy_device *phydev) * sequence provided by Marvell. Disable it for now until a proper * workaround is found or a new PHY revision is released. */ - linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, phydev->supported); + if (phydev->drv->phy_id == MARVELL_PHY_ID_88Q2110) + linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, + phydev->supported); return 0; } @@ -241,6 +352,75 @@ static int mv88q2xxx_get_sqi_max(struct phy_device *phydev) return 15; } +static int mv88q222x_soft_reset(struct phy_device *phydev) +{ + int ret; + + /* Enable RESET of DCL */ + if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) { + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x48); + if (ret < 0) + return ret; + } + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_CTRL, + MDIO_PCS_1000BT1_CTRL_RESET); + if (ret < 0) + return ret; + + ret = phy_write_mmd(phydev, MDIO_MMD_PCS, 0xffe4, 0xc); + if (ret < 0) + return ret; + + /* Disable RESET of DCL */ + if (phydev->autoneg == AUTONEG_ENABLE || phydev->speed == SPEED_1000) + return phy_write_mmd(phydev, MDIO_MMD_PCS, 0xfe1b, 0x58); + + return 0; +} + +static int mv88q222x_config_aneg(struct phy_device *phydev) +{ + int ret; + + ret = genphy_c45_config_aneg(phydev); + if (ret) + return ret; + + return mv88q222x_soft_reset(phydev); +} + +static int mv88q222x_revb0_config_init(struct phy_device *phydev) +{ + int ret, i; + + for (i = 0; i < ARRAY_SIZE(mv88q222x_revb0_init_seq0); i++) { + ret = phy_write_mmd(phydev, mv88q222x_revb0_init_seq0[i].devad, + mv88q222x_revb0_init_seq0[i].regnum, + mv88q222x_revb0_init_seq0[i].val); + if (ret < 0) + return ret; + } + + usleep_range(5000, 10000); + + for (i = 0; i < ARRAY_SIZE(mv88q222x_revb0_init_seq1); i++) { + ret = phy_write_mmd(phydev, mv88q222x_revb0_init_seq1[i].devad, + mv88q222x_revb0_init_seq1[i].regnum, + mv88q222x_revb0_init_seq1[i].val); + if (ret < 0) + return ret; + } + + /* The 88Q2XXX PHYs do have the extended ability register available, but + * register MDIO_PMA_EXTABLE where they should signalize it does not + * work according to specification. Therefore, we force it here. + */ + phydev->pma_extable = MDIO_PMA_EXTABLE_BT1; + + return 0; +} + static struct phy_driver mv88q2xxx_driver[] = { { .phy_id = MARVELL_PHY_ID_88Q2110, @@ -255,12 +435,26 @@ static struct phy_driver mv88q2xxx_driver[] = { .get_sqi = mv88q2xxx_get_sqi, .get_sqi_max = mv88q2xxx_get_sqi_max, }, + { + PHY_ID_MATCH_EXACT(PHY_ID_88Q2220_REVB0), + .name = "mv88q2220", + .get_features = mv88q2xxx_get_features, + .config_aneg = mv88q222x_config_aneg, + .aneg_done = genphy_c45_aneg_done, + .config_init = mv88q222x_revb0_config_init, + .read_status = mv88q2xxx_read_status, + .soft_reset = mv88q222x_soft_reset, + .set_loopback = genphy_c45_loopback, + .get_sqi = mv88q2xxx_get_sqi, + .get_sqi_max = mv88q2xxx_get_sqi_max, + }, }; module_phy_driver(mv88q2xxx_driver); static struct mdio_device_id __maybe_unused mv88q2xxx_tbl[] = { { MARVELL_PHY_ID_88Q2110, MARVELL_PHY_ID_MASK }, + { PHY_ID_MATCH_EXACT(PHY_ID_88Q2220_REVB0), }, { /*sentinel*/ } }; MODULE_DEVICE_TABLE(mdio, mv88q2xxx_tbl); diff --git a/include/linux/marvell_phy.h b/include/linux/marvell_phy.h index 9b54c4f0677f..693eba9869e4 100644 --- a/include/linux/marvell_phy.h +++ b/include/linux/marvell_phy.h @@ -26,6 +26,7 @@ #define MARVELL_PHY_ID_88E2110 0x002b09b0 #define MARVELL_PHY_ID_88X2222 0x01410f10 #define MARVELL_PHY_ID_88Q2110 0x002b0980 +#define MARVELL_PHY_ID_88Q2220 0x002b0b20 /* Marvel 88E1111 in Finisar SFP module with modified PHY ID */ #define MARVELL_PHY_ID_88E1111_FINISAR 0x01ff0cc0